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10#define DRV_NAME "DL2000/TC902x-based linux driver"
11#include "dl2k.h"
12#include <linux/dma-mapping.h>
13
14#define dw32(reg, val) iowrite32(val, ioaddr + (reg))
15#define dw16(reg, val) iowrite16(val, ioaddr + (reg))
16#define dw8(reg, val) iowrite8(val, ioaddr + (reg))
17#define dr32(reg) ioread32(ioaddr + (reg))
18#define dr16(reg) ioread16(ioaddr + (reg))
19#define dr8(reg) ioread8(ioaddr + (reg))
20
21#define MAX_UNITS 8
22static int mtu[MAX_UNITS];
23static int vlan[MAX_UNITS];
24static int jumbo[MAX_UNITS];
25static char *media[MAX_UNITS];
26static int tx_flow=-1;
27static int rx_flow=-1;
28static int copy_thresh;
29static int rx_coalesce=10;
30static int rx_timeout=200;
31static int tx_coalesce=16;
32
33
34MODULE_AUTHOR ("Edward Peng");
35MODULE_DESCRIPTION ("D-Link DL2000-based Gigabit Ethernet Adapter");
36MODULE_LICENSE("GPL");
37module_param_array(mtu, int, NULL, 0);
38module_param_array(media, charp, NULL, 0);
39module_param_array(vlan, int, NULL, 0);
40module_param_array(jumbo, int, NULL, 0);
41module_param(tx_flow, int, 0);
42module_param(rx_flow, int, 0);
43module_param(copy_thresh, int, 0);
44module_param(rx_coalesce, int, 0);
45module_param(rx_timeout, int, 0);
46module_param(tx_coalesce, int, 0);
47
48
49
50#define DEFAULT_INTR (RxDMAComplete | HostError | IntRequested | TxDMAComplete| \
51 UpdateStats | LinkEvent)
52
53static void dl2k_enable_int(struct netdev_private *np)
54{
55 void __iomem *ioaddr = np->ioaddr;
56
57 dw16(IntEnable, DEFAULT_INTR);
58}
59
60static const int max_intrloop = 50;
61static const int multicast_filter_limit = 0x40;
62
63static int rio_open (struct net_device *dev);
64static void rio_timer (struct timer_list *t);
65static void rio_tx_timeout (struct net_device *dev, unsigned int txqueue);
66static netdev_tx_t start_xmit (struct sk_buff *skb, struct net_device *dev);
67static irqreturn_t rio_interrupt (int irq, void *dev_instance);
68static void rio_free_tx (struct net_device *dev, int irq);
69static void tx_error (struct net_device *dev, int tx_status);
70static int receive_packet (struct net_device *dev);
71static void rio_error (struct net_device *dev, int int_status);
72static void set_multicast (struct net_device *dev);
73static struct net_device_stats *get_stats (struct net_device *dev);
74static int clear_stats (struct net_device *dev);
75static int rio_ioctl (struct net_device *dev, struct ifreq *rq, int cmd);
76static int rio_close (struct net_device *dev);
77static int find_miiphy (struct net_device *dev);
78static int parse_eeprom (struct net_device *dev);
79static int read_eeprom (struct netdev_private *, int eep_addr);
80static int mii_wait_link (struct net_device *dev, int wait);
81static int mii_set_media (struct net_device *dev);
82static int mii_get_media (struct net_device *dev);
83static int mii_set_media_pcs (struct net_device *dev);
84static int mii_get_media_pcs (struct net_device *dev);
85static int mii_read (struct net_device *dev, int phy_addr, int reg_num);
86static int mii_write (struct net_device *dev, int phy_addr, int reg_num,
87 u16 data);
88
89static const struct ethtool_ops ethtool_ops;
90
91static const struct net_device_ops netdev_ops = {
92 .ndo_open = rio_open,
93 .ndo_start_xmit = start_xmit,
94 .ndo_stop = rio_close,
95 .ndo_get_stats = get_stats,
96 .ndo_validate_addr = eth_validate_addr,
97 .ndo_set_mac_address = eth_mac_addr,
98 .ndo_set_rx_mode = set_multicast,
99 .ndo_do_ioctl = rio_ioctl,
100 .ndo_tx_timeout = rio_tx_timeout,
101};
102
103static int
104rio_probe1 (struct pci_dev *pdev, const struct pci_device_id *ent)
105{
106 struct net_device *dev;
107 struct netdev_private *np;
108 static int card_idx;
109 int chip_idx = ent->driver_data;
110 int err, irq;
111 void __iomem *ioaddr;
112 void *ring_space;
113 dma_addr_t ring_dma;
114
115 err = pci_enable_device (pdev);
116 if (err)
117 return err;
118
119 irq = pdev->irq;
120 err = pci_request_regions (pdev, "dl2k");
121 if (err)
122 goto err_out_disable;
123
124 pci_set_master (pdev);
125
126 err = -ENOMEM;
127
128 dev = alloc_etherdev (sizeof (*np));
129 if (!dev)
130 goto err_out_res;
131 SET_NETDEV_DEV(dev, &pdev->dev);
132
133 np = netdev_priv(dev);
134
135
136 ioaddr = pci_iomap(pdev, 0, 0);
137 if (!ioaddr)
138 goto err_out_dev;
139 np->eeprom_addr = ioaddr;
140
141#ifdef MEM_MAPPING
142
143 ioaddr = pci_iomap(pdev, 1, 0);
144 if (!ioaddr)
145 goto err_out_iounmap;
146#endif
147 np->ioaddr = ioaddr;
148 np->chip_id = chip_idx;
149 np->pdev = pdev;
150 spin_lock_init (&np->tx_lock);
151 spin_lock_init (&np->rx_lock);
152
153
154 np->an_enable = 1;
155 np->tx_coalesce = 1;
156 if (card_idx < MAX_UNITS) {
157 if (media[card_idx] != NULL) {
158 np->an_enable = 0;
159 if (strcmp (media[card_idx], "auto") == 0 ||
160 strcmp (media[card_idx], "autosense") == 0 ||
161 strcmp (media[card_idx], "0") == 0 ) {
162 np->an_enable = 2;
163 } else if (strcmp (media[card_idx], "100mbps_fd") == 0 ||
164 strcmp (media[card_idx], "4") == 0) {
165 np->speed = 100;
166 np->full_duplex = 1;
167 } else if (strcmp (media[card_idx], "100mbps_hd") == 0 ||
168 strcmp (media[card_idx], "3") == 0) {
169 np->speed = 100;
170 np->full_duplex = 0;
171 } else if (strcmp (media[card_idx], "10mbps_fd") == 0 ||
172 strcmp (media[card_idx], "2") == 0) {
173 np->speed = 10;
174 np->full_duplex = 1;
175 } else if (strcmp (media[card_idx], "10mbps_hd") == 0 ||
176 strcmp (media[card_idx], "1") == 0) {
177 np->speed = 10;
178 np->full_duplex = 0;
179 } else if (strcmp (media[card_idx], "1000mbps_fd") == 0 ||
180 strcmp (media[card_idx], "6") == 0) {
181 np->speed=1000;
182 np->full_duplex=1;
183 } else if (strcmp (media[card_idx], "1000mbps_hd") == 0 ||
184 strcmp (media[card_idx], "5") == 0) {
185 np->speed = 1000;
186 np->full_duplex = 0;
187 } else {
188 np->an_enable = 1;
189 }
190 }
191 if (jumbo[card_idx] != 0) {
192 np->jumbo = 1;
193 dev->mtu = MAX_JUMBO;
194 } else {
195 np->jumbo = 0;
196 if (mtu[card_idx] > 0 && mtu[card_idx] < PACKET_SIZE)
197 dev->mtu = mtu[card_idx];
198 }
199 np->vlan = (vlan[card_idx] > 0 && vlan[card_idx] < 4096) ?
200 vlan[card_idx] : 0;
201 if (rx_coalesce > 0 && rx_timeout > 0) {
202 np->rx_coalesce = rx_coalesce;
203 np->rx_timeout = rx_timeout;
204 np->coalesce = 1;
205 }
206 np->tx_flow = (tx_flow == 0) ? 0 : 1;
207 np->rx_flow = (rx_flow == 0) ? 0 : 1;
208
209 if (tx_coalesce < 1)
210 tx_coalesce = 1;
211 else if (tx_coalesce > TX_RING_SIZE-1)
212 tx_coalesce = TX_RING_SIZE - 1;
213 }
214 dev->netdev_ops = &netdev_ops;
215 dev->watchdog_timeo = TX_TIMEOUT;
216 dev->ethtool_ops = ðtool_ops;
217#if 0
218 dev->features = NETIF_F_IP_CSUM;
219#endif
220
221 dev->min_mtu = ETH_MIN_MTU;
222 dev->max_mtu = np->jumbo ? MAX_JUMBO : PACKET_SIZE;
223
224 pci_set_drvdata (pdev, dev);
225
226 ring_space = pci_alloc_consistent (pdev, TX_TOTAL_SIZE, &ring_dma);
227 if (!ring_space)
228 goto err_out_iounmap;
229 np->tx_ring = ring_space;
230 np->tx_ring_dma = ring_dma;
231
232 ring_space = pci_alloc_consistent (pdev, RX_TOTAL_SIZE, &ring_dma);
233 if (!ring_space)
234 goto err_out_unmap_tx;
235 np->rx_ring = ring_space;
236 np->rx_ring_dma = ring_dma;
237
238
239 parse_eeprom (dev);
240
241
242 err = find_miiphy (dev);
243 if (err)
244 goto err_out_unmap_rx;
245
246
247 np->phy_media = (dr16(ASICCtrl) & PhyMedia) ? 1 : 0;
248 np->link_status = 0;
249
250 if (np->phy_media) {
251
252 if (np->an_enable == 2) {
253 np->an_enable = 1;
254 }
255 } else {
256
257
258 if (np->speed == 1000)
259 np->an_enable = 1;
260 }
261
262 err = register_netdev (dev);
263 if (err)
264 goto err_out_unmap_rx;
265
266 card_idx++;
267
268 printk (KERN_INFO "%s: %s, %pM, IRQ %d\n",
269 dev->name, np->name, dev->dev_addr, irq);
270 if (tx_coalesce > 1)
271 printk(KERN_INFO "tx_coalesce:\t%d packets\n",
272 tx_coalesce);
273 if (np->coalesce)
274 printk(KERN_INFO
275 "rx_coalesce:\t%d packets\n"
276 "rx_timeout: \t%d ns\n",
277 np->rx_coalesce, np->rx_timeout*640);
278 if (np->vlan)
279 printk(KERN_INFO "vlan(id):\t%d\n", np->vlan);
280 return 0;
281
282err_out_unmap_rx:
283 pci_free_consistent (pdev, RX_TOTAL_SIZE, np->rx_ring, np->rx_ring_dma);
284err_out_unmap_tx:
285 pci_free_consistent (pdev, TX_TOTAL_SIZE, np->tx_ring, np->tx_ring_dma);
286err_out_iounmap:
287#ifdef MEM_MAPPING
288 pci_iounmap(pdev, np->ioaddr);
289#endif
290 pci_iounmap(pdev, np->eeprom_addr);
291err_out_dev:
292 free_netdev (dev);
293err_out_res:
294 pci_release_regions (pdev);
295err_out_disable:
296 pci_disable_device (pdev);
297 return err;
298}
299
300static int
301find_miiphy (struct net_device *dev)
302{
303 struct netdev_private *np = netdev_priv(dev);
304 int i, phy_found = 0;
305
306 np->phy_addr = 1;
307
308 for (i = 31; i >= 0; i--) {
309 int mii_status = mii_read (dev, i, 1);
310 if (mii_status != 0xffff && mii_status != 0x0000) {
311 np->phy_addr = i;
312 phy_found++;
313 }
314 }
315 if (!phy_found) {
316 printk (KERN_ERR "%s: No MII PHY found!\n", dev->name);
317 return -ENODEV;
318 }
319 return 0;
320}
321
322static int
323parse_eeprom (struct net_device *dev)
324{
325 struct netdev_private *np = netdev_priv(dev);
326 void __iomem *ioaddr = np->ioaddr;
327 int i, j;
328 u8 sromdata[256];
329 u8 *psib;
330 u32 crc;
331 PSROM_t psrom = (PSROM_t) sromdata;
332
333 int cid, next;
334
335 for (i = 0; i < 128; i++)
336 ((__le16 *) sromdata)[i] = cpu_to_le16(read_eeprom(np, i));
337
338 if (np->pdev->vendor == PCI_VENDOR_ID_DLINK) {
339
340 crc = ~ether_crc_le (256 - 4, sromdata);
341 if (psrom->crc != cpu_to_le32(crc)) {
342 printk (KERN_ERR "%s: EEPROM data CRC error.\n",
343 dev->name);
344 return -1;
345 }
346 }
347
348
349 for (i = 0; i < 6; i++)
350 dev->dev_addr[i] = psrom->mac_addr[i];
351
352 if (np->chip_id == CHIP_IP1000A) {
353 np->led_mode = psrom->led_mode;
354 return 0;
355 }
356
357 if (np->pdev->vendor != PCI_VENDOR_ID_DLINK) {
358 return 0;
359 }
360
361
362 i = 0x30;
363 psib = (u8 *) sromdata;
364 do {
365 cid = psib[i++];
366 next = psib[i++];
367 if ((cid == 0 && next == 0) || (cid == 0xff && next == 0xff)) {
368 printk (KERN_ERR "Cell data error\n");
369 return -1;
370 }
371 switch (cid) {
372 case 0:
373 break;
374 case 1:
375 return 0;
376 case 2:
377 np->duplex_polarity = psib[i];
378 dw8(PhyCtrl, dr8(PhyCtrl) | psib[i]);
379 break;
380 case 3:
381 np->wake_polarity = psib[i];
382 break;
383 case 9:
384 j = (next - i > 255) ? 255 : next - i;
385 memcpy (np->name, &(psib[i]), j);
386 break;
387 case 4:
388 case 5:
389 case 6:
390 case 7:
391 case 8:
392 break;
393 default:
394 return -1;
395 }
396 i = next;
397 } while (1);
398
399 return 0;
400}
401
402static void rio_set_led_mode(struct net_device *dev)
403{
404 struct netdev_private *np = netdev_priv(dev);
405 void __iomem *ioaddr = np->ioaddr;
406 u32 mode;
407
408 if (np->chip_id != CHIP_IP1000A)
409 return;
410
411 mode = dr32(ASICCtrl);
412 mode &= ~(IPG_AC_LED_MODE_BIT_1 | IPG_AC_LED_MODE | IPG_AC_LED_SPEED);
413
414 if (np->led_mode & 0x01)
415 mode |= IPG_AC_LED_MODE;
416 if (np->led_mode & 0x02)
417 mode |= IPG_AC_LED_MODE_BIT_1;
418 if (np->led_mode & 0x08)
419 mode |= IPG_AC_LED_SPEED;
420
421 dw32(ASICCtrl, mode);
422}
423
424static inline dma_addr_t desc_to_dma(struct netdev_desc *desc)
425{
426 return le64_to_cpu(desc->fraginfo) & DMA_BIT_MASK(48);
427}
428
429static void free_list(struct net_device *dev)
430{
431 struct netdev_private *np = netdev_priv(dev);
432 struct sk_buff *skb;
433 int i;
434
435
436 for (i = 0; i < RX_RING_SIZE; i++) {
437 skb = np->rx_skbuff[i];
438 if (skb) {
439 pci_unmap_single(np->pdev, desc_to_dma(&np->rx_ring[i]),
440 skb->len, PCI_DMA_FROMDEVICE);
441 dev_kfree_skb(skb);
442 np->rx_skbuff[i] = NULL;
443 }
444 np->rx_ring[i].status = 0;
445 np->rx_ring[i].fraginfo = 0;
446 }
447 for (i = 0; i < TX_RING_SIZE; i++) {
448 skb = np->tx_skbuff[i];
449 if (skb) {
450 pci_unmap_single(np->pdev, desc_to_dma(&np->tx_ring[i]),
451 skb->len, PCI_DMA_TODEVICE);
452 dev_kfree_skb(skb);
453 np->tx_skbuff[i] = NULL;
454 }
455 }
456}
457
458static void rio_reset_ring(struct netdev_private *np)
459{
460 int i;
461
462 np->cur_rx = 0;
463 np->cur_tx = 0;
464 np->old_rx = 0;
465 np->old_tx = 0;
466
467 for (i = 0; i < TX_RING_SIZE; i++)
468 np->tx_ring[i].status = cpu_to_le64(TFDDone);
469
470 for (i = 0; i < RX_RING_SIZE; i++)
471 np->rx_ring[i].status = 0;
472}
473
474
475static int alloc_list(struct net_device *dev)
476{
477 struct netdev_private *np = netdev_priv(dev);
478 int i;
479
480 rio_reset_ring(np);
481 np->rx_buf_sz = (dev->mtu <= 1500 ? PACKET_SIZE : dev->mtu + 32);
482
483
484 for (i = 0; i < TX_RING_SIZE; i++) {
485 np->tx_skbuff[i] = NULL;
486 np->tx_ring[i].next_desc = cpu_to_le64(np->tx_ring_dma +
487 ((i + 1) % TX_RING_SIZE) *
488 sizeof(struct netdev_desc));
489 }
490
491
492 for (i = 0; i < RX_RING_SIZE; i++) {
493
494 struct sk_buff *skb;
495
496 skb = netdev_alloc_skb_ip_align(dev, np->rx_buf_sz);
497 np->rx_skbuff[i] = skb;
498 if (!skb) {
499 free_list(dev);
500 return -ENOMEM;
501 }
502
503 np->rx_ring[i].next_desc = cpu_to_le64(np->rx_ring_dma +
504 ((i + 1) % RX_RING_SIZE) *
505 sizeof(struct netdev_desc));
506
507 np->rx_ring[i].fraginfo =
508 cpu_to_le64(pci_map_single(
509 np->pdev, skb->data, np->rx_buf_sz,
510 PCI_DMA_FROMDEVICE));
511 np->rx_ring[i].fraginfo |= cpu_to_le64((u64)np->rx_buf_sz << 48);
512 }
513
514 return 0;
515}
516
517static void rio_hw_init(struct net_device *dev)
518{
519 struct netdev_private *np = netdev_priv(dev);
520 void __iomem *ioaddr = np->ioaddr;
521 int i;
522 u16 macctrl;
523
524
525 dw16(ASICCtrl + 2,
526 GlobalReset | DMAReset | FIFOReset | NetworkReset | HostReset);
527 mdelay(10);
528
529 rio_set_led_mode(dev);
530
531
532 dw32(DebugCtrl, dr32(DebugCtrl) | 0x0230);
533
534 if (np->chip_id == CHIP_IP1000A &&
535 (np->pdev->revision == 0x40 || np->pdev->revision == 0x41)) {
536
537 mii_write(dev, np->phy_addr, 31, 0x0001);
538 mii_write(dev, np->phy_addr, 27, 0x01e0);
539 mii_write(dev, np->phy_addr, 31, 0x0002);
540 mii_write(dev, np->phy_addr, 27, 0xeb8e);
541 mii_write(dev, np->phy_addr, 31, 0x0000);
542 mii_write(dev, np->phy_addr, 30, 0x005e);
543
544 mii_write(dev, np->phy_addr, MII_CTRL1000, 0x0700);
545 }
546
547 if (np->phy_media)
548 mii_set_media_pcs(dev);
549 else
550 mii_set_media(dev);
551
552
553 if (np->jumbo != 0)
554 dw16(MaxFrameSize, MAX_JUMBO+14);
555
556
557 dw32(RFDListPtr0, np->rx_ring_dma);
558 dw32(RFDListPtr1, 0);
559
560
561
562
563
564 for (i = 0; i < 3; i++)
565 dw16(StationAddr0 + 2 * i,
566 cpu_to_le16(((u16 *)dev->dev_addr)[i]));
567
568 set_multicast (dev);
569 if (np->coalesce) {
570 dw32(RxDMAIntCtrl, np->rx_coalesce | np->rx_timeout << 16);
571 }
572
573 dw8(RxDMAPollPeriod, 0x20);
574 dw8(TxDMAPollPeriod, 0xff);
575 dw8(RxDMABurstThresh, 0x30);
576 dw8(RxDMAUrgentThresh, 0x30);
577 dw32(RmonStatMask, 0x0007ffff);
578
579 clear_stats (dev);
580
581
582 if (np->vlan) {
583
584 dw32(RxDMAIntCtrl, dr32(RxDMAIntCtrl) | 0x7 << 10);
585
586 dw16(VLANId, np->vlan);
587
588 dw32(VLANTag, 0x8100 << 16 | np->vlan);
589
590
591 dw32(MACCtrl, dr32(MACCtrl) | AutoVLANuntagging);
592 }
593
594
595 dw32(MACCtrl, dr32(MACCtrl) | StatsEnable | RxEnable | TxEnable);
596
597 macctrl = 0;
598 macctrl |= (np->vlan) ? AutoVLANuntagging : 0;
599 macctrl |= (np->full_duplex) ? DuplexSelect : 0;
600 macctrl |= (np->tx_flow) ? TxFlowControlEnable : 0;
601 macctrl |= (np->rx_flow) ? RxFlowControlEnable : 0;
602 dw16(MACCtrl, macctrl);
603}
604
605static void rio_hw_stop(struct net_device *dev)
606{
607 struct netdev_private *np = netdev_priv(dev);
608 void __iomem *ioaddr = np->ioaddr;
609
610
611 dw16(IntEnable, 0);
612
613
614 dw32(MACCtrl, TxDisable | RxDisable | StatsDisable);
615}
616
617static int rio_open(struct net_device *dev)
618{
619 struct netdev_private *np = netdev_priv(dev);
620 const int irq = np->pdev->irq;
621 int i;
622
623 i = alloc_list(dev);
624 if (i)
625 return i;
626
627 rio_hw_init(dev);
628
629 i = request_irq(irq, rio_interrupt, IRQF_SHARED, dev->name, dev);
630 if (i) {
631 rio_hw_stop(dev);
632 free_list(dev);
633 return i;
634 }
635
636 timer_setup(&np->timer, rio_timer, 0);
637 np->timer.expires = jiffies + 1 * HZ;
638 add_timer(&np->timer);
639
640 netif_start_queue (dev);
641
642 dl2k_enable_int(np);
643 return 0;
644}
645
646static void
647rio_timer (struct timer_list *t)
648{
649 struct netdev_private *np = from_timer(np, t, timer);
650 struct net_device *dev = pci_get_drvdata(np->pdev);
651 unsigned int entry;
652 int next_tick = 1*HZ;
653 unsigned long flags;
654
655 spin_lock_irqsave(&np->rx_lock, flags);
656
657 if (np->cur_rx - np->old_rx >= RX_RING_SIZE) {
658 printk(KERN_INFO "Try to recover rx ring exhausted...\n");
659
660 for (; np->cur_rx - np->old_rx > 0; np->old_rx++) {
661 struct sk_buff *skb;
662 entry = np->old_rx % RX_RING_SIZE;
663
664 if (np->rx_skbuff[entry] == NULL) {
665 skb = netdev_alloc_skb_ip_align(dev,
666 np->rx_buf_sz);
667 if (skb == NULL) {
668 np->rx_ring[entry].fraginfo = 0;
669 printk (KERN_INFO
670 "%s: Still unable to re-allocate Rx skbuff.#%d\n",
671 dev->name, entry);
672 break;
673 }
674 np->rx_skbuff[entry] = skb;
675 np->rx_ring[entry].fraginfo =
676 cpu_to_le64 (pci_map_single
677 (np->pdev, skb->data, np->rx_buf_sz,
678 PCI_DMA_FROMDEVICE));
679 }
680 np->rx_ring[entry].fraginfo |=
681 cpu_to_le64((u64)np->rx_buf_sz << 48);
682 np->rx_ring[entry].status = 0;
683 }
684 }
685 spin_unlock_irqrestore (&np->rx_lock, flags);
686 np->timer.expires = jiffies + next_tick;
687 add_timer(&np->timer);
688}
689
690static void
691rio_tx_timeout (struct net_device *dev, unsigned int txqueue)
692{
693 struct netdev_private *np = netdev_priv(dev);
694 void __iomem *ioaddr = np->ioaddr;
695
696 printk (KERN_INFO "%s: Tx timed out (%4.4x), is buffer full?\n",
697 dev->name, dr32(TxStatus));
698 rio_free_tx(dev, 0);
699 dev->if_port = 0;
700 netif_trans_update(dev);
701}
702
703static netdev_tx_t
704start_xmit (struct sk_buff *skb, struct net_device *dev)
705{
706 struct netdev_private *np = netdev_priv(dev);
707 void __iomem *ioaddr = np->ioaddr;
708 struct netdev_desc *txdesc;
709 unsigned entry;
710 u64 tfc_vlan_tag = 0;
711
712 if (np->link_status == 0) {
713 dev_kfree_skb(skb);
714 return NETDEV_TX_OK;
715 }
716 entry = np->cur_tx % TX_RING_SIZE;
717 np->tx_skbuff[entry] = skb;
718 txdesc = &np->tx_ring[entry];
719
720#if 0
721 if (skb->ip_summed == CHECKSUM_PARTIAL) {
722 txdesc->status |=
723 cpu_to_le64 (TCPChecksumEnable | UDPChecksumEnable |
724 IPChecksumEnable);
725 }
726#endif
727 if (np->vlan) {
728 tfc_vlan_tag = VLANTagInsert |
729 ((u64)np->vlan << 32) |
730 ((u64)skb->priority << 45);
731 }
732 txdesc->fraginfo = cpu_to_le64 (pci_map_single (np->pdev, skb->data,
733 skb->len,
734 PCI_DMA_TODEVICE));
735 txdesc->fraginfo |= cpu_to_le64((u64)skb->len << 48);
736
737
738
739 if (entry % np->tx_coalesce == 0 || np->speed == 10)
740 txdesc->status = cpu_to_le64 (entry | tfc_vlan_tag |
741 WordAlignDisable |
742 TxDMAIndicate |
743 (1 << FragCountShift));
744 else
745 txdesc->status = cpu_to_le64 (entry | tfc_vlan_tag |
746 WordAlignDisable |
747 (1 << FragCountShift));
748
749
750 dw32(DMACtrl, dr32(DMACtrl) | 0x00001000);
751
752 dw32(CountDown, 10000);
753 np->cur_tx = (np->cur_tx + 1) % TX_RING_SIZE;
754 if ((np->cur_tx - np->old_tx + TX_RING_SIZE) % TX_RING_SIZE
755 < TX_QUEUE_LEN - 1 && np->speed != 10) {
756
757 } else if (!netif_queue_stopped(dev)) {
758 netif_stop_queue (dev);
759 }
760
761
762 if (!dr32(TFDListPtr0)) {
763 dw32(TFDListPtr0, np->tx_ring_dma +
764 entry * sizeof (struct netdev_desc));
765 dw32(TFDListPtr1, 0);
766 }
767
768 return NETDEV_TX_OK;
769}
770
771static irqreturn_t
772rio_interrupt (int irq, void *dev_instance)
773{
774 struct net_device *dev = dev_instance;
775 struct netdev_private *np = netdev_priv(dev);
776 void __iomem *ioaddr = np->ioaddr;
777 unsigned int_status;
778 int cnt = max_intrloop;
779 int handled = 0;
780
781 while (1) {
782 int_status = dr16(IntStatus);
783 dw16(IntStatus, int_status);
784 int_status &= DEFAULT_INTR;
785 if (int_status == 0 || --cnt < 0)
786 break;
787 handled = 1;
788
789 if (int_status & RxDMAComplete)
790 receive_packet (dev);
791
792 if ((int_status & (TxDMAComplete|IntRequested))) {
793 int tx_status;
794 tx_status = dr32(TxStatus);
795 if (tx_status & 0x01)
796 tx_error (dev, tx_status);
797
798 rio_free_tx (dev, 1);
799 }
800
801
802 if (int_status &
803 (HostError | LinkEvent | UpdateStats))
804 rio_error (dev, int_status);
805 }
806 if (np->cur_tx != np->old_tx)
807 dw32(CountDown, 100);
808 return IRQ_RETVAL(handled);
809}
810
811static void
812rio_free_tx (struct net_device *dev, int irq)
813{
814 struct netdev_private *np = netdev_priv(dev);
815 int entry = np->old_tx % TX_RING_SIZE;
816 int tx_use = 0;
817 unsigned long flag = 0;
818
819 if (irq)
820 spin_lock(&np->tx_lock);
821 else
822 spin_lock_irqsave(&np->tx_lock, flag);
823
824
825 while (entry != np->cur_tx) {
826 struct sk_buff *skb;
827
828 if (!(np->tx_ring[entry].status & cpu_to_le64(TFDDone)))
829 break;
830 skb = np->tx_skbuff[entry];
831 pci_unmap_single (np->pdev,
832 desc_to_dma(&np->tx_ring[entry]),
833 skb->len, PCI_DMA_TODEVICE);
834 if (irq)
835 dev_consume_skb_irq(skb);
836 else
837 dev_kfree_skb(skb);
838
839 np->tx_skbuff[entry] = NULL;
840 entry = (entry + 1) % TX_RING_SIZE;
841 tx_use++;
842 }
843 if (irq)
844 spin_unlock(&np->tx_lock);
845 else
846 spin_unlock_irqrestore(&np->tx_lock, flag);
847 np->old_tx = entry;
848
849
850
851
852 if (netif_queue_stopped(dev) &&
853 ((np->cur_tx - np->old_tx + TX_RING_SIZE) % TX_RING_SIZE
854 < TX_QUEUE_LEN - 1 || np->speed == 10)) {
855 netif_wake_queue (dev);
856 }
857}
858
859static void
860tx_error (struct net_device *dev, int tx_status)
861{
862 struct netdev_private *np = netdev_priv(dev);
863 void __iomem *ioaddr = np->ioaddr;
864 int frame_id;
865 int i;
866
867 frame_id = (tx_status & 0xffff0000);
868 printk (KERN_ERR "%s: Transmit error, TxStatus %4.4x, FrameId %d.\n",
869 dev->name, tx_status, frame_id);
870 dev->stats.tx_errors++;
871
872 if (tx_status & 0x10) {
873 dev->stats.tx_fifo_errors++;
874 dw16(TxStartThresh, dr16(TxStartThresh) + 0x10);
875
876 dw16(ASICCtrl + 2,
877 TxReset | DMAReset | FIFOReset | NetworkReset);
878
879 for (i = 50; i > 0; i--) {
880 if (!(dr16(ASICCtrl + 2) & ResetBusy))
881 break;
882 mdelay (1);
883 }
884 rio_set_led_mode(dev);
885 rio_free_tx (dev, 1);
886
887 dw32(TFDListPtr0, np->tx_ring_dma +
888 np->old_tx * sizeof (struct netdev_desc));
889 dw32(TFDListPtr1, 0);
890
891
892 }
893
894 if (tx_status & 0x04) {
895 dev->stats.tx_fifo_errors++;
896
897 dw16(ASICCtrl + 2, TxReset | FIFOReset);
898
899 for (i = 50; i > 0; i--) {
900 if (!(dr16(ASICCtrl + 2) & ResetBusy))
901 break;
902 mdelay (1);
903 }
904 rio_set_led_mode(dev);
905
906 }
907
908 if (tx_status & 0x08)
909 dev->stats.collisions++;
910
911 dw32(MACCtrl, dr16(MACCtrl) | TxEnable);
912}
913
914static int
915receive_packet (struct net_device *dev)
916{
917 struct netdev_private *np = netdev_priv(dev);
918 int entry = np->cur_rx % RX_RING_SIZE;
919 int cnt = 30;
920
921
922 while (1) {
923 struct netdev_desc *desc = &np->rx_ring[entry];
924 int pkt_len;
925 u64 frame_status;
926
927 if (!(desc->status & cpu_to_le64(RFDDone)) ||
928 !(desc->status & cpu_to_le64(FrameStart)) ||
929 !(desc->status & cpu_to_le64(FrameEnd)))
930 break;
931
932
933 frame_status = le64_to_cpu(desc->status);
934 pkt_len = frame_status & 0xffff;
935 if (--cnt < 0)
936 break;
937
938 if (frame_status & RFS_Errors) {
939 dev->stats.rx_errors++;
940 if (frame_status & (RxRuntFrame | RxLengthError))
941 dev->stats.rx_length_errors++;
942 if (frame_status & RxFCSError)
943 dev->stats.rx_crc_errors++;
944 if (frame_status & RxAlignmentError && np->speed != 1000)
945 dev->stats.rx_frame_errors++;
946 if (frame_status & RxFIFOOverrun)
947 dev->stats.rx_fifo_errors++;
948 } else {
949 struct sk_buff *skb;
950
951
952 if (pkt_len > copy_thresh) {
953 pci_unmap_single (np->pdev,
954 desc_to_dma(desc),
955 np->rx_buf_sz,
956 PCI_DMA_FROMDEVICE);
957 skb_put (skb = np->rx_skbuff[entry], pkt_len);
958 np->rx_skbuff[entry] = NULL;
959 } else if ((skb = netdev_alloc_skb_ip_align(dev, pkt_len))) {
960 pci_dma_sync_single_for_cpu(np->pdev,
961 desc_to_dma(desc),
962 np->rx_buf_sz,
963 PCI_DMA_FROMDEVICE);
964 skb_copy_to_linear_data (skb,
965 np->rx_skbuff[entry]->data,
966 pkt_len);
967 skb_put (skb, pkt_len);
968 pci_dma_sync_single_for_device(np->pdev,
969 desc_to_dma(desc),
970 np->rx_buf_sz,
971 PCI_DMA_FROMDEVICE);
972 }
973 skb->protocol = eth_type_trans (skb, dev);
974#if 0
975
976 if (np->pdev->pci_rev_id >= 0x0c &&
977 !(frame_status & (TCPError | UDPError | IPError))) {
978 skb->ip_summed = CHECKSUM_UNNECESSARY;
979 }
980#endif
981 netif_rx (skb);
982 }
983 entry = (entry + 1) % RX_RING_SIZE;
984 }
985 spin_lock(&np->rx_lock);
986 np->cur_rx = entry;
987
988 entry = np->old_rx;
989 while (entry != np->cur_rx) {
990 struct sk_buff *skb;
991
992 if (np->rx_skbuff[entry] == NULL) {
993 skb = netdev_alloc_skb_ip_align(dev, np->rx_buf_sz);
994 if (skb == NULL) {
995 np->rx_ring[entry].fraginfo = 0;
996 printk (KERN_INFO
997 "%s: receive_packet: "
998 "Unable to re-allocate Rx skbuff.#%d\n",
999 dev->name, entry);
1000 break;
1001 }
1002 np->rx_skbuff[entry] = skb;
1003 np->rx_ring[entry].fraginfo =
1004 cpu_to_le64 (pci_map_single
1005 (np->pdev, skb->data, np->rx_buf_sz,
1006 PCI_DMA_FROMDEVICE));
1007 }
1008 np->rx_ring[entry].fraginfo |=
1009 cpu_to_le64((u64)np->rx_buf_sz << 48);
1010 np->rx_ring[entry].status = 0;
1011 entry = (entry + 1) % RX_RING_SIZE;
1012 }
1013 np->old_rx = entry;
1014 spin_unlock(&np->rx_lock);
1015 return 0;
1016}
1017
1018static void
1019rio_error (struct net_device *dev, int int_status)
1020{
1021 struct netdev_private *np = netdev_priv(dev);
1022 void __iomem *ioaddr = np->ioaddr;
1023 u16 macctrl;
1024
1025
1026 if (int_status & LinkEvent) {
1027 if (mii_wait_link (dev, 10) == 0) {
1028 printk (KERN_INFO "%s: Link up\n", dev->name);
1029 if (np->phy_media)
1030 mii_get_media_pcs (dev);
1031 else
1032 mii_get_media (dev);
1033 if (np->speed == 1000)
1034 np->tx_coalesce = tx_coalesce;
1035 else
1036 np->tx_coalesce = 1;
1037 macctrl = 0;
1038 macctrl |= (np->vlan) ? AutoVLANuntagging : 0;
1039 macctrl |= (np->full_duplex) ? DuplexSelect : 0;
1040 macctrl |= (np->tx_flow) ?
1041 TxFlowControlEnable : 0;
1042 macctrl |= (np->rx_flow) ?
1043 RxFlowControlEnable : 0;
1044 dw16(MACCtrl, macctrl);
1045 np->link_status = 1;
1046 netif_carrier_on(dev);
1047 } else {
1048 printk (KERN_INFO "%s: Link off\n", dev->name);
1049 np->link_status = 0;
1050 netif_carrier_off(dev);
1051 }
1052 }
1053
1054
1055 if (int_status & UpdateStats) {
1056 get_stats (dev);
1057 }
1058
1059
1060
1061 if (int_status & HostError) {
1062 printk (KERN_ERR "%s: HostError! IntStatus %4.4x.\n",
1063 dev->name, int_status);
1064 dw16(ASICCtrl + 2, GlobalReset | HostReset);
1065 mdelay (500);
1066 rio_set_led_mode(dev);
1067 }
1068}
1069
1070static struct net_device_stats *
1071get_stats (struct net_device *dev)
1072{
1073 struct netdev_private *np = netdev_priv(dev);
1074 void __iomem *ioaddr = np->ioaddr;
1075#ifdef MEM_MAPPING
1076 int i;
1077#endif
1078 unsigned int stat_reg;
1079
1080
1081
1082
1083 dev->stats.rx_packets += dr32(FramesRcvOk);
1084 dev->stats.tx_packets += dr32(FramesXmtOk);
1085 dev->stats.rx_bytes += dr32(OctetRcvOk);
1086 dev->stats.tx_bytes += dr32(OctetXmtOk);
1087
1088 dev->stats.multicast = dr32(McstFramesRcvdOk);
1089 dev->stats.collisions += dr32(SingleColFrames)
1090 + dr32(MultiColFrames);
1091
1092
1093 stat_reg = dr16(FramesAbortXSColls);
1094 dev->stats.tx_aborted_errors += stat_reg;
1095 dev->stats.tx_errors += stat_reg;
1096
1097 stat_reg = dr16(CarrierSenseErrors);
1098 dev->stats.tx_carrier_errors += stat_reg;
1099 dev->stats.tx_errors += stat_reg;
1100
1101
1102 dr32(McstOctetXmtOk);
1103 dr16(BcstFramesXmtdOk);
1104 dr32(McstFramesXmtdOk);
1105 dr16(BcstFramesRcvdOk);
1106 dr16(MacControlFramesRcvd);
1107 dr16(FrameTooLongErrors);
1108 dr16(InRangeLengthErrors);
1109 dr16(FramesCheckSeqErrors);
1110 dr16(FramesLostRxErrors);
1111 dr32(McstOctetXmtOk);
1112 dr32(BcstOctetXmtOk);
1113 dr32(McstFramesXmtdOk);
1114 dr32(FramesWDeferredXmt);
1115 dr32(LateCollisions);
1116 dr16(BcstFramesXmtdOk);
1117 dr16(MacControlFramesXmtd);
1118 dr16(FramesWEXDeferal);
1119
1120#ifdef MEM_MAPPING
1121 for (i = 0x100; i <= 0x150; i += 4)
1122 dr32(i);
1123#endif
1124 dr16(TxJumboFrames);
1125 dr16(RxJumboFrames);
1126 dr16(TCPCheckSumErrors);
1127 dr16(UDPCheckSumErrors);
1128 dr16(IPCheckSumErrors);
1129 return &dev->stats;
1130}
1131
1132static int
1133clear_stats (struct net_device *dev)
1134{
1135 struct netdev_private *np = netdev_priv(dev);
1136 void __iomem *ioaddr = np->ioaddr;
1137#ifdef MEM_MAPPING
1138 int i;
1139#endif
1140
1141
1142
1143 dr32(FramesRcvOk);
1144 dr32(FramesXmtOk);
1145 dr32(OctetRcvOk);
1146 dr32(OctetXmtOk);
1147
1148 dr32(McstFramesRcvdOk);
1149 dr32(SingleColFrames);
1150 dr32(MultiColFrames);
1151 dr32(LateCollisions);
1152
1153 dr16(FrameTooLongErrors);
1154 dr16(InRangeLengthErrors);
1155 dr16(FramesCheckSeqErrors);
1156 dr16(FramesLostRxErrors);
1157
1158
1159 dr16(FramesAbortXSColls);
1160 dr16(CarrierSenseErrors);
1161
1162
1163 dr32(McstOctetXmtOk);
1164 dr16(BcstFramesXmtdOk);
1165 dr32(McstFramesXmtdOk);
1166 dr16(BcstFramesRcvdOk);
1167 dr16(MacControlFramesRcvd);
1168 dr32(McstOctetXmtOk);
1169 dr32(BcstOctetXmtOk);
1170 dr32(McstFramesXmtdOk);
1171 dr32(FramesWDeferredXmt);
1172 dr16(BcstFramesXmtdOk);
1173 dr16(MacControlFramesXmtd);
1174 dr16(FramesWEXDeferal);
1175#ifdef MEM_MAPPING
1176 for (i = 0x100; i <= 0x150; i += 4)
1177 dr32(i);
1178#endif
1179 dr16(TxJumboFrames);
1180 dr16(RxJumboFrames);
1181 dr16(TCPCheckSumErrors);
1182 dr16(UDPCheckSumErrors);
1183 dr16(IPCheckSumErrors);
1184 return 0;
1185}
1186
1187static void
1188set_multicast (struct net_device *dev)
1189{
1190 struct netdev_private *np = netdev_priv(dev);
1191 void __iomem *ioaddr = np->ioaddr;
1192 u32 hash_table[2];
1193 u16 rx_mode = 0;
1194
1195 hash_table[0] = hash_table[1] = 0;
1196
1197 hash_table[1] |= 0x02000000;
1198 if (dev->flags & IFF_PROMISC) {
1199
1200 rx_mode = ReceiveAllFrames;
1201 } else if ((dev->flags & IFF_ALLMULTI) ||
1202 (netdev_mc_count(dev) > multicast_filter_limit)) {
1203
1204 rx_mode = ReceiveBroadcast | ReceiveMulticast | ReceiveUnicast;
1205 } else if (!netdev_mc_empty(dev)) {
1206 struct netdev_hw_addr *ha;
1207
1208
1209 rx_mode =
1210 ReceiveBroadcast | ReceiveMulticastHash | ReceiveUnicast;
1211 netdev_for_each_mc_addr(ha, dev) {
1212 int bit, index = 0;
1213 int crc = ether_crc_le(ETH_ALEN, ha->addr);
1214
1215
1216 for (bit = 0; bit < 6; bit++)
1217 if (crc & (1 << (31 - bit)))
1218 index |= (1 << bit);
1219 hash_table[index / 32] |= (1 << (index % 32));
1220 }
1221 } else {
1222 rx_mode = ReceiveBroadcast | ReceiveUnicast;
1223 }
1224 if (np->vlan) {
1225
1226 rx_mode |= ReceiveVLANMatch;
1227 }
1228
1229 dw32(HashTable0, hash_table[0]);
1230 dw32(HashTable1, hash_table[1]);
1231 dw16(ReceiveMode, rx_mode);
1232}
1233
1234static void rio_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1235{
1236 struct netdev_private *np = netdev_priv(dev);
1237
1238 strlcpy(info->driver, "dl2k", sizeof(info->driver));
1239 strlcpy(info->bus_info, pci_name(np->pdev), sizeof(info->bus_info));
1240}
1241
1242static int rio_get_link_ksettings(struct net_device *dev,
1243 struct ethtool_link_ksettings *cmd)
1244{
1245 struct netdev_private *np = netdev_priv(dev);
1246 u32 supported, advertising;
1247
1248 if (np->phy_media) {
1249
1250 supported = SUPPORTED_Autoneg | SUPPORTED_FIBRE;
1251 advertising = ADVERTISED_Autoneg | ADVERTISED_FIBRE;
1252 cmd->base.port = PORT_FIBRE;
1253 } else {
1254
1255 supported = SUPPORTED_10baseT_Half |
1256 SUPPORTED_10baseT_Full | SUPPORTED_100baseT_Half
1257 | SUPPORTED_100baseT_Full | SUPPORTED_1000baseT_Full |
1258 SUPPORTED_Autoneg | SUPPORTED_MII;
1259 advertising = ADVERTISED_10baseT_Half |
1260 ADVERTISED_10baseT_Full | ADVERTISED_100baseT_Half |
1261 ADVERTISED_100baseT_Full | ADVERTISED_1000baseT_Full |
1262 ADVERTISED_Autoneg | ADVERTISED_MII;
1263 cmd->base.port = PORT_MII;
1264 }
1265 if (np->link_status) {
1266 cmd->base.speed = np->speed;
1267 cmd->base.duplex = np->full_duplex ? DUPLEX_FULL : DUPLEX_HALF;
1268 } else {
1269 cmd->base.speed = SPEED_UNKNOWN;
1270 cmd->base.duplex = DUPLEX_UNKNOWN;
1271 }
1272 if (np->an_enable)
1273 cmd->base.autoneg = AUTONEG_ENABLE;
1274 else
1275 cmd->base.autoneg = AUTONEG_DISABLE;
1276
1277 cmd->base.phy_address = np->phy_addr;
1278
1279 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported,
1280 supported);
1281 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.advertising,
1282 advertising);
1283
1284 return 0;
1285}
1286
1287static int rio_set_link_ksettings(struct net_device *dev,
1288 const struct ethtool_link_ksettings *cmd)
1289{
1290 struct netdev_private *np = netdev_priv(dev);
1291 u32 speed = cmd->base.speed;
1292 u8 duplex = cmd->base.duplex;
1293
1294 netif_carrier_off(dev);
1295 if (cmd->base.autoneg == AUTONEG_ENABLE) {
1296 if (np->an_enable) {
1297 return 0;
1298 } else {
1299 np->an_enable = 1;
1300 mii_set_media(dev);
1301 return 0;
1302 }
1303 } else {
1304 np->an_enable = 0;
1305 if (np->speed == 1000) {
1306 speed = SPEED_100;
1307 duplex = DUPLEX_FULL;
1308 printk("Warning!! Can't disable Auto negotiation in 1000Mbps, change to Manual 100Mbps, Full duplex.\n");
1309 }
1310 switch (speed) {
1311 case SPEED_10:
1312 np->speed = 10;
1313 np->full_duplex = (duplex == DUPLEX_FULL);
1314 break;
1315 case SPEED_100:
1316 np->speed = 100;
1317 np->full_duplex = (duplex == DUPLEX_FULL);
1318 break;
1319 case SPEED_1000:
1320 default:
1321 return -EINVAL;
1322 }
1323 mii_set_media(dev);
1324 }
1325 return 0;
1326}
1327
1328static u32 rio_get_link(struct net_device *dev)
1329{
1330 struct netdev_private *np = netdev_priv(dev);
1331 return np->link_status;
1332}
1333
1334static const struct ethtool_ops ethtool_ops = {
1335 .get_drvinfo = rio_get_drvinfo,
1336 .get_link = rio_get_link,
1337 .get_link_ksettings = rio_get_link_ksettings,
1338 .set_link_ksettings = rio_set_link_ksettings,
1339};
1340
1341static int
1342rio_ioctl (struct net_device *dev, struct ifreq *rq, int cmd)
1343{
1344 int phy_addr;
1345 struct netdev_private *np = netdev_priv(dev);
1346 struct mii_ioctl_data *miidata = if_mii(rq);
1347
1348 phy_addr = np->phy_addr;
1349 switch (cmd) {
1350 case SIOCGMIIPHY:
1351 miidata->phy_id = phy_addr;
1352 break;
1353 case SIOCGMIIREG:
1354 miidata->val_out = mii_read (dev, phy_addr, miidata->reg_num);
1355 break;
1356 case SIOCSMIIREG:
1357 if (!capable(CAP_NET_ADMIN))
1358 return -EPERM;
1359 mii_write (dev, phy_addr, miidata->reg_num, miidata->val_in);
1360 break;
1361 default:
1362 return -EOPNOTSUPP;
1363 }
1364 return 0;
1365}
1366
1367#define EEP_READ 0x0200
1368#define EEP_BUSY 0x8000
1369
1370
1371static int read_eeprom(struct netdev_private *np, int eep_addr)
1372{
1373 void __iomem *ioaddr = np->eeprom_addr;
1374 int i = 1000;
1375
1376 dw16(EepromCtrl, EEP_READ | (eep_addr & 0xff));
1377 while (i-- > 0) {
1378 if (!(dr16(EepromCtrl) & EEP_BUSY))
1379 return dr16(EepromData);
1380 }
1381 return 0;
1382}
1383
1384enum phy_ctrl_bits {
1385 MII_READ = 0x00, MII_CLK = 0x01, MII_DATA1 = 0x02, MII_WRITE = 0x04,
1386 MII_DUPLEX = 0x08,
1387};
1388
1389#define mii_delay() dr8(PhyCtrl)
1390static void
1391mii_sendbit (struct net_device *dev, u32 data)
1392{
1393 struct netdev_private *np = netdev_priv(dev);
1394 void __iomem *ioaddr = np->ioaddr;
1395
1396 data = ((data) ? MII_DATA1 : 0) | (dr8(PhyCtrl) & 0xf8) | MII_WRITE;
1397 dw8(PhyCtrl, data);
1398 mii_delay ();
1399 dw8(PhyCtrl, data | MII_CLK);
1400 mii_delay ();
1401}
1402
1403static int
1404mii_getbit (struct net_device *dev)
1405{
1406 struct netdev_private *np = netdev_priv(dev);
1407 void __iomem *ioaddr = np->ioaddr;
1408 u8 data;
1409
1410 data = (dr8(PhyCtrl) & 0xf8) | MII_READ;
1411 dw8(PhyCtrl, data);
1412 mii_delay ();
1413 dw8(PhyCtrl, data | MII_CLK);
1414 mii_delay ();
1415 return (dr8(PhyCtrl) >> 1) & 1;
1416}
1417
1418static void
1419mii_send_bits (struct net_device *dev, u32 data, int len)
1420{
1421 int i;
1422
1423 for (i = len - 1; i >= 0; i--) {
1424 mii_sendbit (dev, data & (1 << i));
1425 }
1426}
1427
1428static int
1429mii_read (struct net_device *dev, int phy_addr, int reg_num)
1430{
1431 u32 cmd;
1432 int i;
1433 u32 retval = 0;
1434
1435
1436 mii_send_bits (dev, 0xffffffff, 32);
1437
1438
1439 cmd = (0x06 << 10 | phy_addr << 5 | reg_num);
1440 mii_send_bits (dev, cmd, 14);
1441
1442 if (mii_getbit (dev))
1443 goto err_out;
1444
1445 for (i = 0; i < 16; i++) {
1446 retval |= mii_getbit (dev);
1447 retval <<= 1;
1448 }
1449
1450 mii_getbit (dev);
1451 return (retval >> 1) & 0xffff;
1452
1453 err_out:
1454 return 0;
1455}
1456static int
1457mii_write (struct net_device *dev, int phy_addr, int reg_num, u16 data)
1458{
1459 u32 cmd;
1460
1461
1462 mii_send_bits (dev, 0xffffffff, 32);
1463
1464
1465 cmd = (0x5002 << 16) | (phy_addr << 23) | (reg_num << 18) | data;
1466 mii_send_bits (dev, cmd, 32);
1467
1468 mii_getbit (dev);
1469 return 0;
1470}
1471static int
1472mii_wait_link (struct net_device *dev, int wait)
1473{
1474 __u16 bmsr;
1475 int phy_addr;
1476 struct netdev_private *np;
1477
1478 np = netdev_priv(dev);
1479 phy_addr = np->phy_addr;
1480
1481 do {
1482 bmsr = mii_read (dev, phy_addr, MII_BMSR);
1483 if (bmsr & BMSR_LSTATUS)
1484 return 0;
1485 mdelay (1);
1486 } while (--wait > 0);
1487 return -1;
1488}
1489static int
1490mii_get_media (struct net_device *dev)
1491{
1492 __u16 negotiate;
1493 __u16 bmsr;
1494 __u16 mscr;
1495 __u16 mssr;
1496 int phy_addr;
1497 struct netdev_private *np;
1498
1499 np = netdev_priv(dev);
1500 phy_addr = np->phy_addr;
1501
1502 bmsr = mii_read (dev, phy_addr, MII_BMSR);
1503 if (np->an_enable) {
1504 if (!(bmsr & BMSR_ANEGCOMPLETE)) {
1505
1506 return -1;
1507 }
1508 negotiate = mii_read (dev, phy_addr, MII_ADVERTISE) &
1509 mii_read (dev, phy_addr, MII_LPA);
1510 mscr = mii_read (dev, phy_addr, MII_CTRL1000);
1511 mssr = mii_read (dev, phy_addr, MII_STAT1000);
1512 if (mscr & ADVERTISE_1000FULL && mssr & LPA_1000FULL) {
1513 np->speed = 1000;
1514 np->full_duplex = 1;
1515 printk (KERN_INFO "Auto 1000 Mbps, Full duplex\n");
1516 } else if (mscr & ADVERTISE_1000HALF && mssr & LPA_1000HALF) {
1517 np->speed = 1000;
1518 np->full_duplex = 0;
1519 printk (KERN_INFO "Auto 1000 Mbps, Half duplex\n");
1520 } else if (negotiate & ADVERTISE_100FULL) {
1521 np->speed = 100;
1522 np->full_duplex = 1;
1523 printk (KERN_INFO "Auto 100 Mbps, Full duplex\n");
1524 } else if (negotiate & ADVERTISE_100HALF) {
1525 np->speed = 100;
1526 np->full_duplex = 0;
1527 printk (KERN_INFO "Auto 100 Mbps, Half duplex\n");
1528 } else if (negotiate & ADVERTISE_10FULL) {
1529 np->speed = 10;
1530 np->full_duplex = 1;
1531 printk (KERN_INFO "Auto 10 Mbps, Full duplex\n");
1532 } else if (negotiate & ADVERTISE_10HALF) {
1533 np->speed = 10;
1534 np->full_duplex = 0;
1535 printk (KERN_INFO "Auto 10 Mbps, Half duplex\n");
1536 }
1537 if (negotiate & ADVERTISE_PAUSE_CAP) {
1538 np->tx_flow &= 1;
1539 np->rx_flow &= 1;
1540 } else if (negotiate & ADVERTISE_PAUSE_ASYM) {
1541 np->tx_flow = 0;
1542 np->rx_flow &= 1;
1543 }
1544
1545 } else {
1546 __u16 bmcr = mii_read (dev, phy_addr, MII_BMCR);
1547 switch (bmcr & (BMCR_SPEED100 | BMCR_SPEED1000)) {
1548 case BMCR_SPEED1000:
1549 printk (KERN_INFO "Operating at 1000 Mbps, ");
1550 break;
1551 case BMCR_SPEED100:
1552 printk (KERN_INFO "Operating at 100 Mbps, ");
1553 break;
1554 case 0:
1555 printk (KERN_INFO "Operating at 10 Mbps, ");
1556 }
1557 if (bmcr & BMCR_FULLDPLX) {
1558 printk (KERN_CONT "Full duplex\n");
1559 } else {
1560 printk (KERN_CONT "Half duplex\n");
1561 }
1562 }
1563 if (np->tx_flow)
1564 printk(KERN_INFO "Enable Tx Flow Control\n");
1565 else
1566 printk(KERN_INFO "Disable Tx Flow Control\n");
1567 if (np->rx_flow)
1568 printk(KERN_INFO "Enable Rx Flow Control\n");
1569 else
1570 printk(KERN_INFO "Disable Rx Flow Control\n");
1571
1572 return 0;
1573}
1574
1575static int
1576mii_set_media (struct net_device *dev)
1577{
1578 __u16 pscr;
1579 __u16 bmcr;
1580 __u16 bmsr;
1581 __u16 anar;
1582 int phy_addr;
1583 struct netdev_private *np;
1584 np = netdev_priv(dev);
1585 phy_addr = np->phy_addr;
1586
1587
1588 if (np->an_enable) {
1589
1590 bmsr = mii_read (dev, phy_addr, MII_BMSR);
1591 anar = mii_read (dev, phy_addr, MII_ADVERTISE) &
1592 ~(ADVERTISE_100FULL | ADVERTISE_10FULL |
1593 ADVERTISE_100HALF | ADVERTISE_10HALF |
1594 ADVERTISE_100BASE4);
1595 if (bmsr & BMSR_100FULL)
1596 anar |= ADVERTISE_100FULL;
1597 if (bmsr & BMSR_100HALF)
1598 anar |= ADVERTISE_100HALF;
1599 if (bmsr & BMSR_100BASE4)
1600 anar |= ADVERTISE_100BASE4;
1601 if (bmsr & BMSR_10FULL)
1602 anar |= ADVERTISE_10FULL;
1603 if (bmsr & BMSR_10HALF)
1604 anar |= ADVERTISE_10HALF;
1605 anar |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
1606 mii_write (dev, phy_addr, MII_ADVERTISE, anar);
1607
1608
1609 pscr = mii_read (dev, phy_addr, MII_PHY_SCR);
1610 pscr |= 3 << 5;
1611 mii_write (dev, phy_addr, MII_PHY_SCR, pscr);
1612
1613
1614 mii_write (dev, phy_addr, MII_BMCR, BMCR_RESET);
1615 bmcr = BMCR_ANENABLE | BMCR_ANRESTART | BMCR_RESET;
1616 mii_write (dev, phy_addr, MII_BMCR, bmcr);
1617 mdelay(1);
1618 } else {
1619
1620
1621 pscr = mii_read (dev, phy_addr, MII_PHY_SCR);
1622 pscr &= ~(3 << 5);
1623 mii_write (dev, phy_addr, MII_PHY_SCR, pscr);
1624
1625
1626 bmcr = mii_read (dev, phy_addr, MII_BMCR);
1627 bmcr |= BMCR_RESET;
1628 mii_write (dev, phy_addr, MII_BMCR, bmcr);
1629
1630
1631 bmcr = 0x1940;
1632 mii_write (dev, phy_addr, MII_BMCR, bmcr);
1633 mdelay (100);
1634
1635
1636 mii_write (dev, phy_addr, MII_ADVERTISE, 0);
1637
1638
1639 bmcr = BMCR_PDOWN;
1640 if (np->speed == 100) {
1641 bmcr |= BMCR_SPEED100;
1642 printk (KERN_INFO "Manual 100 Mbps, ");
1643 } else if (np->speed == 10) {
1644 printk (KERN_INFO "Manual 10 Mbps, ");
1645 }
1646 if (np->full_duplex) {
1647 bmcr |= BMCR_FULLDPLX;
1648 printk (KERN_CONT "Full duplex\n");
1649 } else {
1650 printk (KERN_CONT "Half duplex\n");
1651 }
1652#if 0
1653
1654 mscr = mii_read (dev, phy_addr, MII_CTRL1000);
1655 mscr |= MII_MSCR_CFG_ENABLE;
1656 mscr &= ~MII_MSCR_CFG_VALUE = 0;
1657#endif
1658 mii_write (dev, phy_addr, MII_BMCR, bmcr);
1659 mdelay(10);
1660 }
1661 return 0;
1662}
1663
1664static int
1665mii_get_media_pcs (struct net_device *dev)
1666{
1667 __u16 negotiate;
1668 __u16 bmsr;
1669 int phy_addr;
1670 struct netdev_private *np;
1671
1672 np = netdev_priv(dev);
1673 phy_addr = np->phy_addr;
1674
1675 bmsr = mii_read (dev, phy_addr, PCS_BMSR);
1676 if (np->an_enable) {
1677 if (!(bmsr & BMSR_ANEGCOMPLETE)) {
1678
1679 return -1;
1680 }
1681 negotiate = mii_read (dev, phy_addr, PCS_ANAR) &
1682 mii_read (dev, phy_addr, PCS_ANLPAR);
1683 np->speed = 1000;
1684 if (negotiate & PCS_ANAR_FULL_DUPLEX) {
1685 printk (KERN_INFO "Auto 1000 Mbps, Full duplex\n");
1686 np->full_duplex = 1;
1687 } else {
1688 printk (KERN_INFO "Auto 1000 Mbps, half duplex\n");
1689 np->full_duplex = 0;
1690 }
1691 if (negotiate & PCS_ANAR_PAUSE) {
1692 np->tx_flow &= 1;
1693 np->rx_flow &= 1;
1694 } else if (negotiate & PCS_ANAR_ASYMMETRIC) {
1695 np->tx_flow = 0;
1696 np->rx_flow &= 1;
1697 }
1698
1699 } else {
1700 __u16 bmcr = mii_read (dev, phy_addr, PCS_BMCR);
1701 printk (KERN_INFO "Operating at 1000 Mbps, ");
1702 if (bmcr & BMCR_FULLDPLX) {
1703 printk (KERN_CONT "Full duplex\n");
1704 } else {
1705 printk (KERN_CONT "Half duplex\n");
1706 }
1707 }
1708 if (np->tx_flow)
1709 printk(KERN_INFO "Enable Tx Flow Control\n");
1710 else
1711 printk(KERN_INFO "Disable Tx Flow Control\n");
1712 if (np->rx_flow)
1713 printk(KERN_INFO "Enable Rx Flow Control\n");
1714 else
1715 printk(KERN_INFO "Disable Rx Flow Control\n");
1716
1717 return 0;
1718}
1719
1720static int
1721mii_set_media_pcs (struct net_device *dev)
1722{
1723 __u16 bmcr;
1724 __u16 esr;
1725 __u16 anar;
1726 int phy_addr;
1727 struct netdev_private *np;
1728 np = netdev_priv(dev);
1729 phy_addr = np->phy_addr;
1730
1731
1732 if (np->an_enable) {
1733
1734 esr = mii_read (dev, phy_addr, PCS_ESR);
1735 anar = mii_read (dev, phy_addr, MII_ADVERTISE) &
1736 ~PCS_ANAR_HALF_DUPLEX &
1737 ~PCS_ANAR_FULL_DUPLEX;
1738 if (esr & (MII_ESR_1000BT_HD | MII_ESR_1000BX_HD))
1739 anar |= PCS_ANAR_HALF_DUPLEX;
1740 if (esr & (MII_ESR_1000BT_FD | MII_ESR_1000BX_FD))
1741 anar |= PCS_ANAR_FULL_DUPLEX;
1742 anar |= PCS_ANAR_PAUSE | PCS_ANAR_ASYMMETRIC;
1743 mii_write (dev, phy_addr, MII_ADVERTISE, anar);
1744
1745
1746 mii_write (dev, phy_addr, MII_BMCR, BMCR_RESET);
1747 bmcr = BMCR_ANENABLE | BMCR_ANRESTART | BMCR_RESET;
1748 mii_write (dev, phy_addr, MII_BMCR, bmcr);
1749 mdelay(1);
1750 } else {
1751
1752
1753 bmcr = BMCR_RESET;
1754 mii_write (dev, phy_addr, MII_BMCR, bmcr);
1755 mdelay(10);
1756 if (np->full_duplex) {
1757 bmcr = BMCR_FULLDPLX;
1758 printk (KERN_INFO "Manual full duplex\n");
1759 } else {
1760 bmcr = 0;
1761 printk (KERN_INFO "Manual half duplex\n");
1762 }
1763 mii_write (dev, phy_addr, MII_BMCR, bmcr);
1764 mdelay(10);
1765
1766
1767 mii_write (dev, phy_addr, MII_ADVERTISE, 0);
1768 }
1769 return 0;
1770}
1771
1772
1773static int
1774rio_close (struct net_device *dev)
1775{
1776 struct netdev_private *np = netdev_priv(dev);
1777 struct pci_dev *pdev = np->pdev;
1778
1779 netif_stop_queue (dev);
1780
1781 rio_hw_stop(dev);
1782
1783 free_irq(pdev->irq, dev);
1784 del_timer_sync (&np->timer);
1785
1786 free_list(dev);
1787
1788 return 0;
1789}
1790
1791static void
1792rio_remove1 (struct pci_dev *pdev)
1793{
1794 struct net_device *dev = pci_get_drvdata (pdev);
1795
1796 if (dev) {
1797 struct netdev_private *np = netdev_priv(dev);
1798
1799 unregister_netdev (dev);
1800 pci_free_consistent (pdev, RX_TOTAL_SIZE, np->rx_ring,
1801 np->rx_ring_dma);
1802 pci_free_consistent (pdev, TX_TOTAL_SIZE, np->tx_ring,
1803 np->tx_ring_dma);
1804#ifdef MEM_MAPPING
1805 pci_iounmap(pdev, np->ioaddr);
1806#endif
1807 pci_iounmap(pdev, np->eeprom_addr);
1808 free_netdev (dev);
1809 pci_release_regions (pdev);
1810 pci_disable_device (pdev);
1811 }
1812}
1813
1814#ifdef CONFIG_PM_SLEEP
1815static int rio_suspend(struct device *device)
1816{
1817 struct net_device *dev = dev_get_drvdata(device);
1818 struct netdev_private *np = netdev_priv(dev);
1819
1820 if (!netif_running(dev))
1821 return 0;
1822
1823 netif_device_detach(dev);
1824 del_timer_sync(&np->timer);
1825 rio_hw_stop(dev);
1826
1827 return 0;
1828}
1829
1830static int rio_resume(struct device *device)
1831{
1832 struct net_device *dev = dev_get_drvdata(device);
1833 struct netdev_private *np = netdev_priv(dev);
1834
1835 if (!netif_running(dev))
1836 return 0;
1837
1838 rio_reset_ring(np);
1839 rio_hw_init(dev);
1840 np->timer.expires = jiffies + 1 * HZ;
1841 add_timer(&np->timer);
1842 netif_device_attach(dev);
1843 dl2k_enable_int(np);
1844
1845 return 0;
1846}
1847
1848static SIMPLE_DEV_PM_OPS(rio_pm_ops, rio_suspend, rio_resume);
1849#define RIO_PM_OPS (&rio_pm_ops)
1850
1851#else
1852
1853#define RIO_PM_OPS NULL
1854
1855#endif
1856
1857static struct pci_driver rio_driver = {
1858 .name = "dl2k",
1859 .id_table = rio_pci_tbl,
1860 .probe = rio_probe1,
1861 .remove = rio_remove1,
1862 .driver.pm = RIO_PM_OPS,
1863};
1864
1865module_pci_driver(rio_driver);
1866
1867
1868
