// SPDX-License-Identifier: GPL-2.0
/* Copyright(c) 2013 - 2018 Intel Corporation. */

#include "i40e.h"
#include "i40e_type.h"
#include "i40e_adminq.h"
#include "i40e_prototype.h"
#include <linux/avf/virtchnl.h>

/**
 * i40e_set_mac_type - Sets MAC type
 * @hw: pointer to the HW structure
 *
 * This function sets the mac type of the adapter based on the
 * vendor ID and device ID stored in the hw structure.
 **/
i40e_status i40e_set_mac_type(struct i40e_hw *hw)
{
        i40e_status status = 0;

        if (hw->vendor_id == PCI_VENDOR_ID_INTEL) {
                switch (hw->device_id) {
                case I40E_DEV_ID_SFP_XL710:
                case I40E_DEV_ID_QEMU:
                case I40E_DEV_ID_KX_B:
                case I40E_DEV_ID_KX_C:
                case I40E_DEV_ID_QSFP_A:
                case I40E_DEV_ID_QSFP_B:
                case I40E_DEV_ID_QSFP_C:
                case I40E_DEV_ID_5G_BASE_T_BC:
                case I40E_DEV_ID_10G_BASE_T:
                case I40E_DEV_ID_10G_BASE_T4:
                case I40E_DEV_ID_10G_BASE_T_BC:
                case I40E_DEV_ID_10G_B:
                case I40E_DEV_ID_10G_SFP:
                case I40E_DEV_ID_20G_KR2:
                case I40E_DEV_ID_20G_KR2_A:
                case I40E_DEV_ID_25G_B:
                case I40E_DEV_ID_25G_SFP28:
                case I40E_DEV_ID_X710_N3000:
                case I40E_DEV_ID_XXV710_N3000:
                        hw->mac.type = I40E_MAC_XL710;
                        break;
                case I40E_DEV_ID_KX_X722:
                case I40E_DEV_ID_QSFP_X722:
                case I40E_DEV_ID_SFP_X722:
                case I40E_DEV_ID_1G_BASE_T_X722:
                case I40E_DEV_ID_10G_BASE_T_X722:
                case I40E_DEV_ID_SFP_I_X722:
                        hw->mac.type = I40E_MAC_X722;
                        break;
                default:
                        hw->mac.type = I40E_MAC_GENERIC;
                        break;
                }
        } else {
                status = I40E_ERR_DEVICE_NOT_SUPPORTED;
        }

        hw_dbg(hw, "i40e_set_mac_type found mac: %d, returns: %d\n",
                  hw->mac.type, status);
        return status;
}

/**
 * i40e_aq_str - convert AQ err code to a string
 * @hw: pointer to the HW structure
 * @aq_err: the AQ error code to convert
 **/
const char *i40e_aq_str(struct i40e_hw *hw, enum i40e_admin_queue_err aq_err)
{
        switch (aq_err) {
        case I40E_AQ_RC_OK:
                return "OK";
        case I40E_AQ_RC_EPERM:
                return "I40E_AQ_RC_EPERM";
        case I40E_AQ_RC_ENOENT:
                return "I40E_AQ_RC_ENOENT";
        case I40E_AQ_RC_ESRCH:
                return "I40E_AQ_RC_ESRCH";
        case I40E_AQ_RC_EINTR:
                return "I40E_AQ_RC_EINTR";
        case I40E_AQ_RC_EIO:
                return "I40E_AQ_RC_EIO";
        case I40E_AQ_RC_ENXIO:
                return "I40E_AQ_RC_ENXIO";
        case I40E_AQ_RC_E2BIG:
                return "I40E_AQ_RC_E2BIG";
        case I40E_AQ_RC_EAGAIN:
                return "I40E_AQ_RC_EAGAIN";
        case I40E_AQ_RC_ENOMEM:
                return "I40E_AQ_RC_ENOMEM";
        case I40E_AQ_RC_EACCES:
                return "I40E_AQ_RC_EACCES";
        case I40E_AQ_RC_EFAULT:
                return "I40E_AQ_RC_EFAULT";
        case I40E_AQ_RC_EBUSY:
                return "I40E_AQ_RC_EBUSY";
        case I40E_AQ_RC_EEXIST:
                return "I40E_AQ_RC_EEXIST";
        case I40E_AQ_RC_EINVAL:
                return "I40E_AQ_RC_EINVAL";
        case I40E_AQ_RC_ENOTTY:
                return "I40E_AQ_RC_ENOTTY";
        case I40E_AQ_RC_ENOSPC:
                return "I40E_AQ_RC_ENOSPC";
        case I40E_AQ_RC_ENOSYS:
                return "I40E_AQ_RC_ENOSYS";
        case I40E_AQ_RC_ERANGE:
                return "I40E_AQ_RC_ERANGE";
        case I40E_AQ_RC_EFLUSHED:
                return "I40E_AQ_RC_EFLUSHED";
        case I40E_AQ_RC_BAD_ADDR:
                return "I40E_AQ_RC_BAD_ADDR";
        case I40E_AQ_RC_EMODE:
                return "I40E_AQ_RC_EMODE";
        case I40E_AQ_RC_EFBIG:
                return "I40E_AQ_RC_EFBIG";
        }

        snprintf(hw->err_str, sizeof(hw->err_str), "%d", aq_err);
        return hw->err_str;
}

/**
 * i40e_stat_str - convert status err code to a string
 * @hw: pointer to the HW structure
 * @stat_err: the status error code to convert
 **/
const char *i40e_stat_str(struct i40e_hw *hw, i40e_status stat_err)
{
        switch (stat_err) {
        case 0:
                return "OK";
        case I40E_ERR_NVM:
                return "I40E_ERR_NVM";
        case I40E_ERR_NVM_CHECKSUM:
                return "I40E_ERR_NVM_CHECKSUM";
        case I40E_ERR_PHY:
                return "I40E_ERR_PHY";
        case I40E_ERR_CONFIG:
                return "I40E_ERR_CONFIG";
        case I40E_ERR_PARAM:
                return "I40E_ERR_PARAM";
        case I40E_ERR_MAC_TYPE:
                return "I40E_ERR_MAC_TYPE";
        case I40E_ERR_UNKNOWN_PHY:
                return "I40E_ERR_UNKNOWN_PHY";
        case I40E_ERR_LINK_SETUP:
                return "I40E_ERR_LINK_SETUP";
        case I40E_ERR_ADAPTER_STOPPED:
                return "I40E_ERR_ADAPTER_STOPPED";
        case I40E_ERR_INVALID_MAC_ADDR:
                return "I40E_ERR_INVALID_MAC_ADDR";
        case I40E_ERR_DEVICE_NOT_SUPPORTED:
                return "I40E_ERR_DEVICE_NOT_SUPPORTED";
        case I40E_ERR_MASTER_REQUESTS_PENDING:
                return "I40E_ERR_MASTER_REQUESTS_PENDING";
        case I40E_ERR_INVALID_LINK_SETTINGS:
                return "I40E_ERR_INVALID_LINK_SETTINGS";
        case I40E_ERR_AUTONEG_NOT_COMPLETE:
                return "I40E_ERR_AUTONEG_NOT_COMPLETE";
        case I40E_ERR_RESET_FAILED:
                return "I40E_ERR_RESET_FAILED";
        case I40E_ERR_SWFW_SYNC:
                return "I40E_ERR_SWFW_SYNC";
        case I40E_ERR_NO_AVAILABLE_VSI:
                return "I40E_ERR_NO_AVAILABLE_VSI";
        case I40E_ERR_NO_MEMORY:
                return "I40E_ERR_NO_MEMORY";
        case I40E_ERR_BAD_PTR:
                return "I40E_ERR_BAD_PTR";
        case I40E_ERR_RING_FULL:
                return "I40E_ERR_RING_FULL";
        case I40E_ERR_INVALID_PD_ID:
                return "I40E_ERR_INVALID_PD_ID";
        case I40E_ERR_INVALID_QP_ID:
                return "I40E_ERR_INVALID_QP_ID";
        case I40E_ERR_INVALID_CQ_ID:
                return "I40E_ERR_INVALID_CQ_ID";
        case I40E_ERR_INVALID_CEQ_ID:
                return "I40E_ERR_INVALID_CEQ_ID";
        case I40E_ERR_INVALID_AEQ_ID:
                return "I40E_ERR_INVALID_AEQ_ID";
        case I40E_ERR_INVALID_SIZE:
                return "I40E_ERR_INVALID_SIZE";
        case I40E_ERR_INVALID_ARP_INDEX:
                return "I40E_ERR_INVALID_ARP_INDEX";
        case I40E_ERR_INVALID_FPM_FUNC_ID:
                return "I40E_ERR_INVALID_FPM_FUNC_ID";
        case I40E_ERR_QP_INVALID_MSG_SIZE:
                return "I40E_ERR_QP_INVALID_MSG_SIZE";
        case I40E_ERR_QP_TOOMANY_WRS_POSTED:
                return "I40E_ERR_QP_TOOMANY_WRS_POSTED";
        case I40E_ERR_INVALID_FRAG_COUNT:
                return "I40E_ERR_INVALID_FRAG_COUNT";
        case I40E_ERR_QUEUE_EMPTY:
                return "I40E_ERR_QUEUE_EMPTY";
        case I40E_ERR_INVALID_ALIGNMENT:
                return "I40E_ERR_INVALID_ALIGNMENT";
        case I40E_ERR_FLUSHED_QUEUE:
                return "I40E_ERR_FLUSHED_QUEUE";
        case I40E_ERR_INVALID_PUSH_PAGE_INDEX:
                return "I40E_ERR_INVALID_PUSH_PAGE_INDEX";
        case I40E_ERR_INVALID_IMM_DATA_SIZE:
                return "I40E_ERR_INVALID_IMM_DATA_SIZE";
        case I40E_ERR_TIMEOUT:
                return "I40E_ERR_TIMEOUT";
        case I40E_ERR_OPCODE_MISMATCH:
                return "I40E_ERR_OPCODE_MISMATCH";
        case I40E_ERR_CQP_COMPL_ERROR:
                return "I40E_ERR_CQP_COMPL_ERROR";
        case I40E_ERR_INVALID_VF_ID:
                return "I40E_ERR_INVALID_VF_ID";
        case I40E_ERR_INVALID_HMCFN_ID:
                return "I40E_ERR_INVALID_HMCFN_ID";
        case I40E_ERR_BACKING_PAGE_ERROR:
                return "I40E_ERR_BACKING_PAGE_ERROR";
        case I40E_ERR_NO_PBLCHUNKS_AVAILABLE:
                return "I40E_ERR_NO_PBLCHUNKS_AVAILABLE";
        case I40E_ERR_INVALID_PBLE_INDEX:
                return "I40E_ERR_INVALID_PBLE_INDEX";
        case I40E_ERR_INVALID_SD_INDEX:
                return "I40E_ERR_INVALID_SD_INDEX";
        case I40E_ERR_INVALID_PAGE_DESC_INDEX:
                return "I40E_ERR_INVALID_PAGE_DESC_INDEX";
        case I40E_ERR_INVALID_SD_TYPE:
                return "I40E_ERR_INVALID_SD_TYPE";
        case I40E_ERR_MEMCPY_FAILED:
                return "I40E_ERR_MEMCPY_FAILED";
        case I40E_ERR_INVALID_HMC_OBJ_INDEX:
                return "I40E_ERR_INVALID_HMC_OBJ_INDEX";
        case I40E_ERR_INVALID_HMC_OBJ_COUNT:
                return "I40E_ERR_INVALID_HMC_OBJ_COUNT";
        case I40E_ERR_INVALID_SRQ_ARM_LIMIT:
                return "I40E_ERR_INVALID_SRQ_ARM_LIMIT";
        case I40E_ERR_SRQ_ENABLED:
                return "I40E_ERR_SRQ_ENABLED";
        case I40E_ERR_ADMIN_QUEUE_ERROR:
                return "I40E_ERR_ADMIN_QUEUE_ERROR";
        case I40E_ERR_ADMIN_QUEUE_TIMEOUT:
                return "I40E_ERR_ADMIN_QUEUE_TIMEOUT";
        case I40E_ERR_BUF_TOO_SHORT:
                return "I40E_ERR_BUF_TOO_SHORT";
        case I40E_ERR_ADMIN_QUEUE_FULL:
                return "I40E_ERR_ADMIN_QUEUE_FULL";
        case I40E_ERR_ADMIN_QUEUE_NO_WORK:
                return "I40E_ERR_ADMIN_QUEUE_NO_WORK";
        case I40E_ERR_BAD_IWARP_CQE:
                return "I40E_ERR_BAD_IWARP_CQE";
        case I40E_ERR_NVM_BLANK_MODE:
                return "I40E_ERR_NVM_BLANK_MODE";
        case I40E_ERR_NOT_IMPLEMENTED:
                return "I40E_ERR_NOT_IMPLEMENTED";
        case I40E_ERR_PE_DOORBELL_NOT_ENABLED:
                return "I40E_ERR_PE_DOORBELL_NOT_ENABLED";
        case I40E_ERR_DIAG_TEST_FAILED:
                return "I40E_ERR_DIAG_TEST_FAILED";
        case I40E_ERR_NOT_READY:
                return "I40E_ERR_NOT_READY";
        case I40E_NOT_SUPPORTED:
                return "I40E_NOT_SUPPORTED";
        case I40E_ERR_FIRMWARE_API_VERSION:
                return "I40E_ERR_FIRMWARE_API_VERSION";
        case I40E_ERR_ADMIN_QUEUE_CRITICAL_ERROR:
                return "I40E_ERR_ADMIN_QUEUE_CRITICAL_ERROR";
        }

        snprintf(hw->err_str, sizeof(hw->err_str), "%d", stat_err);
        return hw->err_str;
}

/**
 * i40e_debug_aq
 * @hw: debug mask related to admin queue
 * @mask: debug mask
 * @desc: pointer to admin queue descriptor
 * @buffer: pointer to command buffer
 * @buf_len: max length of buffer
 *
 * Dumps debug log about adminq command with descriptor contents.
 **/
void i40e_debug_aq(struct i40e_hw *hw, enum i40e_debug_mask mask, void *desc,
                   void *buffer, u16 buf_len)
{
        struct i40e_aq_desc *aq_desc = (struct i40e_aq_desc *)desc;
        u32 effective_mask = hw->debug_mask & mask;
        char prefix[27];
        u16 len;
        u8 *buf = (u8 *)buffer;

        if (!effective_mask || !desc)
                return;

        len = le16_to_cpu(aq_desc->datalen);

        i40e_debug(hw, mask & I40E_DEBUG_AQ_DESCRIPTOR,
                   "AQ CMD: opcode 0x%04X, flags 0x%04X, datalen 0x%04X, retval 0x%04X\n",
                   le16_to_cpu(aq_desc->opcode),
                   le16_to_cpu(aq_desc->flags),
                   le16_to_cpu(aq_desc->datalen),
                   le16_to_cpu(aq_desc->retval));
        i40e_debug(hw, mask & I40E_DEBUG_AQ_DESCRIPTOR,
                   "\tcookie (h,l) 0x%08X 0x%08X\n",
                   le32_to_cpu(aq_desc->cookie_high),
                   le32_to_cpu(aq_desc->cookie_low));
        i40e_debug(hw, mask & I40E_DEBUG_AQ_DESCRIPTOR,
                   "\tparam (0,1)  0x%08X 0x%08X\n",
                   le32_to_cpu(aq_desc->params.internal.param0),
                   le32_to_cpu(aq_desc->params.internal.param1));
        i40e_debug(hw, mask & I40E_DEBUG_AQ_DESCRIPTOR,
                   "\taddr (h,l)   0x%08X 0x%08X\n",
                   le32_to_cpu(aq_desc->params.external.addr_high),
                   le32_to_cpu(aq_desc->params.external.addr_low));

        if (buffer && buf_len != 0 && len != 0 &&
            (effective_mask & I40E_DEBUG_AQ_DESC_BUFFER)) {
                i40e_debug(hw, mask, "AQ CMD Buffer:\n");
                if (buf_len < len)
                        len = buf_len;

                snprintf(prefix, sizeof(prefix),
                         "i40e %02x:%02x.%x: \t0x",
                         hw->bus.bus_id,
                         hw->bus.device,
                         hw->bus.func);

                print_hex_dump(KERN_INFO, prefix, DUMP_PREFIX_OFFSET,
                               16, 1, buf, len, false);
        }
}

/**
 * i40e_check_asq_alive
 * @hw: pointer to the hw struct
 *
 * Returns true if Queue is enabled else false.
 **/
bool i40e_check_asq_alive(struct i40e_hw *hw)
{
        if (hw->aq.asq.len)
                return !!(rd32(hw, hw->aq.asq.len) &
                          I40E_PF_ATQLEN_ATQENABLE_MASK);
        else
                return false;
}

/**
 * i40e_aq_queue_shutdown
 * @hw: pointer to the hw struct
 * @unloading: is the driver unloading itself
 *
 * Tell the Firmware that we're shutting down the AdminQ and whether
 * or not the driver is unloading as well.
 **/
i40e_status i40e_aq_queue_shutdown(struct i40e_hw *hw,
                                             bool unloading)
{
        struct i40e_aq_desc desc;
        struct i40e_aqc_queue_shutdown *cmd =
                (struct i40e_aqc_queue_shutdown *)&desc.params.raw;
        i40e_status status;

        i40e_fill_default_direct_cmd_desc(&desc,
                                          i40e_aqc_opc_queue_shutdown);

        if (unloading)
                cmd->driver_unloading = cpu_to_le32(I40E_AQ_DRIVER_UNLOADING);
        status = i40e_asq_send_command(hw, &desc, NULL, 0, NULL);

        return status;
}

/**
 * i40e_aq_get_set_rss_lut
 * @hw: pointer to the hardware structure
 * @vsi_id: vsi fw index
 * @pf_lut: for PF table set true, for VSI table set false
 * @lut: pointer to the lut buffer provided by the caller
 * @lut_size: size of the lut buffer
 * @set: set true to set the table, false to get the table
 *
 * Internal function to get or set RSS look up table
 **/
static i40e_status i40e_aq_get_set_rss_lut(struct i40e_hw *hw,
                                           u16 vsi_id, bool pf_lut,
                                           u8 *lut, u16 lut_size,
                                           bool set)
{
        i40e_status status;
        struct i40e_aq_desc desc;
        struct i40e_aqc_get_set_rss_lut *cmd_resp =
                   (struct i40e_aqc_get_set_rss_lut *)&desc.params.raw;

        if (set)
                i40e_fill_default_direct_cmd_desc(&desc,
                                                  i40e_aqc_opc_set_rss_lut);
        else
                i40e_fill_default_direct_cmd_desc(&desc,
                                                  i40e_aqc_opc_get_rss_lut);

        /* Indirect command */
        desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
        desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_RD);

        cmd_resp->vsi_id =
                        cpu_to_le16((u16)((vsi_id <<
                                          I40E_AQC_SET_RSS_LUT_VSI_ID_SHIFT) &
                                          I40E_AQC_SET_RSS_LUT_VSI_ID_MASK));
        cmd_resp->vsi_id |= cpu_to_le16((u16)I40E_AQC_SET_RSS_LUT_VSI_VALID);

        if (pf_lut)
                cmd_resp->flags |= cpu_to_le16((u16)
                                        ((I40E_AQC_SET_RSS_LUT_TABLE_TYPE_PF <<
                                        I40E_AQC_SET_RSS_LUT_TABLE_TYPE_SHIFT) &
                                        I40E_AQC_SET_RSS_LUT_TABLE_TYPE_MASK));
        else
                cmd_resp->flags |= cpu_to_le16((u16)
                                        ((I40E_AQC_SET_RSS_LUT_TABLE_TYPE_VSI <<
                                        I40E_AQC_SET_RSS_LUT_TABLE_TYPE_SHIFT) &
                                        I40E_AQC_SET_RSS_LUT_TABLE_TYPE_MASK));

        status = i40e_asq_send_command(hw, &desc, lut, lut_size, NULL);

        return status;
}

/**
 * i40e_aq_get_rss_lut
 * @hw: pointer to the hardware structure
 * @vsi_id: vsi fw index
 * @pf_lut: for PF table set true, for VSI table set false
 * @lut: pointer to the lut buffer provided by the caller
 * @lut_size: size of the lut buffer
 *
 * get the RSS lookup table, PF or VSI type
 **/
i40e_status i40e_aq_get_rss_lut(struct i40e_hw *hw, u16 vsi_id,
                                bool pf_lut, u8 *lut, u16 lut_size)
{
        return i40e_aq_get_set_rss_lut(hw, vsi_id, pf_lut, lut, lut_size,
                                       false);
}

/**
 * i40e_aq_set_rss_lut
 * @hw: pointer to the hardware structure
 * @vsi_id: vsi fw index
 * @pf_lut: for PF table set true, for VSI table set false
 * @lut: pointer to the lut buffer provided by the caller
 * @lut_size: size of the lut buffer
 *
 * set the RSS lookup table, PF or VSI type
 **/
i40e_status i40e_aq_set_rss_lut(struct i40e_hw *hw, u16 vsi_id,
                                bool pf_lut, u8 *lut, u16 lut_size)
{
        return i40e_aq_get_set_rss_lut(hw, vsi_id, pf_lut, lut, lut_size, true);
}

/**
 * i40e_aq_get_set_rss_key
 * @hw: pointer to the hw struct
 * @vsi_id: vsi fw index
 * @key: pointer to key info struct
 * @set: set true to set the key, false to get the key
 *
 * get the RSS key per VSI
 **/
static i40e_status i40e_aq_get_set_rss_key(struct i40e_hw *hw,
                                      u16 vsi_id,
                                      struct i40e_aqc_get_set_rss_key_data *key,
                                      bool set)
{
        i40e_status status;
        struct i40e_aq_desc desc;
        struct i40e_aqc_get_set_rss_key *cmd_resp =
                        (struct i40e_aqc_get_set_rss_key *)&desc.params.raw;
        u16 key_size = sizeof(struct i40e_aqc_get_set_rss_key_data);

        if (set)
                i40e_fill_default_direct_cmd_desc(&desc,
                                                  i40e_aqc_opc_set_rss_key);
        else
                i40e_fill_default_direct_cmd_desc(&desc,
                                                  i40e_aqc_opc_get_rss_key);

        /* Indirect command */
        desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
        desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_RD);

        cmd_resp->vsi_id =
                        cpu_to_le16((u16)((vsi_id <<
                                          I40E_AQC_SET_RSS_KEY_VSI_ID_SHIFT) &
                                          I40E_AQC_SET_RSS_KEY_VSI_ID_MASK));
        cmd_resp->vsi_id |= cpu_to_le16((u16)I40E_AQC_SET_RSS_KEY_VSI_VALID);

        status = i40e_asq_send_command(hw, &desc, key, key_size, NULL);

        return status;
}

/**
 * i40e_aq_get_rss_key
 * @hw: pointer to the hw struct
 * @vsi_id: vsi fw index
 * @key: pointer to key info struct
 *
 **/
i40e_status i40e_aq_get_rss_key(struct i40e_hw *hw,
                                u16 vsi_id,
                                struct i40e_aqc_get_set_rss_key_data *key)
{
        return i40e_aq_get_set_rss_key(hw, vsi_id, key, false);
}

/**
 * i40e_aq_set_rss_key
 * @hw: pointer to the hw struct
 * @vsi_id: vsi fw index
 * @key: pointer to key info struct
 *
 * set the RSS key per VSI
 **/
i40e_status i40e_aq_set_rss_key(struct i40e_hw *hw,
                                u16 vsi_id,
                                struct i40e_aqc_get_set_rss_key_data *key)
{
        return i40e_aq_get_set_rss_key(hw, vsi_id, key, true);
}

/* The i40e_ptype_lookup table is used to convert from the 8-bit ptype in the
 * hardware to a bit-field that can be used by SW to more easily determine the
 * packet type.
 *
 * Macros are used to shorten the table lines and make this table human
 * readable.
 *
 * We store the PTYPE in the top byte of the bit field - this is just so that
 * we can check that the table doesn't have a row missing, as the index into
 * the table should be the PTYPE.
 *
 * Typical work flow:
 *
 * IF NOT i40e_ptype_lookup[ptype].known
 * THEN
 *      Packet is unknown
 * ELSE IF i40e_ptype_lookup[ptype].outer_ip == I40E_RX_PTYPE_OUTER_IP
 *      Use the rest of the fields to look at the tunnels, inner protocols, etc
 * ELSE
 *      Use the enum i40e_rx_l2_ptype to decode the packet type
 * ENDIF
 */

/* macro to make the table lines short */
#define I40E_PTT(PTYPE, OUTER_IP, OUTER_IP_VER, OUTER_FRAG, T, TE, TEF, I, PL)\
        {       PTYPE, \
                1, \
                I40E_RX_PTYPE_OUTER_##OUTER_IP, \
                I40E_RX_PTYPE_OUTER_##OUTER_IP_VER, \
                I40E_RX_PTYPE_##OUTER_FRAG, \
                I40E_RX_PTYPE_TUNNEL_##T, \
                I40E_RX_PTYPE_TUNNEL_END_##TE, \
                I40E_RX_PTYPE_##TEF, \
                I40E_RX_PTYPE_INNER_PROT_##I, \
                I40E_RX_PTYPE_PAYLOAD_LAYER_##PL }

#define I40E_PTT_UNUSED_ENTRY(PTYPE) \
                { PTYPE, 0, 0, 0, 0, 0, 0, 0, 0, 0 }

/* shorter macros makes the table fit but are terse */
#define I40E_RX_PTYPE_NOF               I40E_RX_PTYPE_NOT_FRAG
#define I40E_RX_PTYPE_FRG               I40E_RX_PTYPE_FRAG
#define I40E_RX_PTYPE_INNER_PROT_TS     I40E_RX_PTYPE_INNER_PROT_TIMESYNC

/* Lookup table mapping the HW PTYPE to the bit field for decoding */
struct i40e_rx_ptype_decoded i40e_ptype_lookup[] = {
        /* L2 Packet types */
        I40E_PTT_UNUSED_ENTRY(0),
        I40E_PTT(1,  L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY2),
        I40E_PTT(2,  L2, NONE, NOF, NONE, NONE, NOF, TS,   PAY2),
        I40E_PTT(3,  L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY2),
        I40E_PTT_UNUSED_ENTRY(4),
        I40E_PTT_UNUSED_ENTRY(5),
        I40E_PTT(6,  L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY2),
        I40E_PTT(7,  L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY2),
        I40E_PTT_UNUSED_ENTRY(8),
        I40E_PTT_UNUSED_ENTRY(9),
        I40E_PTT(10, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY2),
        I40E_PTT(11, L2, NONE, NOF, NONE, NONE, NOF, NONE, NONE),
        I40E_PTT(12, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY3),
        I40E_PTT(13, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY3),
        I40E_PTT(14, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY3),
        I40E_PTT(15, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY3),
        I40E_PTT(16, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY3),
        I40E_PTT(17, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY3),
        I40E_PTT(18, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY3),
        I40E_PTT(19, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY3),
        I40E_PTT(20, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY3),
        I40E_PTT(21, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY3),

        /* Non Tunneled IPv4 */
        I40E_PTT(22, IP, IPV4, FRG, NONE, NONE, NOF, NONE, PAY3),
        I40E_PTT(23, IP, IPV4, NOF, NONE, NONE, NOF, NONE, PAY3),
        I40E_PTT(24, IP, IPV4, NOF, NONE, NONE, NOF, UDP,  PAY4),
        I40E_PTT_UNUSED_ENTRY(25),
        I40E_PTT(26, IP, IPV4, NOF, NONE, NONE, NOF, TCP,  PAY4),
        I40E_PTT(27, IP, IPV4, NOF, NONE, NONE, NOF, SCTP, PAY4),
        I40E_PTT(28, IP, IPV4, NOF, NONE, NONE, NOF, ICMP, PAY4),

        /* IPv4 --> IPv4 */
        I40E_PTT(29, IP, IPV4, NOF, IP_IP, IPV4, FRG, NONE, PAY3),
        I40E_PTT(30, IP, IPV4, NOF, IP_IP, IPV4, NOF, NONE, PAY3),
        I40E_PTT(31, IP, IPV4, NOF, IP_IP, IPV4, NOF, UDP,  PAY4),
        I40E_PTT_UNUSED_ENTRY(32),
        I40E_PTT(33, IP, IPV4, NOF, IP_IP, IPV4, NOF, TCP,  PAY4),
        I40E_PTT(34, IP, IPV4, NOF, IP_IP, IPV4, NOF, SCTP, PAY4),
        I40E_PTT(35, IP, IPV4, NOF, IP_IP, IPV4, NOF, ICMP, PAY4),

        /* IPv4 --> IPv6 */
        I40E_PTT(36, IP, IPV4, NOF, IP_IP, IPV6, FRG, NONE, PAY3),
        I40E_PTT(37, IP, IPV4, NOF, IP_IP, IPV6, NOF, NONE, PAY3),
        I40E_PTT(38, IP, IPV4, NOF, IP_IP, IPV6, NOF, UDP,  PAY4),
        I40E_PTT_UNUSED_ENTRY(39),
        I40E_PTT(40, IP, IPV4, NOF, IP_IP, IPV6, NOF, TCP,  PAY4),
        I40E_PTT(41, IP, IPV4, NOF, IP_IP, IPV6, NOF, SCTP, PAY4),
        I40E_PTT(42, IP, IPV4, NOF, IP_IP, IPV6, NOF, ICMP, PAY4),

        /* IPv4 --> GRE/NAT */
        I40E_PTT(43, IP, IPV4, NOF, IP_GRENAT, NONE, NOF, NONE, PAY3),

        /* IPv4 --> GRE/NAT --> IPv4 */
        I40E_PTT(44, IP, IPV4, NOF, IP_GRENAT, IPV4, FRG, NONE, PAY3),
        I40E_PTT(45, IP, IPV4, NOF, IP_GRENAT, IPV4, NOF, NONE, PAY3),
        I40E_PTT(46, IP, IPV4, NOF, IP_GRENAT, IPV4, NOF, UDP,  PAY4),
        I40E_PTT_UNUSED_ENTRY(47),
        I40E_PTT(48, IP, IPV4, NOF, IP_GRENAT, IPV4, NOF, TCP,  PAY4),
        I40E_PTT(49, IP, IPV4, NOF, IP_GRENAT, IPV4, NOF, SCTP, PAY4),
        I40E_PTT(50, IP, IPV4, NOF, IP_GRENAT, IPV4, NOF, ICMP, PAY4),

        /* IPv4 --> GRE/NAT --> IPv6 */
        I40E_PTT(51, IP, IPV4, NOF, IP_GRENAT, IPV6, FRG, NONE, PAY3),
        I40E_PTT(52, IP, IPV4, NOF, IP_GRENAT, IPV6, NOF, NONE, PAY3),
        I40E_PTT(53, IP, IPV4, NOF, IP_GRENAT, IPV6, NOF, UDP,  PAY4),
        I40E_PTT_UNUSED_ENTRY(54),
        I40E_PTT(55, IP, IPV4, NOF, IP_GRENAT, IPV6, NOF, TCP,  PAY4),
        I40E_PTT(56, IP, IPV4, NOF, IP_GRENAT, IPV6, NOF, SCTP, PAY4),
        I40E_PTT(57, IP, IPV4, NOF, IP_GRENAT, IPV6, NOF, ICMP, PAY4),

        /* IPv4 --> GRE/NAT --> MAC */
        I40E_PTT(58, IP, IPV4, NOF, IP_GRENAT_MAC, NONE, NOF, NONE, PAY3),

        /* IPv4 --> GRE/NAT --> MAC --> IPv4 */
        I40E_PTT(59, IP, IPV4, NOF, IP_GRENAT_MAC, IPV4, FRG, NONE, PAY3),
        I40E_PTT(60, IP, IPV4, NOF, IP_GRENAT_MAC, IPV4, NOF, NONE, PAY3),
        I40E_PTT(61, IP, IPV4, NOF, IP_GRENAT_MAC, IPV4, NOF, UDP,  PAY4),
        I40E_PTT_UNUSED_ENTRY(62),
        I40E_PTT(63, IP, IPV4, NOF, IP_GRENAT_MAC, IPV4, NOF, TCP,  PAY4),
        I40E_PTT(64, IP, IPV4, NOF, IP_GRENAT_MAC, IPV4, NOF, SCTP, PAY4),
        I40E_PTT(65, IP, IPV4, NOF, IP_GRENAT_MAC, IPV4, NOF, ICMP, PAY4),

        /* IPv4 --> GRE/NAT -> MAC --> IPv6 */
        I40E_PTT(66, IP, IPV4, NOF, IP_GRENAT_MAC, IPV6, FRG, NONE, PAY3),
        I40E_PTT(67, IP, IPV4, NOF, IP_GRENAT_MAC, IPV6, NOF, NONE, PAY3),
        I40E_PTT(68, IP, IPV4, NOF, IP_GRENAT_MAC, IPV6, NOF, UDP,  PAY4),
        I40E_PTT_UNUSED_ENTRY(69),
        I40E_PTT(70, IP, IPV4, NOF, IP_GRENAT_MAC, IPV6, NOF, TCP,  PAY4),
        I40E_PTT(71, IP, IPV4, NOF, IP_GRENAT_MAC, IPV6, NOF, SCTP, PAY4),
        I40E_PTT(72, IP, IPV4, NOF, IP_GRENAT_MAC, IPV6, NOF, ICMP, PAY4),

        /* IPv4 --> GRE/NAT --> MAC/VLAN */
        I40E_PTT(73, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, NONE, NOF, NONE, PAY3),

        /* IPv4 ---> GRE/NAT -> MAC/VLAN --> IPv4 */
        I40E_PTT(74, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV4, FRG, NONE, PAY3),
        I40E_PTT(75, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, NONE, PAY3),
        I40E_PTT(76, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, UDP,  PAY4),
        I40E_PTT_UNUSED_ENTRY(77),
        I40E_PTT(78, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, TCP,  PAY4),
        I40E_PTT(79, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, SCTP, PAY4),
        I40E_PTT(80, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, ICMP, PAY4),

        /* IPv4 -> GRE/NAT -> MAC/VLAN --> IPv6 */
        I40E_PTT(81, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV6, FRG, NONE, PAY3),
        I40E_PTT(82, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, NONE, PAY3),
        I40E_PTT(83, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, UDP,  PAY4),
        I40E_PTT_UNUSED_ENTRY(84),
        I40E_PTT(85, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, TCP,  PAY4),
        I40E_PTT(86, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, SCTP, PAY4),
        I40E_PTT(87, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, ICMP, PAY4),

        /* Non Tunneled IPv6 */
        I40E_PTT(88, IP, IPV6, FRG, NONE, NONE, NOF, NONE, PAY3),
        I40E_PTT(89, IP, IPV6, NOF, NONE, NONE, NOF, NONE, PAY3),
        I40E_PTT(90, IP, IPV6, NOF, NONE, NONE, NOF, UDP,  PAY4),
        I40E_PTT_UNUSED_ENTRY(91),
        I40E_PTT(92, IP, IPV6, NOF, NONE, NONE, NOF, TCP,  PAY4),
        I40E_PTT(93, IP, IPV6, NOF, NONE, NONE, NOF, SCTP, PAY4),
        I40E_PTT(94, IP, IPV6, NOF, NONE, NONE, NOF, ICMP, PAY4),

        /* IPv6 --> IPv4 */
        I40E_PTT(95,  IP, IPV6, NOF, IP_IP, IPV4, FRG, NONE, PAY3),
        I40E_PTT(96,  IP, IPV6, NOF, IP_IP, IPV4, NOF, NONE, PAY3),
        I40E_PTT(97,  IP, IPV6, NOF, IP_IP, IPV4, NOF, UDP,  PAY4),
        I40E_PTT_UNUSED_ENTRY(98),
        I40E_PTT(99,  IP, IPV6, NOF, IP_IP, IPV4, NOF, TCP,  PAY4),
        I40E_PTT(100, IP, IPV6, NOF, IP_IP, IPV4, NOF, SCTP, PAY4),
        I40E_PTT(101, IP, IPV6, NOF, IP_IP, IPV4, NOF, ICMP, PAY4),

        /* IPv6 --> IPv6 */
        I40E_PTT(102, IP, IPV6, NOF, IP_IP, IPV6, FRG, NONE, PAY3),
        I40E_PTT(103, IP, IPV6, NOF, IP_IP, IPV6, NOF, NONE, PAY3),
        I40E_PTT(104, IP, IPV6, NOF, IP_IP, IPV6, NOF, UDP,  PAY4),
        I40E_PTT_UNUSED_ENTRY(105),
        I40E_PTT(106, IP, IPV6, NOF, IP_IP, IPV6, NOF, TCP,  PAY4),
        I40E_PTT(107, IP, IPV6, NOF, IP_IP, IPV6, NOF, SCTP, PAY4),
        I40E_PTT(108, IP, IPV6, NOF, IP_IP, IPV6, NOF, ICMP, PAY4),

        /* IPv6 --> GRE/NAT */
        I40E_PTT(109, IP, IPV6, NOF, IP_GRENAT, NONE, NOF, NONE, PAY3),

        /* IPv6 --> GRE/NAT -> IPv4 */
        I40E_PTT(110, IP, IPV6, NOF, IP_GRENAT, IPV4, FRG, NONE, PAY3),
        I40E_PTT(111, IP, IPV6, NOF, IP_GRENAT, IPV4, NOF, NONE, PAY3),
        I40E_PTT(112, IP, IPV6, NOF, IP_GRENAT, IPV4, NOF, UDP,  PAY4),
        I40E_PTT_UNUSED_ENTRY(113),
        I40E_PTT(114, IP, IPV6, NOF, IP_GRENAT, IPV4, NOF, TCP,  PAY4),
        I40E_PTT(115, IP, IPV6, NOF, IP_GRENAT, IPV4, NOF, SCTP, PAY4),
        I40E_PTT(116, IP, IPV6, NOF, IP_GRENAT, IPV4, NOF, ICMP, PAY4),

        /* IPv6 --> GRE/NAT -> IPv6 */
        I40E_PTT(117, IP, IPV6, NOF, IP_GRENAT, IPV6, FRG, NONE, PAY3),
        I40E_PTT(118, IP, IPV6, NOF, IP_GRENAT, IPV6, NOF, NONE, PAY3),
        I40E_PTT(119, IP, IPV6, NOF, IP_GRENAT, IPV6, NOF, UDP,  PAY4),
        I40E_PTT_UNUSED_ENTRY(120),
        I40E_PTT(121, IP, IPV6, NOF, IP_GRENAT, IPV6, NOF, TCP,  PAY4),
        I40E_PTT(122, IP, IPV6, NOF, IP_GRENAT, IPV6, NOF, SCTP, PAY4),
        I40E_PTT(123, IP, IPV6, NOF, IP_GRENAT, IPV6, NOF, ICMP, PAY4),

        /* IPv6 --> GRE/NAT -> MAC */
        I40E_PTT(124, IP, IPV6, NOF, IP_GRENAT_MAC, NONE, NOF, NONE, PAY3),

        /* IPv6 --> GRE/NAT -> MAC -> IPv4 */
        I40E_PTT(125, IP, IPV6, NOF, IP_GRENAT_MAC, IPV4, FRG, NONE, PAY3),
        I40E_PTT(126, IP, IPV6, NOF, IP_GRENAT_MAC, IPV4, NOF, NONE, PAY3),
        I40E_PTT(127, IP, IPV6, NOF, IP_GRENAT_MAC, IPV4, NOF, UDP,  PAY4),
        I40E_PTT_UNUSED_ENTRY(128),
        I40E_PTT(129, IP, IPV6, NOF, IP_GRENAT_MAC, IPV4, NOF, TCP,  PAY4),
        I40E_PTT(130, IP, IPV6, NOF, IP_GRENAT_MAC, IPV4, NOF, SCTP, PAY4),
        I40E_PTT(131, IP, IPV6, NOF, IP_GRENAT_MAC, IPV4, NOF, ICMP, PAY4),

        /* IPv6 --> GRE/NAT -> MAC -> IPv6 */
        I40E_PTT(132, IP, IPV6, NOF, IP_GRENAT_MAC, IPV6, FRG, NONE, PAY3),
        I40E_PTT(133, IP, IPV6, NOF, IP_GRENAT_MAC, IPV6, NOF, NONE, PAY3),
        I40E_PTT(134, IP, IPV6, NOF, IP_GRENAT_MAC, IPV6, NOF, UDP,  PAY4),
        I40E_PTT_UNUSED_ENTRY(135),
        I40E_PTT(136, IP, IPV6, NOF, IP_GRENAT_MAC, IPV6, NOF, TCP,  PAY4),
        I40E_PTT(137, IP, IPV6, NOF, IP_GRENAT_MAC, IPV6, NOF, SCTP, PAY4),
        I40E_PTT(138, IP, IPV6, NOF, IP_GRENAT_MAC, IPV6, NOF, ICMP, PAY4),

        /* IPv6 --> GRE/NAT -> MAC/VLAN */
        I40E_PTT(139, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, NONE, NOF, NONE, PAY3),

        /* IPv6 --> GRE/NAT -> MAC/VLAN --> IPv4 */
        I40E_PTT(140, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV4, FRG, NONE, PAY3),
        I40E_PTT(141, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, NONE, PAY3),
        I40E_PTT(142, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, UDP,  PAY4),
        I40E_PTT_UNUSED_ENTRY(143),
        I40E_PTT(144, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, TCP,  PAY4),
        I40E_PTT(145, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, SCTP, PAY4),
        I40E_PTT(146, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, ICMP, PAY4),

        /* IPv6 --> GRE/NAT -> MAC/VLAN --> IPv6 */
        I40E_PTT(147, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV6, FRG, NONE, PAY3),
        I40E_PTT(148, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, NONE, PAY3),
        I40E_PTT(149, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, UDP,  PAY4),
        I40E_PTT_UNUSED_ENTRY(150),
        I40E_PTT(151, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, TCP,  PAY4),
        I40E_PTT(152, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, SCTP, PAY4),
        I40E_PTT(153, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, ICMP, PAY4),

        /* unused entries */
        I40E_PTT_UNUSED_ENTRY(154),
        I40E_PTT_UNUSED_ENTRY(155),
        I40E_PTT_UNUSED_ENTRY(156),
        I40E_PTT_UNUSED_ENTRY(157),
        I40E_PTT_UNUSED_ENTRY(158),
        I40E_PTT_UNUSED_ENTRY(159),

        I40E_PTT_UNUSED_ENTRY(160),
        I40E_PTT_UNUSED_ENTRY(161),
        I40E_PTT_UNUSED_ENTRY(162),
        I40E_PTT_UNUSED_ENTRY(163),
        I40E_PTT_UNUSED_ENTRY(164),
        I40E_PTT_UNUSED_ENTRY(165),
        I40E_PTT_UNUSED_ENTRY(166),
        I40E_PTT_UNUSED_ENTRY(167),
        I40E_PTT_UNUSED_ENTRY(168),
        I40E_PTT_UNUSED_ENTRY(169),

        I40E_PTT_UNUSED_ENTRY(170),
        I40E_PTT_UNUSED_ENTRY(171),
        I40E_PTT_UNUSED_ENTRY(172),
        I40E_PTT_UNUSED_ENTRY(173),
        I40E_PTT_UNUSED_ENTRY(174),
        I40E_PTT_UNUSED_ENTRY(175),
        I40E_PTT_UNUSED_ENTRY(176),
        I40E_PTT_UNUSED_ENTRY(177),
        I40E_PTT_UNUSED_ENTRY(178),
        I40E_PTT_UNUSED_ENTRY(179),

        I40E_PTT_UNUSED_ENTRY(180),
        I40E_PTT_UNUSED_ENTRY(181),
        I40E_PTT_UNUSED_ENTRY(182),
        I40E_PTT_UNUSED_ENTRY(183),
        I40E_PTT_UNUSED_ENTRY(184),
        I40E_PTT_UNUSED_ENTRY(185),
        I40E_PTT_UNUSED_ENTRY(186),
        I40E_PTT_UNUSED_ENTRY(187),
        I40E_PTT_UNUSED_ENTRY(188),
        I40E_PTT_UNUSED_ENTRY(189),

        I40E_PTT_UNUSED_ENTRY(190),
        I40E_PTT_UNUSED_ENTRY(191),
        I40E_PTT_UNUSED_ENTRY(192),
        I40E_PTT_UNUSED_ENTRY(193),
        I40E_PTT_UNUSED_ENTRY(194),
        I40E_PTT_UNUSED_ENTRY(195),
        I40E_PTT_UNUSED_ENTRY(196),
        I40E_PTT_UNUSED_ENTRY(197),
        I40E_PTT_UNUSED_ENTRY(198),
        I40E_PTT_UNUSED_ENTRY(199),

        I40E_PTT_UNUSED_ENTRY(200),
        I40E_PTT_UNUSED_ENTRY(201),
        I40E_PTT_UNUSED_ENTRY(202),
        I40E_PTT_UNUSED_ENTRY(203),
        I40E_PTT_UNUSED_ENTRY(204),
        I40E_PTT_UNUSED_ENTRY(205),
        I40E_PTT_UNUSED_ENTRY(206),
        I40E_PTT_UNUSED_ENTRY(207),
        I40E_PTT_UNUSED_ENTRY(208),
        I40E_PTT_UNUSED_ENTRY(209),

        I40E_PTT_UNUSED_ENTRY(210),
        I40E_PTT_UNUSED_ENTRY(211),
        I40E_PTT_UNUSED_ENTRY(212),
        I40E_PTT_UNUSED_ENTRY(213),
        I40E_PTT_UNUSED_ENTRY(214),
        I40E_PTT_UNUSED_ENTRY(215),
        I40E_PTT_UNUSED_ENTRY(216),
        I40E_PTT_UNUSED_ENTRY(217),
        I40E_PTT_UNUSED_ENTRY(218),
        I40E_PTT_UNUSED_ENTRY(219),

        I40E_PTT_UNUSED_ENTRY(220),
        I40E_PTT_UNUSED_ENTRY(221),
        I40E_PTT_UNUSED_ENTRY(222),
        I40E_PTT_UNUSED_ENTRY(223),
        I40E_PTT_UNUSED_ENTRY(224),
        I40E_PTT_UNUSED_ENTRY(225),
        I40E_PTT_UNUSED_ENTRY(226),
        I40E_PTT_UNUSED_ENTRY(227),
        I40E_PTT_UNUSED_ENTRY(228),
        I40E_PTT_UNUSED_ENTRY(229),

        I40E_PTT_UNUSED_ENTRY(230),
        I40E_PTT_UNUSED_ENTRY(231),
        I40E_PTT_UNUSED_ENTRY(232),
        I40E_PTT_UNUSED_ENTRY(233),
        I40E_PTT_UNUSED_ENTRY(234),
        I40E_PTT_UNUSED_ENTRY(235),
        I40E_PTT_UNUSED_ENTRY(236),
        I40E_PTT_UNUSED_ENTRY(237),
        I40E_PTT_UNUSED_ENTRY(238),
        I40E_PTT_UNUSED_ENTRY(239),

        I40E_PTT_UNUSED_ENTRY(240),
        I40E_PTT_UNUSED_ENTRY(241),
        I40E_PTT_UNUSED_ENTRY(242),
        I40E_PTT_UNUSED_ENTRY(243),
        I40E_PTT_UNUSED_ENTRY(244),
        I40E_PTT_UNUSED_ENTRY(245),
        I40E_PTT_UNUSED_ENTRY(246),
        I40E_PTT_UNUSED_ENTRY(247),
        I40E_PTT_UNUSED_ENTRY(248),
        I40E_PTT_UNUSED_ENTRY(249),

        I40E_PTT_UNUSED_ENTRY(250),
        I40E_PTT_UNUSED_ENTRY(251),
        I40E_PTT_UNUSED_ENTRY(252),
        I40E_PTT_UNUSED_ENTRY(253),
        I40E_PTT_UNUSED_ENTRY(254),
        I40E_PTT_UNUSED_ENTRY(255)
};

/**
 * i40e_init_shared_code - Initialize the shared code
 * @hw: pointer to hardware structure
 *
 * This assigns the MAC type and PHY code and inits the NVM.
 * Does not touch the hardware. This function must be called prior to any
 * other function in the shared code. The i40e_hw structure should be
 * memset to 0 prior to calling this function.  The following fields in
 * hw structure should be filled in prior to calling this function:
 * hw_addr, back, device_id, vendor_id, subsystem_device_id,
 * subsystem_vendor_id, and revision_id
 **/
i40e_status i40e_init_shared_code(struct i40e_hw *hw)
{
        i40e_status status = 0;
        u32 port, ari, func_rid;

        i40e_set_mac_type(hw);

        switch (hw->mac.type) {
        case I40E_MAC_XL710:
        case I40E_MAC_X722:
                break;
        default:
                return I40E_ERR_DEVICE_NOT_SUPPORTED;
        }

        hw->phy.get_link_info = true;

        /* Determine port number and PF number*/
        port = (rd32(hw, I40E_PFGEN_PORTNUM) & I40E_PFGEN_PORTNUM_PORT_NUM_MASK)
                                           >> I40E_PFGEN_PORTNUM_PORT_NUM_SHIFT;
        hw->port = (u8)port;
        ari = (rd32(hw, I40E_GLPCI_CAPSUP) & I40E_GLPCI_CAPSUP_ARI_EN_MASK) >>
                                                 I40E_GLPCI_CAPSUP_ARI_EN_SHIFT;
        func_rid = rd32(hw, I40E_PF_FUNC_RID);
        if (ari)
                hw->pf_id = (u8)(func_rid & 0xff);
        else
                hw->pf_id = (u8)(func_rid & 0x7);

        status = i40e_init_nvm(hw);
        return status;
}

/**
 * i40e_aq_mac_address_read - Retrieve the MAC addresses
 * @hw: pointer to the hw struct
 * @flags: a return indicator of what addresses were added to the addr store
 * @addrs: the requestor's mac addr store
 * @cmd_details: pointer to command details structure or NULL
 **/
static i40e_status i40e_aq_mac_address_read(struct i40e_hw *hw,
                                   u16 *flags,
                                   struct i40e_aqc_mac_address_read_data *addrs,
                                   struct i40e_asq_cmd_details *cmd_details)
{
        struct i40e_aq_desc desc;
        struct i40e_aqc_mac_address_read *cmd_data =
                (struct i40e_aqc_mac_address_read *)&desc.params.raw;
        i40e_status status;

        i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_mac_address_read);
        desc.flags |= cpu_to_le16(I40E_AQ_FLAG_BUF);

        status = i40e_asq_send_command(hw, &desc, addrs,
                                       sizeof(*addrs), cmd_details);
        *flags = le16_to_cpu(cmd_data->command_flags);

        return status;
}

/**
 * i40e_aq_mac_address_write - Change the MAC addresses
 * @hw: pointer to the hw struct
 * @flags: indicates which MAC to be written
 * @mac_addr: address to write
 * @cmd_details: pointer to command details structure or NULL
 **/
i40e_status i40e_aq_mac_address_write(struct i40e_hw *hw,
                                    u16 flags, u8 *mac_addr,
                                    struct i40e_asq_cmd_details *cmd_details)
{
        struct i40e_aq_desc desc;
        struct i40e_aqc_mac_address_write *cmd_data =
                (struct i40e_aqc_mac_address_write *)&desc.params.raw;
        i40e_status status;

        i40e_fill_default_direct_cmd_desc(&desc,
                                          i40e_aqc_opc_mac_address_write);
        cmd_data->command_flags = cpu_to_le16(flags);
        cmd_data->mac_sah = cpu_to_le16((u16)mac_addr[0] << 8 | mac_addr[1]);
        cmd_data->mac_sal = cpu_to_le32(((u32)mac_addr[2] << 24) |
                                        ((u32)mac_addr[3] << 16) |
                                        ((u32)mac_addr[4] << 8) |
                                        mac_addr[5]);

        status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

        return status;
}

/**
 * i40e_get_mac_addr - get MAC address

 * @hw: pointer to the HW structure
 * @mac_addr: pointer to MAC address
 *
 * Reads the adapter's MAC address from register
 **/
i40e_status i40e_get_mac_addr(struct i40e_hw *hw, u8 *mac_addr)
{
        struct i40e_aqc_mac_address_read_data addrs;
        i40e_status status;
        u16 flags = 0;

        status = i40e_aq_mac_address_read(hw, &flags, &addrs, NULL);

        if (flags & I40E_AQC_LAN_ADDR_VALID)
                ether_addr_copy(mac_addr, addrs.pf_lan_mac);

        return status;
}

/**
 * i40e_get_port_mac_addr - get Port MAC address
 * @hw: pointer to the HW structure
 * @mac_addr: pointer to Port MAC address
 *
 * Reads the adapter's Port MAC address
 **/
i40e_status i40e_get_port_mac_addr(struct i40e_hw *hw, u8 *mac_addr)
{
        struct i40e_aqc_mac_address_read_data addrs;
        i40e_status status;
        u16 flags = 0;

        status = i40e_aq_mac_address_read(hw, &flags, &addrs, NULL);
        if (status)
                return status;

        if (flags & I40E_AQC_PORT_ADDR_VALID)
                ether_addr_copy(mac_addr, addrs.port_mac);
        else
                status = I40E_ERR_INVALID_MAC_ADDR;

        return status;
}

/**
 * i40e_pre_tx_queue_cfg - pre tx queue configure
 * @hw: pointer to the HW structure
 * @queue: target PF queue index
 * @enable: state change request
 *
 * Handles hw requirement to indicate intention to enable
 * or disable target queue.
 **/
void i40e_pre_tx_queue_cfg(struct i40e_hw *hw, u32 queue, bool enable)
{
        u32 abs_queue_idx = hw->func_caps.base_queue + queue;
        u32 reg_block = 0;
        u32 reg_val;

        if (abs_queue_idx >= 128) {
                reg_block = abs_queue_idx / 128;
                abs_queue_idx %= 128;
        }

        reg_val = rd32(hw, I40E_GLLAN_TXPRE_QDIS(reg_block));
        reg_val &= ~I40E_GLLAN_TXPRE_QDIS_QINDX_MASK;
        reg_val |= (abs_queue_idx << I40E_GLLAN_TXPRE_QDIS_QINDX_SHIFT);

        if (enable)
                reg_val |= I40E_GLLAN_TXPRE_QDIS_CLEAR_QDIS_MASK;
        else
                reg_val |= I40E_GLLAN_TXPRE_QDIS_SET_QDIS_MASK;

        wr32(hw, I40E_GLLAN_TXPRE_QDIS(reg_block), reg_val);
}

/**
 *  i40e_read_pba_string - Reads part number string from EEPROM
 *  @hw: pointer to hardware structure
 *  @pba_num: stores the part number string from the EEPROM
 *  @pba_num_size: part number string buffer length
 *
 *  Reads the part number string from the EEPROM.
 **/
i40e_status i40e_read_pba_string(struct i40e_hw *hw, u8 *pba_num,
                                 u32 pba_num_size)
{
        i40e_status status = 0;
        u16 pba_word = 0;
        u16 pba_size = 0;
        u16 pba_ptr = 0;
        u16 i = 0;

        status = i40e_read_nvm_word(hw, I40E_SR_PBA_FLAGS, &pba_word);
        if (status || (pba_word != 0xFAFA)) {
                hw_dbg(hw, "Failed to read PBA flags or flag is invalid.\n");
                return status;
        }

        status = i40e_read_nvm_word(hw, I40E_SR_PBA_BLOCK_PTR, &pba_ptr);
        if (status) {
                hw_dbg(hw, "Failed to read PBA Block pointer.\n");
                return status;
        }

        status = i40e_read_nvm_word(hw, pba_ptr, &pba_size);
        if (status) {
                hw_dbg(hw, "Failed to read PBA Block size.\n");
                return status;
        }

        /* Subtract one to get PBA word count (PBA Size word is included in
         * total size)
         */
        pba_size--;
        if (pba_num_size < (((u32)pba_size * 2) + 1)) {
                hw_dbg(hw, "Buffer too small for PBA data.\n");
                return I40E_ERR_PARAM;
        }

        for (i = 0; i < pba_size; i++) {
                status = i40e_read_nvm_word(hw, (pba_ptr + 1) + i, &pba_word);
                if (status) {
                        hw_dbg(hw, "Failed to read PBA Block word %d.\n", i);
                        return status;
                }

                pba_num[(i * 2)] = (pba_word >> 8) & 0xFF;
                pba_num[(i * 2) + 1] = pba_word & 0xFF;
        }
        pba_num[(pba_size * 2)] = '\0';

        return status;
}

/**
 * i40e_get_media_type - Gets media type
 * @hw: pointer to the hardware structure
 **/
static enum i40e_media_type i40e_get_media_type(struct i40e_hw *hw)
{
        enum i40e_media_type media;

        switch (hw->phy.link_info.phy_type) {
        case I40E_PHY_TYPE_10GBASE_SR:
        case I40E_PHY_TYPE_10GBASE_LR:
        case I40E_PHY_TYPE_1000BASE_SX:
        case I40E_PHY_TYPE_1000BASE_LX:
        case I40E_PHY_TYPE_40GBASE_SR4:
        case I40E_PHY_TYPE_40GBASE_LR4:
        case I40E_PHY_TYPE_25GBASE_LR:
        case I40E_PHY_TYPE_25GBASE_SR:
                media = I40E_MEDIA_TYPE_FIBER;
                break;
        case I40E_PHY_TYPE_100BASE_TX:
        case I40E_PHY_TYPE_1000BASE_T:
        case I40E_PHY_TYPE_2_5GBASE_T:
        case I40E_PHY_TYPE_5GBASE_T:
        case I40E_PHY_TYPE_10GBASE_T:
                media = I40E_MEDIA_TYPE_BASET;
                break;
        case I40E_PHY_TYPE_10GBASE_CR1_CU:
        case I40E_PHY_TYPE_40GBASE_CR4_CU:
        case I40E_PHY_TYPE_10GBASE_CR1:
        case I40E_PHY_TYPE_40GBASE_CR4:
        case I40E_PHY_TYPE_10GBASE_SFPP_CU:
        case I40E_PHY_TYPE_40GBASE_AOC:
        case I40E_PHY_TYPE_10GBASE_AOC:
        case I40E_PHY_TYPE_25GBASE_CR:
        case I40E_PHY_TYPE_25GBASE_AOC:
        case I40E_PHY_TYPE_25GBASE_ACC:
                media = I40E_MEDIA_TYPE_DA;
                break;
        case I40E_PHY_TYPE_1000BASE_KX:
        case I40E_PHY_TYPE_10GBASE_KX4:
        case I40E_PHY_TYPE_10GBASE_KR:
        case I40E_PHY_TYPE_40GBASE_KR4:
        case I40E_PHY_TYPE_20GBASE_KR2:
        case I40E_PHY_TYPE_25GBASE_KR:
                media = I40E_MEDIA_TYPE_BACKPLANE;
                break;
        case I40E_PHY_TYPE_SGMII:
        case I40E_PHY_TYPE_XAUI:
        case I40E_PHY_TYPE_XFI:
        case I40E_PHY_TYPE_XLAUI:
        case I40E_PHY_TYPE_XLPPI:
        default:
                media = I40E_MEDIA_TYPE_UNKNOWN;
                break;
        }

        return media;
}

/**
 * i40e_poll_globr - Poll for Global Reset completion
 * @hw: pointer to the hardware structure
 * @retry_limit: how many times to retry before failure
 **/
static i40e_status i40e_poll_globr(struct i40e_hw *hw,
                                   u32 retry_limit)
{
        u32 cnt, reg = 0;

        for (cnt = 0; cnt < retry_limit; cnt++) {
                reg = rd32(hw, I40E_GLGEN_RSTAT);
                if (!(reg & I40E_GLGEN_RSTAT_DEVSTATE_MASK))
                        return 0;
                msleep(100);
        }

        hw_dbg(hw, "Global reset failed.\n");
        hw_dbg(hw, "I40E_GLGEN_RSTAT = 0x%x\n", reg);

        return I40E_ERR_RESET_FAILED;
}

#define I40E_PF_RESET_WAIT_COUNT_A0     200
#define I40E_PF_RESET_WAIT_COUNT        200
/**
 * i40e_pf_reset - Reset the PF
 * @hw: pointer to the hardware structure
 *
 * Assuming someone else has triggered a global reset,
 * assure the global reset is complete and then reset the PF
 **/
i40e_status i40e_pf_reset(struct i40e_hw *hw)
{
        u32 cnt = 0;
        u32 cnt1 = 0;
        u32 reg = 0;
        u32 grst_del;

        /* Poll for Global Reset steady state in case of recent GRST.
         * The grst delay value is in 100ms units, and we'll wait a
         * couple counts longer to be sure we don't just miss the end.
         */
        grst_del = (rd32(hw, I40E_GLGEN_RSTCTL) &
                    I40E_GLGEN_RSTCTL_GRSTDEL_MASK) >>
                    I40E_GLGEN_RSTCTL_GRSTDEL_SHIFT;

        /* It can take upto 15 secs for GRST steady state.
         * Bump it to 16 secs max to be safe.
         */
        grst_del = grst_del * 20;

        for (cnt = 0; cnt < grst_del; cnt++) {
                reg = rd32(hw, I40E_GLGEN_RSTAT);
                if (!(reg & I40E_GLGEN_RSTAT_DEVSTATE_MASK))
                        break;
                msleep(100);
        }
        if (reg & I40E_GLGEN_RSTAT_DEVSTATE_MASK) {
                hw_dbg(hw, "Global reset polling failed to complete.\n");
                return I40E_ERR_RESET_FAILED;
        }

        /* Now Wait for the FW to be ready */
        for (cnt1 = 0; cnt1 < I40E_PF_RESET_WAIT_COUNT; cnt1++) {
                reg = rd32(hw, I40E_GLNVM_ULD);
                reg &= (I40E_GLNVM_ULD_CONF_CORE_DONE_MASK |
                        I40E_GLNVM_ULD_CONF_GLOBAL_DONE_MASK);
                if (reg == (I40E_GLNVM_ULD_CONF_CORE_DONE_MASK |
                            I40E_GLNVM_ULD_CONF_GLOBAL_DONE_MASK)) {
                        hw_dbg(hw, "Core and Global modules ready %d\n", cnt1);
                        break;
                }
                usleep_range(10000, 20000);
        }
        if (!(reg & (I40E_GLNVM_ULD_CONF_CORE_DONE_MASK |
                     I40E_GLNVM_ULD_CONF_GLOBAL_DONE_MASK))) {
                hw_dbg(hw, "wait for FW Reset complete timedout\n");
                hw_dbg(hw, "I40E_GLNVM_ULD = 0x%x\n", reg);
                return I40E_ERR_RESET_FAILED;
        }

        /* If there was a Global Reset in progress when we got here,
         * we don't need to do the PF Reset
         */
        if (!cnt) {
                u32 reg2 = 0;
                if (hw->revision_id == 0)
                        cnt = I40E_PF_RESET_WAIT_COUNT_A0;
                else
                        cnt = I40E_PF_RESET_WAIT_COUNT;
                reg = rd32(hw, I40E_PFGEN_CTRL);
                wr32(hw, I40E_PFGEN_CTRL,
                     (reg | I40E_PFGEN_CTRL_PFSWR_MASK));
                for (; cnt; cnt--) {
                        reg = rd32(hw, I40E_PFGEN_CTRL);
                        if (!(reg & I40E_PFGEN_CTRL_PFSWR_MASK))
                                break;
                        reg2 = rd32(hw, I40E_GLGEN_RSTAT);
                        if (reg2 & I40E_GLGEN_RSTAT_DEVSTATE_MASK)
                                break;
                        usleep_range(1000, 2000);
                }
                if (reg2 & I40E_GLGEN_RSTAT_DEVSTATE_MASK) {
                        if (i40e_poll_globr(hw, grst_del))
                                return I40E_ERR_RESET_FAILED;
                } else if (reg & I40E_PFGEN_CTRL_PFSWR_MASK) {
                        hw_dbg(hw, "PF reset polling failed to complete.\n");
                        return I40E_ERR_RESET_FAILED;
                }
        }

        i40e_clear_pxe_mode(hw);

        return 0;
}

/**
 * i40e_clear_hw - clear out any left over hw state
 * @hw: pointer to the hw struct
 *
 * Clear queues and interrupts, typically called at init time,
 * but after the capabilities have been found so we know how many
 * queues and msix vectors have been allocated.
 **/
void i40e_clear_hw(struct i40e_hw *hw)
{
        u32 num_queues, base_queue;
        u32 num_pf_int;
        u32 num_vf_int;
        u32 num_vfs;
        u32 i, j;
        u32 val;
        u32 eol = 0x7ff;

        /* get number of interrupts, queues, and VFs */
        val = rd32(hw, I40E_GLPCI_CNF2);
        num_pf_int = (val & I40E_GLPCI_CNF2_MSI_X_PF_N_MASK) >>
                     I40E_GLPCI_CNF2_MSI_X_PF_N_SHIFT;
        num_vf_int = (val & I40E_GLPCI_CNF2_MSI_X_VF_N_MASK) >>
                     I40E_GLPCI_CNF2_MSI_X_VF_N_SHIFT;

        val = rd32(hw, I40E_PFLAN_QALLOC);
        base_queue = (val & I40E_PFLAN_QALLOC_FIRSTQ_MASK) >>
                     I40E_PFLAN_QALLOC_FIRSTQ_SHIFT;
        j = (val & I40E_PFLAN_QALLOC_LASTQ_MASK) >>
            I40E_PFLAN_QALLOC_LASTQ_SHIFT;
        if (val & I40E_PFLAN_QALLOC_VALID_MASK)
                num_queues = (j - base_queue) + 1;
        else
                num_queues = 0;

        val = rd32(hw, I40E_PF_VT_PFALLOC);
        i = (val & I40E_PF_VT_PFALLOC_FIRSTVF_MASK) >>
            I40E_PF_VT_PFALLOC_FIRSTVF_SHIFT;
        j = (val & I40E_PF_VT_PFALLOC_LASTVF_MASK) >>
            I40E_PF_VT_PFALLOC_LASTVF_SHIFT;
        if (val & I40E_PF_VT_PFALLOC_VALID_MASK)
                num_vfs = (j - i) + 1;
        else
                num_vfs = 0;

        /* stop all the interrupts */
        wr32(hw, I40E_PFINT_ICR0_ENA, 0);
        val = 0x3 << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT;
        for (i = 0; i < num_pf_int - 2; i++)
                wr32(hw, I40E_PFINT_DYN_CTLN(i), val);

        /* Set the FIRSTQ_INDX field to 0x7FF in PFINT_LNKLSTx */
        val = eol << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
        wr32(hw, I40E_PFINT_LNKLST0, val);
        for (i = 0; i < num_pf_int - 2; i++)
                wr32(hw, I40E_PFINT_LNKLSTN(i), val);
        val = eol << I40E_VPINT_LNKLST0_FIRSTQ_INDX_SHIFT;
        for (i = 0; i < num_vfs; i++)
                wr32(hw, I40E_VPINT_LNKLST0(i), val);
        for (i = 0; i < num_vf_int - 2; i++)
                wr32(hw, I40E_VPINT_LNKLSTN(i), val);

        /* warn the HW of the coming Tx disables */
        for (i = 0; i < num_queues; i++) {
                u32 abs_queue_idx = base_queue + i;
                u32 reg_block = 0;

                if (abs_queue_idx >= 128) {
                        reg_block = abs_queue_idx / 128;
                        abs_queue_idx %= 128;
                }

                val = rd32(hw, I40E_GLLAN_TXPRE_QDIS(reg_block));
                val &= ~I40E_GLLAN_TXPRE_QDIS_QINDX_MASK;
                val |= (abs_queue_idx << I40E_GLLAN_TXPRE_QDIS_QINDX_SHIFT);
                val |= I40E_GLLAN_TXPRE_QDIS_SET_QDIS_MASK;

                wr32(hw, I40E_GLLAN_TXPRE_QDIS(reg_block), val);
        }
        udelay(400);

        /* stop all the queues */
        for (i = 0; i < num_queues; i++) {
                wr32(hw, I40E_QINT_TQCTL(i), 0);
                wr32(hw, I40E_QTX_ENA(i), 0);
                wr32(hw, I40E_QINT_RQCTL(i), 0);
                wr32(hw, I40E_QRX_ENA(i), 0);
        }

        /* short wait for all queue disables to settle */
        udelay(50);
}

/**
 * i40e_clear_pxe_mode - clear pxe operations mode
 * @hw: pointer to the hw struct
 *
 * Make sure all PXE mode settings are cleared, including things
 * like descriptor fetch/write-back mode.
 **/
void i40e_clear_pxe_mode(struct i40e_hw *hw)
{
        u32 reg;

        if (i40e_check_asq_alive(hw))
                i40e_aq_clear_pxe_mode(hw, NULL);

        /* Clear single descriptor fetch/write-back mode */
        reg = rd32(hw, I40E_GLLAN_RCTL_0);

        if (hw->revision_id == 0) {
                /* As a work around clear PXE_MODE instead of setting it */
                wr32(hw, I40E_GLLAN_RCTL_0, (reg & (~I40E_GLLAN_RCTL_0_PXE_MODE_MASK)));
        } else {
                wr32(hw, I40E_GLLAN_RCTL_0, (reg | I40E_GLLAN_RCTL_0_PXE_MODE_MASK));
        }
}

/**
 * i40e_led_is_mine - helper to find matching led
 * @hw: pointer to the hw struct
 * @idx: index into GPIO registers
 *
 * returns: 0 if no match, otherwise the value of the GPIO_CTL register
 */
static u32 i40e_led_is_mine(struct i40e_hw *hw, int idx)
{
        u32 gpio_val = 0;
        u32 port;

        if (!I40E_IS_X710TL_DEVICE(hw->device_id) &&
            !hw->func_caps.led[idx])
                return 0;
        gpio_val = rd32(hw, I40E_GLGEN_GPIO_CTL(idx));
        port = (gpio_val & I40E_GLGEN_GPIO_CTL_PRT_NUM_MASK) >>
                I40E_GLGEN_GPIO_CTL_PRT_NUM_SHIFT;

        /* if PRT_NUM_NA is 1 then this LED is not port specific, OR
         * if it is not our port then ignore
         */
        if ((gpio_val & I40E_GLGEN_GPIO_CTL_PRT_NUM_NA_MASK) ||
            (port != hw->port))
                return 0;

        return gpio_val;
}

#define I40E_FW_LED BIT(4)
#define I40E_LED_MODE_VALID (I40E_GLGEN_GPIO_CTL_LED_MODE_MASK >> \
                             I40E_GLGEN_GPIO_CTL_LED_MODE_SHIFT)

#define I40E_LED0 22

#define I40E_PIN_FUNC_SDP 0x0
#define I40E_PIN_FUNC_LED 0x1

/**
 * i40e_led_get - return current on/off mode
 * @hw: pointer to the hw struct
 *
 * The value returned is the 'mode' field as defined in the
 * GPIO register definitions: 0x0 = off, 0xf = on, and other
 * values are variations of possible behaviors relating to
 * blink, link, and wire.
 **/
u32 i40e_led_get(struct i40e_hw *hw)
{
        u32 mode = 0;
        int i;

        /* as per the documentation GPIO 22-29 are the LED
         * GPIO pins named LED0..LED7
         */
        for (i = I40E_LED0; i <= I40E_GLGEN_GPIO_CTL_MAX_INDEX; i++) {
                u32 gpio_val = i40e_led_is_mine(hw, i);

                if (!gpio_val)
                        continue;

                mode = (gpio_val & I40E_GLGEN_GPIO_CTL_LED_MODE_MASK) >>
                        I40E_GLGEN_GPIO_CTL_LED_MODE_SHIFT;
                break;
        }

        return mode;
}

/**
 * i40e_led_set - set new on/off mode
 * @hw: pointer to the hw struct
 * @mode: 0=off, 0xf=on (else see manual for mode details)
 * @blink: true if the LED should blink when on, false if steady
 *
 * if this function is used to turn on the blink it should
 * be used to disable the blink when restoring the original state.
 **/
void i40e_led_set(struct i40e_hw *hw, u32 mode, bool blink)
{
        int i;

        if (mode & ~I40E_LED_MODE_VALID) {
                hw_dbg(hw, "invalid mode passed in %X\n", mode);
                return;
        }

        /* as per the documentation GPIO 22-29 are the LED
         * GPIO pins named LED0..LED7
         */
        for (i = I40E_LED0; i <= I40E_GLGEN_GPIO_CTL_MAX_INDEX; i++) {
                u32 gpio_val = i40e_led_is_mine(hw, i);

                if (!gpio_val)
                        continue;

                if (I40E_IS_X710TL_DEVICE(hw->device_id)) {
                        u32 pin_func = 0;

                        if (mode & I40E_FW_LED)
                                pin_func = I40E_PIN_FUNC_SDP;
                        else
                                pin_func = I40E_PIN_FUNC_LED;

                        gpio_val &= ~I40E_GLGEN_GPIO_CTL_PIN_FUNC_MASK;
                        gpio_val |= ((pin_func <<
                                     I40E_GLGEN_GPIO_CTL_PIN_FUNC_SHIFT) &
                                     I40E_GLGEN_GPIO_CTL_PIN_FUNC_MASK);
                }
                gpio_val &= ~I40E_GLGEN_GPIO_CTL_LED_MODE_MASK;
                /* this & is a bit of paranoia, but serves as a range check */
                gpio_val |= ((mode << I40E_GLGEN_GPIO_CTL_LED_MODE_SHIFT) &
                             I40E_GLGEN_GPIO_CTL_LED_MODE_MASK);

                if (blink)
                        gpio_val |= BIT(I40E_GLGEN_GPIO_CTL_LED_BLINK_SHIFT);
                else
                        gpio_val &= ~BIT(I40E_GLGEN_GPIO_CTL_LED_BLINK_SHIFT);

                wr32(hw, I40E_GLGEN_GPIO_CTL(i), gpio_val);
                break;
        }
}

/* Admin command wrappers */

/**
 * i40e_aq_get_phy_capabilities
 * @hw: pointer to the hw struct
 * @abilities: structure for PHY capabilities to be filled
 * @qualified_modules: report Qualified Modules
 * @report_init: report init capabilities (active are default)
 * @cmd_details: pointer to command details structure or NULL
 *
 * Returns the various PHY abilities supported on the Port.
 **/
i40e_status i40e_aq_get_phy_capabilities(struct i40e_hw *hw,
                        bool qualified_modules, bool report_init,
                        struct i40e_aq_get_phy_abilities_resp *abilities,
                        struct i40e_asq_cmd_details *cmd_details)
{
        struct i40e_aq_desc desc;
        i40e_status status;
        u16 abilities_size = sizeof(struct i40e_aq_get_phy_abilities_resp);
        u16 max_delay = I40E_MAX_PHY_TIMEOUT, total_delay = 0;

        if (!abilities)
                return I40E_ERR_PARAM;

        do {
                i40e_fill_default_direct_cmd_desc(&desc,
                                               i40e_aqc_opc_get_phy_abilities);

                desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
                if (abilities_size > I40E_AQ_LARGE_BUF)
                        desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);

                if (qualified_modules)
                        desc.params.external.param0 |=
                        cpu_to_le32(I40E_AQ_PHY_REPORT_QUALIFIED_MODULES);

                if (report_init)
                        desc.params.external.param0 |=
                        cpu_to_le32(I40E_AQ_PHY_REPORT_INITIAL_VALUES);

                status = i40e_asq_send_command(hw, &desc, abilities,
                                               abilities_size, cmd_details);

                switch (hw->aq.asq_last_status) {
                case I40E_AQ_RC_EIO:
                        status = I40E_ERR_UNKNOWN_PHY;
                        break;
                case I40E_AQ_RC_EAGAIN:
                        usleep_range(1000, 2000);
                        total_delay++;
                        status = I40E_ERR_TIMEOUT;
                        break;
                /* also covers I40E_AQ_RC_OK */
                default:
                        break;
                }

        } while ((hw->aq.asq_last_status == I40E_AQ_RC_EAGAIN) &&
                (total_delay < max_delay));

        if (status)
                return status;

        if (report_init) {
                if (hw->mac.type ==  I40E_MAC_XL710 &&
                    hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
                    hw->aq.api_min_ver >= I40E_MINOR_VER_GET_LINK_INFO_XL710) {
                        status = i40e_aq_get_link_info(hw, true, NULL, NULL);
                } else {
                        hw->phy.phy_types = le32_to_cpu(abilities->phy_type);
                        hw->phy.phy_types |=
                                        ((u64)abilities->phy_type_ext << 32);
                }
        }

        return status;
}

/**
 * i40e_aq_set_phy_config
 * @hw: pointer to the hw struct
 * @config: structure with PHY configuration to be set
 * @cmd_details: pointer to command details structure or NULL
 *
 * Set the various PHY configuration parameters
 * supported on the Port.One or more of the Set PHY config parameters may be
 * ignored in an MFP mode as the PF may not have the privilege to set some
 * of the PHY Config parameters. This status will be indicated by the
 * command response.
 **/
enum i40e_status_code i40e_aq_set_phy_config(struct i40e_hw *hw,
                                struct i40e_aq_set_phy_config *config,
                                struct i40e_asq_cmd_details *cmd_details)
{
        struct i40e_aq_desc desc;
        struct i40e_aq_set_phy_config *cmd =
                        (struct i40e_aq_set_phy_config *)&desc.params.raw;
        enum i40e_status_code status;

        if (!config)
                return I40E_ERR_PARAM;

        i40e_fill_default_direct_cmd_desc(&desc,
                                          i40e_aqc_opc_set_phy_config);

        *cmd = *config;

        status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

        return status;
}

static noinline_for_stack enum i40e_status_code
i40e_set_fc_status(struct i40e_hw *hw,
                   struct i40e_aq_get_phy_abilities_resp *abilities,
                   bool atomic_restart)
{
        struct i40e_aq_set_phy_config config;
        enum i40e_fc_mode fc_mode = hw->fc.requested_mode;
        u8 pause_mask = 0x0;

        switch (fc_mode) {
        case I40E_FC_FULL:
                pause_mask |= I40E_AQ_PHY_FLAG_PAUSE_TX;
                pause_mask |= I40E_AQ_PHY_FLAG_PAUSE_RX;
                break;
        case I40E_FC_RX_PAUSE:
                pause_mask |= I40E_AQ_PHY_FLAG_PAUSE_RX;
                break;
        case I40E_FC_TX_PAUSE:
                pause_mask |= I40E_AQ_PHY_FLAG_PAUSE_TX;
                break;
        default:
                break;
        }

        memset(&config, 0, sizeof(struct i40e_aq_set_phy_config));
        /* clear the old pause settings */
        config.abilities = abilities->abilities & ~(I40E_AQ_PHY_FLAG_PAUSE_TX) &
                           ~(I40E_AQ_PHY_FLAG_PAUSE_RX);
        /* set the new abilities */
        config.abilities |= pause_mask;
        /* If the abilities have changed, then set the new config */
        if (config.abilities == abilities->abilities)
                return 0;

        /* Auto restart link so settings take effect */
        if (atomic_restart)
                config.abilities |= I40E_AQ_PHY_ENABLE_ATOMIC_LINK;
        /* Copy over all the old settings */
        config.phy_type = abilities->phy_type;
        config.phy_type_ext = abilities->phy_type_ext;
        config.link_speed = abilities->link_speed;
        config.eee_capability = abilities->eee_capability;
        config.eeer = abilities->eeer_val;
        config.low_power_ctrl = abilities->d3_lpan;
        config.fec_config = abilities->fec_cfg_curr_mod_ext_info &
                            I40E_AQ_PHY_FEC_CONFIG_MASK;

        return i40e_aq_set_phy_config(hw, &config, NULL);
}

/**
 * i40e_set_fc
 * @hw: pointer to the hw struct
 * @aq_failures: buffer to return AdminQ failure information
 * @atomic_restart: whether to enable atomic link restart
 *
 * Set the requested flow control mode using set_phy_config.
 **/
enum i40e_status_code i40e_set_fc(struct i40e_hw *hw, u8 *aq_failures,
                                  bool atomic_restart)
{
        struct i40e_aq_get_phy_abilities_resp abilities;
        enum i40e_status_code status;

        *aq_failures = 0x0;

        /* Get the current phy config */
        status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities,
                                              NULL);
        if (status) {
                *aq_failures |= I40E_SET_FC_AQ_FAIL_GET;
                return status;
        }

        status = i40e_set_fc_status(hw, &abilities, atomic_restart);
        if (status)
                *aq_failures |= I40E_SET_FC_AQ_FAIL_SET;

        /* Update the link info */
        status = i40e_update_link_info(hw);
        if (status) {
                /* Wait a little bit (on 40G cards it sometimes takes a really
                 * long time for link to come back from the atomic reset)
                 * and try once more
                 */
                msleep(1000);
                status = i40e_update_link_info(hw);
        }
        if (status)
                *aq_failures |= I40E_SET_FC_AQ_FAIL_UPDATE;

        return status;
}

/**
 * i40e_aq_clear_pxe_mode
 * @hw: pointer to the hw struct
 * @cmd_details: pointer to command details structure or NULL
 *
 * Tell the firmware that the driver is taking over from PXE
 **/
i40e_status i40e_aq_clear_pxe_mode(struct i40e_hw *hw,
                                struct i40e_asq_cmd_details *cmd_details)
{
        i40e_status status;
        struct i40e_aq_desc desc;
        struct i40e_aqc_clear_pxe *cmd =
                (struct i40e_aqc_clear_pxe *)&desc.params.raw;

        i40e_fill_default_direct_cmd_desc(&desc,
                                          i40e_aqc_opc_clear_pxe_mode);

        cmd->rx_cnt = 0x2;

        status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

        wr32(hw, I40E_GLLAN_RCTL_0, 0x1);

        return status;
}

/**
 * i40e_aq_set_link_restart_an
 * @hw: pointer to the hw struct
 * @enable_link: if true: enable link, if false: disable link
 * @cmd_details: pointer to command details structure or NULL
 *
 * Sets up the link and restarts the Auto-Negotiation over the link.
 **/
i40e_status i40e_aq_set_link_restart_an(struct i40e_hw *hw,
                                        bool enable_link,
                                        struct i40e_asq_cmd_details *cmd_details)
{
        struct i40e_aq_desc desc;
        struct i40e_aqc_set_link_restart_an *cmd =
                (struct i40e_aqc_set_link_restart_an *)&desc.params.raw;
        i40e_status status;

        i40e_fill_default_direct_cmd_desc(&desc,
                                          i40e_aqc_opc_set_link_restart_an);

        cmd->command = I40E_AQ_PHY_RESTART_AN;
        if (enable_link)
                cmd->command |= I40E_AQ_PHY_LINK_ENABLE;
        else
                cmd->command &= ~I40E_AQ_PHY_LINK_ENABLE;

        status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

        return status;
}

/**
 * i40e_aq_get_link_info
 * @hw: pointer to the hw struct
 * @enable_lse: enable/disable LinkStatusEvent reporting
 * @link: pointer to link status structure - optional
 * @cmd_details: pointer to command details structure or NULL
 *
 * Returns the link status of the adapter.
 **/
i40e_status i40e_aq_get_link_info(struct i40e_hw *hw,
                                bool enable_lse, struct i40e_link_status *link,
                                struct i40e_asq_cmd_details *cmd_details)
{
        struct i40e_aq_desc desc;
        struct i40e_aqc_get_link_status *resp =
                (struct i40e_aqc_get_link_status *)&desc.params.raw;
        struct i40e_link_status *hw_link_info = &hw->phy.link_info;
        i40e_status status;
        bool tx_pause, rx_pause;
        u16 command_flags;

        i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_get_link_status);

        if (enable_lse)
                command_flags = I40E_AQ_LSE_ENABLE;
        else
                command_flags = I40E_AQ_LSE_DISABLE;
        resp->command_flags = cpu_to_le16(command_flags);

        status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

        if (status)
                goto aq_get_link_info_exit;

        /* save off old link status information */
        hw->phy.link_info_old = *hw_link_info;

        /* update link status */
        hw_link_info->phy_type = (enum i40e_aq_phy_type)resp->phy_type;
        hw->phy.media_type = i40e_get_media_type(hw);
        hw_link_info->link_speed = (enum i40e_aq_link_speed)resp->link_speed;
        hw_link_info->link_info = resp->link_info;
        hw_link_info->an_info = resp->an_info;
        hw_link_info->fec_info = resp->config & (I40E_AQ_CONFIG_FEC_KR_ENA |
                                                 I40E_AQ_CONFIG_FEC_RS_ENA);
        hw_link_info->ext_info = resp->ext_info;
        hw_link_info->loopback = resp->loopback & I40E_AQ_LOOPBACK_MASK;
        hw_link_info->max_frame_size = le16_to_cpu(resp->max_frame_size);
        hw_link_info->pacing = resp->config & I40E_AQ_CONFIG_PACING_MASK;

        /* update fc info */
        tx_pause = !!(resp->an_info & I40E_AQ_LINK_PAUSE_TX);
        rx_pause = !!(resp->an_info & I40E_AQ_LINK_PAUSE_RX);
        if (tx_pause & rx_pause)
                hw->fc.current_mode = I40E_FC_FULL;
        else if (tx_pause)
                hw->fc.current_mode = I40E_FC_TX_PAUSE;
        else if (rx_pause)
                hw->fc.current_mode = I40E_FC_RX_PAUSE;
        else
                hw->fc.current_mode = I40E_FC_NONE;

        if (resp->config & I40E_AQ_CONFIG_CRC_ENA)
                hw_link_info->crc_enable = true;
        else
                hw_link_info->crc_enable = false;

        if (resp->command_flags & cpu_to_le16(I40E_AQ_LSE_IS_ENABLED))
                hw_link_info->lse_enable = true;
        else
                hw_link_info->lse_enable = false;

        if ((hw->mac.type == I40E_MAC_XL710) &&
            (hw->aq.fw_maj_ver < 4 || (hw->aq.fw_maj_ver == 4 &&
             hw->aq.fw_min_ver < 40)) && hw_link_info->phy_type == 0xE)
                hw_link_info->phy_type = I40E_PHY_TYPE_10GBASE_SFPP_CU;

        if (hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE &&
            hw->mac.type != I40E_MAC_X722) {
                __le32 tmp;

                memcpy(&tmp, resp->link_type, sizeof(tmp));
                hw->phy.phy_types = le32_to_cpu(tmp);
                hw->phy.phy_types |= ((u64)resp->link_type_ext << 32);
        }

        /* save link status information */
        if (link)
                *link = *hw_link_info;

        /* flag cleared so helper functions don't call AQ again */
        hw->phy.get_link_info = false;

aq_get_link_info_exit:
        return status;
}

/**
 * i40e_aq_set_phy_int_mask
 * @hw: pointer to the hw struct
 * @mask: interrupt mask to be set
 * @cmd_details: pointer to command details structure or NULL
 *
 * Set link interrupt mask.
 **/
i40e_status i40e_aq_set_phy_int_mask(struct i40e_hw *hw,
                                     u16 mask,
                                     struct i40e_asq_cmd_details *cmd_details)
{
        struct i40e_aq_desc desc;
        struct i40e_aqc_set_phy_int_mask *cmd =
                (struct i40e_aqc_set_phy_int_mask *)&desc.params.raw;
        i40e_status status;

        i40e_fill_default_direct_cmd_desc(&desc,
                                          i40e_aqc_opc_set_phy_int_mask);

        cmd->event_mask = cpu_to_le16(mask);

        status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

        return status;
}

/**
 * i40e_aq_set_phy_debug
 * @hw: pointer to the hw struct
 * @cmd_flags: debug command flags
 * @cmd_details: pointer to command details structure or NULL
 *
 * Reset the external PHY.
 **/
i40e_status i40e_aq_set_phy_debug(struct i40e_hw *hw, u8 cmd_flags,
                                  struct i40e_asq_cmd_details *cmd_details)
{
        struct i40e_aq_desc desc;
        struct i40e_aqc_set_phy_debug *cmd =
                (struct i40e_aqc_set_phy_debug *)&desc.params.raw;
        i40e_status status;

        i40e_fill_default_direct_cmd_desc(&desc,
                                          i40e_aqc_opc_set_phy_debug);

        cmd->command_flags = cmd_flags;

        status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

        return status;
}

/**
 * i40e_is_aq_api_ver_ge
 * @aq: pointer to AdminQ info containing HW API version to compare
 * @maj: API major value
 * @min: API minor value
 *
 * Assert whether current HW API version is greater/equal than provided.
 **/
static bool i40e_is_aq_api_ver_ge(struct i40e_adminq_info *aq, u16 maj,
                                  u16 min)
{
        return (aq->api_maj_ver > maj ||
                (aq->api_maj_ver == maj && aq->api_min_ver >= min));
}

/**
 * i40e_aq_add_vsi
 * @hw: pointer to the hw struct
 * @vsi_ctx: pointer to a vsi context struct
 * @cmd_details: pointer to command details structure or NULL
 *
 * Add a VSI context to the hardware.
**/
i40e_status i40e_aq_add_vsi(struct i40e_hw *hw,
                                struct i40e_vsi_context *vsi_ctx,
                                struct i40e_asq_cmd_details *cmd_details)
{
        struct i40e_aq_desc desc;
        struct i40e_aqc_add_get_update_vsi *cmd =
                (struct i40e_aqc_add_get_update_vsi *)&desc.params.raw;
        struct i40e_aqc_add_get_update_vsi_completion *resp =
                (struct i40e_aqc_add_get_update_vsi_completion *)

                &desc.params.raw;
        i40e_status status;

        i40e_fill_default_direct_cmd_desc(&desc,
                                          i40e_aqc_opc_add_vsi);

        cmd->uplink_seid = cpu_to_le16(vsi_ctx->uplink_seid);
        cmd->connection_type = vsi_ctx->connection_type;
        cmd->vf_id = vsi_ctx->vf_num;
        cmd->vsi_flags = cpu_to_le16(vsi_ctx->flags);

        desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));

        status = i40e_asq_send_command(hw, &desc, &vsi_ctx->info,
                                    sizeof(vsi_ctx->info), cmd_details);

        if (status)
                goto aq_add_vsi_exit;

        vsi_ctx->seid = le16_to_cpu(resp->seid);
        vsi_ctx->vsi_number = le16_to_cpu(resp->vsi_number);
        vsi_ctx->vsis_allocated = le16_to_cpu(resp->vsi_used);
        vsi_ctx->vsis_unallocated = le16_to_cpu(resp->vsi_free);

aq_add_vsi_exit:
        return status;
}

/**
 * i40e_aq_set_default_vsi
 * @hw: pointer to the hw struct
 * @seid: vsi number
 * @cmd_details: pointer to command details structure or NULL
 **/
i40e_status i40e_aq_set_default_vsi(struct i40e_hw *hw,
                                    u16 seid,
                                    struct i40e_asq_cmd_details *cmd_details)
{
        struct i40e_aq_desc desc;
        struct i40e_aqc_set_vsi_promiscuous_modes *cmd =
                (struct i40e_aqc_set_vsi_promiscuous_modes *)
                &desc.params.raw;
        i40e_status status;

        i40e_fill_default_direct_cmd_desc(&desc,
                                          i40e_aqc_opc_set_vsi_promiscuous_modes);

        cmd->promiscuous_flags = cpu_to_le16(I40E_AQC_SET_VSI_DEFAULT);
        cmd->valid_flags = cpu_to_le16(I40E_AQC_SET_VSI_DEFAULT);
        cmd->seid = cpu_to_le16(seid);

        status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

        return status;
}

/**
 * i40e_aq_clear_default_vsi
 * @hw: pointer to the hw struct
 * @seid: vsi number
 * @cmd_details: pointer to command details structure or NULL
 **/
i40e_status i40e_aq_clear_default_vsi(struct i40e_hw *hw,
                                      u16 seid,
                                      struct i40e_asq_cmd_details *cmd_details)
{
        struct i40e_aq_desc desc;
        struct i40e_aqc_set_vsi_promiscuous_modes *cmd =
                (struct i40e_aqc_set_vsi_promiscuous_modes *)
                &desc.params.raw;
        i40e_status status;

        i40e_fill_default_direct_cmd_desc(&desc,
                                          i40e_aqc_opc_set_vsi_promiscuous_modes);

        cmd->promiscuous_flags = cpu_to_le16(0);
        cmd->valid_flags = cpu_to_le16(I40E_AQC_SET_VSI_DEFAULT);
        cmd->seid = cpu_to_le16(seid);

        status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

        return status;
}

/**
 * i40e_aq_set_vsi_unicast_promiscuous
 * @hw: pointer to the hw struct
 * @seid: vsi number
 * @set: set unicast promiscuous enable/disable
 * @cmd_details: pointer to command details structure or NULL
 * @rx_only_promisc: flag to decide if egress traffic gets mirrored in promisc
 **/
i40e_status i40e_aq_set_vsi_unicast_promiscuous(struct i40e_hw *hw,
                                u16 seid, bool set,
                                struct i40e_asq_cmd_details *cmd_details,
                                bool rx_only_promisc)
{
        struct i40e_aq_desc desc;
        struct i40e_aqc_set_vsi_promiscuous_modes *cmd =
                (struct i40e_aqc_set_vsi_promiscuous_modes *)&desc.params.raw;
        i40e_status status;
        u16 flags = 0;

        i40e_fill_default_direct_cmd_desc(&desc,
                                        i40e_aqc_opc_set_vsi_promiscuous_modes);

        if (set) {
                flags |= I40E_AQC_SET_VSI_PROMISC_UNICAST;
                if (rx_only_promisc && i40e_is_aq_api_ver_ge(&hw->aq, 1, 5))
                        flags |= I40E_AQC_SET_VSI_PROMISC_RX_ONLY;
        }

        cmd->promiscuous_flags = cpu_to_le16(flags);

        cmd->valid_flags = cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_UNICAST);
        if (i40e_is_aq_api_ver_ge(&hw->aq, 1, 5))
                cmd->valid_flags |=
                        cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_RX_ONLY);

        cmd->seid = cpu_to_le16(seid);
        status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

        return status;
}

/**
 * i40e_aq_set_vsi_multicast_promiscuous
 * @hw: pointer to the hw struct
 * @seid: vsi number
 * @set: set multicast promiscuous enable/disable
 * @cmd_details: pointer to command details structure or NULL
 **/
i40e_status i40e_aq_set_vsi_multicast_promiscuous(struct i40e_hw *hw,
                                u16 seid, bool set, struct i40e_asq_cmd_details *cmd_details)
{
        struct i40e_aq_desc desc;
        struct i40e_aqc_set_vsi_promiscuous_modes *cmd =
                (struct i40e_aqc_set_vsi_promiscuous_modes *)&desc.params.raw;
        i40e_status status;
        u16 flags = 0;

        i40e_fill_default_direct_cmd_desc(&desc,
                                        i40e_aqc_opc_set_vsi_promiscuous_modes);

        if (set)
                flags |= I40E_AQC_SET_VSI_PROMISC_MULTICAST;

        cmd->promiscuous_flags = cpu_to_le16(flags);

        cmd->valid_flags = cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_MULTICAST);

        cmd->seid = cpu_to_le16(seid);
        status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

        return status;
}

/**
 * i40e_aq_set_vsi_mc_promisc_on_vlan
 * @hw: pointer to the hw struct
 * @seid: vsi number
 * @enable: set MAC L2 layer unicast promiscuous enable/disable for a given VLAN
 * @vid: The VLAN tag filter - capture any multicast packet with this VLAN tag
 * @cmd_details: pointer to command details structure or NULL
 **/
enum i40e_status_code i40e_aq_set_vsi_mc_promisc_on_vlan(struct i40e_hw *hw,
                                                         u16 seid, bool enable,
                                                         u16 vid,
                                struct i40e_asq_cmd_details *cmd_details)
{
        struct i40e_aq_desc desc;
        struct i40e_aqc_set_vsi_promiscuous_modes *cmd =
                (struct i40e_aqc_set_vsi_promiscuous_modes *)&desc.params.raw;
        enum i40e_status_code status;
        u16 flags = 0;

        i40e_fill_default_direct_cmd_desc(&desc,
                                          i40e_aqc_opc_set_vsi_promiscuous_modes);

        if (enable)
                flags |= I40E_AQC_SET_VSI_PROMISC_MULTICAST;

        cmd->promiscuous_flags = cpu_to_le16(flags);
        cmd->valid_flags = cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_MULTICAST);
        cmd->seid = cpu_to_le16(seid);
        cmd->vlan_tag = cpu_to_le16(vid | I40E_AQC_SET_VSI_VLAN_VALID);

        status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

        return status;
}

/**
 * i40e_aq_set_vsi_uc_promisc_on_vlan
 * @hw: pointer to the hw struct
 * @seid: vsi number
 * @enable: set MAC L2 layer unicast promiscuous enable/disable for a given VLAN
 * @vid: The VLAN tag filter - capture any unicast packet with this VLAN tag
 * @cmd_details: pointer to command details structure or NULL
 **/
enum i40e_status_code i40e_aq_set_vsi_uc_promisc_on_vlan(struct i40e_hw *hw,
                                                         u16 seid, bool enable,
                                                         u16 vid,
                                struct i40e_asq_cmd_details *cmd_details)
{
        struct i40e_aq_desc desc;
        struct i40e_aqc_set_vsi_promiscuous_modes *cmd =
                (struct i40e_aqc_set_vsi_promiscuous_modes *)&desc.params.raw;
        enum i40e_status_code status;
        u16 flags = 0;

        i40e_fill_default_direct_cmd_desc(&desc,
                                          i40e_aqc_opc_set_vsi_promiscuous_modes);

        if (enable) {
                flags |= I40E_AQC_SET_VSI_PROMISC_UNICAST;
                if (i40e_is_aq_api_ver_ge(&hw->aq, 1, 5))
                        flags |= I40E_AQC_SET_VSI_PROMISC_RX_ONLY;
        }

        cmd->promiscuous_flags = cpu_to_le16(flags);
        cmd->valid_flags = cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_UNICAST);
        if (i40e_is_aq_api_ver_ge(&hw->aq, 1, 5))
                cmd->valid_flags |=
                        cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_RX_ONLY);
        cmd->seid = cpu_to_le16(seid);
        cmd->vlan_tag = cpu_to_le16(vid | I40E_AQC_SET_VSI_VLAN_VALID);

        status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

        return status;
}

/**
 * i40e_aq_set_vsi_bc_promisc_on_vlan
 * @hw: pointer to the hw struct
 * @seid: vsi number
 * @enable: set broadcast promiscuous enable/disable for a given VLAN
 * @vid: The VLAN tag filter - capture any broadcast packet with this VLAN tag
 * @cmd_details: pointer to command details structure or NULL
 **/
i40e_status i40e_aq_set_vsi_bc_promisc_on_vlan(struct i40e_hw *hw,
                                u16 seid, bool enable, u16 vid,
                                struct i40e_asq_cmd_details *cmd_details)
{
        struct i40e_aq_desc desc;
        struct i40e_aqc_set_vsi_promiscuous_modes *cmd =
                (struct i40e_aqc_set_vsi_promiscuous_modes *)&desc.params.raw;
        i40e_status status;
        u16 flags = 0;

        i40e_fill_default_direct_cmd_desc(&desc,
                                        i40e_aqc_opc_set_vsi_promiscuous_modes);

        if (enable)
                flags |= I40E_AQC_SET_VSI_PROMISC_BROADCAST;

        cmd->promiscuous_flags = cpu_to_le16(flags);
        cmd->valid_flags = cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_BROADCAST);
        cmd->seid = cpu_to_le16(seid);
        cmd->vlan_tag = cpu_to_le16(vid | I40E_AQC_SET_VSI_VLAN_VALID);

        status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

        return status;
}

/**
 * i40e_aq_set_vsi_broadcast
 * @hw: pointer to the hw struct
 * @seid: vsi number
 * @set_filter: true to set filter, false to clear filter
 * @cmd_details: pointer to command details structure or NULL
 *
 * Set or clear the broadcast promiscuous flag (filter) for a given VSI.
 **/
i40e_status i40e_aq_set_vsi_broadcast(struct i40e_hw *hw,
                                u16 seid, bool set_filter,
                                struct i40e_asq_cmd_details *cmd_details)
{
        struct i40e_aq_desc desc;
        struct i40e_aqc_set_vsi_promiscuous_modes *cmd =
                (struct i40e_aqc_set_vsi_promiscuous_modes *)&desc.params.raw;
        i40e_status status;

        i40e_fill_default_direct_cmd_desc(&desc,
                                        i40e_aqc_opc_set_vsi_promiscuous_modes);

        if (set_filter)
                cmd->promiscuous_flags
                            |= cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_BROADCAST);
        else
                cmd->promiscuous_flags
                            &= cpu_to_le16(~I40E_AQC_SET_VSI_PROMISC_BROADCAST);

        cmd->valid_flags = cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_BROADCAST);
        cmd->seid = cpu_to_le16(seid);
        status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

        return status;
}

/**
 * i40e_aq_set_vsi_vlan_promisc - control the VLAN promiscuous setting
 * @hw: pointer to the hw struct
 * @seid: vsi number
 * @enable: set MAC L2 layer unicast promiscuous enable/disable for a given VLAN
 * @cmd_details: pointer to command details structure or NULL
 **/
i40e_status i40e_aq_set_vsi_vlan_promisc(struct i40e_hw *hw,
                                       u16 seid, bool enable,
                                       struct i40e_asq_cmd_details *cmd_details)
{
        struct i40e_aq_desc desc;
        struct i40e_aqc_set_vsi_promiscuous_modes *cmd =
                (struct i40e_aqc_set_vsi_promiscuous_modes *)&desc.params.raw;
        i40e_status status;
        u16 flags = 0;

        i40e_fill_default_direct_cmd_desc(&desc,
                                        i40e_aqc_opc_set_vsi_promiscuous_modes);
        if (enable)
                flags |= I40E_AQC_SET_VSI_PROMISC_VLAN;

        cmd->promiscuous_flags = cpu_to_le16(flags);
        cmd->valid_flags = cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_VLAN);
        cmd->seid = cpu_to_le16(seid);

        status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

        return status;
}

/**
 * i40e_get_vsi_params - get VSI configuration info
 * @hw: pointer to the hw struct
 * @vsi_ctx: pointer to a vsi context struct
 * @cmd_details: pointer to command details structure or NULL
 **/
i40e_status i40e_aq_get_vsi_params(struct i40e_hw *hw,
                                struct i40e_vsi_context *vsi_ctx,
                                struct i40e_asq_cmd_details *cmd_details)
{
        struct i40e_aq_desc desc;
        struct i40e_aqc_add_get_update_vsi *cmd =
                (struct i40e_aqc_add_get_update_vsi *)&desc.params.raw;
        struct i40e_aqc_add_get_update_vsi_completion *resp =
                (struct i40e_aqc_add_get_update_vsi_completion *)
                &desc.params.raw;
        i40e_status status;

        i40e_fill_default_direct_cmd_desc(&desc,
                                          i40e_aqc_opc_get_vsi_parameters);

        cmd->uplink_seid = cpu_to_le16(vsi_ctx->seid);

        desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);

        status = i40e_asq_send_command(hw, &desc, &vsi_ctx->info,
                                    sizeof(vsi_ctx->info), NULL);

        if (status)
                goto aq_get_vsi_params_exit;

        vsi_ctx->seid = le16_to_cpu(resp->seid);
        vsi_ctx->vsi_number = le16_to_cpu(resp->vsi_number);
        vsi_ctx->vsis_allocated = le16_to_cpu(resp->vsi_used);
        vsi_ctx->vsis_unallocated = le16_to_cpu(resp->vsi_free);

aq_get_vsi_params_exit:
        return status;
}

/**
 * i40e_aq_update_vsi_params
 * @hw: pointer to the hw struct
 * @vsi_ctx: pointer to a vsi context struct
 * @cmd_details: pointer to command details structure or NULL
 *
 * Update a VSI context.
 **/
i40e_status i40e_aq_update_vsi_params(struct i40e_hw *hw,
                                struct i40e_vsi_context *vsi_ctx,
                                struct i40e_asq_cmd_details *cmd_details)
{
        struct i40e_aq_desc desc;
        struct i40e_aqc_add_get_update_vsi *cmd =
                (struct i40e_aqc_add_get_update_vsi *)&desc.params.raw;
        struct i40e_aqc_add_get_update_vsi_completion *resp =
                (struct i40e_aqc_add_get_update_vsi_completion *)
                &desc.params.raw;
        i40e_status status;

        i40e_fill_default_direct_cmd_desc(&desc,
                                          i40e_aqc_opc_update_vsi_parameters);
        cmd->uplink_seid = cpu_to_le16(vsi_ctx->seid);

        desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));

        status = i40e_asq_send_command(hw, &desc, &vsi_ctx->info,
                                    sizeof(vsi_ctx->info), cmd_details);

        vsi_ctx->vsis_allocated = le16_to_cpu(resp->vsi_used);
        vsi_ctx->vsis_unallocated = le16_to_cpu(resp->vsi_free);

        return status;
}

/**
 * i40e_aq_get_switch_config
 * @hw: pointer to the hardware structure
 * @buf: pointer to the result buffer
 * @buf_size: length of input buffer
 * @start_seid: seid to start for the report, 0 == beginning
 * @cmd_details: pointer to command details structure or NULL
 *
 * Fill the buf with switch configuration returned from AdminQ command
 **/
i40e_status i40e_aq_get_switch_config(struct i40e_hw *hw,
                                struct i40e_aqc_get_switch_config_resp *buf,
                                u16 buf_size, u16 *start_seid,
                                struct i40e_asq_cmd_details *cmd_details)
{
        struct i40e_aq_desc desc;
        struct i40e_aqc_switch_seid *scfg =
                (struct i40e_aqc_switch_seid *)&desc.params.raw;
        i40e_status status;

        i40e_fill_default_direct_cmd_desc(&desc,
                                          i40e_aqc_opc_get_switch_config);
        desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
        if (buf_size > I40E_AQ_LARGE_BUF)
                desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
        scfg->seid = cpu_to_le16(*start_seid);

        status = i40e_asq_send_command(hw, &desc, buf, buf_size, cmd_details);
        *start_seid = le16_to_cpu(scfg->seid);

        return status;
}

/**
 * i40e_aq_set_switch_config
 * @hw: pointer to the hardware structure
 * @flags: bit flag values to set
 * @mode: cloud filter mode
 * @valid_flags: which bit flags to set
 * @mode: cloud filter mode
 * @cmd_details: pointer to command details structure or NULL
 *
 * Set switch configuration bits
 **/
enum i40e_status_code i40e_aq_set_switch_config(struct i40e_hw *hw,
                                                u16 flags,
                                                u16 valid_flags, u8 mode,
                                struct i40e_asq_cmd_details *cmd_details)
{
        struct i40e_aq_desc desc;
        struct i40e_aqc_set_switch_config *scfg =
                (struct i40e_aqc_set_switch_config *)&desc.params.raw;
        enum i40e_status_code status;

        i40e_fill_default_direct_cmd_desc(&desc,
                                          i40e_aqc_opc_set_switch_config);
        scfg->flags = cpu_to_le16(flags);
        scfg->valid_flags = cpu_to_le16(valid_flags);
        scfg->mode = mode;
        if (hw->flags & I40E_HW_FLAG_802_1AD_CAPABLE) {
                scfg->switch_tag = cpu_to_le16(hw->switch_tag);
                scfg->first_tag = cpu_to_le16(hw->first_tag);
                scfg->second_tag = cpu_to_le16(hw->second_tag);
        }
        status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

        return status;
}

/**
 * i40e_aq_get_firmware_version
 * @hw: pointer to the hw struct
 * @fw_major_version: firmware major version
 * @fw_minor_version: firmware minor version
 * @fw_build: firmware build number
 * @api_major_version: major queue version
 * @api_minor_version: minor queue version
 * @cmd_details: pointer to command details structure or NULL
 *
 * Get the firmware version from the admin queue commands
 **/
i40e_status i40e_aq_get_firmware_version(struct i40e_hw *hw,
                                u16 *fw_major_version, u16 *fw_minor_version,
                                u32 *fw_build,
                                u16 *api_major_version, u16 *api_minor_version,
                                struct i40e_asq_cmd_details *cmd_details)
{
        struct i40e_aq_desc desc;
        struct i40e_aqc_get_version *resp =
                (struct i40e_aqc_get_version *)&desc.params.raw;
        i40e_status status;

        i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_get_version);

        status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

        if (!status) {
                if (fw_major_version)
                        *fw_major_version = le16_to_cpu(resp->fw_major);
                if (fw_minor_version)
                        *fw_minor_version = le16_to_cpu(resp->fw_minor);
                if (fw_build)
                        *fw_build = le32_to_cpu(resp->fw_build);
                if (api_major_version)
                        *api_major_version = le16_to_cpu(resp->api_major);
                if (api_minor_version)
                        *api_minor_version = le16_to_cpu(resp->api_minor);
        }

        return status;
}

/**
 * i40e_aq_send_driver_version
 * @hw: pointer to the hw struct
 * @dv: driver's major, minor version
 * @cmd_details: pointer to command details structure or NULL
 *
 * Send the driver version to the firmware
 **/
i40e_status i40e_aq_send_driver_version(struct i40e_hw *hw,
                                struct i40e_driver_version *dv,
                                struct i40e_asq_cmd_details *cmd_details)
{
        struct i40e_aq_desc desc;
        struct i40e_aqc_driver_version *cmd =
                (struct i40e_aqc_driver_version *)&desc.params.raw;
        i40e_status status;
        u16 len;

        if (dv == NULL)
                return I40E_ERR_PARAM;

        i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_driver_version);

        desc.flags |= cpu_to_le16(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD);
        cmd->driver_major_ver = dv->major_version;
        cmd->driver_minor_ver = dv->minor_version;
        cmd->driver_build_ver = dv->build_version;
        cmd->driver_subbuild_ver = dv->subbuild_version;

        len = 0;
        while (len < sizeof(dv->driver_string) &&
               (dv->driver_string[len] < 0x80) &&
               dv->driver_string[len])
                len++;
        status = i40e_asq_send_command(hw, &desc, dv->driver_string,
                                       len, cmd_details);

        return status;
}

/**
 * i40e_get_link_status - get status of the HW network link
 * @hw: pointer to the hw struct
 * @link_up: pointer to bool (true/false = linkup/linkdown)
 *
 * Variable link_up true if link is up, false if link is down.
 * The variable link_up is invalid if returned value of status != 0
 *
 * Side effect: LinkStatusEvent reporting becomes enabled
 **/
i40e_status i40e_get_link_status(struct i40e_hw *hw, bool *link_up)
{
        i40e_status status = 0;

        if (hw->phy.get_link_info) {
                status = i40e_update_link_info(hw);

                if (status)
                        i40e_debug(hw, I40E_DEBUG_LINK, "get link failed: status %d\n",
                                   status);
        }

        *link_up = hw->phy.link_info.link_info & I40E_AQ_LINK_UP;

        return status;
}

/**
 * i40e_updatelink_status - update status of the HW network link
 * @hw: pointer to the hw struct
 **/
noinline_for_stack i40e_status i40e_update_link_info(struct i40e_hw *hw)
{
        struct i40e_aq_get_phy_abilities_resp abilities;
        i40e_status status = 0;

        status = i40e_aq_get_link_info(hw, true, NULL, NULL);
        if (status)
                return status;

        /* extra checking needed to ensure link info to user is timely */
        if ((hw->phy.link_info.link_info & I40E_AQ_MEDIA_AVAILABLE) &&
            ((hw->phy.link_info.link_info & I40E_AQ_LINK_UP) ||
             !(hw->phy.link_info_old.link_info & I40E_AQ_LINK_UP))) {
                status = i40e_aq_get_phy_capabilities(hw, false, false,
                                                      &abilities, NULL);
                if (status)
                        return status;

                if (abilities.fec_cfg_curr_mod_ext_info &
                    I40E_AQ_ENABLE_FEC_AUTO)
                        hw->phy.link_info.req_fec_info =
                                (I40E_AQ_REQUEST_FEC_KR |
                                 I40E_AQ_REQUEST_FEC_RS);
                else
                        hw->phy.link_info.req_fec_info =
                                abilities.fec_cfg_curr_mod_ext_info &
                                (I40E_AQ_REQUEST_FEC_KR |
                                 I40E_AQ_REQUEST_FEC_RS);

                memcpy(hw->phy.link_info.module_type, &abilities.module_type,
                       sizeof(hw->phy.link_info.module_type));
        }

        return status;
}

/**
 * i40e_aq_add_veb - Insert a VEB between the VSI and the MAC
 * @hw: pointer to the hw struct
 * @uplink_seid: the MAC or other gizmo SEID
 * @downlink_seid: the VSI SEID
 * @enabled_tc: bitmap of TCs to be enabled
 * @default_port: true for default port VSI, false for control port
 * @veb_seid: pointer to where to put the resulting VEB SEID
 * @enable_stats: true to turn on VEB stats
 * @cmd_details: pointer to command details structure or NULL
 *
 * This asks the FW to add a VEB between the uplink and downlink
 * elements.  If the uplink SEID is 0, this will be a floating VEB.
 **/
i40e_status i40e_aq_add_veb(struct i40e_hw *hw, u16 uplink_seid,
                                u16 downlink_seid, u8 enabled_tc,
                                bool default_port, u16 *veb_seid,
                                bool enable_stats,
                                struct i40e_asq_cmd_details *cmd_details)
{
        struct i40e_aq_desc desc;
        struct i40e_aqc_add_veb *cmd =
                (struct i40e_aqc_add_veb *)&desc.params.raw;
        struct i40e_aqc_add_veb_completion *resp =
                (struct i40e_aqc_add_veb_completion *)&desc.params.raw;
        i40e_status status;
        u16 veb_flags = 0;

        /* SEIDs need to either both be set or both be 0 for floating VEB */
        if (!!uplink_seid != !!downlink_seid)
                return I40E_ERR_PARAM;

        i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_add_veb);

        cmd->uplink_seid = cpu_to_le16(uplink_seid);
        cmd->downlink_seid = cpu_to_le16(downlink_seid);
        cmd->enable_tcs = enabled_tc;
        if (!uplink_seid)
                veb_flags |= I40E_AQC_ADD_VEB_FLOATING;
        if (default_port)
                veb_flags |= I40E_AQC_ADD_VEB_PORT_TYPE_DEFAULT;
        else
                veb_flags |= I40E_AQC_ADD_VEB_PORT_TYPE_DATA;

        /* reverse logic here: set the bitflag to disable the stats */
        if (!enable_stats)
                veb_flags |= I40E_AQC_ADD_VEB_ENABLE_DISABLE_STATS;

        cmd->veb_flags = cpu_to_le16(veb_flags);

        status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

        if (!status && veb_seid)
                *veb_seid = le16_to_cpu(resp->veb_seid);

        return status;
}

/**
 * i40e_aq_get_veb_parameters - Retrieve VEB parameters
 * @hw: pointer to the hw struct
 * @veb_seid: the SEID of the VEB to query
 * @switch_id: the uplink switch id
 * @floating: set to true if the VEB is floating
 * @statistic_index: index of the stats counter block for this VEB
 * @vebs_used: number of VEB's used by function
 * @vebs_free: total VEB's not reserved by any function
 * @cmd_details: pointer to command details structure or NULL
 *
 * This retrieves the parameters for a particular VEB, specified by
 * uplink_seid, and returns them to the caller.
 **/
i40e_status i40e_aq_get_veb_parameters(struct i40e_hw *hw,
                                u16 veb_seid, u16 *switch_id,
                                bool *floating, u16 *statistic_index,
                                u16 *vebs_used, u16 *vebs_free,
                                struct i40e_asq_cmd_details *cmd_details)
{
        struct i40e_aq_desc desc;
        struct i40e_aqc_get_veb_parameters_completion *cmd_resp =
                (struct i40e_aqc_get_veb_parameters_completion *)
                &desc.params.raw;
        i40e_status status;

        if (veb_seid == 0)
                return I40E_ERR_PARAM;

        i40e_fill_default_direct_cmd_desc(&desc,
                                          i40e_aqc_opc_get_veb_parameters);
        cmd_resp->seid = cpu_to_le16(veb_seid);

        status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
        if (status)
                goto get_veb_exit;

        if (switch_id)
                *switch_id = le16_to_cpu(cmd_resp->switch_id);
        if (statistic_index)
                *statistic_index = le16_to_cpu(cmd_resp->statistic_index);
        if (vebs_used)
                *vebs_used = le16_to_cpu(cmd_resp->vebs_used);
        if (vebs_free)
                *vebs_free = le16_to_cpu(cmd_resp->vebs_free);
        if (floating) {
                u16 flags = le16_to_cpu(cmd_resp->veb_flags);

                if (flags & I40E_AQC_ADD_VEB_FLOATING)
                        *floating = true;
                else
                        *floating = false;
        }

get_veb_exit:
        return status;
}

/**
 * i40e_aq_add_macvlan
 * @hw: pointer to the hw struct
 * @seid: VSI for the mac address
 * @mv_list: list of macvlans to be added
 * @count: length of the list
 * @cmd_details: pointer to command details structure or NULL
 *
 * Add MAC/VLAN addresses to the HW filtering
 **/
i40e_status i40e_aq_add_macvlan(struct i40e_hw *hw, u16 seid,
                        struct i40e_aqc_add_macvlan_element_data *mv_list,
                        u16 count, struct i40e_asq_cmd_details *cmd_details)
{
        struct i40e_aq_desc desc;
        struct i40e_aqc_macvlan *cmd =
                (struct i40e_aqc_macvlan *)&desc.params.raw;
        i40e_status status;
        u16 buf_size;
        int i;

        if (count == 0 || !mv_list || !hw)
                return I40E_ERR_PARAM;

        buf_size = count * sizeof(*mv_list);

        /* prep the rest of the request */
        i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_add_macvlan);
        cmd->num_addresses = cpu_to_le16(count);
        cmd->seid[0] = cpu_to_le16(I40E_AQC_MACVLAN_CMD_SEID_VALID | seid);
        cmd->seid[1] = 0;
        cmd->seid[2] = 0;

        for (i = 0; i < count; i++)
                if (is_multicast_ether_addr(mv_list[i].mac_addr))
                        mv_list[i].flags |=
                               cpu_to_le16(I40E_AQC_MACVLAN_ADD_USE_SHARED_MAC);

        desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
        if (buf_size > I40E_AQ_LARGE_BUF)
                desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);

        status = i40e_asq_send_command(hw, &desc, mv_list, buf_size,
                                       cmd_details);

        return status;
}

/**
 * i40e_aq_remove_macvlan
 * @hw: pointer to the hw struct
 * @seid: VSI for the mac address
 * @mv_list: list of macvlans to be removed
 * @count: length of the list
 * @cmd_details: pointer to command details structure or NULL
 *
 * Remove MAC/VLAN addresses from the HW filtering
 **/
i40e_status i40e_aq_remove_macvlan(struct i40e_hw *hw, u16 seid,
                        struct i40e_aqc_remove_macvlan_element_data *mv_list,
                        u16 count, struct i40e_asq_cmd_details *cmd_details)
{
        struct i40e_aq_desc desc;
        struct i40e_aqc_macvlan *cmd =
                (struct i40e_aqc_macvlan *)&desc.params.raw;
        i40e_status status;
        u16 buf_size;

        if (count == 0 || !mv_list || !hw)
                return I40E_ERR_PARAM;

        buf_size = count * sizeof(*mv_list);

        /* prep the rest of the request */
        i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_remove_macvlan);
        cmd->num_addresses = cpu_to_le16(count);
        cmd->seid[0] = cpu_to_le16(I40E_AQC_MACVLAN_CMD_SEID_VALID | seid);
        cmd->seid[1] = 0;
        cmd->seid[2] = 0;

        desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
        if (buf_size > I40E_AQ_LARGE_BUF)
                desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);

        status = i40e_asq_send_command(hw, &desc, mv_list, buf_size,
                                       cmd_details);

        return status;
}

/**
 * i40e_mirrorrule_op - Internal helper function to add/delete mirror rule
 * @hw: pointer to the hw struct
 * @opcode: AQ opcode for add or delete mirror rule
 * @sw_seid: Switch SEID (to which rule refers)
 * @rule_type: Rule Type (ingress/egress/VLAN)
 * @id: Destination VSI SEID or Rule ID
 * @count: length of the list
 * @mr_list: list of mirrored VSI SEIDs or VLAN IDs
 * @cmd_details: pointer to command details structure or NULL
 * @rule_id: Rule ID returned from FW
 * @rules_used: Number of rules used in internal switch
 * @rules_free: Number of rules free in internal switch
 *
 * Add/Delete a mirror rule to a specific switch. Mirror rules are supported for
 * VEBs/VEPA elements only
 **/
static i40e_status i40e_mirrorrule_op(struct i40e_hw *hw,
                                u16 opcode, u16 sw_seid, u16 rule_type, u16 id,
                                u16 count, __le16 *mr_list,
                                struct i40e_asq_cmd_details *cmd_details,
                                u16 *rule_id, u16 *rules_used, u16 *rules_free)
{
        struct i40e_aq_desc desc;
        struct i40e_aqc_add_delete_mirror_rule *cmd =
                (struct i40e_aqc_add_delete_mirror_rule *)&desc.params.raw;
        struct i40e_aqc_add_delete_mirror_rule_completion *resp =
        (struct i40e_aqc_add_delete_mirror_rule_completion *)&desc.params.raw;
        i40e_status status;
        u16 buf_size;

        buf_size = count * sizeof(*mr_list);

        /* prep the rest of the request */
        i40e_fill_default_direct_cmd_desc(&desc, opcode);
        cmd->seid = cpu_to_le16(sw_seid);
        cmd->rule_type = cpu_to_le16(rule_type &
                                     I40E_AQC_MIRROR_RULE_TYPE_MASK);
        cmd->num_entries = cpu_to_le16(count);
        /* Dest VSI for add, rule_id for delete */
        cmd->destination = cpu_to_le16(id);
        if (mr_list) {
                desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF |
                                                I40E_AQ_FLAG_RD));
                if (buf_size > I40E_AQ_LARGE_BUF)
                        desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
        }

        status = i40e_asq_send_command(hw, &desc, mr_list, buf_size,
                                       cmd_details);
        if (!status ||
            hw->aq.asq_last_status == I40E_AQ_RC_ENOSPC) {
                if (rule_id)
                        *rule_id = le16_to_cpu(resp->rule_id);
                if (rules_used)
                        *rules_used = le16_to_cpu(resp->mirror_rules_used);
                if (rules_free)
                        *rules_free = le16_to_cpu(resp->mirror_rules_free);
        }
        return status;
}

/**
 * i40e_aq_add_mirrorrule - add a mirror rule
 * @hw: pointer to the hw struct
 * @sw_seid: Switch SEID (to which rule refers)
 * @rule_type: Rule Type (ingress/egress/VLAN)
 * @dest_vsi: SEID of VSI to which packets will be mirrored
 * @count: length of the list
 * @mr_list: list of mirrored VSI SEIDs or VLAN IDs
 * @cmd_details: pointer to command details structure or NULL
 * @rule_id: Rule ID returned from FW
 * @rules_used: Number of rules used in internal switch
 * @rules_free: Number of rules free in internal switch
 *
 * Add mirror rule. Mirror rules are supported for VEBs or VEPA elements only
 **/
i40e_status i40e_aq_add_mirrorrule(struct i40e_hw *hw, u16 sw_seid,
                        u16 rule_type, u16 dest_vsi, u16 count, __le16 *mr_list,
                        struct i40e_asq_cmd_details *cmd_details,
                        u16 *rule_id, u16 *rules_used, u16 *rules_free)
{
        if (!(rule_type == I40E_AQC_MIRROR_RULE_TYPE_ALL_INGRESS ||
            rule_type == I40E_AQC_MIRROR_RULE_TYPE_ALL_EGRESS)) {
                if (count == 0 || !mr_list)
                        return I40E_ERR_PARAM;
        }

        return i40e_mirrorrule_op(hw, i40e_aqc_opc_add_mirror_rule, sw_seid,
                                  rule_type, dest_vsi, count, mr_list,
                                  cmd_details, rule_id, rules_used, rules_free);
}

/**
 * i40e_aq_delete_mirrorrule - delete a mirror rule
 * @hw: pointer to the hw struct
 * @sw_seid: Switch SEID (to which rule refers)
 * @rule_type: Rule Type (ingress/egress/VLAN)
 * @count: length of the list
 * @rule_id: Rule ID that is returned in the receive desc as part of
 *              add_mirrorrule.
 * @mr_list: list of mirrored VLAN IDs to be removed
 * @cmd_details: pointer to command details structure or NULL
 * @rules_used: Number of rules used in internal switch
 * @rules_free: Number of rules free in internal switch
 *
 * Delete a mirror rule. Mirror rules are supported for VEBs/VEPA elements only
 **/
i40e_status i40e_aq_delete_mirrorrule(struct i40e_hw *hw, u16 sw_seid,
                        u16 rule_type, u16 rule_id, u16 count, __le16 *mr_list,
                        struct i40e_asq_cmd_details *cmd_details,
                        u16 *rules_used, u16 *rules_free)
{
        /* Rule ID has to be valid except rule_type: INGRESS VLAN mirroring */
        if (rule_type == I40E_AQC_MIRROR_RULE_TYPE_VLAN) {
                /* count and mr_list shall be valid for rule_type INGRESS VLAN
                 * mirroring. For other rule_type, count and rule_type should
                 * not matter.
                 */
                if (count == 0 || !mr_list)
                        return I40E_ERR_PARAM;
        }

        return i40e_mirrorrule_op(hw, i40e_aqc_opc_delete_mirror_rule, sw_seid,
                                  rule_type, rule_id, count, mr_list,
                                  cmd_details, NULL, rules_used, rules_free);
}

/**
 * i40e_aq_send_msg_to_vf
 * @hw: pointer to the hardware structure
 * @vfid: VF id to send msg
 * @v_opcode: opcodes for VF-PF communication
 * @v_retval: return error code
 * @msg: pointer to the msg buffer
 * @msglen: msg length
 * @cmd_details: pointer to command details
 *
 * send msg to vf
 **/
i40e_status i40e_aq_send_msg_to_vf(struct i40e_hw *hw, u16 vfid,
                                u32 v_opcode, u32 v_retval, u8 *msg, u16 msglen,
                                struct i40e_asq_cmd_details *cmd_details)
{
        struct i40e_aq_desc desc;
        struct i40e_aqc_pf_vf_message *cmd =
                (struct i40e_aqc_pf_vf_message *)&desc.params.raw;
        i40e_status status;

        i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_send_msg_to_vf);
        cmd->id = cpu_to_le32(vfid);
        desc.cookie_high = cpu_to_le32(v_opcode);
        desc.cookie_low = cpu_to_le32(v_retval);
        desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_SI);
        if (msglen) {
                desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF |
                                                I40E_AQ_FLAG_RD));
                if (msglen > I40E_AQ_LARGE_BUF)
                        desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
                desc.datalen = cpu_to_le16(msglen);
        }
        status = i40e_asq_send_command(hw, &desc, msg, msglen, cmd_details);

        return status;
}

/**