1
2
3
4#include "ice.h"
5#include "ice_base.h"
6#include "ice_flow.h"
7#include "ice_lib.h"
8#include "ice_fltr.h"
9#include "ice_dcb_lib.h"
10
11
12
13
14
15const char *ice_vsi_type_str(enum ice_vsi_type vsi_type)
16{
17 switch (vsi_type) {
18 case ICE_VSI_PF:
19 return "ICE_VSI_PF";
20 case ICE_VSI_VF:
21 return "ICE_VSI_VF";
22 case ICE_VSI_CTRL:
23 return "ICE_VSI_CTRL";
24 case ICE_VSI_LB:
25 return "ICE_VSI_LB";
26 default:
27 return "unknown";
28 }
29}
30
31
32
33
34
35
36
37
38
39
40
41static int ice_vsi_ctrl_all_rx_rings(struct ice_vsi *vsi, bool ena)
42{
43 int ret = 0;
44 u16 i;
45
46 for (i = 0; i < vsi->num_rxq; i++)
47 ice_vsi_ctrl_one_rx_ring(vsi, ena, i, false);
48
49 ice_flush(&vsi->back->hw);
50
51 for (i = 0; i < vsi->num_rxq; i++) {
52 ret = ice_vsi_wait_one_rx_ring(vsi, ena, i);
53 if (ret)
54 break;
55 }
56
57 return ret;
58}
59
60
61
62
63
64
65
66
67static int ice_vsi_alloc_arrays(struct ice_vsi *vsi)
68{
69 struct ice_pf *pf = vsi->back;
70 struct device *dev;
71
72 dev = ice_pf_to_dev(pf);
73
74
75 vsi->tx_rings = devm_kcalloc(dev, vsi->alloc_txq,
76 sizeof(*vsi->tx_rings), GFP_KERNEL);
77 if (!vsi->tx_rings)
78 return -ENOMEM;
79
80 vsi->rx_rings = devm_kcalloc(dev, vsi->alloc_rxq,
81 sizeof(*vsi->rx_rings), GFP_KERNEL);
82 if (!vsi->rx_rings)
83 goto err_rings;
84
85
86 vsi->txq_map = devm_kcalloc(dev, (2 * vsi->alloc_txq),
87 sizeof(*vsi->txq_map), GFP_KERNEL);
88
89 if (!vsi->txq_map)
90 goto err_txq_map;
91
92 vsi->rxq_map = devm_kcalloc(dev, vsi->alloc_rxq,
93 sizeof(*vsi->rxq_map), GFP_KERNEL);
94 if (!vsi->rxq_map)
95 goto err_rxq_map;
96
97
98 if (vsi->type == ICE_VSI_LB)
99 return 0;
100
101
102 vsi->q_vectors = devm_kcalloc(dev, vsi->num_q_vectors,
103 sizeof(*vsi->q_vectors), GFP_KERNEL);
104 if (!vsi->q_vectors)
105 goto err_vectors;
106
107 return 0;
108
109err_vectors:
110 devm_kfree(dev, vsi->rxq_map);
111err_rxq_map:
112 devm_kfree(dev, vsi->txq_map);
113err_txq_map:
114 devm_kfree(dev, vsi->rx_rings);
115err_rings:
116 devm_kfree(dev, vsi->tx_rings);
117 return -ENOMEM;
118}
119
120
121
122
123
124static void ice_vsi_set_num_desc(struct ice_vsi *vsi)
125{
126 switch (vsi->type) {
127 case ICE_VSI_PF:
128 case ICE_VSI_CTRL:
129 case ICE_VSI_LB:
130
131
132
133
134 if (!vsi->num_rx_desc)
135 vsi->num_rx_desc = ICE_DFLT_NUM_RX_DESC;
136 if (!vsi->num_tx_desc)
137 vsi->num_tx_desc = ICE_DFLT_NUM_TX_DESC;
138 break;
139 default:
140 dev_dbg(ice_pf_to_dev(vsi->back), "Not setting number of Tx/Rx descriptors for VSI type %d\n",
141 vsi->type);
142 break;
143 }
144}
145
146
147
148
149
150
151
152
153static void ice_vsi_set_num_qs(struct ice_vsi *vsi, u16 vf_id)
154{
155 struct ice_pf *pf = vsi->back;
156 struct ice_vf *vf = NULL;
157
158 if (vsi->type == ICE_VSI_VF)
159 vsi->vf_id = vf_id;
160
161 switch (vsi->type) {
162 case ICE_VSI_PF:
163 vsi->alloc_txq = min_t(int, ice_get_avail_txq_count(pf),
164 num_online_cpus());
165 if (vsi->req_txq) {
166 vsi->alloc_txq = vsi->req_txq;
167 vsi->num_txq = vsi->req_txq;
168 }
169
170 pf->num_lan_tx = vsi->alloc_txq;
171
172
173 if (!test_bit(ICE_FLAG_RSS_ENA, pf->flags)) {
174 vsi->alloc_rxq = 1;
175 } else {
176 vsi->alloc_rxq = min_t(int, ice_get_avail_rxq_count(pf),
177 num_online_cpus());
178 if (vsi->req_rxq) {
179 vsi->alloc_rxq = vsi->req_rxq;
180 vsi->num_rxq = vsi->req_rxq;
181 }
182 }
183
184 pf->num_lan_rx = vsi->alloc_rxq;
185
186 vsi->num_q_vectors = max_t(int, vsi->alloc_rxq, vsi->alloc_txq);
187 break;
188 case ICE_VSI_VF:
189 vf = &pf->vf[vsi->vf_id];
190 vsi->alloc_txq = vf->num_vf_qs;
191 vsi->alloc_rxq = vf->num_vf_qs;
192
193
194
195
196
197 vsi->num_q_vectors = pf->num_msix_per_vf - ICE_NONQ_VECS_VF;
198 break;
199 case ICE_VSI_CTRL:
200 vsi->alloc_txq = 1;
201 vsi->alloc_rxq = 1;
202 vsi->num_q_vectors = 1;
203 break;
204 case ICE_VSI_LB:
205 vsi->alloc_txq = 1;
206 vsi->alloc_rxq = 1;
207 break;
208 default:
209 dev_warn(ice_pf_to_dev(pf), "Unknown VSI type %d\n", vsi->type);
210 break;
211 }
212
213 ice_vsi_set_num_desc(vsi);
214}
215
216
217
218
219
220
221
222
223
224
225static int ice_get_free_slot(void *array, int size, int curr)
226{
227 int **tmp_array = (int **)array;
228 int next;
229
230 if (curr < (size - 1) && !tmp_array[curr + 1]) {
231 next = curr + 1;
232 } else {
233 int i = 0;
234
235 while ((i < size) && (tmp_array[i]))
236 i++;
237 if (i == size)
238 next = ICE_NO_VSI;
239 else
240 next = i;
241 }
242 return next;
243}
244
245
246
247
248
249static void ice_vsi_delete(struct ice_vsi *vsi)
250{
251 struct ice_pf *pf = vsi->back;
252 struct ice_vsi_ctx *ctxt;
253 enum ice_status status;
254
255 ctxt = kzalloc(sizeof(*ctxt), GFP_KERNEL);
256 if (!ctxt)
257 return;
258
259 if (vsi->type == ICE_VSI_VF)
260 ctxt->vf_num = vsi->vf_id;
261 ctxt->vsi_num = vsi->vsi_num;
262
263 memcpy(&ctxt->info, &vsi->info, sizeof(ctxt->info));
264
265 status = ice_free_vsi(&pf->hw, vsi->idx, ctxt, false, NULL);
266 if (status)
267 dev_err(ice_pf_to_dev(pf), "Failed to delete VSI %i in FW - error: %s\n",
268 vsi->vsi_num, ice_stat_str(status));
269
270 kfree(ctxt);
271}
272
273
274
275
276
277static void ice_vsi_free_arrays(struct ice_vsi *vsi)
278{
279 struct ice_pf *pf = vsi->back;
280 struct device *dev;
281
282 dev = ice_pf_to_dev(pf);
283
284
285 if (vsi->q_vectors) {
286 devm_kfree(dev, vsi->q_vectors);
287 vsi->q_vectors = NULL;
288 }
289 if (vsi->tx_rings) {
290 devm_kfree(dev, vsi->tx_rings);
291 vsi->tx_rings = NULL;
292 }
293 if (vsi->rx_rings) {
294 devm_kfree(dev, vsi->rx_rings);
295 vsi->rx_rings = NULL;
296 }
297 if (vsi->txq_map) {
298 devm_kfree(dev, vsi->txq_map);
299 vsi->txq_map = NULL;
300 }
301 if (vsi->rxq_map) {
302 devm_kfree(dev, vsi->rxq_map);
303 vsi->rxq_map = NULL;
304 }
305}
306
307
308
309
310
311
312
313
314
315
316static int ice_vsi_clear(struct ice_vsi *vsi)
317{
318 struct ice_pf *pf = NULL;
319 struct device *dev;
320
321 if (!vsi)
322 return 0;
323
324 if (!vsi->back)
325 return -EINVAL;
326
327 pf = vsi->back;
328 dev = ice_pf_to_dev(pf);
329
330 if (!pf->vsi[vsi->idx] || pf->vsi[vsi->idx] != vsi) {
331 dev_dbg(dev, "vsi does not exist at pf->vsi[%d]\n", vsi->idx);
332 return -EINVAL;
333 }
334
335 mutex_lock(&pf->sw_mutex);
336
337
338 pf->vsi[vsi->idx] = NULL;
339 if (vsi->idx < pf->next_vsi && vsi->type != ICE_VSI_CTRL)
340 pf->next_vsi = vsi->idx;
341
342 ice_vsi_free_arrays(vsi);
343 mutex_unlock(&pf->sw_mutex);
344 devm_kfree(dev, vsi);
345
346 return 0;
347}
348
349
350
351
352
353
354static irqreturn_t ice_msix_clean_ctrl_vsi(int __always_unused irq, void *data)
355{
356 struct ice_q_vector *q_vector = (struct ice_q_vector *)data;
357
358 if (!q_vector->tx.ring)
359 return IRQ_HANDLED;
360
361#define FDIR_RX_DESC_CLEAN_BUDGET 64
362 ice_clean_rx_irq(q_vector->rx.ring, FDIR_RX_DESC_CLEAN_BUDGET);
363 ice_clean_ctrl_tx_irq(q_vector->tx.ring);
364
365 return IRQ_HANDLED;
366}
367
368
369
370
371
372
373static irqreturn_t ice_msix_clean_rings(int __always_unused irq, void *data)
374{
375 struct ice_q_vector *q_vector = (struct ice_q_vector *)data;
376
377 if (!q_vector->tx.ring && !q_vector->rx.ring)
378 return IRQ_HANDLED;
379
380 napi_schedule(&q_vector->napi);
381
382 return IRQ_HANDLED;
383}
384
385
386
387
388
389
390
391
392
393static struct ice_vsi *
394ice_vsi_alloc(struct ice_pf *pf, enum ice_vsi_type vsi_type, u16 vf_id)
395{
396 struct device *dev = ice_pf_to_dev(pf);
397 struct ice_vsi *vsi = NULL;
398
399
400 mutex_lock(&pf->sw_mutex);
401
402
403
404
405
406 if (pf->next_vsi == ICE_NO_VSI) {
407 dev_dbg(dev, "out of VSI slots!\n");
408 goto unlock_pf;
409 }
410
411 vsi = devm_kzalloc(dev, sizeof(*vsi), GFP_KERNEL);
412 if (!vsi)
413 goto unlock_pf;
414
415 vsi->type = vsi_type;
416 vsi->back = pf;
417 set_bit(__ICE_DOWN, vsi->state);
418
419 if (vsi_type == ICE_VSI_VF)
420 ice_vsi_set_num_qs(vsi, vf_id);
421 else
422 ice_vsi_set_num_qs(vsi, ICE_INVAL_VFID);
423
424 switch (vsi->type) {
425 case ICE_VSI_PF:
426 if (ice_vsi_alloc_arrays(vsi))
427 goto err_rings;
428
429
430 vsi->irq_handler = ice_msix_clean_rings;
431 break;
432 case ICE_VSI_CTRL:
433 if (ice_vsi_alloc_arrays(vsi))
434 goto err_rings;
435
436
437 vsi->irq_handler = ice_msix_clean_ctrl_vsi;
438 break;
439 case ICE_VSI_VF:
440 if (ice_vsi_alloc_arrays(vsi))
441 goto err_rings;
442 break;
443 case ICE_VSI_LB:
444 if (ice_vsi_alloc_arrays(vsi))
445 goto err_rings;
446 break;
447 default:
448 dev_warn(dev, "Unknown VSI type %d\n", vsi->type);
449 goto unlock_pf;
450 }
451
452 if (vsi->type == ICE_VSI_CTRL) {
453
454 vsi->idx = pf->num_alloc_vsi - 1;
455 pf->ctrl_vsi_idx = vsi->idx;
456 pf->vsi[vsi->idx] = vsi;
457 } else {
458
459 vsi->idx = pf->next_vsi;
460 pf->vsi[pf->next_vsi] = vsi;
461
462
463 pf->next_vsi = ice_get_free_slot(pf->vsi, pf->num_alloc_vsi,
464 pf->next_vsi);
465 }
466 goto unlock_pf;
467
468err_rings:
469 devm_kfree(dev, vsi);
470 vsi = NULL;
471unlock_pf:
472 mutex_unlock(&pf->sw_mutex);
473 return vsi;
474}
475
476
477
478
479
480
481
482
483
484static int ice_alloc_fd_res(struct ice_vsi *vsi)
485{
486 struct ice_pf *pf = vsi->back;
487 u32 g_val, b_val;
488
489
490
491
492
493
494
495 g_val = pf->hw.func_caps.fd_fltr_guar;
496 if (!g_val)
497 return -EPERM;
498
499
500 b_val = pf->hw.func_caps.fd_fltr_best_effort;
501 if (!b_val)
502 return -EPERM;
503
504 if (vsi->type != ICE_VSI_PF)
505 return -EPERM;
506
507 if (!test_bit(ICE_FLAG_FD_ENA, pf->flags))
508 return -EPERM;
509
510 vsi->num_gfltr = g_val / pf->num_alloc_vsi;
511
512
513 vsi->num_bfltr = b_val;
514
515 return 0;
516}
517
518
519
520
521
522
523
524static int ice_vsi_get_qs(struct ice_vsi *vsi)
525{
526 struct ice_pf *pf = vsi->back;
527 struct ice_qs_cfg tx_qs_cfg = {
528 .qs_mutex = &pf->avail_q_mutex,
529 .pf_map = pf->avail_txqs,
530 .pf_map_size = pf->max_pf_txqs,
531 .q_count = vsi->alloc_txq,
532 .scatter_count = ICE_MAX_SCATTER_TXQS,
533 .vsi_map = vsi->txq_map,
534 .vsi_map_offset = 0,
535 .mapping_mode = ICE_VSI_MAP_CONTIG
536 };
537 struct ice_qs_cfg rx_qs_cfg = {
538 .qs_mutex = &pf->avail_q_mutex,
539 .pf_map = pf->avail_rxqs,
540 .pf_map_size = pf->max_pf_rxqs,
541 .q_count = vsi->alloc_rxq,
542 .scatter_count = ICE_MAX_SCATTER_RXQS,
543 .vsi_map = vsi->rxq_map,
544 .vsi_map_offset = 0,
545 .mapping_mode = ICE_VSI_MAP_CONTIG
546 };
547 int ret;
548
549 ret = __ice_vsi_get_qs(&tx_qs_cfg);
550 if (ret)
551 return ret;
552 vsi->tx_mapping_mode = tx_qs_cfg.mapping_mode;
553
554 ret = __ice_vsi_get_qs(&rx_qs_cfg);
555 if (ret)
556 return ret;
557 vsi->rx_mapping_mode = rx_qs_cfg.mapping_mode;
558
559 return 0;
560}
561
562
563
564
565
566static void ice_vsi_put_qs(struct ice_vsi *vsi)
567{
568 struct ice_pf *pf = vsi->back;
569 int i;
570
571 mutex_lock(&pf->avail_q_mutex);
572
573 for (i = 0; i < vsi->alloc_txq; i++) {
574 clear_bit(vsi->txq_map[i], pf->avail_txqs);
575 vsi->txq_map[i] = ICE_INVAL_Q_INDEX;
576 }
577
578 for (i = 0; i < vsi->alloc_rxq; i++) {
579 clear_bit(vsi->rxq_map[i], pf->avail_rxqs);
580 vsi->rxq_map[i] = ICE_INVAL_Q_INDEX;
581 }
582
583 mutex_unlock(&pf->avail_q_mutex);
584}
585
586
587
588
589
590
591
592bool ice_is_safe_mode(struct ice_pf *pf)
593{
594 return !test_bit(ICE_FLAG_ADV_FEATURES, pf->flags);
595}
596
597
598
599
600
601
602
603
604static void ice_vsi_clean_rss_flow_fld(struct ice_vsi *vsi)
605{
606 struct ice_pf *pf = vsi->back;
607 enum ice_status status;
608
609 if (ice_is_safe_mode(pf))
610 return;
611
612 status = ice_rem_vsi_rss_cfg(&pf->hw, vsi->idx);
613 if (status)
614 dev_dbg(ice_pf_to_dev(pf), "ice_rem_vsi_rss_cfg failed for vsi = %d, error = %s\n",
615 vsi->vsi_num, ice_stat_str(status));
616}
617
618
619
620
621
622static void ice_rss_clean(struct ice_vsi *vsi)
623{
624 struct ice_pf *pf = vsi->back;
625 struct device *dev;
626
627 dev = ice_pf_to_dev(pf);
628
629 if (vsi->rss_hkey_user)
630 devm_kfree(dev, vsi->rss_hkey_user);
631 if (vsi->rss_lut_user)
632 devm_kfree(dev, vsi->rss_lut_user);
633
634 ice_vsi_clean_rss_flow_fld(vsi);
635
636 if (!ice_is_safe_mode(pf))
637 ice_rem_vsi_rss_list(&pf->hw, vsi->idx);
638}
639
640
641
642
643
644static void ice_vsi_set_rss_params(struct ice_vsi *vsi)
645{
646 struct ice_hw_common_caps *cap;
647 struct ice_pf *pf = vsi->back;
648
649 if (!test_bit(ICE_FLAG_RSS_ENA, pf->flags)) {
650 vsi->rss_size = 1;
651 return;
652 }
653
654 cap = &pf->hw.func_caps.common_cap;
655 switch (vsi->type) {
656 case ICE_VSI_PF:
657
658 vsi->rss_table_size = (u16)cap->rss_table_size;
659 vsi->rss_size = min_t(u16, num_online_cpus(),
660 BIT(cap->rss_table_entry_width));
661 vsi->rss_lut_type = ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_PF;
662 break;
663 case ICE_VSI_VF:
664
665
666
667 vsi->rss_table_size = ICE_VSIQF_HLUT_ARRAY_SIZE;
668 vsi->rss_size = ICE_MAX_RSS_QS_PER_VF;
669 vsi->rss_lut_type = ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_VSI;
670 break;
671 case ICE_VSI_LB:
672 break;
673 default:
674 dev_dbg(ice_pf_to_dev(pf), "Unsupported VSI type %s\n",
675 ice_vsi_type_str(vsi->type));
676 break;
677 }
678}
679
680
681
682
683
684
685
686static void ice_set_dflt_vsi_ctx(struct ice_vsi_ctx *ctxt)
687{
688 u32 table = 0;
689
690 memset(&ctxt->info, 0, sizeof(ctxt->info));
691
692 ctxt->alloc_from_pool = true;
693
694 ctxt->info.sw_flags = ICE_AQ_VSI_SW_FLAG_SRC_PRUNE;
695
696 ctxt->info.sw_flags2 = ICE_AQ_VSI_SW_FLAG_LAN_ENA;
697
698
699
700
701 ctxt->info.vlan_flags = ((ICE_AQ_VSI_VLAN_MODE_ALL &
702 ICE_AQ_VSI_VLAN_MODE_M) >>
703 ICE_AQ_VSI_VLAN_MODE_S);
704
705 table |= ICE_UP_TABLE_TRANSLATE(0, 0);
706 table |= ICE_UP_TABLE_TRANSLATE(1, 1);
707 table |= ICE_UP_TABLE_TRANSLATE(2, 2);
708 table |= ICE_UP_TABLE_TRANSLATE(3, 3);
709 table |= ICE_UP_TABLE_TRANSLATE(4, 4);
710 table |= ICE_UP_TABLE_TRANSLATE(5, 5);
711 table |= ICE_UP_TABLE_TRANSLATE(6, 6);
712 table |= ICE_UP_TABLE_TRANSLATE(7, 7);
713 ctxt->info.ingress_table = cpu_to_le32(table);
714 ctxt->info.egress_table = cpu_to_le32(table);
715
716 ctxt->info.outer_up_table = cpu_to_le32(table);
717
718}
719
720
721
722
723
724
725static void ice_vsi_setup_q_map(struct ice_vsi *vsi, struct ice_vsi_ctx *ctxt)
726{
727 u16 offset = 0, qmap = 0, tx_count = 0;
728 u16 qcount_tx = vsi->alloc_txq;
729 u16 qcount_rx = vsi->alloc_rxq;
730 u16 tx_numq_tc, rx_numq_tc;
731 u16 pow = 0, max_rss = 0;
732 bool ena_tc0 = false;
733 u8 netdev_tc = 0;
734 int i;
735
736
737 if (vsi->tc_cfg.numtc) {
738 if (!(vsi->tc_cfg.ena_tc & BIT(0)))
739 ena_tc0 = true;
740 } else {
741 ena_tc0 = true;
742 }
743
744 if (ena_tc0) {
745 vsi->tc_cfg.numtc++;
746 vsi->tc_cfg.ena_tc |= 1;
747 }
748
749 rx_numq_tc = qcount_rx / vsi->tc_cfg.numtc;
750 if (!rx_numq_tc)
751 rx_numq_tc = 1;
752 tx_numq_tc = qcount_tx / vsi->tc_cfg.numtc;
753 if (!tx_numq_tc)
754 tx_numq_tc = 1;
755
756
757
758
759
760
761
762
763
764
765
766
767
768 qcount_rx = rx_numq_tc;
769
770
771 if (test_bit(ICE_FLAG_RSS_ENA, vsi->back->flags)) {
772 if (vsi->type == ICE_VSI_PF || vsi->type == ICE_VSI_VF) {
773 if (vsi->type == ICE_VSI_PF)
774 max_rss = ICE_MAX_LG_RSS_QS;
775 else
776 max_rss = ICE_MAX_RSS_QS_PER_VF;
777 qcount_rx = min_t(u16, rx_numq_tc, max_rss);
778 if (!vsi->req_rxq)
779 qcount_rx = min_t(u16, qcount_rx,
780 vsi->rss_size);
781 }
782 }
783
784
785 pow = (u16)order_base_2(qcount_rx);
786
787 ice_for_each_traffic_class(i) {
788 if (!(vsi->tc_cfg.ena_tc & BIT(i))) {
789
790 vsi->tc_cfg.tc_info[i].qoffset = 0;
791 vsi->tc_cfg.tc_info[i].qcount_rx = 1;
792 vsi->tc_cfg.tc_info[i].qcount_tx = 1;
793 vsi->tc_cfg.tc_info[i].netdev_tc = 0;
794 ctxt->info.tc_mapping[i] = 0;
795 continue;
796 }
797
798
799 vsi->tc_cfg.tc_info[i].qoffset = offset;
800 vsi->tc_cfg.tc_info[i].qcount_rx = qcount_rx;
801 vsi->tc_cfg.tc_info[i].qcount_tx = tx_numq_tc;
802 vsi->tc_cfg.tc_info[i].netdev_tc = netdev_tc++;
803
804 qmap = ((offset << ICE_AQ_VSI_TC_Q_OFFSET_S) &
805 ICE_AQ_VSI_TC_Q_OFFSET_M) |
806 ((pow << ICE_AQ_VSI_TC_Q_NUM_S) &
807 ICE_AQ_VSI_TC_Q_NUM_M);
808 offset += qcount_rx;
809 tx_count += tx_numq_tc;
810 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
811 }
812
813
814
815
816
817
818
819 if (offset)
820 vsi->num_rxq = offset;
821 else
822 vsi->num_rxq = qcount_rx;
823
824 vsi->num_txq = tx_count;
825
826 if (vsi->type == ICE_VSI_VF && vsi->num_txq != vsi->num_rxq) {
827 dev_dbg(ice_pf_to_dev(vsi->back), "VF VSI should have same number of Tx and Rx queues. Hence making them equal\n");
828
829
830
831 vsi->num_txq = vsi->num_rxq;
832 }
833
834
835 ctxt->info.mapping_flags |= cpu_to_le16(ICE_AQ_VSI_Q_MAP_CONTIG);
836
837
838
839
840 ctxt->info.q_mapping[0] = cpu_to_le16(vsi->rxq_map[0]);
841 ctxt->info.q_mapping[1] = cpu_to_le16(vsi->num_rxq);
842}
843
844
845
846
847
848
849static void ice_set_fd_vsi_ctx(struct ice_vsi_ctx *ctxt, struct ice_vsi *vsi)
850{
851 u8 dflt_q_group, dflt_q_prio;
852 u16 dflt_q, report_q, val;
853
854 if (vsi->type != ICE_VSI_PF && vsi->type != ICE_VSI_CTRL)
855 return;
856
857 val = ICE_AQ_VSI_PROP_FLOW_DIR_VALID;
858 ctxt->info.valid_sections |= cpu_to_le16(val);
859 dflt_q = 0;
860 dflt_q_group = 0;
861 report_q = 0;
862 dflt_q_prio = 0;
863
864
865 val = ICE_AQ_VSI_FD_ENABLE | ICE_AQ_VSI_FD_PROG_ENABLE;
866 ctxt->info.fd_options = cpu_to_le16(val);
867
868 ctxt->info.max_fd_fltr_dedicated =
869 cpu_to_le16(vsi->num_gfltr);
870
871 ctxt->info.max_fd_fltr_shared =
872 cpu_to_le16(vsi->num_bfltr);
873
874 val = ((dflt_q << ICE_AQ_VSI_FD_DEF_Q_S) &
875 ICE_AQ_VSI_FD_DEF_Q_M);
876
877 val |= ((dflt_q_group << ICE_AQ_VSI_FD_DEF_GRP_S) &
878 ICE_AQ_VSI_FD_DEF_GRP_M);
879 ctxt->info.fd_def_q = cpu_to_le16(val);
880
881 val = ((report_q << ICE_AQ_VSI_FD_REPORT_Q_S) &
882 ICE_AQ_VSI_FD_REPORT_Q_M);
883
884 val |= ((dflt_q_prio << ICE_AQ_VSI_FD_DEF_PRIORITY_S) &
885 ICE_AQ_VSI_FD_DEF_PRIORITY_M);
886 ctxt->info.fd_report_opt = cpu_to_le16(val);
887}
888
889
890
891
892
893
894static void ice_set_rss_vsi_ctx(struct ice_vsi_ctx *ctxt, struct ice_vsi *vsi)
895{
896 u8 lut_type, hash_type;
897 struct device *dev;
898 struct ice_pf *pf;
899
900 pf = vsi->back;
901 dev = ice_pf_to_dev(pf);
902
903 switch (vsi->type) {
904 case ICE_VSI_PF:
905
906 lut_type = ICE_AQ_VSI_Q_OPT_RSS_LUT_PF;
907 hash_type = ICE_AQ_VSI_Q_OPT_RSS_TPLZ;
908 break;
909 case ICE_VSI_VF:
910
911 lut_type = ICE_AQ_VSI_Q_OPT_RSS_LUT_VSI;
912 hash_type = ICE_AQ_VSI_Q_OPT_RSS_TPLZ;
913 break;
914 default:
915 dev_dbg(dev, "Unsupported VSI type %s\n",
916 ice_vsi_type_str(vsi->type));
917 return;
918 }
919
920 ctxt->info.q_opt_rss = ((lut_type << ICE_AQ_VSI_Q_OPT_RSS_LUT_S) &
921 ICE_AQ_VSI_Q_OPT_RSS_LUT_M) |
922 ((hash_type << ICE_AQ_VSI_Q_OPT_RSS_HASH_S) &
923 ICE_AQ_VSI_Q_OPT_RSS_HASH_M);
924}
925
926
927
928
929
930
931
932
933
934static int ice_vsi_init(struct ice_vsi *vsi, bool init_vsi)
935{
936 struct ice_pf *pf = vsi->back;
937 struct ice_hw *hw = &pf->hw;
938 struct ice_vsi_ctx *ctxt;
939 struct device *dev;
940 int ret = 0;
941
942 dev = ice_pf_to_dev(pf);
943 ctxt = kzalloc(sizeof(*ctxt), GFP_KERNEL);
944 if (!ctxt)
945 return -ENOMEM;
946
947 switch (vsi->type) {
948 case ICE_VSI_CTRL:
949 case ICE_VSI_LB:
950 case ICE_VSI_PF:
951 ctxt->flags = ICE_AQ_VSI_TYPE_PF;
952 break;
953 case ICE_VSI_VF:
954 ctxt->flags = ICE_AQ_VSI_TYPE_VF;
955
956 ctxt->vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
957 break;
958 default:
959 ret = -ENODEV;
960 goto out;
961 }
962
963 ice_set_dflt_vsi_ctx(ctxt);
964 if (test_bit(ICE_FLAG_FD_ENA, pf->flags))
965 ice_set_fd_vsi_ctx(ctxt, vsi);
966
967 if (vsi->vsw->bridge_mode == BRIDGE_MODE_VEB)
968 ctxt->info.sw_flags |= ICE_AQ_VSI_SW_FLAG_ALLOW_LB;
969
970
971 if (test_bit(ICE_FLAG_RSS_ENA, pf->flags) &&
972 vsi->type != ICE_VSI_CTRL) {
973 ice_set_rss_vsi_ctx(ctxt, vsi);
974
975
976
977 if (!init_vsi)
978 ctxt->info.valid_sections |=
979 cpu_to_le16(ICE_AQ_VSI_PROP_Q_OPT_VALID);
980 }
981
982 ctxt->info.sw_id = vsi->port_info->sw_id;
983 ice_vsi_setup_q_map(vsi, ctxt);
984 if (!init_vsi)
985
986
987
988 ctxt->info.valid_sections |=
989 cpu_to_le16(ICE_AQ_VSI_PROP_RXQ_MAP_VALID);
990
991
992
993
994 if (vsi->type == ICE_VSI_VF) {
995 ctxt->info.valid_sections |=
996 cpu_to_le16(ICE_AQ_VSI_PROP_SECURITY_VALID);
997 if (pf->vf[vsi->vf_id].spoofchk) {
998 ctxt->info.sec_flags |=
999 ICE_AQ_VSI_SEC_FLAG_ENA_MAC_ANTI_SPOOF |
1000 (ICE_AQ_VSI_SEC_TX_VLAN_PRUNE_ENA <<
1001 ICE_AQ_VSI_SEC_TX_PRUNE_ENA_S);
1002 } else {
1003 ctxt->info.sec_flags &=
1004 ~(ICE_AQ_VSI_SEC_FLAG_ENA_MAC_ANTI_SPOOF |
1005 (ICE_AQ_VSI_SEC_TX_VLAN_PRUNE_ENA <<
1006 ICE_AQ_VSI_SEC_TX_PRUNE_ENA_S));
1007 }
1008 }
1009
1010
1011 if (vsi->type == ICE_VSI_PF) {
1012 ctxt->info.sec_flags |= ICE_AQ_VSI_SEC_FLAG_ALLOW_DEST_OVRD;
1013 ctxt->info.valid_sections |=
1014 cpu_to_le16(ICE_AQ_VSI_PROP_SECURITY_VALID);
1015 }
1016
1017 if (init_vsi) {
1018 ret = ice_add_vsi(hw, vsi->idx, ctxt, NULL);
1019 if (ret) {
1020 dev_err(dev, "Add VSI failed, err %d\n", ret);
1021 ret = -EIO;
1022 goto out;
1023 }
1024 } else {
1025 ret = ice_update_vsi(hw, vsi->idx, ctxt, NULL);
1026 if (ret) {
1027 dev_err(dev, "Update VSI failed, err %d\n", ret);
1028 ret = -EIO;
1029 goto out;
1030 }
1031 }
1032
1033
1034 vsi->info = ctxt->info;
1035
1036
1037 vsi->vsi_num = ctxt->vsi_num;
1038
1039out:
1040 kfree(ctxt);
1041 return ret;
1042}
1043
1044
1045
1046
1047
1048
1049
1050
1051
1052int ice_free_res(struct ice_res_tracker *res, u16 index, u16 id)
1053{
1054 int count = 0;
1055 int i;
1056
1057 if (!res || index >= res->end)
1058 return -EINVAL;
1059
1060 id |= ICE_RES_VALID_BIT;
1061 for (i = index; i < res->end && res->list[i] == id; i++) {
1062 res->list[i] = 0;
1063 count++;
1064 }
1065
1066 return count;
1067}
1068
1069
1070
1071
1072
1073
1074
1075
1076
1077static int ice_search_res(struct ice_res_tracker *res, u16 needed, u16 id)
1078{
1079 u16 start = 0, end = 0;
1080
1081 if (needed > res->end)
1082 return -ENOMEM;
1083
1084 id |= ICE_RES_VALID_BIT;
1085
1086 do {
1087
1088 if (res->list[end++] & ICE_RES_VALID_BIT) {
1089 start = end;
1090 if ((start + needed) > res->end)
1091 break;
1092 }
1093
1094 if (end == (start + needed)) {
1095 int i = start;
1096
1097
1098 while (i != end)
1099 res->list[i++] = id;
1100
1101 return start;
1102 }
1103 } while (end < res->end);
1104
1105 return -ENOMEM;
1106}
1107
1108
1109
1110
1111
1112static u16 ice_get_free_res_count(struct ice_res_tracker *res)
1113{
1114 u16 i, count = 0;
1115
1116 for (i = 0; i < res->end; i++)
1117 if (!(res->list[i] & ICE_RES_VALID_BIT))
1118 count++;
1119
1120 return count;
1121}
1122
1123
1124
1125
1126
1127
1128
1129
1130
1131
1132int
1133ice_get_res(struct ice_pf *pf, struct ice_res_tracker *res, u16 needed, u16 id)
1134{
1135 if (!res || !pf)
1136 return -EINVAL;
1137
1138 if (!needed || needed > res->num_entries || id >= ICE_RES_VALID_BIT) {
1139 dev_err(ice_pf_to_dev(pf), "param err: needed=%d, num_entries = %d id=0x%04x\n",
1140 needed, res->num_entries, id);
1141 return -EINVAL;
1142 }
1143
1144 return ice_search_res(res, needed, id);
1145}
1146
1147
1148
1149
1150
1151
1152
1153
1154
1155
1156
1157static int ice_vsi_setup_vector_base(struct ice_vsi *vsi)
1158{
1159 struct ice_pf *pf = vsi->back;
1160 struct device *dev;
1161 u16 num_q_vectors;
1162 int base;
1163
1164 dev = ice_pf_to_dev(pf);
1165
1166 if (vsi->type == ICE_VSI_VF)
1167 return 0;
1168
1169 if (vsi->base_vector) {
1170 dev_dbg(dev, "VSI %d has non-zero base vector %d\n",
1171 vsi->vsi_num, vsi->base_vector);
1172 return -EEXIST;
1173 }
1174
1175 num_q_vectors = vsi->num_q_vectors;
1176
1177 base = ice_get_res(pf, pf->irq_tracker, num_q_vectors, vsi->idx);
1178
1179 if (base < 0) {
1180 dev_err(dev, "%d MSI-X interrupts available. %s %d failed to get %d MSI-X vectors\n",
1181 ice_get_free_res_count(pf->irq_tracker),
1182 ice_vsi_type_str(vsi->type), vsi->idx, num_q_vectors);
1183 return -ENOENT;
1184 }
1185 vsi->base_vector = (u16)base;
1186 pf->num_avail_sw_msix -= num_q_vectors;
1187
1188 return 0;
1189}
1190
1191
1192
1193
1194
1195static void ice_vsi_clear_rings(struct ice_vsi *vsi)
1196{
1197 int i;
1198
1199
1200 if (vsi->q_vectors) {
1201 ice_for_each_q_vector(vsi, i) {
1202 struct ice_q_vector *q_vector = vsi->q_vectors[i];
1203
1204 if (q_vector) {
1205 q_vector->tx.ring = NULL;
1206 q_vector->rx.ring = NULL;
1207 }
1208 }
1209 }
1210
1211 if (vsi->tx_rings) {
1212 for (i = 0; i < vsi->alloc_txq; i++) {
1213 if (vsi->tx_rings[i]) {
1214 kfree_rcu(vsi->tx_rings[i], rcu);
1215 WRITE_ONCE(vsi->tx_rings[i], NULL);
1216 }
1217 }
1218 }
1219 if (vsi->rx_rings) {
1220 for (i = 0; i < vsi->alloc_rxq; i++) {
1221 if (vsi->rx_rings[i]) {
1222 kfree_rcu(vsi->rx_rings[i], rcu);
1223 WRITE_ONCE(vsi->rx_rings[i], NULL);
1224 }
1225 }
1226 }
1227}
1228
1229
1230
1231
1232
1233static int ice_vsi_alloc_rings(struct ice_vsi *vsi)
1234{
1235 struct ice_pf *pf = vsi->back;
1236 struct device *dev;
1237 u16 i;
1238
1239 dev = ice_pf_to_dev(pf);
1240
1241 for (i = 0; i < vsi->alloc_txq; i++) {
1242 struct ice_ring *ring;
1243
1244
1245 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
1246
1247 if (!ring)
1248 goto err_out;
1249
1250 ring->q_index = i;
1251 ring->reg_idx = vsi->txq_map[i];
1252 ring->ring_active = false;
1253 ring->vsi = vsi;
1254 ring->dev = dev;
1255 ring->count = vsi->num_tx_desc;
1256 WRITE_ONCE(vsi->tx_rings[i], ring);
1257 }
1258
1259
1260 for (i = 0; i < vsi->alloc_rxq; i++) {
1261 struct ice_ring *ring;
1262
1263
1264 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
1265 if (!ring)
1266 goto err_out;
1267
1268 ring->q_index = i;
1269 ring->reg_idx = vsi->rxq_map[i];
1270 ring->ring_active = false;
1271 ring->vsi = vsi;
1272 ring->netdev = vsi->netdev;
1273 ring->dev = dev;
1274 ring->count = vsi->num_rx_desc;
1275 WRITE_ONCE(vsi->rx_rings[i], ring);
1276 }
1277
1278 return 0;
1279
1280err_out:
1281 ice_vsi_clear_rings(vsi);
1282 return -ENOMEM;
1283}
1284
1285
1286
1287
1288
1289
1290
1291
1292
1293
1294int ice_vsi_manage_rss_lut(struct ice_vsi *vsi, bool ena)
1295{
1296 int err = 0;
1297 u8 *lut;
1298
1299 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
1300 if (!lut)
1301 return -ENOMEM;
1302
1303 if (ena) {
1304 if (vsi->rss_lut_user)
1305 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
1306 else
1307 ice_fill_rss_lut(lut, vsi->rss_table_size,
1308 vsi->rss_size);
1309 }
1310
1311 err = ice_set_rss(vsi, NULL, lut, vsi->rss_table_size);
1312 kfree(lut);
1313 return err;
1314}
1315
1316
1317
1318
1319
1320static int ice_vsi_cfg_rss_lut_key(struct ice_vsi *vsi)
1321{
1322 struct ice_aqc_get_set_rss_keys *key;
1323 struct ice_pf *pf = vsi->back;
1324 enum ice_status status;
1325 struct device *dev;
1326 int err = 0;
1327 u8 *lut;
1328
1329 dev = ice_pf_to_dev(pf);
1330 vsi->rss_size = min_t(u16, vsi->rss_size, vsi->num_rxq);
1331
1332 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
1333 if (!lut)
1334 return -ENOMEM;
1335
1336 if (vsi->rss_lut_user)
1337 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
1338 else
1339 ice_fill_rss_lut(lut, vsi->rss_table_size, vsi->rss_size);
1340
1341 status = ice_aq_set_rss_lut(&pf->hw, vsi->idx, vsi->rss_lut_type, lut,
1342 vsi->rss_table_size);
1343
1344 if (status) {
1345 dev_err(dev, "set_rss_lut failed, error %s\n",
1346 ice_stat_str(status));
1347 err = -EIO;
1348 goto ice_vsi_cfg_rss_exit;
1349 }
1350
1351 key = kzalloc(sizeof(*key), GFP_KERNEL);
1352 if (!key) {
1353 err = -ENOMEM;
1354 goto ice_vsi_cfg_rss_exit;
1355 }
1356
1357 if (vsi->rss_hkey_user)
1358 memcpy(key,
1359 (struct ice_aqc_get_set_rss_keys *)vsi->rss_hkey_user,
1360 ICE_GET_SET_RSS_KEY_EXTEND_KEY_SIZE);
1361 else
1362 netdev_rss_key_fill((void *)key,
1363 ICE_GET_SET_RSS_KEY_EXTEND_KEY_SIZE);
1364
1365 status = ice_aq_set_rss_key(&pf->hw, vsi->idx, key);
1366
1367 if (status) {
1368 dev_err(dev, "set_rss_key failed, error %s\n",
1369 ice_stat_str(status));
1370 err = -EIO;
1371 }
1372
1373 kfree(key);
1374ice_vsi_cfg_rss_exit:
1375 kfree(lut);
1376 return err;
1377}
1378
1379
1380
1381
1382
1383
1384
1385
1386
1387static void ice_vsi_set_vf_rss_flow_fld(struct ice_vsi *vsi)
1388{
1389 struct ice_pf *pf = vsi->back;
1390 enum ice_status status;
1391 struct device *dev;
1392
1393 dev = ice_pf_to_dev(pf);
1394 if (ice_is_safe_mode(pf)) {
1395 dev_dbg(dev, "Advanced RSS disabled. Package download failed, vsi num = %d\n",
1396 vsi->vsi_num);
1397 return;
1398 }
1399
1400 status = ice_add_avf_rss_cfg(&pf->hw, vsi->idx, ICE_DEFAULT_RSS_HENA);
1401 if (status)
1402 dev_dbg(dev, "ice_add_avf_rss_cfg failed for vsi = %d, error = %s\n",
1403 vsi->vsi_num, ice_stat_str(status));
1404}
1405
1406
1407
1408
1409
1410
1411
1412
1413
1414
1415
1416
1417static void ice_vsi_set_rss_flow_fld(struct ice_vsi *vsi)
1418{
1419 u16 vsi_handle = vsi->idx, vsi_num = vsi->vsi_num;
1420 struct ice_pf *pf = vsi->back;
1421 struct ice_hw *hw = &pf->hw;
1422 enum ice_status status;
1423 struct device *dev;
1424
1425 dev = ice_pf_to_dev(pf);
1426 if (ice_is_safe_mode(pf)) {
1427 dev_dbg(dev, "Advanced RSS disabled. Package download failed, vsi num = %d\n",
1428 vsi_num);
1429 return;
1430 }
1431
1432 status = ice_add_rss_cfg(hw, vsi_handle, ICE_FLOW_HASH_IPV4,
1433 ICE_FLOW_SEG_HDR_IPV4);
1434 if (status)
1435 dev_dbg(dev, "ice_add_rss_cfg failed for ipv4 flow, vsi = %d, error = %s\n",
1436 vsi_num, ice_stat_str(status));
1437
1438
1439 status = ice_add_rss_cfg(hw, vsi_handle, ICE_FLOW_HASH_IPV6,
1440 ICE_FLOW_SEG_HDR_IPV6);
1441 if (status)
1442 dev_dbg(dev, "ice_add_rss_cfg failed for ipv6 flow, vsi = %d, error = %s\n",
1443 vsi_num, ice_stat_str(status));
1444
1445
1446 status = ice_add_rss_cfg(hw, vsi_handle, ICE_HASH_TCP_IPV4,
1447 ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_IPV4);
1448 if (status)
1449 dev_dbg(dev, "ice_add_rss_cfg failed for tcp4 flow, vsi = %d, error = %s\n",
1450 vsi_num, ice_stat_str(status));
1451
1452
1453 status = ice_add_rss_cfg(hw, vsi_handle, ICE_HASH_UDP_IPV4,
1454 ICE_FLOW_SEG_HDR_UDP | ICE_FLOW_SEG_HDR_IPV4);
1455 if (status)
1456 dev_dbg(dev, "ice_add_rss_cfg failed for udp4 flow, vsi = %d, error = %s\n",
1457 vsi_num, ice_stat_str(status));
1458
1459
1460 status = ice_add_rss_cfg(hw, vsi_handle, ICE_FLOW_HASH_IPV4,
1461 ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_IPV4);
1462 if (status)
1463 dev_dbg(dev, "ice_add_rss_cfg failed for sctp4 flow, vsi = %d, error = %s\n",
1464 vsi_num, ice_stat_str(status));
1465
1466
1467 status = ice_add_rss_cfg(hw, vsi_handle, ICE_HASH_TCP_IPV6,
1468 ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_IPV6);
1469 if (status)
1470 dev_dbg(dev, "ice_add_rss_cfg failed for tcp6 flow, vsi = %d, error = %s\n",
1471 vsi_num, ice_stat_str(status));
1472
1473
1474 status = ice_add_rss_cfg(hw, vsi_handle, ICE_HASH_UDP_IPV6,
1475 ICE_FLOW_SEG_HDR_UDP | ICE_FLOW_SEG_HDR_IPV6);
1476 if (status)
1477 dev_dbg(dev, "ice_add_rss_cfg failed for udp6 flow, vsi = %d, error = %s\n",
1478 vsi_num, ice_stat_str(status));
1479
1480
1481 status = ice_add_rss_cfg(hw, vsi_handle, ICE_FLOW_HASH_IPV6,
1482 ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_IPV6);
1483 if (status)
1484 dev_dbg(dev, "ice_add_rss_cfg failed for sctp6 flow, vsi = %d, error = %s\n",
1485 vsi_num, ice_stat_str(status));
1486}
1487
1488
1489
1490
1491
1492
1493
1494
1495
1496
1497
1498bool ice_pf_state_is_nominal(struct ice_pf *pf)
1499{
1500 DECLARE_BITMAP(check_bits, __ICE_STATE_NBITS) = { 0 };
1501
1502 if (!pf)
1503 return false;
1504
1505 bitmap_set(check_bits, 0, __ICE_STATE_NOMINAL_CHECK_BITS);
1506 if (bitmap_intersects(pf->state, check_bits, __ICE_STATE_NBITS))
1507 return false;
1508
1509 return true;
1510}
1511
1512
1513
1514
1515
1516void ice_update_eth_stats(struct ice_vsi *vsi)
1517{
1518 struct ice_eth_stats *prev_es, *cur_es;
1519 struct ice_hw *hw = &vsi->back->hw;
1520 u16 vsi_num = vsi->vsi_num;
1521
1522 prev_es = &vsi->eth_stats_prev;
1523 cur_es = &vsi->eth_stats;
1524
1525 ice_stat_update40(hw, GLV_GORCL(vsi_num), vsi->stat_offsets_loaded,
1526 &prev_es->rx_bytes, &cur_es->rx_bytes);
1527
1528 ice_stat_update40(hw, GLV_UPRCL(vsi_num), vsi->stat_offsets_loaded,
1529 &prev_es->rx_unicast, &cur_es->rx_unicast);
1530
1531 ice_stat_update40(hw, GLV_MPRCL(vsi_num), vsi->stat_offsets_loaded,
1532 &prev_es->rx_multicast, &cur_es->rx_multicast);
1533
1534 ice_stat_update40(hw, GLV_BPRCL(vsi_num), vsi->stat_offsets_loaded,
1535 &prev_es->rx_broadcast, &cur_es->rx_broadcast);
1536
1537 ice_stat_update32(hw, GLV_RDPC(vsi_num), vsi->stat_offsets_loaded,
1538 &prev_es->rx_discards, &cur_es->rx_discards);
1539
1540 ice_stat_update40(hw, GLV_GOTCL(vsi_num), vsi->stat_offsets_loaded,
1541 &prev_es->tx_bytes, &cur_es->tx_bytes);
1542
1543 ice_stat_update40(hw, GLV_UPTCL(vsi_num), vsi->stat_offsets_loaded,
1544 &prev_es->tx_unicast, &cur_es->tx_unicast);
1545
1546 ice_stat_update40(hw, GLV_MPTCL(vsi_num), vsi->stat_offsets_loaded,
1547 &prev_es->tx_multicast, &cur_es->tx_multicast);
1548
1549 ice_stat_update40(hw, GLV_BPTCL(vsi_num), vsi->stat_offsets_loaded,
1550 &prev_es->tx_broadcast, &cur_es->tx_broadcast);
1551
1552 ice_stat_update32(hw, GLV_TEPC(vsi_num), vsi->stat_offsets_loaded,
1553 &prev_es->tx_errors, &cur_es->tx_errors);
1554
1555 vsi->stat_offsets_loaded = true;
1556}
1557
1558
1559
1560
1561
1562
1563
1564int
1565ice_vsi_add_vlan(struct ice_vsi *vsi, u16 vid, enum ice_sw_fwd_act_type action)
1566{
1567 struct ice_pf *pf = vsi->back;
1568 struct device *dev;
1569 int err = 0;
1570
1571 dev = ice_pf_to_dev(pf);
1572
1573 if (!ice_fltr_add_vlan(vsi, vid, action)) {
1574 vsi->num_vlan++;
1575 } else {
1576 err = -ENODEV;
1577 dev_err(dev, "Failure Adding VLAN %d on VSI %i\n", vid,
1578 vsi->vsi_num);
1579 }
1580
1581 return err;
1582}
1583
1584
1585
1586
1587
1588
1589
1590
1591int ice_vsi_kill_vlan(struct ice_vsi *vsi, u16 vid)
1592{
1593 struct ice_pf *pf = vsi->back;
1594 enum ice_status status;
1595 struct device *dev;
1596 int err = 0;
1597
1598 dev = ice_pf_to_dev(pf);
1599
1600 status = ice_fltr_remove_vlan(vsi, vid, ICE_FWD_TO_VSI);
1601 if (!status) {
1602 vsi->num_vlan--;
1603 } else if (status == ICE_ERR_DOES_NOT_EXIST) {
1604 dev_dbg(dev, "Failed to remove VLAN %d on VSI %i, it does not exist, status: %s\n",
1605 vid, vsi->vsi_num, ice_stat_str(status));
1606 } else {
1607 dev_err(dev, "Error removing VLAN %d on vsi %i error: %s\n",
1608 vid, vsi->vsi_num, ice_stat_str(status));
1609 err = -EIO;
1610 }
1611
1612 return err;
1613}
1614
1615
1616
1617
1618
1619void ice_vsi_cfg_frame_size(struct ice_vsi *vsi)
1620{
1621 if (!vsi->netdev || test_bit(ICE_FLAG_LEGACY_RX, vsi->back->flags)) {
1622 vsi->max_frame = ICE_AQ_SET_MAC_FRAME_SIZE_MAX;
1623 vsi->rx_buf_len = ICE_RXBUF_2048;
1624#if (PAGE_SIZE < 8192)
1625 } else if (!ICE_2K_TOO_SMALL_WITH_PADDING &&
1626 (vsi->netdev->mtu <= ETH_DATA_LEN)) {
1627 vsi->max_frame = ICE_RXBUF_1536 - NET_IP_ALIGN;
1628 vsi->rx_buf_len = ICE_RXBUF_1536 - NET_IP_ALIGN;
1629#endif
1630 } else {
1631 vsi->max_frame = ICE_AQ_SET_MAC_FRAME_SIZE_MAX;
1632#if (PAGE_SIZE < 8192)
1633 vsi->rx_buf_len = ICE_RXBUF_3072;
1634#else
1635 vsi->rx_buf_len = ICE_RXBUF_2048;
1636#endif
1637 }
1638}
1639
1640
1641
1642
1643
1644
1645
1646
1647void
1648ice_write_qrxflxp_cntxt(struct ice_hw *hw, u16 pf_q, u32 rxdid, u32 prio)
1649{
1650 int regval = rd32(hw, QRXFLXP_CNTXT(pf_q));
1651
1652
1653 regval &= ~(QRXFLXP_CNTXT_RXDID_IDX_M |
1654 QRXFLXP_CNTXT_RXDID_PRIO_M |
1655 QRXFLXP_CNTXT_TS_M);
1656
1657 regval |= (rxdid << QRXFLXP_CNTXT_RXDID_IDX_S) &
1658 QRXFLXP_CNTXT_RXDID_IDX_M;
1659
1660 regval |= (prio << QRXFLXP_CNTXT_RXDID_PRIO_S) &
1661 QRXFLXP_CNTXT_RXDID_PRIO_M;
1662
1663 wr32(hw, QRXFLXP_CNTXT(pf_q), regval);
1664}
1665
1666
1667
1668
1669
1670
1671
1672
1673int ice_vsi_cfg_rxqs(struct ice_vsi *vsi)
1674{
1675 u16 i;
1676
1677 if (vsi->type == ICE_VSI_VF)
1678 goto setup_rings;
1679
1680 ice_vsi_cfg_frame_size(vsi);
1681setup_rings:
1682
1683 for (i = 0; i < vsi->num_rxq; i++) {
1684 int err;
1685
1686 err = ice_setup_rx_ctx(vsi->rx_rings[i]);
1687 if (err) {
1688 dev_err(ice_pf_to_dev(vsi->back), "ice_setup_rx_ctx failed for RxQ %d, err %d\n",
1689 i, err);
1690 return err;
1691 }
1692 }
1693
1694 return 0;
1695}
1696
1697
1698
1699
1700
1701
1702
1703
1704
1705static int
1706ice_vsi_cfg_txqs(struct ice_vsi *vsi, struct ice_ring **rings)
1707{
1708 struct ice_aqc_add_tx_qgrp *qg_buf;
1709 u16 q_idx = 0;
1710 int err = 0;
1711
1712 qg_buf = kzalloc(struct_size(qg_buf, txqs, 1), GFP_KERNEL);
1713 if (!qg_buf)
1714 return -ENOMEM;
1715
1716 qg_buf->num_txqs = 1;
1717
1718 for (q_idx = 0; q_idx < vsi->num_txq; q_idx++) {
1719 err = ice_vsi_cfg_txq(vsi, rings[q_idx], qg_buf);
1720 if (err)
1721 goto err_cfg_txqs;
1722 }
1723
1724err_cfg_txqs:
1725 kfree(qg_buf);
1726 return err;
1727}
1728
1729
1730
1731
1732
1733
1734
1735
1736int ice_vsi_cfg_lan_txqs(struct ice_vsi *vsi)
1737{
1738 return ice_vsi_cfg_txqs(vsi, vsi->tx_rings);
1739}
1740
1741
1742
1743
1744
1745
1746
1747
1748int ice_vsi_cfg_xdp_txqs(struct ice_vsi *vsi)
1749{
1750 int ret;
1751 int i;
1752
1753 ret = ice_vsi_cfg_txqs(vsi, vsi->xdp_rings);
1754 if (ret)
1755 return ret;
1756
1757 for (i = 0; i < vsi->num_xdp_txq; i++)
1758 vsi->xdp_rings[i]->xsk_umem = ice_xsk_umem(vsi->xdp_rings[i]);
1759
1760 return ret;
1761}
1762
1763
1764
1765
1766
1767
1768
1769
1770
1771u32 ice_intrl_usec_to_reg(u8 intrl, u8 gran)
1772{
1773 u32 val = intrl / gran;
1774
1775 if (val)
1776 return val | GLINT_RATE_INTRL_ENA_M;
1777 return 0;
1778}
1779
1780
1781
1782
1783
1784
1785
1786
1787void ice_vsi_cfg_msix(struct ice_vsi *vsi)
1788{
1789 struct ice_pf *pf = vsi->back;
1790 struct ice_hw *hw = &pf->hw;
1791 u16 txq = 0, rxq = 0;
1792 int i, q;
1793
1794 for (i = 0; i < vsi->num_q_vectors; i++) {
1795 struct ice_q_vector *q_vector = vsi->q_vectors[i];
1796 u16 reg_idx = q_vector->reg_idx;
1797
1798 ice_cfg_itr(hw, q_vector);
1799
1800 wr32(hw, GLINT_RATE(reg_idx),
1801 ice_intrl_usec_to_reg(q_vector->intrl, hw->intrl_gran));
1802
1803
1804
1805
1806
1807
1808
1809
1810
1811
1812
1813
1814 for (q = 0; q < q_vector->num_ring_tx; q++) {
1815 ice_cfg_txq_interrupt(vsi, txq, reg_idx,
1816 q_vector->tx.itr_idx);
1817 txq++;
1818 }
1819
1820 for (q = 0; q < q_vector->num_ring_rx; q++) {
1821 ice_cfg_rxq_interrupt(vsi, rxq, reg_idx,
1822 q_vector->rx.itr_idx);
1823 rxq++;
1824 }
1825 }
1826}
1827
1828
1829
1830
1831
1832int ice_vsi_manage_vlan_insertion(struct ice_vsi *vsi)
1833{
1834 struct ice_hw *hw = &vsi->back->hw;
1835 struct ice_vsi_ctx *ctxt;
1836 enum ice_status status;
1837 int ret = 0;
1838
1839 ctxt = kzalloc(sizeof(*ctxt), GFP_KERNEL);
1840 if (!ctxt)
1841 return -ENOMEM;
1842
1843
1844
1845
1846
1847 ctxt->info.vlan_flags = ICE_AQ_VSI_VLAN_MODE_ALL;
1848
1849
1850 ctxt->info.vlan_flags |= (vsi->info.vlan_flags &
1851 ICE_AQ_VSI_VLAN_EMOD_M);
1852
1853 ctxt->info.valid_sections = cpu_to_le16(ICE_AQ_VSI_PROP_VLAN_VALID);
1854
1855 status = ice_update_vsi(hw, vsi->idx, ctxt, NULL);
1856 if (status) {
1857 dev_err(ice_pf_to_dev(vsi->back), "update VSI for VLAN insert failed, err %s aq_err %s\n",
1858 ice_stat_str(status),
1859 ice_aq_str(hw->adminq.sq_last_status));
1860 ret = -EIO;
1861 goto out;
1862 }
1863
1864 vsi->info.vlan_flags = ctxt->info.vlan_flags;
1865out:
1866 kfree(ctxt);
1867 return ret;
1868}
1869
1870
1871
1872
1873
1874
1875int ice_vsi_manage_vlan_stripping(struct ice_vsi *vsi, bool ena)
1876{
1877 struct ice_hw *hw = &vsi->back->hw;
1878 struct ice_vsi_ctx *ctxt;
1879 enum ice_status status;
1880 int ret = 0;
1881
1882
1883
1884
1885 if (vsi->info.pvid)
1886 return 0;
1887
1888 ctxt = kzalloc(sizeof(*ctxt), GFP_KERNEL);
1889 if (!ctxt)
1890 return -ENOMEM;
1891
1892
1893
1894
1895
1896 if (ena)
1897
1898 ctxt->info.vlan_flags = ICE_AQ_VSI_VLAN_EMOD_STR_BOTH;
1899 else
1900
1901 ctxt->info.vlan_flags = ICE_AQ_VSI_VLAN_EMOD_NOTHING;
1902
1903
1904 ctxt->info.vlan_flags |= ICE_AQ_VSI_VLAN_MODE_ALL;
1905
1906 ctxt->info.valid_sections = cpu_to_le16(ICE_AQ_VSI_PROP_VLAN_VALID);
1907
1908 status = ice_update_vsi(hw, vsi->idx, ctxt, NULL);
1909 if (status) {
1910 dev_err(ice_pf_to_dev(vsi->back), "update VSI for VLAN strip failed, ena = %d err %s aq_err %s\n",
1911 ena, ice_stat_str(status),
1912 ice_aq_str(hw->adminq.sq_last_status));
1913 ret = -EIO;
1914 goto out;
1915 }
1916
1917 vsi->info.vlan_flags = ctxt->info.vlan_flags;
1918out:
1919 kfree(ctxt);
1920 return ret;
1921}
1922
1923
1924
1925
1926
1927
1928
1929int ice_vsi_start_all_rx_rings(struct ice_vsi *vsi)
1930{
1931 return ice_vsi_ctrl_all_rx_rings(vsi, true);
1932}
1933
1934
1935
1936
1937
1938
1939
1940int ice_vsi_stop_all_rx_rings(struct ice_vsi *vsi)
1941{
1942 return ice_vsi_ctrl_all_rx_rings(vsi, false);
1943}
1944
1945
1946
1947
1948
1949
1950
1951
1952static int
1953ice_vsi_stop_tx_rings(struct ice_vsi *vsi, enum ice_disq_rst_src rst_src,
1954 u16 rel_vmvf_num, struct ice_ring **rings)
1955{
1956 u16 q_idx;
1957
1958 if (vsi->num_txq > ICE_LAN_TXQ_MAX_QDIS)
1959 return -EINVAL;
1960
1961 for (q_idx = 0; q_idx < vsi->num_txq; q_idx++) {
1962 struct ice_txq_meta txq_meta = { };
1963 int status;
1964
1965 if (!rings || !rings[q_idx])
1966 return -EINVAL;
1967
1968 ice_fill_txq_meta(vsi, rings[q_idx], &txq_meta);
1969 status = ice_vsi_stop_tx_ring(vsi, rst_src, rel_vmvf_num,
1970 rings[q_idx], &txq_meta);
1971
1972 if (status)
1973 return status;
1974 }
1975
1976 return 0;
1977}
1978
1979
1980
1981
1982
1983
1984
1985int
1986ice_vsi_stop_lan_tx_rings(struct ice_vsi *vsi, enum ice_disq_rst_src rst_src,
1987 u16 rel_vmvf_num)
1988{
1989 return ice_vsi_stop_tx_rings(vsi, rst_src, rel_vmvf_num, vsi->tx_rings);
1990}
1991
1992
1993
1994
1995
1996int ice_vsi_stop_xdp_tx_rings(struct ice_vsi *vsi)
1997{
1998 return ice_vsi_stop_tx_rings(vsi, ICE_NO_RESET, 0, vsi->xdp_rings);
1999}
2000
2001
2002
2003
2004
2005
2006
2007bool ice_vsi_is_vlan_pruning_ena(struct ice_vsi *vsi)
2008{
2009 if (!vsi)
2010 return false;
2011
2012 return (vsi->info.sw_flags2 & ICE_AQ_VSI_SW_FLAG_RX_VLAN_PRUNE_ENA);
2013}
2014
2015
2016
2017
2018
2019
2020
2021
2022
2023int ice_cfg_vlan_pruning(struct ice_vsi *vsi, bool ena, bool vlan_promisc)
2024{
2025 struct ice_vsi_ctx *ctxt;
2026 struct ice_pf *pf;
2027 int status;
2028
2029 if (!vsi)
2030 return -EINVAL;
2031
2032
2033
2034
2035
2036 if (vsi->netdev && vsi->netdev->flags & IFF_PROMISC && ena)
2037 return 0;
2038
2039 pf = vsi->back;
2040 ctxt = kzalloc(sizeof(*ctxt), GFP_KERNEL);
2041 if (!ctxt)
2042 return -ENOMEM;
2043
2044 ctxt->info = vsi->info;
2045
2046 if (ena)
2047 ctxt->info.sw_flags2 |= ICE_AQ_VSI_SW_FLAG_RX_VLAN_PRUNE_ENA;
2048 else
2049 ctxt->info.sw_flags2 &= ~ICE_AQ_VSI_SW_FLAG_RX_VLAN_PRUNE_ENA;
2050
2051 if (!vlan_promisc)
2052 ctxt->info.valid_sections =
2053 cpu_to_le16(ICE_AQ_VSI_PROP_SW_VALID);
2054
2055 status = ice_update_vsi(&pf->hw, vsi->idx, ctxt, NULL);
2056 if (status) {
2057 netdev_err(vsi->netdev, "%sabling VLAN pruning on VSI handle: %d, VSI HW ID: %d failed, err = %s, aq_err = %s\n",
2058 ena ? "En" : "Dis", vsi->idx, vsi->vsi_num,
2059 ice_stat_str(status),
2060 ice_aq_str(pf->hw.adminq.sq_last_status));
2061 goto err_out;
2062 }
2063
2064 vsi->info.sw_flags2 = ctxt->info.sw_flags2;
2065
2066 kfree(ctxt);
2067 return 0;
2068
2069err_out:
2070 kfree(ctxt);
2071 return -EIO;
2072}
2073
2074static void ice_vsi_set_tc_cfg(struct ice_vsi *vsi)
2075{
2076 struct ice_dcbx_cfg *cfg = &vsi->port_info->local_dcbx_cfg;
2077
2078 vsi->tc_cfg.ena_tc = ice_dcb_get_ena_tc(cfg);
2079 vsi->tc_cfg.numtc = ice_dcb_get_num_tc(cfg);
2080}
2081
2082
2083
2084
2085
2086static int
2087ice_vsi_set_q_vectors_reg_idx(struct ice_vsi *vsi)
2088{
2089 u16 i;
2090
2091 if (!vsi || !vsi->q_vectors)
2092 return -EINVAL;
2093
2094 ice_for_each_q_vector(vsi, i) {
2095 struct ice_q_vector *q_vector = vsi->q_vectors[i];
2096
2097 if (!q_vector) {
2098 dev_err(ice_pf_to_dev(vsi->back), "Failed to set reg_idx on q_vector %d VSI %d\n",
2099 i, vsi->vsi_num);
2100 goto clear_reg_idx;
2101 }
2102
2103 if (vsi->type == ICE_VSI_VF) {
2104 struct ice_vf *vf = &vsi->back->vf[vsi->vf_id];
2105
2106 q_vector->reg_idx = ice_calc_vf_reg_idx(vf, q_vector);
2107 } else {
2108 q_vector->reg_idx =
2109 q_vector->v_idx + vsi->base_vector;
2110 }
2111 }
2112
2113 return 0;
2114
2115clear_reg_idx:
2116 ice_for_each_q_vector(vsi, i) {
2117 struct ice_q_vector *q_vector = vsi->q_vectors[i];
2118
2119 if (q_vector)
2120 q_vector->reg_idx = 0;
2121 }
2122
2123 return -EINVAL;
2124}
2125
2126
2127
2128
2129
2130
2131
2132void ice_cfg_sw_lldp(struct ice_vsi *vsi, bool tx, bool create)
2133{
2134 enum ice_status (*eth_fltr)(struct ice_vsi *v, u16 type, u16 flag,
2135 enum ice_sw_fwd_act_type act);
2136 struct ice_pf *pf = vsi->back;
2137 enum ice_status status;
2138 struct device *dev;
2139
2140 dev = ice_pf_to_dev(pf);
2141 eth_fltr = create ? ice_fltr_add_eth : ice_fltr_remove_eth;
2142
2143 if (tx)
2144 status = eth_fltr(vsi, ETH_P_LLDP, ICE_FLTR_TX,
2145 ICE_DROP_PACKET);
2146 else
2147 status = eth_fltr(vsi, ETH_P_LLDP, ICE_FLTR_RX, ICE_FWD_TO_VSI);
2148
2149 if (status)
2150 dev_err(dev, "Fail %s %s LLDP rule on VSI %i error: %s\n",
2151 create ? "adding" : "removing", tx ? "TX" : "RX",
2152 vsi->vsi_num, ice_stat_str(status));
2153}
2154
2155
2156
2157
2158
2159
2160
2161
2162
2163
2164
2165
2166
2167
2168
2169struct ice_vsi *
2170ice_vsi_setup(struct ice_pf *pf, struct ice_port_info *pi,
2171 enum ice_vsi_type vsi_type, u16 vf_id)
2172{
2173 u16 max_txqs[ICE_MAX_TRAFFIC_CLASS] = { 0 };
2174 struct device *dev = ice_pf_to_dev(pf);
2175 enum ice_status status;
2176 struct ice_vsi *vsi;
2177 int ret, i;
2178
2179 if (vsi_type == ICE_VSI_VF)
2180 vsi = ice_vsi_alloc(pf, vsi_type, vf_id);
2181 else
2182 vsi = ice_vsi_alloc(pf, vsi_type, ICE_INVAL_VFID);
2183
2184 if (!vsi) {
2185 dev_err(dev, "could not allocate VSI\n");
2186 return NULL;
2187 }
2188
2189 vsi->port_info = pi;
2190 vsi->vsw = pf->first_sw;
2191 if (vsi->type == ICE_VSI_PF)
2192 vsi->ethtype = ETH_P_PAUSE;
2193
2194 if (vsi->type == ICE_VSI_VF)
2195 vsi->vf_id = vf_id;
2196
2197 ice_alloc_fd_res(vsi);
2198
2199 if (ice_vsi_get_qs(vsi)) {
2200 dev_err(dev, "Failed to allocate queues. vsi->idx = %d\n",
2201 vsi->idx);
2202 goto unroll_vsi_alloc;
2203 }
2204
2205
2206 ice_vsi_set_rss_params(vsi);
2207
2208
2209 ice_vsi_set_tc_cfg(vsi);
2210
2211
2212 ret = ice_vsi_init(vsi, true);
2213 if (ret)
2214 goto unroll_get_qs;
2215
2216 switch (vsi->type) {
2217 case ICE_VSI_CTRL:
2218 case ICE_VSI_PF:
2219 ret = ice_vsi_alloc_q_vectors(vsi);
2220 if (ret)
2221 goto unroll_vsi_init;
2222
2223 ret = ice_vsi_setup_vector_base(vsi);
2224 if (ret)
2225 goto unroll_alloc_q_vector;
2226
2227 ret = ice_vsi_set_q_vectors_reg_idx(vsi);
2228 if (ret)
2229 goto unroll_vector_base;
2230
2231 ret = ice_vsi_alloc_rings(vsi);
2232 if (ret)
2233 goto unroll_vector_base;
2234
2235
2236
2237
2238
2239
2240
2241
2242 ret = ice_vsi_add_vlan(vsi, 0, ICE_FWD_TO_VSI);
2243 if (ret)
2244 goto unroll_clear_rings;
2245
2246 ice_vsi_map_rings_to_vectors(vsi);
2247
2248
2249 if (vsi->type != ICE_VSI_CTRL)
2250
2251
2252
2253
2254 if (test_bit(ICE_FLAG_RSS_ENA, pf->flags)) {
2255 ice_vsi_cfg_rss_lut_key(vsi);
2256 ice_vsi_set_rss_flow_fld(vsi);
2257 }
2258 ice_init_arfs(vsi);
2259 break;
2260 case ICE_VSI_VF:
2261
2262
2263
2264
2265
2266 ret = ice_vsi_alloc_q_vectors(vsi);
2267 if (ret)
2268 goto unroll_vsi_init;
2269
2270 ret = ice_vsi_alloc_rings(vsi);
2271 if (ret)
2272 goto unroll_alloc_q_vector;
2273
2274 ret = ice_vsi_set_q_vectors_reg_idx(vsi);
2275 if (ret)
2276 goto unroll_vector_base;
2277
2278
2279
2280
2281
2282 if (test_bit(ICE_FLAG_RSS_ENA, pf->flags)) {
2283 ice_vsi_cfg_rss_lut_key(vsi);
2284 ice_vsi_set_vf_rss_flow_fld(vsi);
2285 }
2286 break;
2287 case ICE_VSI_LB:
2288 ret = ice_vsi_alloc_rings(vsi);
2289 if (ret)
2290 goto unroll_vsi_init;
2291 break;
2292 default:
2293
2294 goto unroll_vsi_init;
2295 }
2296
2297
2298 for (i = 0; i < vsi->tc_cfg.numtc; i++)
2299 max_txqs[i] = vsi->alloc_txq;
2300
2301 status = ice_cfg_vsi_lan(vsi->port_info, vsi->idx, vsi->tc_cfg.ena_tc,
2302 max_txqs);
2303 if (status) {
2304 dev_err(dev, "VSI %d failed lan queue config, error %s\n",
2305 vsi->vsi_num, ice_stat_str(status));
2306 goto unroll_clear_rings;
2307 }
2308
2309
2310
2311
2312
2313
2314
2315
2316
2317
2318 if (!ice_is_safe_mode(pf))
2319 if (vsi->type == ICE_VSI_PF) {
2320 ice_fltr_add_eth(vsi, ETH_P_PAUSE, ICE_FLTR_TX,
2321 ICE_DROP_PACKET);
2322 ice_cfg_sw_lldp(vsi, true, true);
2323 }
2324
2325 return vsi;
2326
2327unroll_clear_rings:
2328 ice_vsi_clear_rings(vsi);
2329unroll_vector_base:
2330
2331 ice_free_res(pf->irq_tracker, vsi->base_vector, vsi->idx);
2332 pf->num_avail_sw_msix += vsi->num_q_vectors;
2333unroll_alloc_q_vector:
2334 ice_vsi_free_q_vectors(vsi);
2335unroll_vsi_init:
2336 ice_vsi_delete(vsi);
2337unroll_get_qs:
2338 ice_vsi_put_qs(vsi);
2339unroll_vsi_alloc:
2340 ice_vsi_clear(vsi);
2341
2342 return NULL;
2343}
2344
2345
2346
2347
2348
2349static void ice_vsi_release_msix(struct ice_vsi *vsi)
2350{
2351 struct ice_pf *pf = vsi->back;
2352 struct ice_hw *hw = &pf->hw;
2353 u32 txq = 0;
2354 u32 rxq = 0;
2355 int i, q;
2356
2357 for (i = 0; i < vsi->num_q_vectors; i++) {
2358 struct ice_q_vector *q_vector = vsi->q_vectors[i];
2359 u16 reg_idx = q_vector->reg_idx;
2360
2361 wr32(hw, GLINT_ITR(ICE_IDX_ITR0, reg_idx), 0);
2362 wr32(hw, GLINT_ITR(ICE_IDX_ITR1, reg_idx), 0);
2363 for (q = 0; q < q_vector->num_ring_tx; q++) {
2364 wr32(hw, QINT_TQCTL(vsi->txq_map[txq]), 0);
2365 if (ice_is_xdp_ena_vsi(vsi)) {
2366 u32 xdp_txq = txq + vsi->num_xdp_txq;
2367
2368 wr32(hw, QINT_TQCTL(vsi->txq_map[xdp_txq]), 0);
2369 }
2370 txq++;
2371 }
2372
2373 for (q = 0; q < q_vector->num_ring_rx; q++) {
2374 wr32(hw, QINT_RQCTL(vsi->rxq_map[rxq]), 0);
2375 rxq++;
2376 }
2377 }
2378
2379 ice_flush(hw);
2380}
2381
2382
2383
2384
2385
2386void ice_vsi_free_irq(struct ice_vsi *vsi)
2387{
2388 struct ice_pf *pf = vsi->back;
2389 int base = vsi->base_vector;
2390 int i;
2391
2392 if (!vsi->q_vectors || !vsi->irqs_ready)
2393 return;
2394
2395 ice_vsi_release_msix(vsi);
2396 if (vsi->type == ICE_VSI_VF)
2397 return;
2398
2399 vsi->irqs_ready = false;
2400 ice_for_each_q_vector(vsi, i) {
2401 u16 vector = i + base;
2402 int irq_num;
2403
2404 irq_num = pf->msix_entries[vector].vector;
2405
2406
2407 if (!vsi->q_vectors[i] ||
2408 !(vsi->q_vectors[i]->num_ring_tx ||
2409 vsi->q_vectors[i]->num_ring_rx))
2410 continue;
2411
2412
2413 irq_set_affinity_notifier(irq_num, NULL);
2414
2415
2416 irq_set_affinity_hint(irq_num, NULL);
2417 synchronize_irq(irq_num);
2418 devm_free_irq(ice_pf_to_dev(pf), irq_num, vsi->q_vectors[i]);
2419 }
2420}
2421
2422
2423
2424
2425
2426void ice_vsi_free_tx_rings(struct ice_vsi *vsi)
2427{
2428 int i;
2429
2430 if (!vsi->tx_rings)
2431 return;
2432
2433 ice_for_each_txq(vsi, i)
2434 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2435 ice_free_tx_ring(vsi->tx_rings[i]);
2436}
2437
2438
2439
2440
2441
2442void ice_vsi_free_rx_rings(struct ice_vsi *vsi)
2443{
2444 int i;
2445
2446 if (!vsi->rx_rings)
2447 return;
2448
2449 ice_for_each_rxq(vsi, i)
2450 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2451 ice_free_rx_ring(vsi->rx_rings[i]);
2452}
2453
2454
2455
2456
2457
2458void ice_vsi_close(struct ice_vsi *vsi)
2459{
2460 if (!test_and_set_bit(__ICE_DOWN, vsi->state))
2461 ice_down(vsi);
2462
2463 ice_vsi_free_irq(vsi);
2464 ice_vsi_free_tx_rings(vsi);
2465 ice_vsi_free_rx_rings(vsi);
2466}
2467
2468
2469
2470
2471
2472
2473int ice_ena_vsi(struct ice_vsi *vsi, bool locked)
2474{
2475 int err = 0;
2476
2477 if (!test_bit(__ICE_NEEDS_RESTART, vsi->state))
2478 return 0;
2479
2480 clear_bit(__ICE_NEEDS_RESTART, vsi->state);
2481
2482 if (vsi->netdev && vsi->type == ICE_VSI_PF) {
2483 if (netif_running(vsi->netdev)) {
2484 if (!locked)
2485 rtnl_lock();
2486
2487 err = ice_open(vsi->netdev);
2488
2489 if (!locked)
2490 rtnl_unlock();
2491 }
2492 } else if (vsi->type == ICE_VSI_CTRL) {
2493 err = ice_vsi_open_ctrl(vsi);
2494 }
2495
2496 return err;
2497}
2498
2499
2500
2501
2502
2503
2504void ice_dis_vsi(struct ice_vsi *vsi, bool locked)
2505{
2506 if (test_bit(__ICE_DOWN, vsi->state))
2507 return;
2508
2509 set_bit(__ICE_NEEDS_RESTART, vsi->state);
2510
2511 if (vsi->type == ICE_VSI_PF && vsi->netdev) {
2512 if (netif_running(vsi->netdev)) {
2513 if (!locked)
2514 rtnl_lock();
2515
2516 ice_stop(vsi->netdev);
2517
2518 if (!locked)
2519 rtnl_unlock();
2520 } else {
2521 ice_vsi_close(vsi);
2522 }
2523 } else if (vsi->type == ICE_VSI_CTRL) {
2524 ice_vsi_close(vsi);
2525 }
2526}
2527
2528
2529
2530
2531
2532void ice_vsi_dis_irq(struct ice_vsi *vsi)
2533{
2534 int base = vsi->base_vector;
2535 struct ice_pf *pf = vsi->back;
2536 struct ice_hw *hw = &pf->hw;
2537 u32 val;
2538 int i;
2539
2540
2541 if (vsi->tx_rings) {
2542 ice_for_each_txq(vsi, i) {
2543 if (vsi->tx_rings[i]) {
2544 u16 reg;
2545
2546 reg = vsi->tx_rings[i]->reg_idx;
2547 val = rd32(hw, QINT_TQCTL(reg));
2548 val &= ~QINT_TQCTL_CAUSE_ENA_M;
2549 wr32(hw, QINT_TQCTL(reg), val);
2550 }
2551 }
2552 }
2553
2554 if (vsi->rx_rings) {
2555 ice_for_each_rxq(vsi, i) {
2556 if (vsi->rx_rings[i]) {
2557 u16 reg;
2558
2559 reg = vsi->rx_rings[i]->reg_idx;
2560 val = rd32(hw, QINT_RQCTL(reg));
2561 val &= ~QINT_RQCTL_CAUSE_ENA_M;
2562 wr32(hw, QINT_RQCTL(reg), val);
2563 }
2564 }
2565 }
2566
2567
2568 ice_for_each_q_vector(vsi, i) {
2569 if (!vsi->q_vectors[i])
2570 continue;
2571 wr32(hw, GLINT_DYN_CTL(vsi->q_vectors[i]->reg_idx), 0);
2572 }
2573
2574 ice_flush(hw);
2575
2576
2577 if (vsi->type == ICE_VSI_VF)
2578 return;
2579
2580 ice_for_each_q_vector(vsi, i)
2581 synchronize_irq(pf->msix_entries[i + base].vector);
2582}
2583
2584
2585
2586
2587
2588void ice_napi_del(struct ice_vsi *vsi)
2589{
2590 int v_idx;
2591
2592 if (!vsi->netdev)
2593 return;
2594
2595 ice_for_each_q_vector(vsi, v_idx)
2596 netif_napi_del(&vsi->q_vectors[v_idx]->napi);
2597}
2598
2599
2600
2601
2602
2603
2604
2605int ice_vsi_release(struct ice_vsi *vsi)
2606{
2607 struct ice_pf *pf;
2608
2609 if (!vsi->back)
2610 return -ENODEV;
2611 pf = vsi->back;
2612
2613
2614
2615
2616
2617
2618
2619 if (vsi->netdev && !ice_is_reset_in_progress(pf->state))
2620 unregister_netdev(vsi->netdev);
2621
2622 if (test_bit(ICE_FLAG_RSS_ENA, pf->flags))
2623 ice_rss_clean(vsi);
2624
2625
2626 if (vsi->type != ICE_VSI_LB)
2627 ice_vsi_dis_irq(vsi);
2628 ice_vsi_close(vsi);
2629
2630
2631
2632
2633
2634
2635 if (vsi->type != ICE_VSI_VF) {
2636
2637 ice_free_res(pf->irq_tracker, vsi->base_vector, vsi->idx);
2638 pf->num_avail_sw_msix += vsi->num_q_vectors;
2639 }
2640
2641 if (!ice_is_safe_mode(pf)) {
2642 if (vsi->type == ICE_VSI_PF) {
2643 ice_fltr_remove_eth(vsi, ETH_P_PAUSE, ICE_FLTR_TX,
2644 ICE_DROP_PACKET);
2645 ice_cfg_sw_lldp(vsi, true, false);
2646
2647
2648
2649 if (!test_bit(ICE_FLAG_FW_LLDP_AGENT, pf->flags))
2650 ice_cfg_sw_lldp(vsi, false, false);
2651 }
2652 }
2653
2654 ice_fltr_remove_all(vsi);
2655 ice_rm_vsi_lan_cfg(vsi->port_info, vsi->idx);
2656 ice_vsi_delete(vsi);
2657 ice_vsi_free_q_vectors(vsi);
2658
2659
2660 if (vsi->netdev && test_bit(__ICE_DOWN, vsi->state)) {
2661 free_netdev(vsi->netdev);
2662 vsi->netdev = NULL;
2663 }
2664
2665 ice_vsi_clear_rings(vsi);
2666
2667 ice_vsi_put_qs(vsi);
2668
2669
2670
2671
2672
2673 if (!ice_is_reset_in_progress(pf->state))
2674 ice_vsi_clear(vsi);
2675
2676 return 0;
2677}
2678
2679
2680
2681
2682
2683
2684
2685
2686static void
2687ice_vsi_rebuild_update_coalesce(struct ice_q_vector *q_vector,
2688 struct ice_coalesce_stored *coalesce)
2689{
2690 struct ice_ring_container *rx_rc = &q_vector->rx;
2691 struct ice_ring_container *tx_rc = &q_vector->tx;
2692 struct ice_hw *hw = &q_vector->vsi->back->hw;
2693
2694 tx_rc->itr_setting = coalesce->itr_tx;
2695 rx_rc->itr_setting = coalesce->itr_rx;
2696
2697
2698 if (!ITR_IS_DYNAMIC(tx_rc->itr_setting))
2699 wr32(hw, GLINT_ITR(tx_rc->itr_idx, q_vector->reg_idx),
2700 ITR_REG_ALIGN(tx_rc->itr_setting) >>
2701 ICE_ITR_GRAN_S);
2702 if (!ITR_IS_DYNAMIC(rx_rc->itr_setting))
2703 wr32(hw, GLINT_ITR(rx_rc->itr_idx, q_vector->reg_idx),
2704 ITR_REG_ALIGN(rx_rc->itr_setting) >>
2705 ICE_ITR_GRAN_S);
2706
2707 q_vector->intrl = coalesce->intrl;
2708 wr32(hw, GLINT_RATE(q_vector->reg_idx),
2709 ice_intrl_usec_to_reg(q_vector->intrl, hw->intrl_gran));
2710}
2711
2712
2713
2714
2715
2716
2717
2718
2719static int
2720ice_vsi_rebuild_get_coalesce(struct ice_vsi *vsi,
2721 struct ice_coalesce_stored *coalesce)
2722{
2723 int i;
2724
2725 ice_for_each_q_vector(vsi, i) {
2726 struct ice_q_vector *q_vector = vsi->q_vectors[i];
2727
2728 coalesce[i].itr_tx = q_vector->tx.itr_setting;
2729 coalesce[i].itr_rx = q_vector->rx.itr_setting;
2730 coalesce[i].intrl = q_vector->intrl;
2731 }
2732
2733 return vsi->num_q_vectors;
2734}
2735
2736
2737
2738
2739
2740
2741
2742
2743
2744
2745
2746static void
2747ice_vsi_rebuild_set_coalesce(struct ice_vsi *vsi,
2748 struct ice_coalesce_stored *coalesce, int size)
2749{
2750 int i;
2751
2752 if ((size && !coalesce) || !vsi)
2753 return;
2754
2755 for (i = 0; i < size && i < vsi->num_q_vectors; i++)
2756 ice_vsi_rebuild_update_coalesce(vsi->q_vectors[i],
2757 &coalesce[i]);
2758
2759
2760
2761
2762
2763 for (; i < vsi->num_q_vectors; i++)
2764 ice_vsi_rebuild_update_coalesce(vsi->q_vectors[i],
2765 &coalesce[0]);
2766}
2767
2768
2769
2770
2771
2772
2773
2774
2775int ice_vsi_rebuild(struct ice_vsi *vsi, bool init_vsi)
2776{
2777 u16 max_txqs[ICE_MAX_TRAFFIC_CLASS] = { 0 };
2778 struct ice_coalesce_stored *coalesce;
2779 int prev_num_q_vectors = 0;
2780 struct ice_vf *vf = NULL;
2781 enum ice_status status;
2782 struct ice_pf *pf;
2783 int ret, i;
2784
2785 if (!vsi)
2786 return -EINVAL;
2787
2788 pf = vsi->back;
2789 if (vsi->type == ICE_VSI_VF)
2790 vf = &pf->vf[vsi->vf_id];
2791
2792 coalesce = kcalloc(vsi->num_q_vectors,
2793 sizeof(struct ice_coalesce_stored), GFP_KERNEL);
2794 if (coalesce)
2795 prev_num_q_vectors = ice_vsi_rebuild_get_coalesce(vsi,
2796 coalesce);
2797 ice_rm_vsi_lan_cfg(vsi->port_info, vsi->idx);
2798 ice_vsi_free_q_vectors(vsi);
2799
2800
2801
2802
2803
2804
2805 if (vsi->type != ICE_VSI_VF) {
2806
2807 ice_free_res(pf->irq_tracker, vsi->base_vector, vsi->idx);
2808 pf->num_avail_sw_msix += vsi->num_q_vectors;
2809 vsi->base_vector = 0;
2810 }
2811
2812 if (ice_is_xdp_ena_vsi(vsi))
2813
2814
2815
2816 ice_destroy_xdp_rings(vsi);
2817 ice_vsi_put_qs(vsi);
2818 ice_vsi_clear_rings(vsi);
2819 ice_vsi_free_arrays(vsi);
2820 if (vsi->type == ICE_VSI_VF)
2821 ice_vsi_set_num_qs(vsi, vf->vf_id);
2822 else
2823 ice_vsi_set_num_qs(vsi, ICE_INVAL_VFID);
2824
2825 ret = ice_vsi_alloc_arrays(vsi);
2826 if (ret < 0)
2827 goto err_vsi;
2828
2829 ice_vsi_get_qs(vsi);
2830
2831 ice_alloc_fd_res(vsi);
2832 ice_vsi_set_tc_cfg(vsi);
2833
2834
2835 ret = ice_vsi_init(vsi, init_vsi);
2836 if (ret < 0)
2837 goto err_vsi;
2838
2839 switch (vsi->type) {
2840 case ICE_VSI_CTRL:
2841 case ICE_VSI_PF:
2842 ret = ice_vsi_alloc_q_vectors(vsi);
2843 if (ret)
2844 goto err_rings;
2845
2846 ret = ice_vsi_setup_vector_base(vsi);
2847 if (ret)
2848 goto err_vectors;
2849
2850 ret = ice_vsi_set_q_vectors_reg_idx(vsi);
2851 if (ret)
2852 goto err_vectors;
2853
2854 ret = ice_vsi_alloc_rings(vsi);
2855 if (ret)
2856 goto err_vectors;
2857
2858 ice_vsi_map_rings_to_vectors(vsi);
2859 if (ice_is_xdp_ena_vsi(vsi)) {
2860 vsi->num_xdp_txq = vsi->alloc_rxq;
2861 ret = ice_prepare_xdp_rings(vsi, vsi->xdp_prog);
2862 if (ret)
2863 goto err_vectors;
2864 }
2865
2866 if (vsi->type != ICE_VSI_CTRL)
2867
2868
2869
2870
2871 if (test_bit(ICE_FLAG_RSS_ENA, pf->flags))
2872 ice_vsi_cfg_rss_lut_key(vsi);
2873 break;
2874 case ICE_VSI_VF:
2875 ret = ice_vsi_alloc_q_vectors(vsi);
2876 if (ret)
2877 goto err_rings;
2878
2879 ret = ice_vsi_set_q_vectors_reg_idx(vsi);
2880 if (ret)
2881 goto err_vectors;
2882
2883 ret = ice_vsi_alloc_rings(vsi);
2884 if (ret)
2885 goto err_vectors;
2886
2887 break;
2888 default:
2889 break;
2890 }
2891
2892
2893 for (i = 0; i < vsi->tc_cfg.numtc; i++) {
2894 max_txqs[i] = vsi->alloc_txq;
2895
2896 if (ice_is_xdp_ena_vsi(vsi))
2897 max_txqs[i] += vsi->num_xdp_txq;
2898 }
2899
2900 status = ice_cfg_vsi_lan(vsi->port_info, vsi->idx, vsi->tc_cfg.ena_tc,
2901 max_txqs);
2902 if (status) {
2903 dev_err(ice_pf_to_dev(pf), "VSI %d failed lan queue config, error %s\n",
2904 vsi->vsi_num, ice_stat_str(status));
2905 if (init_vsi) {
2906 ret = -EIO;
2907 goto err_vectors;
2908 } else {
2909 return ice_schedule_reset(pf, ICE_RESET_PFR);
2910 }
2911 }
2912 ice_vsi_rebuild_set_coalesce(vsi, coalesce, prev_num_q_vectors);
2913 kfree(coalesce);
2914
2915 return 0;
2916
2917err_vectors:
2918 ice_vsi_free_q_vectors(vsi);
2919err_rings:
2920 if (vsi->netdev) {
2921 vsi->current_netdev_flags = 0;
2922 unregister_netdev(vsi->netdev);
2923 free_netdev(vsi->netdev);
2924 vsi->netdev = NULL;
2925 }
2926err_vsi:
2927 ice_vsi_clear(vsi);
2928 set_bit(__ICE_RESET_FAILED, pf->state);
2929 kfree(coalesce);
2930 return ret;
2931}
2932
2933
2934
2935
2936
2937bool ice_is_reset_in_progress(unsigned long *state)
2938{
2939 return test_bit(__ICE_RESET_OICR_RECV, state) ||
2940 test_bit(__ICE_DCBNL_DEVRESET, state) ||
2941 test_bit(__ICE_PFR_REQ, state) ||
2942 test_bit(__ICE_CORER_REQ, state) ||
2943 test_bit(__ICE_GLOBR_REQ, state);
2944}
2945
2946#ifdef CONFIG_DCB
2947
2948
2949
2950
2951
2952static void ice_vsi_update_q_map(struct ice_vsi *vsi, struct ice_vsi_ctx *ctx)
2953{
2954 vsi->info.mapping_flags = ctx->info.mapping_flags;
2955 memcpy(&vsi->info.q_mapping, &ctx->info.q_mapping,
2956 sizeof(vsi->info.q_mapping));
2957 memcpy(&vsi->info.tc_mapping, ctx->info.tc_mapping,
2958 sizeof(vsi->info.tc_mapping));
2959}
2960
2961
2962
2963
2964
2965
2966
2967
2968int ice_vsi_cfg_tc(struct ice_vsi *vsi, u8 ena_tc)
2969{
2970 u16 max_txqs[ICE_MAX_TRAFFIC_CLASS] = { 0 };
2971 struct ice_pf *pf = vsi->back;
2972 struct ice_vsi_ctx *ctx;
2973 enum ice_status status;
2974 struct device *dev;
2975 int i, ret = 0;
2976 u8 num_tc = 0;
2977
2978 dev = ice_pf_to_dev(pf);
2979
2980 ice_for_each_traffic_class(i) {
2981
2982 if (ena_tc & BIT(i))
2983 num_tc++;
2984
2985 max_txqs[i] = vsi->alloc_txq;
2986 }
2987
2988 vsi->tc_cfg.ena_tc = ena_tc;
2989 vsi->tc_cfg.numtc = num_tc;
2990
2991 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
2992 if (!ctx)
2993 return -ENOMEM;
2994
2995 ctx->vf_num = 0;
2996 ctx->info = vsi->info;
2997
2998 ice_vsi_setup_q_map(vsi, ctx);
2999
3000
3001 ctx->info.valid_sections = cpu_to_le16(ICE_AQ_VSI_PROP_RXQ_MAP_VALID);
3002 status = ice_update_vsi(&pf->hw, vsi->idx, ctx, NULL);
3003 if (status) {
3004 dev_info(dev, "Failed VSI Update\n");
3005 ret = -EIO;
3006 goto out;
3007 }
3008
3009 status = ice_cfg_vsi_lan(vsi->port_info, vsi->idx, vsi->tc_cfg.ena_tc,
3010 max_txqs);
3011
3012 if (status) {
3013 dev_err(dev, "VSI %d failed TC config, error %s\n",
3014 vsi->vsi_num, ice_stat_str(status));
3015 ret = -EIO;
3016 goto out;
3017 }
3018 ice_vsi_update_q_map(vsi, ctx);
3019 vsi->info.valid_sections = 0;
3020
3021 ice_vsi_cfg_netdev_tc(vsi, ena_tc);
3022out:
3023 kfree(ctx);
3024 return ret;
3025}
3026#endif
3027
3028
3029
3030
3031
3032
3033
3034
3035
3036
3037static void
3038ice_update_ring_stats(struct ice_ring *ring, struct ice_ring_container *cont,
3039 u64 pkts, u64 bytes)
3040{
3041 ring->stats.bytes += bytes;
3042 ring->stats.pkts += pkts;
3043 cont->total_bytes += bytes;
3044 cont->total_pkts += pkts;
3045}
3046
3047
3048
3049
3050
3051
3052
3053void ice_update_tx_ring_stats(struct ice_ring *tx_ring, u64 pkts, u64 bytes)
3054{
3055 u64_stats_update_begin(&tx_ring->syncp);
3056 ice_update_ring_stats(tx_ring, &tx_ring->q_vector->tx, pkts, bytes);
3057 u64_stats_update_end(&tx_ring->syncp);
3058}
3059
3060
3061
3062
3063
3064
3065
3066void ice_update_rx_ring_stats(struct ice_ring *rx_ring, u64 pkts, u64 bytes)
3067{
3068 u64_stats_update_begin(&rx_ring->syncp);
3069 ice_update_ring_stats(rx_ring, &rx_ring->q_vector->rx, pkts, bytes);
3070 u64_stats_update_end(&rx_ring->syncp);
3071}
3072
3073
3074
3075
3076
3077int ice_status_to_errno(enum ice_status err)
3078{
3079 switch (err) {
3080 case ICE_SUCCESS:
3081 return 0;
3082 case ICE_ERR_DOES_NOT_EXIST:
3083 return -ENOENT;
3084 case ICE_ERR_OUT_OF_RANGE:
3085 return -ENOTTY;
3086 case ICE_ERR_PARAM:
3087 return -EINVAL;
3088 case ICE_ERR_NO_MEMORY:
3089 return -ENOMEM;
3090 case ICE_ERR_MAX_LIMIT:
3091 return -EAGAIN;
3092 default:
3093 return -EINVAL;
3094 }
3095}
3096
3097
3098
3099
3100
3101
3102
3103
3104bool ice_is_dflt_vsi_in_use(struct ice_sw *sw)
3105{
3106 return (sw->dflt_vsi && sw->dflt_vsi_ena);
3107}
3108
3109
3110
3111
3112
3113
3114
3115
3116
3117bool ice_is_vsi_dflt_vsi(struct ice_sw *sw, struct ice_vsi *vsi)
3118{
3119 return (sw->dflt_vsi == vsi && sw->dflt_vsi_ena);
3120}
3121
3122
3123
3124
3125
3126
3127
3128
3129
3130
3131
3132
3133
3134
3135
3136int ice_set_dflt_vsi(struct ice_sw *sw, struct ice_vsi *vsi)
3137{
3138 enum ice_status status;
3139 struct device *dev;
3140
3141 if (!sw || !vsi)
3142 return -EINVAL;
3143
3144 dev = ice_pf_to_dev(vsi->back);
3145
3146
3147 if (ice_is_vsi_dflt_vsi(sw, vsi)) {
3148 dev_dbg(dev, "VSI %d passed in is already the default forwarding VSI, nothing to do\n",
3149 vsi->vsi_num);
3150 return 0;
3151 }
3152
3153
3154 if (ice_is_dflt_vsi_in_use(sw)) {
3155 dev_err(dev, "Default forwarding VSI %d already in use, disable it and try again\n",
3156 sw->dflt_vsi->vsi_num);
3157 return -EEXIST;
3158 }
3159
3160 status = ice_cfg_dflt_vsi(&vsi->back->hw, vsi->idx, true, ICE_FLTR_RX);
3161 if (status) {
3162 dev_err(dev, "Failed to set VSI %d as the default forwarding VSI, error %s\n",
3163 vsi->vsi_num, ice_stat_str(status));
3164 return -EIO;
3165 }
3166
3167 sw->dflt_vsi = vsi;
3168 sw->dflt_vsi_ena = true;
3169
3170 return 0;
3171}
3172
3173
3174
3175
3176
3177
3178
3179
3180
3181int ice_clear_dflt_vsi(struct ice_sw *sw)
3182{
3183 struct ice_vsi *dflt_vsi;
3184 enum ice_status status;
3185 struct device *dev;
3186
3187 if (!sw)
3188 return -EINVAL;
3189
3190 dev = ice_pf_to_dev(sw->pf);
3191
3192 dflt_vsi = sw->dflt_vsi;
3193
3194
3195 if (!ice_is_dflt_vsi_in_use(sw))
3196 return -ENODEV;
3197
3198 status = ice_cfg_dflt_vsi(&dflt_vsi->back->hw, dflt_vsi->idx, false,
3199 ICE_FLTR_RX);
3200 if (status) {
3201 dev_err(dev, "Failed to clear the default forwarding VSI %d, error %s\n",
3202 dflt_vsi->vsi_num, ice_stat_str(status));
3203 return -EIO;
3204 }
3205
3206 sw->dflt_vsi = NULL;
3207 sw->dflt_vsi_ena = false;
3208
3209 return 0;
3210}
3211