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11#include "net_driver.h"
12#include <linux/module.h>
13#include <linux/netdevice.h>
14#include "efx_common.h"
15#include "efx_channels.h"
16#include "efx.h"
17#include "mcdi.h"
18#include "selftest.h"
19#include "rx_common.h"
20#include "tx_common.h"
21#include "nic.h"
22#include "io.h"
23#include "mcdi_pcol.h"
24
25static unsigned int debug = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
26 NETIF_MSG_LINK | NETIF_MSG_IFDOWN |
27 NETIF_MSG_IFUP | NETIF_MSG_RX_ERR |
28 NETIF_MSG_TX_ERR | NETIF_MSG_HW);
29module_param(debug, uint, 0);
30MODULE_PARM_DESC(debug, "Bitmapped debugging message enable value");
31
32
33
34
35
36
37
38
39
40static unsigned int efx_monitor_interval = 1 * HZ;
41
42
43
44
45#define BIST_WAIT_DELAY_MS 100
46#define BIST_WAIT_DELAY_COUNT 100
47
48
49#define STATS_PERIOD_MS_DEFAULT 1000
50
51const unsigned int efx_reset_type_max = RESET_TYPE_MAX;
52const char *const efx_reset_type_names[] = {
53 [RESET_TYPE_INVISIBLE] = "INVISIBLE",
54 [RESET_TYPE_ALL] = "ALL",
55 [RESET_TYPE_RECOVER_OR_ALL] = "RECOVER_OR_ALL",
56 [RESET_TYPE_WORLD] = "WORLD",
57 [RESET_TYPE_RECOVER_OR_DISABLE] = "RECOVER_OR_DISABLE",
58 [RESET_TYPE_DATAPATH] = "DATAPATH",
59 [RESET_TYPE_MC_BIST] = "MC_BIST",
60 [RESET_TYPE_DISABLE] = "DISABLE",
61 [RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG",
62 [RESET_TYPE_INT_ERROR] = "INT_ERROR",
63 [RESET_TYPE_DMA_ERROR] = "DMA_ERROR",
64 [RESET_TYPE_TX_SKIP] = "TX_SKIP",
65 [RESET_TYPE_MC_FAILURE] = "MC_FAILURE",
66 [RESET_TYPE_MCDI_TIMEOUT] = "MCDI_TIMEOUT (FLR)",
67};
68
69#define RESET_TYPE(type) \
70 STRING_TABLE_LOOKUP(type, efx_reset_type)
71
72
73const unsigned int efx_loopback_mode_max = LOOPBACK_MAX;
74const char *const efx_loopback_mode_names[] = {
75 [LOOPBACK_NONE] = "NONE",
76 [LOOPBACK_DATA] = "DATAPATH",
77 [LOOPBACK_GMAC] = "GMAC",
78 [LOOPBACK_XGMII] = "XGMII",
79 [LOOPBACK_XGXS] = "XGXS",
80 [LOOPBACK_XAUI] = "XAUI",
81 [LOOPBACK_GMII] = "GMII",
82 [LOOPBACK_SGMII] = "SGMII",
83 [LOOPBACK_XGBR] = "XGBR",
84 [LOOPBACK_XFI] = "XFI",
85 [LOOPBACK_XAUI_FAR] = "XAUI_FAR",
86 [LOOPBACK_GMII_FAR] = "GMII_FAR",
87 [LOOPBACK_SGMII_FAR] = "SGMII_FAR",
88 [LOOPBACK_XFI_FAR] = "XFI_FAR",
89 [LOOPBACK_GPHY] = "GPHY",
90 [LOOPBACK_PHYXS] = "PHYXS",
91 [LOOPBACK_PCS] = "PCS",
92 [LOOPBACK_PMAPMD] = "PMA/PMD",
93 [LOOPBACK_XPORT] = "XPORT",
94 [LOOPBACK_XGMII_WS] = "XGMII_WS",
95 [LOOPBACK_XAUI_WS] = "XAUI_WS",
96 [LOOPBACK_XAUI_WS_FAR] = "XAUI_WS_FAR",
97 [LOOPBACK_XAUI_WS_NEAR] = "XAUI_WS_NEAR",
98 [LOOPBACK_GMII_WS] = "GMII_WS",
99 [LOOPBACK_XFI_WS] = "XFI_WS",
100 [LOOPBACK_XFI_WS_FAR] = "XFI_WS_FAR",
101 [LOOPBACK_PHYXS_WS] = "PHYXS_WS",
102};
103
104
105
106
107
108static struct workqueue_struct *reset_workqueue;
109
110int efx_create_reset_workqueue(void)
111{
112 reset_workqueue = create_singlethread_workqueue("sfc_reset");
113 if (!reset_workqueue) {
114 printk(KERN_ERR "Failed to create reset workqueue\n");
115 return -ENOMEM;
116 }
117
118 return 0;
119}
120
121void efx_queue_reset_work(struct efx_nic *efx)
122{
123 queue_work(reset_workqueue, &efx->reset_work);
124}
125
126void efx_flush_reset_workqueue(struct efx_nic *efx)
127{
128 cancel_work_sync(&efx->reset_work);
129}
130
131void efx_destroy_reset_workqueue(void)
132{
133 if (reset_workqueue) {
134 destroy_workqueue(reset_workqueue);
135 reset_workqueue = NULL;
136 }
137}
138
139
140
141
142void efx_mac_reconfigure(struct efx_nic *efx, bool mtu_only)
143{
144 if (efx->type->reconfigure_mac) {
145 down_read(&efx->filter_sem);
146 efx->type->reconfigure_mac(efx, mtu_only);
147 up_read(&efx->filter_sem);
148 }
149}
150
151
152
153
154
155static void efx_mac_work(struct work_struct *data)
156{
157 struct efx_nic *efx = container_of(data, struct efx_nic, mac_work);
158
159 mutex_lock(&efx->mac_lock);
160 if (efx->port_enabled)
161 efx_mac_reconfigure(efx, false);
162 mutex_unlock(&efx->mac_lock);
163}
164
165int efx_set_mac_address(struct net_device *net_dev, void *data)
166{
167 struct efx_nic *efx = netdev_priv(net_dev);
168 struct sockaddr *addr = data;
169 u8 *new_addr = addr->sa_data;
170 u8 old_addr[6];
171 int rc;
172
173 if (!is_valid_ether_addr(new_addr)) {
174 netif_err(efx, drv, efx->net_dev,
175 "invalid ethernet MAC address requested: %pM\n",
176 new_addr);
177 return -EADDRNOTAVAIL;
178 }
179
180
181 ether_addr_copy(old_addr, net_dev->dev_addr);
182 ether_addr_copy(net_dev->dev_addr, new_addr);
183 if (efx->type->set_mac_address) {
184 rc = efx->type->set_mac_address(efx);
185 if (rc) {
186 ether_addr_copy(net_dev->dev_addr, old_addr);
187 return rc;
188 }
189 }
190
191
192 mutex_lock(&efx->mac_lock);
193 efx_mac_reconfigure(efx, false);
194 mutex_unlock(&efx->mac_lock);
195
196 return 0;
197}
198
199
200void efx_set_rx_mode(struct net_device *net_dev)
201{
202 struct efx_nic *efx = netdev_priv(net_dev);
203
204 if (efx->port_enabled)
205 queue_work(efx->workqueue, &efx->mac_work);
206
207}
208
209int efx_set_features(struct net_device *net_dev, netdev_features_t data)
210{
211 struct efx_nic *efx = netdev_priv(net_dev);
212 int rc;
213
214
215 if (net_dev->features & ~data & NETIF_F_NTUPLE) {
216 rc = efx->type->filter_clear_rx(efx, EFX_FILTER_PRI_MANUAL);
217 if (rc)
218 return rc;
219 }
220
221
222
223
224 if ((net_dev->features ^ data) & (NETIF_F_HW_VLAN_CTAG_FILTER |
225 NETIF_F_RXFCS)) {
226
227
228
229 efx_set_rx_mode(net_dev);
230 }
231
232 return 0;
233}
234
235
236
237
238
239void efx_link_status_changed(struct efx_nic *efx)
240{
241 struct efx_link_state *link_state = &efx->link_state;
242
243
244
245
246
247
248 if (!netif_running(efx->net_dev))
249 return;
250
251 if (link_state->up != netif_carrier_ok(efx->net_dev)) {
252 efx->n_link_state_changes++;
253
254 if (link_state->up)
255 netif_carrier_on(efx->net_dev);
256 else
257 netif_carrier_off(efx->net_dev);
258 }
259
260
261 if (link_state->up)
262 netif_info(efx, link, efx->net_dev,
263 "link up at %uMbps %s-duplex (MTU %d)\n",
264 link_state->speed, link_state->fd ? "full" : "half",
265 efx->net_dev->mtu);
266 else
267 netif_info(efx, link, efx->net_dev, "link down\n");
268}
269
270unsigned int efx_xdp_max_mtu(struct efx_nic *efx)
271{
272
273
274
275 int overhead = EFX_MAX_FRAME_LEN(0) + sizeof(struct efx_rx_page_state) +
276 efx->rx_prefix_size + efx->type->rx_buffer_padding +
277 efx->rx_ip_align + EFX_XDP_HEADROOM + EFX_XDP_TAILROOM;
278
279 return PAGE_SIZE - overhead;
280}
281
282
283int efx_change_mtu(struct net_device *net_dev, int new_mtu)
284{
285 struct efx_nic *efx = netdev_priv(net_dev);
286 int rc;
287
288 rc = efx_check_disabled(efx);
289 if (rc)
290 return rc;
291
292 if (rtnl_dereference(efx->xdp_prog) &&
293 new_mtu > efx_xdp_max_mtu(efx)) {
294 netif_err(efx, drv, efx->net_dev,
295 "Requested MTU of %d too big for XDP (max: %d)\n",
296 new_mtu, efx_xdp_max_mtu(efx));
297 return -EINVAL;
298 }
299
300 netif_dbg(efx, drv, efx->net_dev, "changing MTU to %d\n", new_mtu);
301
302 efx_device_detach_sync(efx);
303 efx_stop_all(efx);
304
305 mutex_lock(&efx->mac_lock);
306 net_dev->mtu = new_mtu;
307 efx_mac_reconfigure(efx, true);
308 mutex_unlock(&efx->mac_lock);
309
310 efx_start_all(efx);
311 efx_device_attach_if_not_resetting(efx);
312 return 0;
313}
314
315
316
317
318
319
320
321
322static void efx_monitor(struct work_struct *data)
323{
324 struct efx_nic *efx = container_of(data, struct efx_nic,
325 monitor_work.work);
326
327 netif_vdbg(efx, timer, efx->net_dev,
328 "hardware monitor executing on CPU %d\n",
329 raw_smp_processor_id());
330 BUG_ON(efx->type->monitor == NULL);
331
332
333
334
335
336 if (mutex_trylock(&efx->mac_lock)) {
337 if (efx->port_enabled && efx->type->monitor)
338 efx->type->monitor(efx);
339 mutex_unlock(&efx->mac_lock);
340 }
341
342 efx_start_monitor(efx);
343}
344
345void efx_start_monitor(struct efx_nic *efx)
346{
347 if (efx->type->monitor)
348 queue_delayed_work(efx->workqueue, &efx->monitor_work,
349 efx_monitor_interval);
350}
351
352
353
354
355
356
357
358
359
360
361
362static void efx_start_datapath(struct efx_nic *efx)
363{
364 netdev_features_t old_features = efx->net_dev->features;
365 bool old_rx_scatter = efx->rx_scatter;
366 size_t rx_buf_len;
367
368
369
370
371
372 efx->rx_dma_len = (efx->rx_prefix_size +
373 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
374 efx->type->rx_buffer_padding);
375 rx_buf_len = (sizeof(struct efx_rx_page_state) + EFX_XDP_HEADROOM +
376 efx->rx_ip_align + efx->rx_dma_len + EFX_XDP_TAILROOM);
377
378 if (rx_buf_len <= PAGE_SIZE) {
379 efx->rx_scatter = efx->type->always_rx_scatter;
380 efx->rx_buffer_order = 0;
381 } else if (efx->type->can_rx_scatter) {
382 BUILD_BUG_ON(EFX_RX_USR_BUF_SIZE % L1_CACHE_BYTES);
383 BUILD_BUG_ON(sizeof(struct efx_rx_page_state) +
384 2 * ALIGN(NET_IP_ALIGN + EFX_RX_USR_BUF_SIZE,
385 EFX_RX_BUF_ALIGNMENT) >
386 PAGE_SIZE);
387 efx->rx_scatter = true;
388 efx->rx_dma_len = EFX_RX_USR_BUF_SIZE;
389 efx->rx_buffer_order = 0;
390 } else {
391 efx->rx_scatter = false;
392 efx->rx_buffer_order = get_order(rx_buf_len);
393 }
394
395 efx_rx_config_page_split(efx);
396 if (efx->rx_buffer_order)
397 netif_dbg(efx, drv, efx->net_dev,
398 "RX buf len=%u; page order=%u batch=%u\n",
399 efx->rx_dma_len, efx->rx_buffer_order,
400 efx->rx_pages_per_batch);
401 else
402 netif_dbg(efx, drv, efx->net_dev,
403 "RX buf len=%u step=%u bpp=%u; page batch=%u\n",
404 efx->rx_dma_len, efx->rx_page_buf_step,
405 efx->rx_bufs_per_page, efx->rx_pages_per_batch);
406
407
408
409
410 efx->net_dev->hw_features |= efx->net_dev->features;
411 efx->net_dev->hw_features &= ~efx->fixed_features;
412 efx->net_dev->features |= efx->fixed_features;
413 if (efx->net_dev->features != old_features)
414 netdev_features_change(efx->net_dev);
415
416
417 if ((efx->rx_scatter != old_rx_scatter) &&
418 efx->type->filter_update_rx_scatter)
419 efx->type->filter_update_rx_scatter(efx);
420
421
422
423
424
425
426
427
428 efx->txq_stop_thresh = efx->txq_entries - efx_tx_max_skb_descs(efx);
429 efx->txq_wake_thresh = efx->txq_stop_thresh / 2;
430
431
432 efx_start_channels(efx);
433
434 efx_ptp_start_datapath(efx);
435
436 if (netif_device_present(efx->net_dev))
437 netif_tx_wake_all_queues(efx->net_dev);
438}
439
440static void efx_stop_datapath(struct efx_nic *efx)
441{
442 EFX_ASSERT_RESET_SERIALISED(efx);
443 BUG_ON(efx->port_enabled);
444
445 efx_ptp_stop_datapath(efx);
446
447 efx_stop_channels(efx);
448}
449
450
451
452
453
454
455
456
457
458
459void efx_link_clear_advertising(struct efx_nic *efx)
460{
461 bitmap_zero(efx->link_advertising, __ETHTOOL_LINK_MODE_MASK_NBITS);
462 efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX);
463}
464
465void efx_link_set_wanted_fc(struct efx_nic *efx, u8 wanted_fc)
466{
467 efx->wanted_fc = wanted_fc;
468 if (efx->link_advertising[0]) {
469 if (wanted_fc & EFX_FC_RX)
470 efx->link_advertising[0] |= (ADVERTISED_Pause |
471 ADVERTISED_Asym_Pause);
472 else
473 efx->link_advertising[0] &= ~(ADVERTISED_Pause |
474 ADVERTISED_Asym_Pause);
475 if (wanted_fc & EFX_FC_TX)
476 efx->link_advertising[0] ^= ADVERTISED_Asym_Pause;
477 }
478}
479
480static void efx_start_port(struct efx_nic *efx)
481{
482 netif_dbg(efx, ifup, efx->net_dev, "start port\n");
483 BUG_ON(efx->port_enabled);
484
485 mutex_lock(&efx->mac_lock);
486 efx->port_enabled = true;
487
488
489 efx_mac_reconfigure(efx, false);
490
491 mutex_unlock(&efx->mac_lock);
492}
493
494
495
496
497
498
499static void efx_stop_port(struct efx_nic *efx)
500{
501 netif_dbg(efx, ifdown, efx->net_dev, "stop port\n");
502
503 EFX_ASSERT_RESET_SERIALISED(efx);
504
505 mutex_lock(&efx->mac_lock);
506 efx->port_enabled = false;
507 mutex_unlock(&efx->mac_lock);
508
509
510 netif_addr_lock_bh(efx->net_dev);
511 netif_addr_unlock_bh(efx->net_dev);
512
513 cancel_delayed_work_sync(&efx->monitor_work);
514 efx_selftest_async_cancel(efx);
515 cancel_work_sync(&efx->mac_work);
516}
517
518
519
520
521
522
523
524
525void efx_start_all(struct efx_nic *efx)
526{
527 EFX_ASSERT_RESET_SERIALISED(efx);
528 BUG_ON(efx->state == STATE_DISABLED);
529
530
531
532
533 if (efx->port_enabled || !netif_running(efx->net_dev) ||
534 efx->reset_pending)
535 return;
536
537 efx_start_port(efx);
538 efx_start_datapath(efx);
539
540
541 efx_start_monitor(efx);
542
543
544
545
546 mutex_lock(&efx->mac_lock);
547 if (efx->phy_op->poll(efx))
548 efx_link_status_changed(efx);
549 mutex_unlock(&efx->mac_lock);
550
551 if (efx->type->start_stats) {
552 efx->type->start_stats(efx);
553 efx->type->pull_stats(efx);
554 spin_lock_bh(&efx->stats_lock);
555 efx->type->update_stats(efx, NULL, NULL);
556 spin_unlock_bh(&efx->stats_lock);
557 }
558}
559
560
561
562
563
564
565void efx_stop_all(struct efx_nic *efx)
566{
567 EFX_ASSERT_RESET_SERIALISED(efx);
568
569
570 if (!efx->port_enabled)
571 return;
572
573 if (efx->type->update_stats) {
574
575
576
577 efx->type->pull_stats(efx);
578 spin_lock_bh(&efx->stats_lock);
579 efx->type->update_stats(efx, NULL, NULL);
580 spin_unlock_bh(&efx->stats_lock);
581 efx->type->stop_stats(efx);
582 }
583
584 efx_stop_port(efx);
585
586
587
588
589
590 WARN_ON(netif_running(efx->net_dev) &&
591 netif_device_present(efx->net_dev));
592 netif_tx_disable(efx->net_dev);
593
594 efx_stop_datapath(efx);
595}
596
597
598void efx_net_stats(struct net_device *net_dev, struct rtnl_link_stats64 *stats)
599{
600 struct efx_nic *efx = netdev_priv(net_dev);
601
602 spin_lock_bh(&efx->stats_lock);
603 efx->type->update_stats(efx, NULL, stats);
604 spin_unlock_bh(&efx->stats_lock);
605}
606
607
608
609
610
611
612
613
614int __efx_reconfigure_port(struct efx_nic *efx)
615{
616 enum efx_phy_mode phy_mode;
617 int rc = 0;
618
619 WARN_ON(!mutex_is_locked(&efx->mac_lock));
620
621
622 phy_mode = efx->phy_mode;
623 if (LOOPBACK_INTERNAL(efx))
624 efx->phy_mode |= PHY_MODE_TX_DISABLED;
625 else
626 efx->phy_mode &= ~PHY_MODE_TX_DISABLED;
627
628 if (efx->type->reconfigure_port)
629 rc = efx->type->reconfigure_port(efx);
630
631 if (rc)
632 efx->phy_mode = phy_mode;
633
634 return rc;
635}
636
637
638
639
640int efx_reconfigure_port(struct efx_nic *efx)
641{
642 int rc;
643
644 EFX_ASSERT_RESET_SERIALISED(efx);
645
646 mutex_lock(&efx->mac_lock);
647 rc = __efx_reconfigure_port(efx);
648 mutex_unlock(&efx->mac_lock);
649
650 return rc;
651}
652
653
654
655
656
657
658
659static void efx_wait_for_bist_end(struct efx_nic *efx)
660{
661 int i;
662
663 for (i = 0; i < BIST_WAIT_DELAY_COUNT; ++i) {
664 if (efx_mcdi_poll_reboot(efx))
665 goto out;
666 msleep(BIST_WAIT_DELAY_MS);
667 }
668
669 netif_err(efx, drv, efx->net_dev, "Warning: No MC reboot after BIST mode\n");
670out:
671
672
673
674 efx->mc_bist_for_other_fn = false;
675}
676
677
678
679
680
681
682int efx_try_recovery(struct efx_nic *efx)
683{
684#ifdef CONFIG_EEH
685
686
687
688
689
690 struct eeh_dev *eehdev = pci_dev_to_eeh_dev(efx->pci_dev);
691 if (eeh_dev_check_failure(eehdev)) {
692
693
694
695 return 1;
696 }
697#endif
698 return 0;
699}
700
701
702
703
704void efx_reset_down(struct efx_nic *efx, enum reset_type method)
705{
706 EFX_ASSERT_RESET_SERIALISED(efx);
707
708 if (method == RESET_TYPE_MCDI_TIMEOUT)
709 efx->type->prepare_flr(efx);
710
711 efx_stop_all(efx);
712 efx_disable_interrupts(efx);
713
714 mutex_lock(&efx->mac_lock);
715 down_write(&efx->filter_sem);
716 mutex_lock(&efx->rss_lock);
717 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE &&
718 method != RESET_TYPE_DATAPATH)
719 efx->phy_op->fini(efx);
720 efx->type->fini(efx);
721}
722
723
724void efx_watchdog(struct net_device *net_dev, unsigned int txqueue)
725{
726 struct efx_nic *efx = netdev_priv(net_dev);
727
728 netif_err(efx, tx_err, efx->net_dev,
729 "TX stuck with port_enabled=%d: resetting channels\n",
730 efx->port_enabled);
731
732 efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG);
733}
734
735
736
737
738
739
740
741int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok)
742{
743 int rc;
744
745 EFX_ASSERT_RESET_SERIALISED(efx);
746
747 if (method == RESET_TYPE_MCDI_TIMEOUT)
748 efx->type->finish_flr(efx);
749
750
751 rc = efx->type->init(efx);
752 if (rc) {
753 netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n");
754 goto fail;
755 }
756
757 if (!ok)
758 goto fail;
759
760 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE &&
761 method != RESET_TYPE_DATAPATH) {
762 rc = efx->phy_op->init(efx);
763 if (rc)
764 goto fail;
765 rc = efx->phy_op->reconfigure(efx);
766 if (rc && rc != -EPERM)
767 netif_err(efx, drv, efx->net_dev,
768 "could not restore PHY settings\n");
769 }
770
771 rc = efx_enable_interrupts(efx);
772 if (rc)
773 goto fail;
774
775#ifdef CONFIG_SFC_SRIOV
776 rc = efx->type->vswitching_restore(efx);
777 if (rc)
778 netif_warn(efx, probe, efx->net_dev,
779 "failed to restore vswitching rc=%d;"
780 " VFs may not function\n", rc);
781#endif
782
783 if (efx->type->rx_restore_rss_contexts)
784 efx->type->rx_restore_rss_contexts(efx);
785 mutex_unlock(&efx->rss_lock);
786 efx->type->filter_table_restore(efx);
787 up_write(&efx->filter_sem);
788 if (efx->type->sriov_reset)
789 efx->type->sriov_reset(efx);
790
791 mutex_unlock(&efx->mac_lock);
792
793 efx_start_all(efx);
794
795 if (efx->type->udp_tnl_push_ports)
796 efx->type->udp_tnl_push_ports(efx);
797
798 return 0;
799
800fail:
801 efx->port_initialized = false;
802
803 mutex_unlock(&efx->rss_lock);
804 up_write(&efx->filter_sem);
805 mutex_unlock(&efx->mac_lock);
806
807 return rc;
808}
809
810
811
812
813
814
815int efx_reset(struct efx_nic *efx, enum reset_type method)
816{
817 int rc, rc2 = 0;
818 bool disabled;
819
820 netif_info(efx, drv, efx->net_dev, "resetting (%s)\n",
821 RESET_TYPE(method));
822
823 efx_device_detach_sync(efx);
824
825
826
827 if (efx_nic_rev(efx) != EFX_REV_EF100)
828 efx_reset_down(efx, method);
829
830 rc = efx->type->reset(efx, method);
831 if (rc) {
832 netif_err(efx, drv, efx->net_dev, "failed to reset hardware\n");
833 goto out;
834 }
835
836
837
838
839 if (method < RESET_TYPE_MAX_METHOD)
840 efx->reset_pending &= -(1 << (method + 1));
841 else
842 __clear_bit(method, &efx->reset_pending);
843
844
845
846
847
848
849 pci_set_master(efx->pci_dev);
850
851out:
852
853 disabled = rc ||
854 method == RESET_TYPE_DISABLE ||
855 method == RESET_TYPE_RECOVER_OR_DISABLE;
856 if (efx_nic_rev(efx) != EFX_REV_EF100)
857 rc2 = efx_reset_up(efx, method, !disabled);
858 if (rc2) {
859 disabled = true;
860 if (!rc)
861 rc = rc2;
862 }
863
864 if (disabled) {
865 dev_close(efx->net_dev);
866 netif_err(efx, drv, efx->net_dev, "has been disabled\n");
867 efx->state = STATE_DISABLED;
868 } else {
869 netif_dbg(efx, drv, efx->net_dev, "reset complete\n");
870 efx_device_attach_if_not_resetting(efx);
871 }
872 return rc;
873}
874
875
876
877
878static void efx_reset_work(struct work_struct *data)
879{
880 struct efx_nic *efx = container_of(data, struct efx_nic, reset_work);
881 unsigned long pending;
882 enum reset_type method;
883
884 pending = READ_ONCE(efx->reset_pending);
885 method = fls(pending) - 1;
886
887 if (method == RESET_TYPE_MC_BIST)
888 efx_wait_for_bist_end(efx);
889
890 if ((method == RESET_TYPE_RECOVER_OR_DISABLE ||
891 method == RESET_TYPE_RECOVER_OR_ALL) &&
892 efx_try_recovery(efx))
893 return;
894
895 if (!pending)
896 return;
897
898 rtnl_lock();
899
900
901
902
903
904 if (efx->state == STATE_READY)
905 (void)efx_reset(efx, method);
906
907 rtnl_unlock();
908}
909
910void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
911{
912 enum reset_type method;
913
914 if (efx->state == STATE_RECOVERY) {
915 netif_dbg(efx, drv, efx->net_dev,
916 "recovering: skip scheduling %s reset\n",
917 RESET_TYPE(type));
918 return;
919 }
920
921 switch (type) {
922 case RESET_TYPE_INVISIBLE:
923 case RESET_TYPE_ALL:
924 case RESET_TYPE_RECOVER_OR_ALL:
925 case RESET_TYPE_WORLD:
926 case RESET_TYPE_DISABLE:
927 case RESET_TYPE_RECOVER_OR_DISABLE:
928 case RESET_TYPE_DATAPATH:
929 case RESET_TYPE_MC_BIST:
930 case RESET_TYPE_MCDI_TIMEOUT:
931 method = type;
932 netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n",
933 RESET_TYPE(method));
934 break;
935 default:
936 method = efx->type->map_reset_reason(type);
937 netif_dbg(efx, drv, efx->net_dev,
938 "scheduling %s reset for %s\n",
939 RESET_TYPE(method), RESET_TYPE(type));
940 break;
941 }
942
943 set_bit(method, &efx->reset_pending);
944 smp_mb();
945
946
947
948
949 if (READ_ONCE(efx->state) != STATE_READY)
950 return;
951
952
953
954
955 efx_mcdi_mode_poll(efx);
956
957 efx_queue_reset_work(efx);
958}
959
960
961
962
963
964
965
966
967
968
969int efx_port_dummy_op_int(struct efx_nic *efx)
970{
971 return 0;
972}
973void efx_port_dummy_op_void(struct efx_nic *efx) {}
974
975static bool efx_port_dummy_op_poll(struct efx_nic *efx)
976{
977 return false;
978}
979
980static const struct efx_phy_operations efx_dummy_phy_operations = {
981 .init = efx_port_dummy_op_int,
982 .reconfigure = efx_port_dummy_op_int,
983 .poll = efx_port_dummy_op_poll,
984 .fini = efx_port_dummy_op_void,
985};
986
987
988
989
990
991
992
993
994
995
996int efx_init_struct(struct efx_nic *efx,
997 struct pci_dev *pci_dev, struct net_device *net_dev)
998{
999 int rc = -ENOMEM;
1000
1001
1002 INIT_LIST_HEAD(&efx->node);
1003 INIT_LIST_HEAD(&efx->secondary_list);
1004 spin_lock_init(&efx->biu_lock);
1005#ifdef CONFIG_SFC_MTD
1006 INIT_LIST_HEAD(&efx->mtd_list);
1007#endif
1008 INIT_WORK(&efx->reset_work, efx_reset_work);
1009 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor);
1010 efx_selftest_async_init(efx);
1011 efx->pci_dev = pci_dev;
1012 efx->msg_enable = debug;
1013 efx->state = STATE_UNINIT;
1014 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
1015
1016 efx->net_dev = net_dev;
1017 efx->rx_prefix_size = efx->type->rx_prefix_size;
1018 efx->rx_ip_align =
1019 NET_IP_ALIGN ? (efx->rx_prefix_size + NET_IP_ALIGN) % 4 : 0;
1020 efx->rx_packet_hash_offset =
1021 efx->type->rx_hash_offset - efx->type->rx_prefix_size;
1022 efx->rx_packet_ts_offset =
1023 efx->type->rx_ts_offset - efx->type->rx_prefix_size;
1024 INIT_LIST_HEAD(&efx->rss_context.list);
1025 efx->rss_context.context_id = EFX_MCDI_RSS_CONTEXT_INVALID;
1026 mutex_init(&efx->rss_lock);
1027 efx->vport_id = EVB_PORT_ID_ASSIGNED;
1028 spin_lock_init(&efx->stats_lock);
1029 efx->vi_stride = EFX_DEFAULT_VI_STRIDE;
1030 efx->num_mac_stats = MC_CMD_MAC_NSTATS;
1031 BUILD_BUG_ON(MC_CMD_MAC_NSTATS - 1 != MC_CMD_MAC_GENERATION_END);
1032 mutex_init(&efx->mac_lock);
1033#ifdef CONFIG_RFS_ACCEL
1034 mutex_init(&efx->rps_mutex);
1035 spin_lock_init(&efx->rps_hash_lock);
1036
1037 efx->rps_hash_table = kcalloc(EFX_ARFS_HASH_TABLE_SIZE,
1038 sizeof(*efx->rps_hash_table), GFP_KERNEL);
1039#endif
1040 efx->phy_op = &efx_dummy_phy_operations;
1041 efx->mdio.dev = net_dev;
1042 INIT_WORK(&efx->mac_work, efx_mac_work);
1043 init_waitqueue_head(&efx->flush_wq);
1044
1045 efx->tx_queues_per_channel = 1;
1046 efx->rxq_entries = EFX_DEFAULT_DMAQ_SIZE;
1047 efx->txq_entries = EFX_DEFAULT_DMAQ_SIZE;
1048
1049 efx->mem_bar = UINT_MAX;
1050
1051 rc = efx_init_channels(efx);
1052 if (rc)
1053 goto fail;
1054
1055
1056 snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s",
1057 pci_name(pci_dev));
1058 efx->workqueue = create_singlethread_workqueue(efx->workqueue_name);
1059 if (!efx->workqueue) {
1060 rc = -ENOMEM;
1061 goto fail;
1062 }
1063
1064 return 0;
1065
1066fail:
1067 efx_fini_struct(efx);
1068 return rc;
1069}
1070
1071void efx_fini_struct(struct efx_nic *efx)
1072{
1073#ifdef CONFIG_RFS_ACCEL
1074 kfree(efx->rps_hash_table);
1075#endif
1076
1077 efx_fini_channels(efx);
1078
1079 kfree(efx->vpd_sn);
1080
1081 if (efx->workqueue) {
1082 destroy_workqueue(efx->workqueue);
1083 efx->workqueue = NULL;
1084 }
1085}
1086
1087
1088int efx_init_io(struct efx_nic *efx, int bar, dma_addr_t dma_mask,
1089 unsigned int mem_map_size)
1090{
1091 struct pci_dev *pci_dev = efx->pci_dev;
1092 int rc;
1093
1094 efx->mem_bar = UINT_MAX;
1095
1096 netif_dbg(efx, probe, efx->net_dev, "initialising I/O bar=%d\n", bar);
1097
1098 rc = pci_enable_device(pci_dev);
1099 if (rc) {
1100 netif_err(efx, probe, efx->net_dev,
1101 "failed to enable PCI device\n");
1102 goto fail1;
1103 }
1104
1105 pci_set_master(pci_dev);
1106
1107
1108
1109
1110
1111
1112 while (dma_mask > 0x7fffffffUL) {
1113 rc = dma_set_mask_and_coherent(&pci_dev->dev, dma_mask);
1114 if (rc == 0)
1115 break;
1116 dma_mask >>= 1;
1117 }
1118 if (rc) {
1119 netif_err(efx, probe, efx->net_dev,
1120 "could not find a suitable DMA mask\n");
1121 goto fail2;
1122 }
1123 netif_dbg(efx, probe, efx->net_dev,
1124 "using DMA mask %llx\n", (unsigned long long)dma_mask);
1125
1126 efx->membase_phys = pci_resource_start(efx->pci_dev, bar);
1127 if (!efx->membase_phys) {
1128 netif_err(efx, probe, efx->net_dev,
1129 "ERROR: No BAR%d mapping from the BIOS. "
1130 "Try pci=realloc on the kernel command line\n", bar);
1131 rc = -ENODEV;
1132 goto fail3;
1133 }
1134
1135 rc = pci_request_region(pci_dev, bar, "sfc");
1136 if (rc) {
1137 netif_err(efx, probe, efx->net_dev,
1138 "request for memory BAR[%d] failed\n", bar);
1139 rc = -EIO;
1140 goto fail3;
1141 }
1142 efx->mem_bar = bar;
1143 efx->membase = ioremap(efx->membase_phys, mem_map_size);
1144 if (!efx->membase) {
1145 netif_err(efx, probe, efx->net_dev,
1146 "could not map memory BAR[%d] at %llx+%x\n", bar,
1147 (unsigned long long)efx->membase_phys, mem_map_size);
1148 rc = -ENOMEM;
1149 goto fail4;
1150 }
1151 netif_dbg(efx, probe, efx->net_dev,
1152 "memory BAR[%d] at %llx+%x (virtual %p)\n", bar,
1153 (unsigned long long)efx->membase_phys, mem_map_size,
1154 efx->membase);
1155
1156 return 0;
1157
1158fail4:
1159 pci_release_region(efx->pci_dev, bar);
1160fail3:
1161 efx->membase_phys = 0;
1162fail2:
1163 pci_disable_device(efx->pci_dev);
1164fail1:
1165 return rc;
1166}
1167
1168void efx_fini_io(struct efx_nic *efx)
1169{
1170 netif_dbg(efx, drv, efx->net_dev, "shutting down I/O\n");
1171
1172 if (efx->membase) {
1173 iounmap(efx->membase);
1174 efx->membase = NULL;
1175 }
1176
1177 if (efx->membase_phys) {
1178 pci_release_region(efx->pci_dev, efx->mem_bar);
1179 efx->membase_phys = 0;
1180 efx->mem_bar = UINT_MAX;
1181 }
1182
1183
1184 if (!pci_vfs_assigned(efx->pci_dev))
1185 pci_disable_device(efx->pci_dev);
1186}
1187
1188#ifdef CONFIG_SFC_MCDI_LOGGING
1189static ssize_t show_mcdi_log(struct device *dev, struct device_attribute *attr,
1190 char *buf)
1191{
1192 struct efx_nic *efx = dev_get_drvdata(dev);
1193 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
1194
1195 return scnprintf(buf, PAGE_SIZE, "%d\n", mcdi->logging_enabled);
1196}
1197
1198static ssize_t set_mcdi_log(struct device *dev, struct device_attribute *attr,
1199 const char *buf, size_t count)
1200{
1201 struct efx_nic *efx = dev_get_drvdata(dev);
1202 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
1203 bool enable = count > 0 && *buf != '0';
1204
1205 mcdi->logging_enabled = enable;
1206 return count;
1207}
1208
1209static DEVICE_ATTR(mcdi_logging, 0644, show_mcdi_log, set_mcdi_log);
1210
1211void efx_init_mcdi_logging(struct efx_nic *efx)
1212{
1213 int rc = device_create_file(&efx->pci_dev->dev, &dev_attr_mcdi_logging);
1214
1215 if (rc) {
1216 netif_warn(efx, drv, efx->net_dev,
1217 "failed to init net dev attributes\n");
1218 }
1219}
1220
1221void efx_fini_mcdi_logging(struct efx_nic *efx)
1222{
1223 device_remove_file(&efx->pci_dev->dev, &dev_attr_mcdi_logging);
1224}
1225#endif
1226
1227
1228
1229
1230
1231static pci_ers_result_t efx_io_error_detected(struct pci_dev *pdev,
1232 pci_channel_state_t state)
1233{
1234 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
1235 struct efx_nic *efx = pci_get_drvdata(pdev);
1236
1237 if (state == pci_channel_io_perm_failure)
1238 return PCI_ERS_RESULT_DISCONNECT;
1239
1240 rtnl_lock();
1241
1242 if (efx->state != STATE_DISABLED) {
1243 efx->state = STATE_RECOVERY;
1244 efx->reset_pending = 0;
1245
1246 efx_device_detach_sync(efx);
1247
1248 efx_stop_all(efx);
1249 efx_disable_interrupts(efx);
1250
1251 status = PCI_ERS_RESULT_NEED_RESET;
1252 } else {
1253
1254
1255
1256 status = PCI_ERS_RESULT_RECOVERED;
1257 }
1258
1259 rtnl_unlock();
1260
1261 pci_disable_device(pdev);
1262
1263 return status;
1264}
1265
1266
1267static pci_ers_result_t efx_io_slot_reset(struct pci_dev *pdev)
1268{
1269 struct efx_nic *efx = pci_get_drvdata(pdev);
1270 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
1271
1272 if (pci_enable_device(pdev)) {
1273 netif_err(efx, hw, efx->net_dev,
1274 "Cannot re-enable PCI device after reset.\n");
1275 status = PCI_ERS_RESULT_DISCONNECT;
1276 }
1277
1278 return status;
1279}
1280
1281
1282static void efx_io_resume(struct pci_dev *pdev)
1283{
1284 struct efx_nic *efx = pci_get_drvdata(pdev);
1285 int rc;
1286
1287 rtnl_lock();
1288
1289 if (efx->state == STATE_DISABLED)
1290 goto out;
1291
1292 rc = efx_reset(efx, RESET_TYPE_ALL);
1293 if (rc) {
1294 netif_err(efx, hw, efx->net_dev,
1295 "efx_reset failed after PCI error (%d)\n", rc);
1296 } else {
1297 efx->state = STATE_READY;
1298 netif_dbg(efx, hw, efx->net_dev,
1299 "Done resetting and resuming IO after PCI error.\n");
1300 }
1301
1302out:
1303 rtnl_unlock();
1304}
1305
1306
1307
1308
1309
1310
1311
1312const struct pci_error_handlers efx_err_handlers = {
1313 .error_detected = efx_io_error_detected,
1314 .slot_reset = efx_io_slot_reset,
1315 .resume = efx_io_resume,
1316};
1317
1318int efx_get_phys_port_id(struct net_device *net_dev,
1319 struct netdev_phys_item_id *ppid)
1320{
1321 struct efx_nic *efx = netdev_priv(net_dev);
1322
1323 if (efx->type->get_phys_port_id)
1324 return efx->type->get_phys_port_id(efx, ppid);
1325 else
1326 return -EOPNOTSUPP;
1327}
1328
1329int efx_get_phys_port_name(struct net_device *net_dev, char *name, size_t len)
1330{
1331 struct efx_nic *efx = netdev_priv(net_dev);
1332
1333 if (snprintf(name, len, "p%u", efx->port_num) >= len)
1334 return -EINVAL;
1335 return 0;
1336}
1337