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17#include <linux/nl80211.h>
18#include <linux/delay.h>
19#include "ath9k.h"
20#include "btcoex.h"
21
22u8 ath9k_parse_mpdudensity(u8 mpdudensity)
23{
24
25
26
27
28
29
30
31
32
33
34
35 switch (mpdudensity) {
36 case 0:
37 return 0;
38 case 1:
39 case 2:
40 case 3:
41
42
43 return 1;
44 case 4:
45 return 2;
46 case 5:
47 return 4;
48 case 6:
49 return 8;
50 case 7:
51 return 16;
52 default:
53 return 0;
54 }
55}
56
57static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq,
58 bool sw_pending)
59{
60 bool pending = false;
61
62 spin_lock_bh(&txq->axq_lock);
63
64 if (txq->axq_depth) {
65 pending = true;
66 goto out;
67 }
68
69 if (!sw_pending)
70 goto out;
71
72 if (txq->mac80211_qnum >= 0) {
73 struct ath_acq *acq;
74
75 acq = &sc->cur_chan->acq[txq->mac80211_qnum];
76 if (!list_empty(&acq->acq_new) || !list_empty(&acq->acq_old))
77 pending = true;
78 }
79out:
80 spin_unlock_bh(&txq->axq_lock);
81 return pending;
82}
83
84static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
85{
86 unsigned long flags;
87 bool ret;
88
89 spin_lock_irqsave(&sc->sc_pm_lock, flags);
90 ret = ath9k_hw_setpower(sc->sc_ah, mode);
91 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
92
93 return ret;
94}
95
96void ath_ps_full_sleep(struct timer_list *t)
97{
98 struct ath_softc *sc = from_timer(sc, t, sleep_timer);
99 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
100 unsigned long flags;
101 bool reset;
102
103 spin_lock_irqsave(&common->cc_lock, flags);
104 ath_hw_cycle_counters_update(common);
105 spin_unlock_irqrestore(&common->cc_lock, flags);
106
107 ath9k_hw_setrxabort(sc->sc_ah, 1);
108 ath9k_hw_stopdmarecv(sc->sc_ah, &reset);
109
110 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
111}
112
113void ath9k_ps_wakeup(struct ath_softc *sc)
114{
115 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
116 unsigned long flags;
117 enum ath9k_power_mode power_mode;
118
119 spin_lock_irqsave(&sc->sc_pm_lock, flags);
120 if (++sc->ps_usecount != 1)
121 goto unlock;
122
123 del_timer_sync(&sc->sleep_timer);
124 power_mode = sc->sc_ah->power_mode;
125 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
126
127
128
129
130
131
132 if (power_mode != ATH9K_PM_AWAKE) {
133 spin_lock(&common->cc_lock);
134 ath_hw_cycle_counters_update(common);
135 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
136 memset(&common->cc_ani, 0, sizeof(common->cc_ani));
137 spin_unlock(&common->cc_lock);
138 }
139
140 unlock:
141 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
142}
143
144void ath9k_ps_restore(struct ath_softc *sc)
145{
146 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
147 enum ath9k_power_mode mode;
148 unsigned long flags;
149
150 spin_lock_irqsave(&sc->sc_pm_lock, flags);
151 if (--sc->ps_usecount != 0)
152 goto unlock;
153
154 if (sc->ps_idle) {
155 mod_timer(&sc->sleep_timer, jiffies + HZ / 10);
156 goto unlock;
157 }
158
159 if (sc->ps_enabled &&
160 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
161 PS_WAIT_FOR_CAB |
162 PS_WAIT_FOR_PSPOLL_DATA |
163 PS_WAIT_FOR_TX_ACK |
164 PS_WAIT_FOR_ANI))) {
165 mode = ATH9K_PM_NETWORK_SLEEP;
166 if (ath9k_hw_btcoex_is_enabled(sc->sc_ah))
167 ath9k_btcoex_stop_gen_timer(sc);
168 } else {
169 goto unlock;
170 }
171
172 spin_lock(&common->cc_lock);
173 ath_hw_cycle_counters_update(common);
174 spin_unlock(&common->cc_lock);
175
176 ath9k_hw_setpower(sc->sc_ah, mode);
177
178 unlock:
179 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
180}
181
182static void __ath_cancel_work(struct ath_softc *sc)
183{
184 cancel_work_sync(&sc->paprd_work);
185 cancel_delayed_work_sync(&sc->hw_check_work);
186 cancel_delayed_work_sync(&sc->hw_pll_work);
187
188#ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
189 if (ath9k_hw_mci_is_enabled(sc->sc_ah))
190 cancel_work_sync(&sc->mci_work);
191#endif
192}
193
194void ath_cancel_work(struct ath_softc *sc)
195{
196 __ath_cancel_work(sc);
197 cancel_work_sync(&sc->hw_reset_work);
198}
199
200void ath_restart_work(struct ath_softc *sc)
201{
202 ieee80211_queue_delayed_work(sc->hw, &sc->hw_check_work,
203 ATH_HW_CHECK_POLL_INT);
204
205 if (AR_SREV_9340(sc->sc_ah) || AR_SREV_9330(sc->sc_ah))
206 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work,
207 msecs_to_jiffies(ATH_PLL_WORK_INTERVAL));
208
209 ath_start_ani(sc);
210}
211
212static bool ath_prepare_reset(struct ath_softc *sc)
213{
214 struct ath_hw *ah = sc->sc_ah;
215 bool ret = true;
216
217 ieee80211_stop_queues(sc->hw);
218 ath_stop_ani(sc);
219 ath9k_hw_disable_interrupts(ah);
220
221 if (AR_SREV_9300_20_OR_LATER(ah)) {
222 ret &= ath_stoprecv(sc);
223 ret &= ath_drain_all_txq(sc);
224 } else {
225 ret &= ath_drain_all_txq(sc);
226 ret &= ath_stoprecv(sc);
227 }
228
229 return ret;
230}
231
232static bool ath_complete_reset(struct ath_softc *sc, bool start)
233{
234 struct ath_hw *ah = sc->sc_ah;
235 struct ath_common *common = ath9k_hw_common(ah);
236 unsigned long flags;
237
238 ath9k_calculate_summary_state(sc, sc->cur_chan);
239 ath_startrecv(sc);
240 ath9k_cmn_update_txpow(ah, sc->cur_chan->cur_txpower,
241 sc->cur_chan->txpower,
242 &sc->cur_chan->cur_txpower);
243 clear_bit(ATH_OP_HW_RESET, &common->op_flags);
244
245 if (!sc->cur_chan->offchannel && start) {
246
247 if (sc->cur_chan->tsf_val) {
248 u32 offset;
249
250 offset = ath9k_hw_get_tsf_offset(&sc->cur_chan->tsf_ts,
251 NULL);
252 ath9k_hw_settsf64(ah, sc->cur_chan->tsf_val + offset);
253 }
254
255
256 if (!test_bit(ATH_OP_BEACONS, &common->op_flags))
257 goto work;
258
259 if (ah->opmode == NL80211_IFTYPE_STATION &&
260 test_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags)) {
261 spin_lock_irqsave(&sc->sc_pm_lock, flags);
262 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
263 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
264 } else {
265 ath9k_set_beacon(sc);
266 }
267 work:
268 ath_restart_work(sc);
269 ath_txq_schedule_all(sc);
270 }
271
272 sc->gtt_cnt = 0;
273
274 ath9k_hw_set_interrupts(ah);
275 ath9k_hw_enable_interrupts(ah);
276 ieee80211_wake_queues(sc->hw);
277 ath9k_p2p_ps_timer(sc);
278
279 return true;
280}
281
282static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan)
283{
284 struct ath_hw *ah = sc->sc_ah;
285 struct ath_common *common = ath9k_hw_common(ah);
286 struct ath9k_hw_cal_data *caldata = NULL;
287 bool fastcc = true;
288 int r;
289
290 __ath_cancel_work(sc);
291
292 disable_irq(sc->irq);
293 tasklet_disable(&sc->intr_tq);
294 tasklet_disable(&sc->bcon_tasklet);
295 spin_lock_bh(&sc->sc_pcu_lock);
296
297 if (!sc->cur_chan->offchannel) {
298 fastcc = false;
299 caldata = &sc->cur_chan->caldata;
300 }
301
302 if (!hchan) {
303 fastcc = false;
304 hchan = ah->curchan;
305 }
306
307 if (!ath_prepare_reset(sc))
308 fastcc = false;
309
310 if (ath9k_is_chanctx_enabled())
311 fastcc = false;
312
313 spin_lock_bh(&sc->chan_lock);
314 sc->cur_chandef = sc->cur_chan->chandef;
315 spin_unlock_bh(&sc->chan_lock);
316
317 ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n",
318 hchan->channel, IS_CHAN_HT40(hchan), fastcc);
319
320 r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
321 if (r) {
322 ath_err(common,
323 "Unable to reset channel, reset status %d\n", r);
324
325 ath9k_hw_enable_interrupts(ah);
326 ath9k_queue_reset(sc, RESET_TYPE_BB_HANG);
327
328 goto out;
329 }
330
331 if (ath9k_hw_mci_is_enabled(sc->sc_ah) &&
332 sc->cur_chan->offchannel)
333 ath9k_mci_set_txpower(sc, true, false);
334
335 if (!ath_complete_reset(sc, true))
336 r = -EIO;
337
338out:
339 enable_irq(sc->irq);
340 spin_unlock_bh(&sc->sc_pcu_lock);
341 tasklet_enable(&sc->bcon_tasklet);
342 tasklet_enable(&sc->intr_tq);
343
344 return r;
345}
346
347static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta,
348 struct ieee80211_vif *vif)
349{
350 struct ath_node *an;
351 an = (struct ath_node *)sta->drv_priv;
352
353 an->sc = sc;
354 an->sta = sta;
355 an->vif = vif;
356 memset(&an->key_idx, 0, sizeof(an->key_idx));
357
358 ath_tx_node_init(sc, an);
359
360 ath_dynack_node_init(sc->sc_ah, an);
361}
362
363static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
364{
365 struct ath_node *an = (struct ath_node *)sta->drv_priv;
366 ath_tx_node_cleanup(sc, an);
367
368 ath_dynack_node_deinit(sc->sc_ah, an);
369}
370
371void ath9k_tasklet(unsigned long data)
372{
373 struct ath_softc *sc = (struct ath_softc *)data;
374 struct ath_hw *ah = sc->sc_ah;
375 struct ath_common *common = ath9k_hw_common(ah);
376 enum ath_reset_type type;
377 unsigned long flags;
378 u32 status;
379 u32 rxmask;
380
381 spin_lock_irqsave(&sc->intr_lock, flags);
382 status = sc->intrstatus;
383 sc->intrstatus = 0;
384 spin_unlock_irqrestore(&sc->intr_lock, flags);
385
386 ath9k_ps_wakeup(sc);
387 spin_lock(&sc->sc_pcu_lock);
388
389 if (status & ATH9K_INT_FATAL) {
390 type = RESET_TYPE_FATAL_INT;
391 ath9k_queue_reset(sc, type);
392 ath_dbg(common, RESET, "FATAL: Skipping interrupts\n");
393 goto out;
394 }
395
396 if ((ah->config.hw_hang_checks & HW_BB_WATCHDOG) &&
397 (status & ATH9K_INT_BB_WATCHDOG)) {
398 spin_lock_irqsave(&common->cc_lock, flags);
399 ath_hw_cycle_counters_update(common);
400 ar9003_hw_bb_watchdog_dbg_info(ah);
401 spin_unlock_irqrestore(&common->cc_lock, flags);
402
403 if (ar9003_hw_bb_watchdog_check(ah)) {
404 type = RESET_TYPE_BB_WATCHDOG;
405 ath9k_queue_reset(sc, type);
406
407 ath_dbg(common, RESET,
408 "BB_WATCHDOG: Skipping interrupts\n");
409 goto out;
410 }
411 }
412
413 if (status & ATH9K_INT_GTT) {
414 sc->gtt_cnt++;
415
416 if ((sc->gtt_cnt >= MAX_GTT_CNT) && !ath9k_hw_check_alive(ah)) {
417 type = RESET_TYPE_TX_GTT;
418 ath9k_queue_reset(sc, type);
419 ath_dbg(common, RESET,
420 "GTT: Skipping interrupts\n");
421 goto out;
422 }
423 }
424
425 spin_lock_irqsave(&sc->sc_pm_lock, flags);
426 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
427
428
429
430
431 ath_dbg(common, PS, "TSFOOR - Sync with next Beacon\n");
432 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
433 }
434 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
435
436 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
437 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
438 ATH9K_INT_RXORN);
439 else
440 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
441
442 if (status & rxmask) {
443
444 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
445 (status & ATH9K_INT_RXHP))
446 ath_rx_tasklet(sc, 0, true);
447
448 ath_rx_tasklet(sc, 0, false);
449 }
450
451 if (status & ATH9K_INT_TX) {
452 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
453
454
455
456
457
458
459 sc->gtt_cnt = 0;
460
461 ath_tx_edma_tasklet(sc);
462 } else {
463 ath_tx_tasklet(sc);
464 }
465
466 wake_up(&sc->tx_wait);
467 }
468
469 if (status & ATH9K_INT_GENTIMER)
470 ath_gen_timer_isr(sc->sc_ah);
471
472 ath9k_btcoex_handle_interrupt(sc, status);
473
474
475 ath9k_hw_resume_interrupts(ah);
476out:
477 spin_unlock(&sc->sc_pcu_lock);
478 ath9k_ps_restore(sc);
479}
480
481irqreturn_t ath_isr(int irq, void *dev)
482{
483#define SCHED_INTR ( \
484 ATH9K_INT_FATAL | \
485 ATH9K_INT_BB_WATCHDOG | \
486 ATH9K_INT_RXORN | \
487 ATH9K_INT_RXEOL | \
488 ATH9K_INT_RX | \
489 ATH9K_INT_RXLP | \
490 ATH9K_INT_RXHP | \
491 ATH9K_INT_TX | \
492 ATH9K_INT_BMISS | \
493 ATH9K_INT_CST | \
494 ATH9K_INT_GTT | \
495 ATH9K_INT_TSFOOR | \
496 ATH9K_INT_GENTIMER | \
497 ATH9K_INT_MCI)
498
499 struct ath_softc *sc = dev;
500 struct ath_hw *ah = sc->sc_ah;
501 struct ath_common *common = ath9k_hw_common(ah);
502 enum ath9k_int status;
503 u32 sync_cause = 0;
504 bool sched = false;
505
506
507
508
509
510
511 if (!ah || test_bit(ATH_OP_INVALID, &common->op_flags))
512 return IRQ_NONE;
513
514
515 if (!ath9k_hw_intrpend(ah))
516 return IRQ_NONE;
517
518
519
520
521
522
523
524 ath9k_hw_getisr(ah, &status, &sync_cause);
525 ath9k_debug_sync_cause(sc, sync_cause);
526 status &= ah->imask;
527
528 if (test_bit(ATH_OP_HW_RESET, &common->op_flags))
529 return IRQ_HANDLED;
530
531
532
533
534
535 if (!status)
536 return IRQ_NONE;
537
538
539 spin_lock(&sc->intr_lock);
540 sc->intrstatus |= status;
541 spin_unlock(&sc->intr_lock);
542
543 if (status & SCHED_INTR)
544 sched = true;
545
546
547
548
549
550 if (status & ATH9K_INT_FATAL)
551 goto chip_reset;
552
553 if ((ah->config.hw_hang_checks & HW_BB_WATCHDOG) &&
554 (status & ATH9K_INT_BB_WATCHDOG))
555 goto chip_reset;
556
557 if (status & ATH9K_INT_SWBA)
558 tasklet_schedule(&sc->bcon_tasklet);
559
560 if (status & ATH9K_INT_TXURN)
561 ath9k_hw_updatetxtriglevel(ah, true);
562
563 if (status & ATH9K_INT_RXEOL) {
564 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
565 ath9k_hw_set_interrupts(ah);
566 }
567
568 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
569 if (status & ATH9K_INT_TIM_TIMER) {
570 if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
571 goto chip_reset;
572
573
574 ath9k_setpower(sc, ATH9K_PM_AWAKE);
575 spin_lock(&sc->sc_pm_lock);
576 ath9k_hw_setrxabort(sc->sc_ah, 0);
577 sc->ps_flags |= PS_WAIT_FOR_BEACON;
578 spin_unlock(&sc->sc_pm_lock);
579 }
580
581chip_reset:
582
583 ath_debug_stat_interrupt(sc, status);
584
585 if (sched) {
586
587 ath9k_hw_kill_interrupts(ah);
588 tasklet_schedule(&sc->intr_tq);
589 }
590
591 return IRQ_HANDLED;
592
593#undef SCHED_INTR
594}
595
596
597
598
599
600int ath_reset(struct ath_softc *sc, struct ath9k_channel *hchan)
601{
602 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
603 int r;
604
605 ath9k_hw_kill_interrupts(sc->sc_ah);
606 set_bit(ATH_OP_HW_RESET, &common->op_flags);
607
608 ath9k_ps_wakeup(sc);
609 r = ath_reset_internal(sc, hchan);
610 ath9k_ps_restore(sc);
611
612 return r;
613}
614
615
616
617
618
619
620void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type)
621{
622 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
623#ifdef CONFIG_ATH9K_DEBUGFS
624 RESET_STAT_INC(sc, type);
625#endif
626 ath9k_hw_kill_interrupts(sc->sc_ah);
627 set_bit(ATH_OP_HW_RESET, &common->op_flags);
628 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
629}
630
631void ath_reset_work(struct work_struct *work)
632{
633 struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
634
635 ath9k_ps_wakeup(sc);
636 ath_reset_internal(sc, NULL);
637 ath9k_ps_restore(sc);
638}
639
640
641
642
643
644static int ath9k_start(struct ieee80211_hw *hw)
645{
646 struct ath_softc *sc = hw->priv;
647 struct ath_hw *ah = sc->sc_ah;
648 struct ath_common *common = ath9k_hw_common(ah);
649 struct ieee80211_channel *curchan = sc->cur_chan->chandef.chan;
650 struct ath_chanctx *ctx = sc->cur_chan;
651 struct ath9k_channel *init_channel;
652 int r;
653
654 ath_dbg(common, CONFIG,
655 "Starting driver with initial channel: %d MHz\n",
656 curchan->center_freq);
657
658 ath9k_ps_wakeup(sc);
659 mutex_lock(&sc->mutex);
660
661 init_channel = ath9k_cmn_get_channel(hw, ah, &ctx->chandef);
662 sc->cur_chandef = hw->conf.chandef;
663
664
665 ath9k_hw_configpcipowersave(ah, false);
666
667
668
669
670
671
672
673
674 spin_lock_bh(&sc->sc_pcu_lock);
675
676 atomic_set(&ah->intr_ref_cnt, -1);
677
678 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
679 if (r) {
680 ath_err(common,
681 "Unable to reset hardware; reset status %d (freq %u MHz)\n",
682 r, curchan->center_freq);
683 ah->reset_power_on = false;
684 }
685
686
687 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
688 ATH9K_INT_RXORN | ATH9K_INT_FATAL |
689 ATH9K_INT_GLOBAL;
690
691 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
692 ah->imask |= ATH9K_INT_RXHP |
693 ATH9K_INT_RXLP;
694 else
695 ah->imask |= ATH9K_INT_RX;
696
697 if (ah->config.hw_hang_checks & HW_BB_WATCHDOG)
698 ah->imask |= ATH9K_INT_BB_WATCHDOG;
699
700
701
702
703
704 if (AR_SREV_9300_20_OR_LATER(ah))
705 ah->imask |= ATH9K_INT_GTT;
706
707 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
708 ah->imask |= ATH9K_INT_CST;
709
710 ath_mci_enable(sc);
711
712 clear_bit(ATH_OP_INVALID, &common->op_flags);
713 sc->sc_ah->is_monitoring = false;
714
715 if (!ath_complete_reset(sc, false))
716 ah->reset_power_on = false;
717
718 if (ah->led_pin >= 0) {
719 ath9k_hw_set_gpio(ah, ah->led_pin,
720 (ah->config.led_active_high) ? 1 : 0);
721 ath9k_hw_gpio_request_out(ah, ah->led_pin, NULL,
722 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
723 }
724
725
726
727
728
729 ath9k_cmn_init_crypto(sc->sc_ah);
730
731 ath9k_hw_reset_tsf(ah);
732
733 spin_unlock_bh(&sc->sc_pcu_lock);
734
735 ath9k_rng_start(sc);
736
737 mutex_unlock(&sc->mutex);
738
739 ath9k_ps_restore(sc);
740
741 return 0;
742}
743
744static void ath9k_tx(struct ieee80211_hw *hw,
745 struct ieee80211_tx_control *control,
746 struct sk_buff *skb)
747{
748 struct ath_softc *sc = hw->priv;
749 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
750 struct ath_tx_control txctl;
751 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
752 unsigned long flags;
753
754 if (sc->ps_enabled) {
755
756
757
758
759 if (ieee80211_is_data(hdr->frame_control) &&
760 !ieee80211_is_nullfunc(hdr->frame_control) &&
761 !ieee80211_has_pm(hdr->frame_control)) {
762 ath_dbg(common, PS,
763 "Add PM=1 for a TX frame while in PS mode\n");
764 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
765 }
766 }
767
768 if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_NETWORK_SLEEP)) {
769
770
771
772
773
774 ath9k_ps_wakeup(sc);
775 spin_lock_irqsave(&sc->sc_pm_lock, flags);
776 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
777 ath9k_hw_setrxabort(sc->sc_ah, 0);
778 if (ieee80211_is_pspoll(hdr->frame_control)) {
779 ath_dbg(common, PS,
780 "Sending PS-Poll to pick a buffered frame\n");
781 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
782 } else {
783 ath_dbg(common, PS, "Wake up to complete TX\n");
784 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
785 }
786
787
788
789
790
791 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
792 ath9k_ps_restore(sc);
793 }
794
795
796
797
798
799 if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_FULL_SLEEP)) {
800 ath_err(common, "TX while HW is in FULL_SLEEP mode\n");
801 goto exit;
802 }
803
804 memset(&txctl, 0, sizeof(struct ath_tx_control));
805 txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
806 txctl.sta = control->sta;
807
808 ath_dbg(common, XMIT, "transmitting packet, skb: %p\n", skb);
809
810 if (ath_tx_start(hw, skb, &txctl) != 0) {
811 ath_dbg(common, XMIT, "TX failed\n");
812 TX_STAT_INC(sc, txctl.txq->axq_qnum, txfailed);
813 goto exit;
814 }
815
816 return;
817exit:
818 ieee80211_free_txskb(hw, skb);
819}
820
821static void ath9k_stop(struct ieee80211_hw *hw)
822{
823 struct ath_softc *sc = hw->priv;
824 struct ath_hw *ah = sc->sc_ah;
825 struct ath_common *common = ath9k_hw_common(ah);
826 bool prev_idle;
827
828 ath9k_deinit_channel_context(sc);
829
830 mutex_lock(&sc->mutex);
831
832 ath9k_rng_stop(sc);
833
834 ath_cancel_work(sc);
835
836 if (test_bit(ATH_OP_INVALID, &common->op_flags)) {
837 ath_dbg(common, ANY, "Device not present\n");
838 mutex_unlock(&sc->mutex);
839 return;
840 }
841
842
843 ath9k_ps_wakeup(sc);
844
845 spin_lock_bh(&sc->sc_pcu_lock);
846
847
848 ah->imask &= ~ATH9K_INT_GLOBAL;
849
850
851
852 ath9k_hw_disable_interrupts(ah);
853
854 spin_unlock_bh(&sc->sc_pcu_lock);
855
856
857
858 synchronize_irq(sc->irq);
859 tasklet_kill(&sc->intr_tq);
860 tasklet_kill(&sc->bcon_tasklet);
861
862 prev_idle = sc->ps_idle;
863 sc->ps_idle = true;
864
865 spin_lock_bh(&sc->sc_pcu_lock);
866
867 if (ah->led_pin >= 0) {
868 ath9k_hw_set_gpio(ah, ah->led_pin,
869 (ah->config.led_active_high) ? 0 : 1);
870 ath9k_hw_gpio_request_in(ah, ah->led_pin, NULL);
871 }
872
873 ath_prepare_reset(sc);
874
875 if (sc->rx.frag) {
876 dev_kfree_skb_any(sc->rx.frag);
877 sc->rx.frag = NULL;
878 }
879
880 if (!ah->curchan)
881 ah->curchan = ath9k_cmn_get_channel(hw, ah,
882 &sc->cur_chan->chandef);
883
884 ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
885
886 set_bit(ATH_OP_INVALID, &common->op_flags);
887
888 ath9k_hw_phy_disable(ah);
889
890 ath9k_hw_configpcipowersave(ah, true);
891
892 spin_unlock_bh(&sc->sc_pcu_lock);
893
894 ath9k_ps_restore(sc);
895
896 sc->ps_idle = prev_idle;
897
898 mutex_unlock(&sc->mutex);
899
900 ath_dbg(common, CONFIG, "Driver halt\n");
901}
902
903static bool ath9k_uses_beacons(int type)
904{
905 switch (type) {
906 case NL80211_IFTYPE_AP:
907 case NL80211_IFTYPE_ADHOC:
908 case NL80211_IFTYPE_MESH_POINT:
909 return true;
910 default:
911 return false;
912 }
913}
914
915static void ath9k_vif_iter_set_beacon(struct ath9k_vif_iter_data *iter_data,
916 struct ieee80211_vif *vif)
917{
918
919 if (!iter_data->primary_beacon_vif) {
920 iter_data->primary_beacon_vif = vif;
921 } else {
922 if (iter_data->primary_beacon_vif->type != NL80211_IFTYPE_AP &&
923 vif->type == NL80211_IFTYPE_AP)
924 iter_data->primary_beacon_vif = vif;
925 }
926
927 iter_data->beacons = true;
928 iter_data->nbcnvifs += 1;
929}
930
931static void ath9k_vif_iter(struct ath9k_vif_iter_data *iter_data,
932 u8 *mac, struct ieee80211_vif *vif)
933{
934 struct ath_vif *avp = (struct ath_vif *)vif->drv_priv;
935 int i;
936
937 if (iter_data->has_hw_macaddr) {
938 for (i = 0; i < ETH_ALEN; i++)
939 iter_data->mask[i] &=
940 ~(iter_data->hw_macaddr[i] ^ mac[i]);
941 } else {
942 memcpy(iter_data->hw_macaddr, mac, ETH_ALEN);
943 iter_data->has_hw_macaddr = true;
944 }
945
946 if (!vif->bss_conf.use_short_slot)
947 iter_data->slottime = 20;
948
949 switch (vif->type) {
950 case NL80211_IFTYPE_AP:
951 iter_data->naps++;
952 if (vif->bss_conf.enable_beacon)
953 ath9k_vif_iter_set_beacon(iter_data, vif);
954 break;
955 case NL80211_IFTYPE_STATION:
956 iter_data->nstations++;
957 if (avp->assoc && !iter_data->primary_sta)
958 iter_data->primary_sta = vif;
959 break;
960 case NL80211_IFTYPE_OCB:
961 iter_data->nocbs++;
962 break;
963 case NL80211_IFTYPE_ADHOC:
964 iter_data->nadhocs++;
965 if (vif->bss_conf.enable_beacon)
966 ath9k_vif_iter_set_beacon(iter_data, vif);
967 break;
968 case NL80211_IFTYPE_MESH_POINT:
969 iter_data->nmeshes++;
970 if (vif->bss_conf.enable_beacon)
971 ath9k_vif_iter_set_beacon(iter_data, vif);
972 break;
973 case NL80211_IFTYPE_WDS:
974 iter_data->nwds++;
975 break;
976 default:
977 break;
978 }
979}
980
981static void ath9k_update_bssid_mask(struct ath_softc *sc,
982 struct ath_chanctx *ctx,
983 struct ath9k_vif_iter_data *iter_data)
984{
985 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
986 struct ath_vif *avp;
987 int i;
988
989 if (!ath9k_is_chanctx_enabled())
990 return;
991
992 list_for_each_entry(avp, &ctx->vifs, list) {
993 if (ctx->nvifs_assigned != 1)
994 continue;
995
996 if (!iter_data->has_hw_macaddr)
997 continue;
998
999 ether_addr_copy(common->curbssid, avp->bssid);
1000
1001
1002 for (i = 0; i < ETH_ALEN; i++)
1003 iter_data->mask[i] &=
1004 ~(iter_data->hw_macaddr[i] ^
1005 sc->hw->wiphy->perm_addr[i]);
1006 }
1007}
1008
1009
1010void ath9k_calculate_iter_data(struct ath_softc *sc,
1011 struct ath_chanctx *ctx,
1012 struct ath9k_vif_iter_data *iter_data)
1013{
1014 struct ath_vif *avp;
1015
1016
1017
1018
1019
1020 memset(iter_data, 0, sizeof(*iter_data));
1021 eth_broadcast_addr(iter_data->mask);
1022 iter_data->slottime = 9;
1023
1024 list_for_each_entry(avp, &ctx->vifs, list)
1025 ath9k_vif_iter(iter_data, avp->vif->addr, avp->vif);
1026
1027 ath9k_update_bssid_mask(sc, ctx, iter_data);
1028}
1029
1030static void ath9k_set_assoc_state(struct ath_softc *sc,
1031 struct ieee80211_vif *vif, bool changed)
1032{
1033 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1034 struct ath_vif *avp = (struct ath_vif *)vif->drv_priv;
1035 unsigned long flags;
1036
1037 set_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1038
1039 ether_addr_copy(common->curbssid, avp->bssid);
1040 common->curaid = avp->aid;
1041 ath9k_hw_write_associd(sc->sc_ah);
1042
1043 if (changed) {
1044 common->last_rssi = ATH_RSSI_DUMMY_MARKER;
1045 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1046
1047 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1048 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
1049 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1050 }
1051
1052 if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1053 ath9k_mci_update_wlan_channels(sc, false);
1054
1055 ath_dbg(common, CONFIG,
1056 "Primary Station interface: %pM, BSSID: %pM\n",
1057 vif->addr, common->curbssid);
1058}
1059
1060#ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1061static void ath9k_set_offchannel_state(struct ath_softc *sc)
1062{
1063 struct ath_hw *ah = sc->sc_ah;
1064 struct ath_common *common = ath9k_hw_common(ah);
1065 struct ieee80211_vif *vif = NULL;
1066
1067 ath9k_ps_wakeup(sc);
1068
1069 if (sc->offchannel.state < ATH_OFFCHANNEL_ROC_START)
1070 vif = sc->offchannel.scan_vif;
1071 else
1072 vif = sc->offchannel.roc_vif;
1073
1074 if (WARN_ON(!vif))
1075 goto exit;
1076
1077 eth_zero_addr(common->curbssid);
1078 eth_broadcast_addr(common->bssidmask);
1079 memcpy(common->macaddr, vif->addr, ETH_ALEN);
1080 common->curaid = 0;
1081 ah->opmode = vif->type;
1082 ah->imask &= ~ATH9K_INT_SWBA;
1083 ah->imask &= ~ATH9K_INT_TSFOOR;
1084 ah->slottime = 9;
1085
1086 ath_hw_setbssidmask(common);
1087 ath9k_hw_setopmode(ah);
1088 ath9k_hw_write_associd(sc->sc_ah);
1089 ath9k_hw_set_interrupts(ah);
1090 ath9k_hw_init_global_settings(ah);
1091
1092exit:
1093 ath9k_ps_restore(sc);
1094}
1095#endif
1096
1097
1098void ath9k_calculate_summary_state(struct ath_softc *sc,
1099 struct ath_chanctx *ctx)
1100{
1101 struct ath_hw *ah = sc->sc_ah;
1102 struct ath_common *common = ath9k_hw_common(ah);
1103 struct ath9k_vif_iter_data iter_data;
1104
1105 ath_chanctx_check_active(sc, ctx);
1106
1107 if (ctx != sc->cur_chan)
1108 return;
1109
1110#ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1111 if (ctx == &sc->offchannel.chan)
1112 return ath9k_set_offchannel_state(sc);
1113#endif
1114
1115 ath9k_ps_wakeup(sc);
1116 ath9k_calculate_iter_data(sc, ctx, &iter_data);
1117
1118 if (iter_data.has_hw_macaddr)
1119 memcpy(common->macaddr, iter_data.hw_macaddr, ETH_ALEN);
1120
1121 memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1122 ath_hw_setbssidmask(common);
1123
1124 if (iter_data.naps > 0) {
1125 ath9k_hw_set_tsfadjust(ah, true);
1126 ah->opmode = NL80211_IFTYPE_AP;
1127 } else {
1128 ath9k_hw_set_tsfadjust(ah, false);
1129 if (iter_data.beacons)
1130 ath9k_beacon_ensure_primary_slot(sc);
1131
1132 if (iter_data.nmeshes)
1133 ah->opmode = NL80211_IFTYPE_MESH_POINT;
1134 else if (iter_data.nocbs)
1135 ah->opmode = NL80211_IFTYPE_OCB;
1136 else if (iter_data.nwds)
1137 ah->opmode = NL80211_IFTYPE_AP;
1138 else if (iter_data.nadhocs)
1139 ah->opmode = NL80211_IFTYPE_ADHOC;
1140 else
1141 ah->opmode = NL80211_IFTYPE_STATION;
1142 }
1143
1144 ath9k_hw_setopmode(ah);
1145
1146 ctx->switch_after_beacon = false;
1147 if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0)
1148 ah->imask |= ATH9K_INT_TSFOOR;
1149 else {
1150 ah->imask &= ~ATH9K_INT_TSFOOR;
1151 if (iter_data.naps == 1 && iter_data.beacons)
1152 ctx->switch_after_beacon = true;
1153 }
1154
1155 if (ah->opmode == NL80211_IFTYPE_STATION) {
1156 bool changed = (iter_data.primary_sta != ctx->primary_sta);
1157
1158 if (iter_data.primary_sta) {
1159 iter_data.primary_beacon_vif = iter_data.primary_sta;
1160 iter_data.beacons = true;
1161 ath9k_set_assoc_state(sc, iter_data.primary_sta,
1162 changed);
1163 ctx->primary_sta = iter_data.primary_sta;
1164 } else {
1165 ctx->primary_sta = NULL;
1166 eth_zero_addr(common->curbssid);
1167 common->curaid = 0;
1168 ath9k_hw_write_associd(sc->sc_ah);
1169 if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1170 ath9k_mci_update_wlan_channels(sc, true);
1171 }
1172 }
1173 sc->nbcnvifs = iter_data.nbcnvifs;
1174 ath9k_beacon_config(sc, iter_data.primary_beacon_vif,
1175 iter_data.beacons);
1176 ath9k_hw_set_interrupts(ah);
1177
1178 if (ah->slottime != iter_data.slottime) {
1179 ah->slottime = iter_data.slottime;
1180 ath9k_hw_init_global_settings(ah);
1181 }
1182
1183 if (iter_data.primary_sta)
1184 set_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1185 else
1186 clear_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1187
1188 ath_dbg(common, CONFIG,
1189 "macaddr: %pM, bssid: %pM, bssidmask: %pM\n",
1190 common->macaddr, common->curbssid, common->bssidmask);
1191
1192 ath9k_ps_restore(sc);
1193}
1194
1195static void ath9k_tpc_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1196{
1197 int *power = data;
1198
1199 if (vif->bss_conf.txpower == INT_MIN)
1200 return;
1201
1202 if (*power < vif->bss_conf.txpower)
1203 *power = vif->bss_conf.txpower;
1204}
1205
1206
1207void ath9k_set_txpower(struct ath_softc *sc, struct ieee80211_vif *vif)
1208{
1209 int power;
1210 struct ath_hw *ah = sc->sc_ah;
1211 struct ath_regulatory *reg = ath9k_hw_regulatory(ah);
1212
1213 ath9k_ps_wakeup(sc);
1214 if (ah->tpc_enabled) {
1215 power = (vif) ? vif->bss_conf.txpower : -1;
1216 ieee80211_iterate_active_interfaces_atomic(
1217 sc->hw, IEEE80211_IFACE_ITER_RESUME_ALL,
1218 ath9k_tpc_vif_iter, &power);
1219 if (power == -1)
1220 power = sc->hw->conf.power_level;
1221 } else {
1222 power = sc->hw->conf.power_level;
1223 }
1224 sc->cur_chan->txpower = 2 * power;
1225 ath9k_hw_set_txpowerlimit(ah, sc->cur_chan->txpower, false);
1226 sc->cur_chan->cur_txpower = reg->max_power_level;
1227 ath9k_ps_restore(sc);
1228}
1229
1230static void ath9k_assign_hw_queues(struct ieee80211_hw *hw,
1231 struct ieee80211_vif *vif)
1232{
1233 int i;
1234
1235 if (!ath9k_is_chanctx_enabled())
1236 return;
1237
1238 for (i = 0; i < IEEE80211_NUM_ACS; i++)
1239 vif->hw_queue[i] = i;
1240
1241 if (vif->type == NL80211_IFTYPE_AP ||
1242 vif->type == NL80211_IFTYPE_MESH_POINT)
1243 vif->cab_queue = hw->queues - 2;
1244 else
1245 vif->cab_queue = IEEE80211_INVAL_HW_QUEUE;
1246}
1247
1248static int ath9k_add_interface(struct ieee80211_hw *hw,
1249 struct ieee80211_vif *vif)
1250{
1251 struct ath_softc *sc = hw->priv;
1252 struct ath_hw *ah = sc->sc_ah;
1253 struct ath_common *common = ath9k_hw_common(ah);
1254 struct ath_vif *avp = (void *)vif->drv_priv;
1255 struct ath_node *an = &avp->mcast_node;
1256
1257 mutex_lock(&sc->mutex);
1258 if (IS_ENABLED(CONFIG_ATH9K_TX99)) {
1259 if (sc->cur_chan->nvifs >= 1) {
1260 mutex_unlock(&sc->mutex);
1261 return -EOPNOTSUPP;
1262 }
1263 sc->tx99_vif = vif;
1264 }
1265
1266 ath_dbg(common, CONFIG, "Attach a VIF of type: %d\n", vif->type);
1267 sc->cur_chan->nvifs++;
1268
1269 if (vif->type == NL80211_IFTYPE_STATION && ath9k_is_chanctx_enabled())
1270 vif->driver_flags |= IEEE80211_VIF_GET_NOA_UPDATE;
1271
1272 if (ath9k_uses_beacons(vif->type))
1273 ath9k_beacon_assign_slot(sc, vif);
1274
1275 avp->vif = vif;
1276 if (!ath9k_is_chanctx_enabled()) {
1277 avp->chanctx = sc->cur_chan;
1278 list_add_tail(&avp->list, &avp->chanctx->vifs);
1279 }
1280
1281 ath9k_calculate_summary_state(sc, avp->chanctx);
1282
1283 ath9k_assign_hw_queues(hw, vif);
1284
1285 ath9k_set_txpower(sc, vif);
1286
1287 an->sc = sc;
1288 an->sta = NULL;
1289 an->vif = vif;
1290 an->no_ps_filter = true;
1291 ath_tx_node_init(sc, an);
1292
1293 mutex_unlock(&sc->mutex);
1294 return 0;
1295}
1296
1297static int ath9k_change_interface(struct ieee80211_hw *hw,
1298 struct ieee80211_vif *vif,
1299 enum nl80211_iftype new_type,
1300 bool p2p)
1301{
1302 struct ath_softc *sc = hw->priv;
1303 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1304 struct ath_vif *avp = (void *)vif->drv_priv;
1305
1306 mutex_lock(&sc->mutex);
1307
1308 if (IS_ENABLED(CONFIG_ATH9K_TX99)) {
1309 mutex_unlock(&sc->mutex);
1310 return -EOPNOTSUPP;
1311 }
1312
1313 ath_dbg(common, CONFIG, "Change Interface\n");
1314
1315 if (ath9k_uses_beacons(vif->type))
1316 ath9k_beacon_remove_slot(sc, vif);
1317
1318 vif->type = new_type;
1319 vif->p2p = p2p;
1320
1321 if (ath9k_uses_beacons(vif->type))
1322 ath9k_beacon_assign_slot(sc, vif);
1323
1324 ath9k_assign_hw_queues(hw, vif);
1325 ath9k_calculate_summary_state(sc, avp->chanctx);
1326
1327 ath9k_set_txpower(sc, vif);
1328
1329 mutex_unlock(&sc->mutex);
1330 return 0;
1331}
1332
1333static void ath9k_remove_interface(struct ieee80211_hw *hw,
1334 struct ieee80211_vif *vif)
1335{
1336 struct ath_softc *sc = hw->priv;
1337 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1338 struct ath_vif *avp = (void *)vif->drv_priv;
1339
1340 ath_dbg(common, CONFIG, "Detach Interface\n");
1341
1342 mutex_lock(&sc->mutex);
1343
1344 ath9k_p2p_remove_vif(sc, vif);
1345
1346 sc->cur_chan->nvifs--;
1347 sc->tx99_vif = NULL;
1348 if (!ath9k_is_chanctx_enabled())
1349 list_del(&avp->list);
1350
1351 if (ath9k_uses_beacons(vif->type))
1352 ath9k_beacon_remove_slot(sc, vif);
1353
1354 ath_tx_node_cleanup(sc, &avp->mcast_node);
1355
1356 ath9k_calculate_summary_state(sc, avp->chanctx);
1357
1358 ath9k_set_txpower(sc, NULL);
1359
1360 mutex_unlock(&sc->mutex);
1361}
1362
1363static void ath9k_enable_ps(struct ath_softc *sc)
1364{
1365 struct ath_hw *ah = sc->sc_ah;
1366 struct ath_common *common = ath9k_hw_common(ah);
1367
1368 if (IS_ENABLED(CONFIG_ATH9K_TX99))
1369 return;
1370
1371 sc->ps_enabled = true;
1372 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1373 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1374 ah->imask |= ATH9K_INT_TIM_TIMER;
1375 ath9k_hw_set_interrupts(ah);
1376 }
1377 ath9k_hw_setrxabort(ah, 1);
1378 }
1379 ath_dbg(common, PS, "PowerSave enabled\n");
1380}
1381
1382static void ath9k_disable_ps(struct ath_softc *sc)
1383{
1384 struct ath_hw *ah = sc->sc_ah;
1385 struct ath_common *common = ath9k_hw_common(ah);
1386
1387 if (IS_ENABLED(CONFIG_ATH9K_TX99))
1388 return;
1389
1390 sc->ps_enabled = false;
1391 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1392 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1393 ath9k_hw_setrxabort(ah, 0);
1394 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1395 PS_WAIT_FOR_CAB |
1396 PS_WAIT_FOR_PSPOLL_DATA |
1397 PS_WAIT_FOR_TX_ACK);
1398 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1399 ah->imask &= ~ATH9K_INT_TIM_TIMER;
1400 ath9k_hw_set_interrupts(ah);
1401 }
1402 }
1403 ath_dbg(common, PS, "PowerSave disabled\n");
1404}
1405
1406static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1407{
1408 struct ath_softc *sc = hw->priv;
1409 struct ath_hw *ah = sc->sc_ah;
1410 struct ath_common *common = ath9k_hw_common(ah);
1411 struct ieee80211_conf *conf = &hw->conf;
1412 struct ath_chanctx *ctx = sc->cur_chan;
1413
1414 ath9k_ps_wakeup(sc);
1415 mutex_lock(&sc->mutex);
1416
1417 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1418 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1419 if (sc->ps_idle) {
1420 ath_cancel_work(sc);
1421 ath9k_stop_btcoex(sc);
1422 } else {
1423 ath9k_start_btcoex(sc);
1424
1425
1426
1427
1428 ath_chanctx_set_channel(sc, ctx, &ctx->chandef);
1429 }
1430 }
1431
1432
1433
1434
1435
1436
1437
1438 if (changed & IEEE80211_CONF_CHANGE_PS) {
1439 unsigned long flags;
1440 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1441 if (conf->flags & IEEE80211_CONF_PS)
1442 ath9k_enable_ps(sc);
1443 else
1444 ath9k_disable_ps(sc);
1445 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1446 }
1447
1448 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1449 if (conf->flags & IEEE80211_CONF_MONITOR) {
1450 ath_dbg(common, CONFIG, "Monitor mode is enabled\n");
1451 sc->sc_ah->is_monitoring = true;
1452 } else {
1453 ath_dbg(common, CONFIG, "Monitor mode is disabled\n");
1454 sc->sc_ah->is_monitoring = false;
1455 }
1456 }
1457
1458 if (!ath9k_is_chanctx_enabled() && (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
1459 ctx->offchannel = !!(conf->flags & IEEE80211_CONF_OFFCHANNEL);
1460 ath_chanctx_set_channel(sc, ctx, &hw->conf.chandef);
1461 }
1462
1463 if (changed & IEEE80211_CONF_CHANGE_POWER)
1464 ath9k_set_txpower(sc, NULL);
1465
1466 mutex_unlock(&sc->mutex);
1467 ath9k_ps_restore(sc);
1468
1469 return 0;
1470}
1471
1472#define SUPPORTED_FILTERS \
1473 (FIF_ALLMULTI | \
1474 FIF_CONTROL | \
1475 FIF_PSPOLL | \
1476 FIF_OTHER_BSS | \
1477 FIF_BCN_PRBRESP_PROMISC | \
1478 FIF_PROBE_REQ | \
1479 FIF_MCAST_ACTION | \
1480 FIF_FCSFAIL)
1481
1482
1483static void ath9k_configure_filter(struct ieee80211_hw *hw,
1484 unsigned int changed_flags,
1485 unsigned int *total_flags,
1486 u64 multicast)
1487{
1488 struct ath_softc *sc = hw->priv;
1489 struct ath_chanctx *ctx;
1490 u32 rfilt;
1491
1492 changed_flags &= SUPPORTED_FILTERS;
1493 *total_flags &= SUPPORTED_FILTERS;
1494
1495 spin_lock_bh(&sc->chan_lock);
1496 ath_for_each_chanctx(sc, ctx)
1497 ctx->rxfilter = *total_flags;
1498#ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1499 sc->offchannel.chan.rxfilter = *total_flags;
1500#endif
1501 spin_unlock_bh(&sc->chan_lock);
1502
1503 ath9k_ps_wakeup(sc);
1504 rfilt = ath_calcrxfilter(sc);
1505 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1506 ath9k_ps_restore(sc);
1507
1508 ath_dbg(ath9k_hw_common(sc->sc_ah), CONFIG, "Set HW RX filter: 0x%x\n",
1509 rfilt);
1510}
1511
1512static int ath9k_sta_add(struct ieee80211_hw *hw,
1513 struct ieee80211_vif *vif,
1514 struct ieee80211_sta *sta)
1515{
1516 struct ath_softc *sc = hw->priv;
1517 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1518 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1519 struct ieee80211_key_conf ps_key = { };
1520 int key;
1521
1522 ath_node_attach(sc, sta, vif);
1523
1524 if (vif->type != NL80211_IFTYPE_AP &&
1525 vif->type != NL80211_IFTYPE_AP_VLAN)
1526 return 0;
1527
1528 key = ath_key_config(common, vif, sta, &ps_key);
1529 if (key > 0) {
1530 an->ps_key = key;
1531 an->key_idx[0] = key;
1532 }
1533
1534 return 0;
1535}
1536
1537static void ath9k_del_ps_key(struct ath_softc *sc,
1538 struct ieee80211_vif *vif,
1539 struct ieee80211_sta *sta)
1540{
1541 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1542 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1543 struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
1544
1545 if (!an->ps_key)
1546 return;
1547
1548 ath_key_delete(common, &ps_key);
1549 an->ps_key = 0;
1550 an->key_idx[0] = 0;
1551}
1552
1553static int ath9k_sta_remove(struct ieee80211_hw *hw,
1554 struct ieee80211_vif *vif,
1555 struct ieee80211_sta *sta)
1556{
1557 struct ath_softc *sc = hw->priv;
1558
1559 ath9k_del_ps_key(sc, vif, sta);
1560 ath_node_detach(sc, sta);
1561
1562 return 0;
1563}
1564
1565static int ath9k_sta_state(struct ieee80211_hw *hw,
1566 struct ieee80211_vif *vif,
1567 struct ieee80211_sta *sta,
1568 enum ieee80211_sta_state old_state,
1569 enum ieee80211_sta_state new_state)
1570{
1571 struct ath_softc *sc = hw->priv;
1572 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1573 int ret = 0;
1574
1575 if (old_state == IEEE80211_STA_NOTEXIST &&
1576 new_state == IEEE80211_STA_NONE) {
1577 ret = ath9k_sta_add(hw, vif, sta);
1578 ath_dbg(common, CONFIG,
1579 "Add station: %pM\n", sta->addr);
1580 } else if (old_state == IEEE80211_STA_NONE &&
1581 new_state == IEEE80211_STA_NOTEXIST) {
1582 ret = ath9k_sta_remove(hw, vif, sta);
1583 ath_dbg(common, CONFIG,
1584 "Remove station: %pM\n", sta->addr);
1585 }
1586
1587 if (ath9k_is_chanctx_enabled()) {
1588 if (vif->type == NL80211_IFTYPE_STATION) {
1589 if (old_state == IEEE80211_STA_ASSOC &&
1590 new_state == IEEE80211_STA_AUTHORIZED)
1591 ath_chanctx_event(sc, vif,
1592 ATH_CHANCTX_EVENT_AUTHORIZED);
1593 }
1594 }
1595
1596 return ret;
1597}
1598
1599static void ath9k_sta_set_tx_filter(struct ath_hw *ah,
1600 struct ath_node *an,
1601 bool set)
1602{
1603 int i;
1604
1605 for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1606 if (!an->key_idx[i])
1607 continue;
1608 ath9k_hw_set_tx_filter(ah, an->key_idx[i], set);
1609 }
1610}
1611
1612static void ath9k_sta_notify(struct ieee80211_hw *hw,
1613 struct ieee80211_vif *vif,
1614 enum sta_notify_cmd cmd,
1615 struct ieee80211_sta *sta)
1616{
1617 struct ath_softc *sc = hw->priv;
1618 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1619
1620 switch (cmd) {
1621 case STA_NOTIFY_SLEEP:
1622 an->sleeping = true;
1623 ath_tx_aggr_sleep(sta, sc, an);
1624 ath9k_sta_set_tx_filter(sc->sc_ah, an, true);
1625 break;
1626 case STA_NOTIFY_AWAKE:
1627 ath9k_sta_set_tx_filter(sc->sc_ah, an, false);
1628 an->sleeping = false;
1629 ath_tx_aggr_wakeup(sc, an);
1630 break;
1631 }
1632}
1633
1634static int ath9k_conf_tx(struct ieee80211_hw *hw,
1635 struct ieee80211_vif *vif, u16 queue,
1636 const struct ieee80211_tx_queue_params *params)
1637{
1638 struct ath_softc *sc = hw->priv;
1639 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1640 struct ath_txq *txq;
1641 struct ath9k_tx_queue_info qi;
1642 int ret = 0;
1643
1644 if (queue >= IEEE80211_NUM_ACS)
1645 return 0;
1646
1647 txq = sc->tx.txq_map[queue];
1648
1649 ath9k_ps_wakeup(sc);
1650 mutex_lock(&sc->mutex);
1651
1652 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1653
1654 qi.tqi_aifs = params->aifs;
1655 qi.tqi_cwmin = params->cw_min;
1656 qi.tqi_cwmax = params->cw_max;
1657 qi.tqi_burstTime = params->txop * 32;
1658
1659 ath_dbg(common, CONFIG,
1660 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1661 queue, txq->axq_qnum, params->aifs, params->cw_min,
1662 params->cw_max, params->txop);
1663
1664 ath_update_max_aggr_framelen(sc, queue, qi.tqi_burstTime);
1665 ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1666 if (ret)
1667 ath_err(common, "TXQ Update failed\n");
1668
1669 mutex_unlock(&sc->mutex);
1670 ath9k_ps_restore(sc);
1671
1672 return ret;
1673}
1674
1675static int ath9k_set_key(struct ieee80211_hw *hw,
1676 enum set_key_cmd cmd,
1677 struct ieee80211_vif *vif,
1678 struct ieee80211_sta *sta,
1679 struct ieee80211_key_conf *key)
1680{
1681 struct ath_softc *sc = hw->priv;
1682 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1683 struct ath_node *an = NULL;
1684 int ret = 0, i;
1685
1686 if (ath9k_modparam_nohwcrypt)
1687 return -ENOSPC;
1688
1689 if ((vif->type == NL80211_IFTYPE_ADHOC ||
1690 vif->type == NL80211_IFTYPE_MESH_POINT) &&
1691 (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
1692 key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
1693 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
1694
1695
1696
1697
1698
1699
1700
1701 return -EOPNOTSUPP;
1702 }
1703
1704 mutex_lock(&sc->mutex);
1705 ath9k_ps_wakeup(sc);
1706 ath_dbg(common, CONFIG, "Set HW Key %d\n", cmd);
1707 if (sta)
1708 an = (struct ath_node *)sta->drv_priv;
1709
1710 switch (cmd) {
1711 case SET_KEY:
1712 if (sta)
1713 ath9k_del_ps_key(sc, vif, sta);
1714
1715 key->hw_key_idx = 0;
1716 ret = ath_key_config(common, vif, sta, key);
1717 if (ret >= 0) {
1718 key->hw_key_idx = ret;
1719
1720 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1721 if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1722 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1723 if (sc->sc_ah->sw_mgmt_crypto_tx &&
1724 key->cipher == WLAN_CIPHER_SUITE_CCMP)
1725 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT_TX;
1726 ret = 0;
1727 }
1728 if (an && key->hw_key_idx) {
1729 for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1730 if (an->key_idx[i])
1731 continue;
1732 an->key_idx[i] = key->hw_key_idx;
1733 break;
1734 }
1735 WARN_ON(i == ARRAY_SIZE(an->key_idx));
1736 }
1737 break;
1738 case DISABLE_KEY:
1739 ath_key_delete(common, key);
1740 if (an) {
1741 for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1742 if (an->key_idx[i] != key->hw_key_idx)
1743 continue;
1744 an->key_idx[i] = 0;
1745 break;
1746 }
1747 }
1748 key->hw_key_idx = 0;
1749 break;
1750 default:
1751 ret = -EINVAL;
1752 }
1753
1754 ath9k_ps_restore(sc);
1755 mutex_unlock(&sc->mutex);
1756
1757 return ret;
1758}
1759
1760static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1761 struct ieee80211_vif *vif,
1762 struct ieee80211_bss_conf *bss_conf,
1763 u32 changed)
1764{
1765#define CHECK_ANI \
1766 (BSS_CHANGED_ASSOC | \
1767 BSS_CHANGED_IBSS | \
1768 BSS_CHANGED_BEACON_ENABLED)
1769
1770 struct ath_softc *sc = hw->priv;
1771 struct ath_hw *ah = sc->sc_ah;
1772 struct ath_common *common = ath9k_hw_common(ah);
1773 struct ath_vif *avp = (void *)vif->drv_priv;
1774 int slottime;
1775
1776 ath9k_ps_wakeup(sc);
1777 mutex_lock(&sc->mutex);
1778
1779 if (changed & BSS_CHANGED_ASSOC) {
1780 ath_dbg(common, CONFIG, "BSSID %pM Changed ASSOC %d\n",
1781 bss_conf->bssid, bss_conf->assoc);
1782
1783 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1784 avp->aid = bss_conf->aid;
1785 avp->assoc = bss_conf->assoc;
1786
1787 ath9k_calculate_summary_state(sc, avp->chanctx);
1788 }
1789
1790 if ((changed & BSS_CHANGED_IBSS) ||
1791 (changed & BSS_CHANGED_OCB)) {
1792 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1793 common->curaid = bss_conf->aid;
1794 ath9k_hw_write_associd(sc->sc_ah);
1795 }
1796
1797 if ((changed & BSS_CHANGED_BEACON_ENABLED) ||
1798 (changed & BSS_CHANGED_BEACON_INT) ||
1799 (changed & BSS_CHANGED_BEACON_INFO)) {
1800 ath9k_calculate_summary_state(sc, avp->chanctx);
1801 }
1802
1803 if ((avp->chanctx == sc->cur_chan) &&
1804 (changed & BSS_CHANGED_ERP_SLOT)) {
1805 if (bss_conf->use_short_slot)
1806 slottime = 9;
1807 else
1808 slottime = 20;
1809
1810 if (vif->type == NL80211_IFTYPE_AP) {
1811
1812
1813
1814
1815
1816 sc->beacon.slottime = slottime;
1817 sc->beacon.updateslot = UPDATE;
1818 } else {
1819 ah->slottime = slottime;
1820 ath9k_hw_init_global_settings(ah);
1821 }
1822 }
1823
1824 if (changed & BSS_CHANGED_P2P_PS)
1825 ath9k_p2p_bss_info_changed(sc, vif);
1826
1827 if (changed & CHECK_ANI)
1828 ath_check_ani(sc);
1829
1830 if (changed & BSS_CHANGED_TXPOWER) {
1831 ath_dbg(common, CONFIG, "vif %pM power %d dbm power_type %d\n",
1832 vif->addr, bss_conf->txpower, bss_conf->txpower_type);
1833 ath9k_set_txpower(sc, vif);
1834 }
1835
1836 mutex_unlock(&sc->mutex);
1837 ath9k_ps_restore(sc);
1838
1839#undef CHECK_ANI
1840}
1841
1842static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1843{
1844 struct ath_softc *sc = hw->priv;
1845 struct ath_vif *avp = (void *)vif->drv_priv;
1846 u64 tsf;
1847
1848 mutex_lock(&sc->mutex);
1849 ath9k_ps_wakeup(sc);
1850
1851 if (sc->cur_chan == avp->chanctx) {
1852 tsf = ath9k_hw_gettsf64(sc->sc_ah);
1853 } else {
1854 tsf = sc->cur_chan->tsf_val +
1855 ath9k_hw_get_tsf_offset(&sc->cur_chan->tsf_ts, NULL);
1856 }
1857 tsf += le64_to_cpu(avp->tsf_adjust);
1858 ath9k_ps_restore(sc);
1859 mutex_unlock(&sc->mutex);
1860
1861 return tsf;
1862}
1863
1864static void ath9k_set_tsf(struct ieee80211_hw *hw,
1865 struct ieee80211_vif *vif,
1866 u64 tsf)
1867{
1868 struct ath_softc *sc = hw->priv;
1869 struct ath_vif *avp = (void *)vif->drv_priv;
1870
1871 mutex_lock(&sc->mutex);
1872 ath9k_ps_wakeup(sc);
1873 tsf -= le64_to_cpu(avp->tsf_adjust);
1874 ktime_get_raw_ts64(&avp->chanctx->tsf_ts);
1875 if (sc->cur_chan == avp->chanctx)
1876 ath9k_hw_settsf64(sc->sc_ah, tsf);
1877 avp->chanctx->tsf_val = tsf;
1878 ath9k_ps_restore(sc);
1879 mutex_unlock(&sc->mutex);
1880}
1881
1882static void ath9k_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1883{
1884 struct ath_softc *sc = hw->priv;
1885 struct ath_vif *avp = (void *)vif->drv_priv;
1886
1887 mutex_lock(&sc->mutex);
1888
1889 ath9k_ps_wakeup(sc);
1890 ktime_get_raw_ts64(&avp->chanctx->tsf_ts);
1891 if (sc->cur_chan == avp->chanctx)
1892 ath9k_hw_reset_tsf(sc->sc_ah);
1893 avp->chanctx->tsf_val = 0;
1894 ath9k_ps_restore(sc);
1895
1896 mutex_unlock(&sc->mutex);
1897}
1898
1899static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1900 struct ieee80211_vif *vif,
1901 struct ieee80211_ampdu_params *params)
1902{
1903 struct ath_softc *sc = hw->priv;
1904 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1905 bool flush = false;
1906 int ret = 0;
1907 struct ieee80211_sta *sta = params->sta;
1908 struct ath_node *an = (struct ath_node *)sta->drv_priv;
1909 enum ieee80211_ampdu_mlme_action action = params->action;
1910 u16 tid = params->tid;
1911 u16 *ssn = ¶ms->ssn;
1912 struct ath_atx_tid *atid;
1913
1914 mutex_lock(&sc->mutex);
1915
1916 switch (action) {
1917 case IEEE80211_AMPDU_RX_START:
1918 break;
1919 case IEEE80211_AMPDU_RX_STOP:
1920 break;
1921 case IEEE80211_AMPDU_TX_START:
1922 if (ath9k_is_chanctx_enabled()) {
1923 if (test_bit(ATH_OP_SCANNING, &common->op_flags)) {
1924 ret = -EBUSY;
1925 break;
1926 }
1927 }
1928 ath9k_ps_wakeup(sc);
1929 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
1930 if (!ret)
1931 ret = IEEE80211_AMPDU_TX_START_IMMEDIATE;
1932 ath9k_ps_restore(sc);
1933 break;
1934 case IEEE80211_AMPDU_TX_STOP_FLUSH:
1935 case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
1936 flush = true;
1937
1938 case IEEE80211_AMPDU_TX_STOP_CONT:
1939 ath9k_ps_wakeup(sc);
1940 ath_tx_aggr_stop(sc, sta, tid);
1941 if (!flush)
1942 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1943 ath9k_ps_restore(sc);
1944 break;
1945 case IEEE80211_AMPDU_TX_OPERATIONAL:
1946 atid = ath_node_to_tid(an, tid);
1947 atid->baw_size = IEEE80211_MIN_AMPDU_BUF <<
1948 sta->ht_cap.ampdu_factor;
1949 break;
1950 default:
1951 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
1952 }
1953
1954 mutex_unlock(&sc->mutex);
1955
1956 return ret;
1957}
1958
1959static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
1960 struct survey_info *survey)
1961{
1962 struct ath_softc *sc = hw->priv;
1963 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1964 struct ieee80211_supported_band *sband;
1965 struct ieee80211_channel *chan;
1966 unsigned long flags;
1967 int pos;
1968
1969 if (IS_ENABLED(CONFIG_ATH9K_TX99))
1970 return -EOPNOTSUPP;
1971
1972 spin_lock_irqsave(&common->cc_lock, flags);
1973 if (idx == 0)
1974 ath_update_survey_stats(sc);
1975
1976 sband = hw->wiphy->bands[NL80211_BAND_2GHZ];
1977 if (sband && idx >= sband->n_channels) {
1978 idx -= sband->n_channels;
1979 sband = NULL;
1980 }
1981
1982 if (!sband)
1983 sband = hw->wiphy->bands[NL80211_BAND_5GHZ];
1984
1985 if (!sband || idx >= sband->n_channels) {
1986 spin_unlock_irqrestore(&common->cc_lock, flags);
1987 return -ENOENT;
1988 }
1989
1990 chan = &sband->channels[idx];
1991 pos = chan->hw_value;
1992 memcpy(survey, &sc->survey[pos], sizeof(*survey));
1993 survey->channel = chan;
1994 spin_unlock_irqrestore(&common->cc_lock, flags);
1995
1996 return 0;
1997}
1998
1999static void ath9k_enable_dynack(struct ath_softc *sc)
2000{
2001#ifdef CONFIG_ATH9K_DYNACK
2002 u32 rfilt;
2003 struct ath_hw *ah = sc->sc_ah;
2004
2005 ath_dynack_reset(ah);
2006
2007 ah->dynack.enabled = true;
2008 rfilt = ath_calcrxfilter(sc);
2009 ath9k_hw_setrxfilter(ah, rfilt);
2010#endif
2011}
2012
2013static void ath9k_set_coverage_class(struct ieee80211_hw *hw,
2014 s16 coverage_class)
2015{
2016 struct ath_softc *sc = hw->priv;
2017 struct ath_hw *ah = sc->sc_ah;
2018
2019 if (IS_ENABLED(CONFIG_ATH9K_TX99))
2020 return;
2021
2022 mutex_lock(&sc->mutex);
2023
2024 if (coverage_class >= 0) {
2025 ah->coverage_class = coverage_class;
2026 if (ah->dynack.enabled) {
2027 u32 rfilt;
2028
2029 ah->dynack.enabled = false;
2030 rfilt = ath_calcrxfilter(sc);
2031 ath9k_hw_setrxfilter(ah, rfilt);
2032 }
2033 ath9k_ps_wakeup(sc);
2034 ath9k_hw_init_global_settings(ah);
2035 ath9k_ps_restore(sc);
2036 } else if (!ah->dynack.enabled) {
2037 ath9k_enable_dynack(sc);
2038 }
2039
2040 mutex_unlock(&sc->mutex);
2041}
2042
2043static bool ath9k_has_tx_pending(struct ath_softc *sc,
2044 bool sw_pending)
2045{
2046 int i, npend = 0;
2047
2048 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2049 if (!ATH_TXQ_SETUP(sc, i))
2050 continue;
2051
2052 npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i],
2053 sw_pending);
2054 if (npend)
2055 break;
2056 }
2057
2058 return !!npend;
2059}
2060
2061static void ath9k_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2062 u32 queues, bool drop)
2063{
2064 struct ath_softc *sc = hw->priv;
2065 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2066
2067 if (ath9k_is_chanctx_enabled()) {
2068 if (!test_bit(ATH_OP_MULTI_CHANNEL, &common->op_flags))
2069 goto flush;
2070
2071
2072
2073
2074
2075
2076
2077
2078
2079
2080
2081 __ath9k_flush(hw, queues, drop, true, true);
2082 return;
2083 }
2084flush:
2085 mutex_lock(&sc->mutex);
2086 __ath9k_flush(hw, queues, drop, true, false);
2087 mutex_unlock(&sc->mutex);
2088}
2089
2090void __ath9k_flush(struct ieee80211_hw *hw, u32 queues, bool drop,
2091 bool sw_pending, bool timeout_override)
2092{
2093 struct ath_softc *sc = hw->priv;
2094 struct ath_hw *ah = sc->sc_ah;
2095 struct ath_common *common = ath9k_hw_common(ah);
2096 int timeout;
2097 bool drain_txq;
2098
2099 cancel_delayed_work_sync(&sc->hw_check_work);
2100
2101 if (ah->ah_flags & AH_UNPLUGGED) {
2102 ath_dbg(common, ANY, "Device has been unplugged!\n");
2103 return;
2104 }
2105
2106 if (test_bit(ATH_OP_INVALID, &common->op_flags)) {
2107 ath_dbg(common, ANY, "Device not present\n");
2108 return;
2109 }
2110
2111 spin_lock_bh(&sc->chan_lock);
2112 if (timeout_override)
2113 timeout = HZ / 5;
2114 else
2115 timeout = sc->cur_chan->flush_timeout;
2116 spin_unlock_bh(&sc->chan_lock);
2117
2118 ath_dbg(common, CHAN_CTX,
2119 "Flush timeout: %d\n", jiffies_to_msecs(timeout));
2120
2121 if (wait_event_timeout(sc->tx_wait, !ath9k_has_tx_pending(sc, sw_pending),
2122 timeout) > 0)
2123 drop = false;
2124
2125 if (drop) {
2126 ath9k_ps_wakeup(sc);
2127 spin_lock_bh(&sc->sc_pcu_lock);
2128 drain_txq = ath_drain_all_txq(sc);
2129 spin_unlock_bh(&sc->sc_pcu_lock);
2130
2131 if (!drain_txq)
2132 ath_reset(sc, NULL);
2133
2134 ath9k_ps_restore(sc);
2135 }
2136
2137 ieee80211_queue_delayed_work(hw, &sc->hw_check_work,
2138 ATH_HW_CHECK_POLL_INT);
2139}
2140
2141static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
2142{
2143 struct ath_softc *sc = hw->priv;
2144
2145 return ath9k_has_tx_pending(sc, true);
2146}
2147
2148static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
2149{
2150 struct ath_softc *sc = hw->priv;
2151 struct ath_hw *ah = sc->sc_ah;
2152 struct ieee80211_vif *vif;
2153 struct ath_vif *avp;
2154 struct ath_buf *bf;
2155 struct ath_tx_status ts;
2156 bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
2157 int status;
2158
2159 vif = sc->beacon.bslot[0];
2160 if (!vif)
2161 return 0;
2162
2163 if (!vif->bss_conf.enable_beacon)
2164 return 0;
2165
2166 avp = (void *)vif->drv_priv;
2167
2168 if (!sc->beacon.tx_processed && !edma) {
2169 tasklet_disable(&sc->bcon_tasklet);
2170
2171 bf = avp->av_bcbuf;
2172 if (!bf || !bf->bf_mpdu)
2173 goto skip;
2174
2175 status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
2176 if (status == -EINPROGRESS)
2177 goto skip;
2178
2179 sc->beacon.tx_processed = true;
2180 sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
2181
2182skip:
2183 tasklet_enable(&sc->bcon_tasklet);
2184 }
2185
2186 return sc->beacon.tx_last;
2187}
2188
2189static int ath9k_get_stats(struct ieee80211_hw *hw,
2190 struct ieee80211_low_level_stats *stats)
2191{
2192 struct ath_softc *sc = hw->priv;
2193 struct ath_hw *ah = sc->sc_ah;
2194 struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
2195
2196 stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
2197 stats->dot11RTSFailureCount = mib_stats->rts_bad;
2198 stats->dot11FCSErrorCount = mib_stats->fcs_bad;
2199 stats->dot11RTSSuccessCount = mib_stats->rts_good;
2200 return 0;
2201}
2202
2203static u32 fill_chainmask(u32 cap, u32 new)
2204{
2205 u32 filled = 0;
2206 int i;
2207
2208 for (i = 0; cap && new; i++, cap >>= 1) {
2209 if (!(cap & BIT(0)))
2210 continue;
2211
2212 if (new & BIT(0))
2213 filled |= BIT(i);
2214
2215 new >>= 1;
2216 }
2217
2218 return filled;
2219}
2220
2221static bool validate_antenna_mask(struct ath_hw *ah, u32 val)
2222{
2223 if (AR_SREV_9300_20_OR_LATER(ah))
2224 return true;
2225
2226 switch (val & 0x7) {
2227 case 0x1:
2228 case 0x3:
2229 case 0x7:
2230 return true;
2231 case 0x2:
2232 return (ah->caps.rx_chainmask == 1);
2233 default:
2234 return false;
2235 }
2236}
2237
2238static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
2239{
2240 struct ath_softc *sc = hw->priv;
2241 struct ath_hw *ah = sc->sc_ah;
2242
2243 if (ah->caps.rx_chainmask != 1)
2244 rx_ant |= tx_ant;
2245
2246 if (!validate_antenna_mask(ah, rx_ant) || !tx_ant)
2247 return -EINVAL;
2248
2249 sc->ant_rx = rx_ant;
2250 sc->ant_tx = tx_ant;
2251
2252 if (ah->caps.rx_chainmask == 1)
2253 return 0;
2254
2255
2256 if (AR_SREV_9100(ah))
2257 ah->rxchainmask = 0x7;
2258 else
2259 ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant);
2260
2261 ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant);
2262 ath9k_cmn_reload_chainmask(ah);
2263
2264 return 0;
2265}
2266
2267static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
2268{
2269 struct ath_softc *sc = hw->priv;
2270
2271 *tx_ant = sc->ant_tx;
2272 *rx_ant = sc->ant_rx;
2273 return 0;
2274}
2275
2276static void ath9k_sw_scan_start(struct ieee80211_hw *hw,
2277 struct ieee80211_vif *vif,
2278 const u8 *mac_addr)
2279{
2280 struct ath_softc *sc = hw->priv;
2281 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2282 set_bit(ATH_OP_SCANNING, &common->op_flags);
2283}
2284
2285static void ath9k_sw_scan_complete(struct ieee80211_hw *hw,
2286 struct ieee80211_vif *vif)
2287{
2288 struct ath_softc *sc = hw->priv;
2289 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2290 clear_bit(ATH_OP_SCANNING, &common->op_flags);
2291}
2292
2293#ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
2294
2295static void ath9k_cancel_pending_offchannel(struct ath_softc *sc)
2296{
2297 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2298
2299 if (sc->offchannel.roc_vif) {
2300 ath_dbg(common, CHAN_CTX,
2301 "%s: Aborting RoC\n", __func__);
2302
2303 del_timer_sync(&sc->offchannel.timer);
2304 if (sc->offchannel.state >= ATH_OFFCHANNEL_ROC_START)
2305 ath_roc_complete(sc, ATH_ROC_COMPLETE_ABORT);
2306 }
2307
2308 if (test_bit(ATH_OP_SCANNING, &common->op_flags)) {
2309 ath_dbg(common, CHAN_CTX,
2310 "%s: Aborting HW scan\n", __func__);
2311
2312 del_timer_sync(&sc->offchannel.timer);
2313 ath_scan_complete(sc, true);
2314 }
2315}
2316
2317static int ath9k_hw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2318 struct ieee80211_scan_request *hw_req)
2319{
2320 struct cfg80211_scan_request *req = &hw_req->req;
2321 struct ath_softc *sc = hw->priv;
2322 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2323 int ret = 0;
2324
2325 mutex_lock(&sc->mutex);
2326
2327 if (WARN_ON(sc->offchannel.scan_req)) {
2328 ret = -EBUSY;
2329 goto out;
2330 }
2331
2332 ath9k_ps_wakeup(sc);
2333 set_bit(ATH_OP_SCANNING, &common->op_flags);
2334 sc->offchannel.scan_vif = vif;
2335 sc->offchannel.scan_req = req;
2336 sc->offchannel.scan_idx = 0;
2337
2338 ath_dbg(common, CHAN_CTX, "HW scan request received on vif: %pM\n",
2339 vif->addr);
2340
2341 if (sc->offchannel.state == ATH_OFFCHANNEL_IDLE) {
2342 ath_dbg(common, CHAN_CTX, "Starting HW scan\n");
2343 ath_offchannel_next(sc);
2344 }
2345
2346out:
2347 mutex_unlock(&sc->mutex);
2348
2349 return ret;
2350}
2351
2352static void ath9k_cancel_hw_scan(struct ieee80211_hw *hw,
2353 struct ieee80211_vif *vif)
2354{
2355 struct ath_softc *sc = hw->priv;
2356 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2357
2358 ath_dbg(common, CHAN_CTX, "Cancel HW scan on vif: %pM\n", vif->addr);
2359
2360 mutex_lock(&sc->mutex);
2361 del_timer_sync(&sc->offchannel.timer);
2362 ath_scan_complete(sc, true);
2363 mutex_unlock(&sc->mutex);
2364}
2365
2366static int ath9k_remain_on_channel(struct ieee80211_hw *hw,
2367 struct ieee80211_vif *vif,
2368 struct ieee80211_channel *chan, int duration,
2369 enum ieee80211_roc_type type)
2370{
2371 struct ath_softc *sc = hw->priv;
2372 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2373 int ret = 0;
2374
2375 mutex_lock(&sc->mutex);
2376
2377 if (WARN_ON(sc->offchannel.roc_vif)) {
2378 ret = -EBUSY;
2379 goto out;
2380 }
2381
2382 ath9k_ps_wakeup(sc);
2383 sc->offchannel.roc_vif = vif;
2384 sc->offchannel.roc_chan = chan;
2385 sc->offchannel.roc_duration = duration;
2386
2387 ath_dbg(common, CHAN_CTX,
2388 "RoC request on vif: %pM, type: %d duration: %d\n",
2389 vif->addr, type, duration);
2390
2391 if (sc->offchannel.state == ATH_OFFCHANNEL_IDLE) {
2392 ath_dbg(common, CHAN_CTX, "Starting RoC period\n");
2393 ath_offchannel_next(sc);
2394 }
2395
2396out:
2397 mutex_unlock(&sc->mutex);
2398
2399 return ret;
2400}
2401
2402static int ath9k_cancel_remain_on_channel(struct ieee80211_hw *hw,
2403 struct ieee80211_vif *vif)
2404{
2405 struct ath_softc *sc = hw->priv;
2406 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2407
2408 mutex_lock(&sc->mutex);
2409
2410 ath_dbg(common, CHAN_CTX, "Cancel RoC\n");
2411 del_timer_sync(&sc->offchannel.timer);
2412
2413 if (sc->offchannel.roc_vif) {
2414 if (sc->offchannel.state >= ATH_OFFCHANNEL_ROC_START)
2415 ath_roc_complete(sc, ATH_ROC_COMPLETE_CANCEL);
2416 }
2417
2418 mutex_unlock(&sc->mutex);
2419
2420 return 0;
2421}
2422
2423static int ath9k_add_chanctx(struct ieee80211_hw *hw,
2424 struct ieee80211_chanctx_conf *conf)
2425{
2426 struct ath_softc *sc = hw->priv;
2427 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2428 struct ath_chanctx *ctx, **ptr;
2429 int pos;
2430
2431 mutex_lock(&sc->mutex);
2432
2433 ath_for_each_chanctx(sc, ctx) {
2434 if (ctx->assigned)
2435 continue;
2436
2437 ptr = (void *) conf->drv_priv;
2438 *ptr = ctx;
2439 ctx->assigned = true;
2440 pos = ctx - &sc->chanctx[0];
2441 ctx->hw_queue_base = pos * IEEE80211_NUM_ACS;
2442
2443 ath_dbg(common, CHAN_CTX,
2444 "Add channel context: %d MHz\n",
2445 conf->def.chan->center_freq);
2446
2447 ath_chanctx_set_channel(sc, ctx, &conf->def);
2448
2449 mutex_unlock(&sc->mutex);
2450 return 0;
2451 }
2452
2453 mutex_unlock(&sc->mutex);
2454 return -ENOSPC;
2455}
2456
2457
2458static void ath9k_remove_chanctx(struct ieee80211_hw *hw,
2459 struct ieee80211_chanctx_conf *conf)
2460{
2461 struct ath_softc *sc = hw->priv;
2462 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2463 struct ath_chanctx *ctx = ath_chanctx_get(conf);
2464
2465 mutex_lock(&sc->mutex);
2466
2467 ath_dbg(common, CHAN_CTX,
2468 "Remove channel context: %d MHz\n",
2469 conf->def.chan->center_freq);
2470
2471 ctx->assigned = false;
2472 ctx->hw_queue_base = 0;
2473 ath_chanctx_event(sc, NULL, ATH_CHANCTX_EVENT_UNASSIGN);
2474
2475 mutex_unlock(&sc->mutex);
2476}
2477
2478static void ath9k_change_chanctx(struct ieee80211_hw *hw,
2479 struct ieee80211_chanctx_conf *conf,
2480 u32 changed)
2481{
2482 struct ath_softc *sc = hw->priv;
2483 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2484 struct ath_chanctx *ctx = ath_chanctx_get(conf);
2485
2486 mutex_lock(&sc->mutex);
2487 ath_dbg(common, CHAN_CTX,
2488 "Change channel context: %d MHz\n",
2489 conf->def.chan->center_freq);
2490 ath_chanctx_set_channel(sc, ctx, &conf->def);
2491 mutex_unlock(&sc->mutex);
2492}
2493
2494static int ath9k_assign_vif_chanctx(struct ieee80211_hw *hw,
2495 struct ieee80211_vif *vif,
2496 struct ieee80211_chanctx_conf *conf)
2497{
2498 struct ath_softc *sc = hw->priv;
2499 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2500 struct ath_vif *avp = (void *)vif->drv_priv;
2501 struct ath_chanctx *ctx = ath_chanctx_get(conf);
2502 int i;
2503
2504 ath9k_cancel_pending_offchannel(sc);
2505
2506 mutex_lock(&sc->mutex);
2507
2508 ath_dbg(common, CHAN_CTX,
2509 "Assign VIF (addr: %pM, type: %d, p2p: %d) to channel context: %d MHz\n",
2510 vif->addr, vif->type, vif->p2p,
2511 conf->def.chan->center_freq);
2512
2513 avp->chanctx = ctx;
2514 ctx->nvifs_assigned++;
2515 list_add_tail(&avp->list, &ctx->vifs);
2516 ath9k_calculate_summary_state(sc, ctx);
2517 for (i = 0; i < IEEE80211_NUM_ACS; i++)
2518 vif->hw_queue[i] = ctx->hw_queue_base + i;
2519
2520 mutex_unlock(&sc->mutex);
2521
2522 return 0;
2523}
2524
2525static void ath9k_unassign_vif_chanctx(struct ieee80211_hw *hw,
2526 struct ieee80211_vif *vif,
2527 struct ieee80211_chanctx_conf *conf)
2528{
2529 struct ath_softc *sc = hw->priv;
2530 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2531 struct ath_vif *avp = (void *)vif->drv_priv;
2532 struct ath_chanctx *ctx = ath_chanctx_get(conf);
2533 int ac;
2534
2535 ath9k_cancel_pending_offchannel(sc);
2536
2537 mutex_lock(&sc->mutex);
2538
2539 ath_dbg(common, CHAN_CTX,
2540 "Remove VIF (addr: %pM, type: %d, p2p: %d) from channel context: %d MHz\n",
2541 vif->addr, vif->type, vif->p2p,
2542 conf->def.chan->center_freq);
2543
2544 avp->chanctx = NULL;
2545 ctx->nvifs_assigned--;
2546 list_del(&avp->list);
2547 ath9k_calculate_summary_state(sc, ctx);
2548 for (ac = 0; ac < IEEE80211_NUM_ACS; ac++)
2549 vif->hw_queue[ac] = IEEE80211_INVAL_HW_QUEUE;
2550
2551 mutex_unlock(&sc->mutex);
2552}
2553
2554static void ath9k_mgd_prepare_tx(struct ieee80211_hw *hw,
2555 struct ieee80211_vif *vif,
2556 u16 duration)
2557{
2558 struct ath_softc *sc = hw->priv;
2559 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2560 struct ath_vif *avp = (struct ath_vif *) vif->drv_priv;
2561 struct ath_beacon_config *cur_conf;
2562 struct ath_chanctx *go_ctx;
2563 unsigned long timeout;
2564 bool changed = false;
2565 u32 beacon_int;
2566
2567 if (!test_bit(ATH_OP_MULTI_CHANNEL, &common->op_flags))
2568 return;
2569
2570 if (!avp->chanctx)
2571 return;
2572
2573 mutex_lock(&sc->mutex);
2574
2575 spin_lock_bh(&sc->chan_lock);
2576 if (sc->next_chan || (sc->cur_chan != avp->chanctx))
2577 changed = true;
2578 spin_unlock_bh(&sc->chan_lock);
2579
2580 if (!changed)
2581 goto out;
2582
2583 ath9k_cancel_pending_offchannel(sc);
2584
2585 go_ctx = ath_is_go_chanctx_present(sc);
2586
2587 if (go_ctx) {
2588
2589
2590
2591
2592 spin_lock_bh(&sc->chan_lock);
2593 sc->sched.mgd_prepare_tx = true;
2594 cur_conf = &go_ctx->beacon;
2595 beacon_int = TU_TO_USEC(cur_conf->beacon_interval);
2596 spin_unlock_bh(&sc->chan_lock);
2597
2598 timeout = usecs_to_jiffies(beacon_int * 2);
2599 init_completion(&sc->go_beacon);
2600
2601 mutex_unlock(&sc->mutex);
2602
2603 if (wait_for_completion_timeout(&sc->go_beacon,
2604 timeout) == 0) {
2605 ath_dbg(common, CHAN_CTX,
2606 "Failed to send new NoA\n");
2607
2608 spin_lock_bh(&sc->chan_lock);
2609 sc->sched.mgd_prepare_tx = false;
2610 spin_unlock_bh(&sc->chan_lock);
2611 }
2612
2613 mutex_lock(&sc->mutex);
2614 }
2615
2616 ath_dbg(common, CHAN_CTX,
2617 "%s: Set chanctx state to FORCE_ACTIVE for vif: %pM\n",
2618 __func__, vif->addr);
2619
2620 spin_lock_bh(&sc->chan_lock);
2621 sc->next_chan = avp->chanctx;
2622 sc->sched.state = ATH_CHANCTX_STATE_FORCE_ACTIVE;
2623 spin_unlock_bh(&sc->chan_lock);
2624
2625 ath_chanctx_set_next(sc, true);
2626out:
2627 mutex_unlock(&sc->mutex);
2628}
2629
2630void ath9k_fill_chanctx_ops(void)
2631{
2632 if (!ath9k_is_chanctx_enabled())
2633 return;
2634
2635 ath9k_ops.hw_scan = ath9k_hw_scan;
2636 ath9k_ops.cancel_hw_scan = ath9k_cancel_hw_scan;
2637 ath9k_ops.remain_on_channel = ath9k_remain_on_channel;
2638 ath9k_ops.cancel_remain_on_channel = ath9k_cancel_remain_on_channel;
2639 ath9k_ops.add_chanctx = ath9k_add_chanctx;
2640 ath9k_ops.remove_chanctx = ath9k_remove_chanctx;
2641 ath9k_ops.change_chanctx = ath9k_change_chanctx;
2642 ath9k_ops.assign_vif_chanctx = ath9k_assign_vif_chanctx;
2643 ath9k_ops.unassign_vif_chanctx = ath9k_unassign_vif_chanctx;
2644 ath9k_ops.mgd_prepare_tx = ath9k_mgd_prepare_tx;
2645}
2646
2647#endif
2648
2649static int ath9k_get_txpower(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2650 int *dbm)
2651{
2652 struct ath_softc *sc = hw->priv;
2653 struct ath_vif *avp = (void *)vif->drv_priv;
2654
2655 mutex_lock(&sc->mutex);
2656 if (avp->chanctx)
2657 *dbm = avp->chanctx->cur_txpower;
2658 else
2659 *dbm = sc->cur_chan->cur_txpower;
2660 mutex_unlock(&sc->mutex);
2661
2662 *dbm /= 2;
2663
2664 return 0;
2665}
2666
2667struct ieee80211_ops ath9k_ops = {
2668 .tx = ath9k_tx,
2669 .start = ath9k_start,
2670 .stop = ath9k_stop,
2671 .add_interface = ath9k_add_interface,
2672 .change_interface = ath9k_change_interface,
2673 .remove_interface = ath9k_remove_interface,
2674 .config = ath9k_config,
2675 .configure_filter = ath9k_configure_filter,
2676 .sta_state = ath9k_sta_state,
2677 .sta_notify = ath9k_sta_notify,
2678 .conf_tx = ath9k_conf_tx,
2679 .bss_info_changed = ath9k_bss_info_changed,
2680 .set_key = ath9k_set_key,
2681 .get_tsf = ath9k_get_tsf,
2682 .set_tsf = ath9k_set_tsf,
2683 .reset_tsf = ath9k_reset_tsf,
2684 .ampdu_action = ath9k_ampdu_action,
2685 .get_survey = ath9k_get_survey,
2686 .rfkill_poll = ath9k_rfkill_poll_state,
2687 .set_coverage_class = ath9k_set_coverage_class,
2688 .flush = ath9k_flush,
2689 .tx_frames_pending = ath9k_tx_frames_pending,
2690 .tx_last_beacon = ath9k_tx_last_beacon,
2691 .release_buffered_frames = ath9k_release_buffered_frames,
2692 .get_stats = ath9k_get_stats,
2693 .set_antenna = ath9k_set_antenna,
2694 .get_antenna = ath9k_get_antenna,
2695
2696#ifdef CONFIG_ATH9K_WOW
2697 .suspend = ath9k_suspend,
2698 .resume = ath9k_resume,
2699 .set_wakeup = ath9k_set_wakeup,
2700#endif
2701
2702#ifdef CONFIG_ATH9K_DEBUGFS
2703 .get_et_sset_count = ath9k_get_et_sset_count,
2704 .get_et_stats = ath9k_get_et_stats,
2705 .get_et_strings = ath9k_get_et_strings,
2706#endif
2707
2708#if defined(CONFIG_MAC80211_DEBUGFS) && defined(CONFIG_ATH9K_STATION_STATISTICS)
2709 .sta_add_debugfs = ath9k_sta_add_debugfs,
2710#endif
2711 .sw_scan_start = ath9k_sw_scan_start,
2712 .sw_scan_complete = ath9k_sw_scan_complete,
2713 .get_txpower = ath9k_get_txpower,
2714 .wake_tx_queue = ath9k_wake_tx_queue,
2715};
2716