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50#include <linux/device.h>
51#include <linux/module.h>
52#include <linux/mutex.h>
53#include <linux/param.h>
54#include <linux/jiffies.h>
55#include <linux/workqueue.h>
56#include <linux/delay.h>
57#include <linux/platform_device.h>
58#include <linux/power_supply.h>
59#include <linux/slab.h>
60#include <linux/of.h>
61
62#include <linux/power/bq27xxx_battery.h>
63
64#define BQ27XXX_MANUFACTURER "Texas Instruments"
65
66
67#define BQ27XXX_FLAG_DSC BIT(0)
68#define BQ27XXX_FLAG_SOCF BIT(1)
69#define BQ27XXX_FLAG_SOC1 BIT(2)
70#define BQ27XXX_FLAG_CFGUP BIT(4)
71#define BQ27XXX_FLAG_FC BIT(9)
72#define BQ27XXX_FLAG_OTD BIT(14)
73#define BQ27XXX_FLAG_OTC BIT(15)
74#define BQ27XXX_FLAG_UT BIT(14)
75#define BQ27XXX_FLAG_OT BIT(15)
76
77
78#define BQ27000_FLAG_EDVF BIT(0)
79#define BQ27000_FLAG_EDV1 BIT(1)
80#define BQ27000_FLAG_CI BIT(4)
81#define BQ27000_FLAG_FC BIT(5)
82#define BQ27000_FLAG_CHGS BIT(7)
83
84
85#define BQ27Z561_FLAG_FDC BIT(4)
86#define BQ27Z561_FLAG_FC BIT(5)
87#define BQ27Z561_FLAG_DIS_CH BIT(6)
88
89
90#define BQ27XXX_SEALED 0x20
91#define BQ27XXX_SET_CFGUPDATE 0x13
92#define BQ27XXX_SOFT_RESET 0x42
93#define BQ27XXX_RESET 0x41
94
95#define BQ27XXX_RS (20)
96#define BQ27XXX_POWER_CONSTANT (29200)
97#define BQ27XXX_CURRENT_CONSTANT (3570)
98
99#define INVALID_REG_ADDR 0xff
100
101
102
103
104
105
106
107enum bq27xxx_reg_index {
108 BQ27XXX_REG_CTRL = 0,
109 BQ27XXX_REG_TEMP,
110 BQ27XXX_REG_INT_TEMP,
111 BQ27XXX_REG_VOLT,
112 BQ27XXX_REG_AI,
113 BQ27XXX_REG_FLAGS,
114 BQ27XXX_REG_TTE,
115 BQ27XXX_REG_TTF,
116 BQ27XXX_REG_TTES,
117 BQ27XXX_REG_TTECP,
118 BQ27XXX_REG_NAC,
119 BQ27XXX_REG_FCC,
120 BQ27XXX_REG_CYCT,
121 BQ27XXX_REG_AE,
122 BQ27XXX_REG_SOC,
123 BQ27XXX_REG_DCAP,
124 BQ27XXX_REG_AP,
125 BQ27XXX_DM_CTRL,
126 BQ27XXX_DM_CLASS,
127 BQ27XXX_DM_BLOCK,
128 BQ27XXX_DM_DATA,
129 BQ27XXX_DM_CKSUM,
130 BQ27XXX_REG_MAX,
131};
132
133#define BQ27XXX_DM_REG_ROWS \
134 [BQ27XXX_DM_CTRL] = 0x61, \
135 [BQ27XXX_DM_CLASS] = 0x3e, \
136 [BQ27XXX_DM_BLOCK] = 0x3f, \
137 [BQ27XXX_DM_DATA] = 0x40, \
138 [BQ27XXX_DM_CKSUM] = 0x60
139
140
141static u8
142 bq27000_regs[BQ27XXX_REG_MAX] = {
143 [BQ27XXX_REG_CTRL] = 0x00,
144 [BQ27XXX_REG_TEMP] = 0x06,
145 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
146 [BQ27XXX_REG_VOLT] = 0x08,
147 [BQ27XXX_REG_AI] = 0x14,
148 [BQ27XXX_REG_FLAGS] = 0x0a,
149 [BQ27XXX_REG_TTE] = 0x16,
150 [BQ27XXX_REG_TTF] = 0x18,
151 [BQ27XXX_REG_TTES] = 0x1c,
152 [BQ27XXX_REG_TTECP] = 0x26,
153 [BQ27XXX_REG_NAC] = 0x0c,
154 [BQ27XXX_REG_FCC] = 0x12,
155 [BQ27XXX_REG_CYCT] = 0x2a,
156 [BQ27XXX_REG_AE] = 0x22,
157 [BQ27XXX_REG_SOC] = 0x0b,
158 [BQ27XXX_REG_DCAP] = 0x76,
159 [BQ27XXX_REG_AP] = 0x24,
160 [BQ27XXX_DM_CTRL] = INVALID_REG_ADDR,
161 [BQ27XXX_DM_CLASS] = INVALID_REG_ADDR,
162 [BQ27XXX_DM_BLOCK] = INVALID_REG_ADDR,
163 [BQ27XXX_DM_DATA] = INVALID_REG_ADDR,
164 [BQ27XXX_DM_CKSUM] = INVALID_REG_ADDR,
165 },
166 bq27010_regs[BQ27XXX_REG_MAX] = {
167 [BQ27XXX_REG_CTRL] = 0x00,
168 [BQ27XXX_REG_TEMP] = 0x06,
169 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
170 [BQ27XXX_REG_VOLT] = 0x08,
171 [BQ27XXX_REG_AI] = 0x14,
172 [BQ27XXX_REG_FLAGS] = 0x0a,
173 [BQ27XXX_REG_TTE] = 0x16,
174 [BQ27XXX_REG_TTF] = 0x18,
175 [BQ27XXX_REG_TTES] = 0x1c,
176 [BQ27XXX_REG_TTECP] = 0x26,
177 [BQ27XXX_REG_NAC] = 0x0c,
178 [BQ27XXX_REG_FCC] = 0x12,
179 [BQ27XXX_REG_CYCT] = 0x2a,
180 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
181 [BQ27XXX_REG_SOC] = 0x0b,
182 [BQ27XXX_REG_DCAP] = 0x76,
183 [BQ27XXX_REG_AP] = INVALID_REG_ADDR,
184 [BQ27XXX_DM_CTRL] = INVALID_REG_ADDR,
185 [BQ27XXX_DM_CLASS] = INVALID_REG_ADDR,
186 [BQ27XXX_DM_BLOCK] = INVALID_REG_ADDR,
187 [BQ27XXX_DM_DATA] = INVALID_REG_ADDR,
188 [BQ27XXX_DM_CKSUM] = INVALID_REG_ADDR,
189 },
190 bq2750x_regs[BQ27XXX_REG_MAX] = {
191 [BQ27XXX_REG_CTRL] = 0x00,
192 [BQ27XXX_REG_TEMP] = 0x06,
193 [BQ27XXX_REG_INT_TEMP] = 0x28,
194 [BQ27XXX_REG_VOLT] = 0x08,
195 [BQ27XXX_REG_AI] = 0x14,
196 [BQ27XXX_REG_FLAGS] = 0x0a,
197 [BQ27XXX_REG_TTE] = 0x16,
198 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
199 [BQ27XXX_REG_TTES] = 0x1a,
200 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
201 [BQ27XXX_REG_NAC] = 0x0c,
202 [BQ27XXX_REG_FCC] = 0x12,
203 [BQ27XXX_REG_CYCT] = 0x2a,
204 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
205 [BQ27XXX_REG_SOC] = 0x2c,
206 [BQ27XXX_REG_DCAP] = 0x3c,
207 [BQ27XXX_REG_AP] = INVALID_REG_ADDR,
208 BQ27XXX_DM_REG_ROWS,
209 },
210#define bq2751x_regs bq27510g3_regs
211#define bq2752x_regs bq27510g3_regs
212 bq27500_regs[BQ27XXX_REG_MAX] = {
213 [BQ27XXX_REG_CTRL] = 0x00,
214 [BQ27XXX_REG_TEMP] = 0x06,
215 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
216 [BQ27XXX_REG_VOLT] = 0x08,
217 [BQ27XXX_REG_AI] = 0x14,
218 [BQ27XXX_REG_FLAGS] = 0x0a,
219 [BQ27XXX_REG_TTE] = 0x16,
220 [BQ27XXX_REG_TTF] = 0x18,
221 [BQ27XXX_REG_TTES] = 0x1c,
222 [BQ27XXX_REG_TTECP] = 0x26,
223 [BQ27XXX_REG_NAC] = 0x0c,
224 [BQ27XXX_REG_FCC] = 0x12,
225 [BQ27XXX_REG_CYCT] = 0x2a,
226 [BQ27XXX_REG_AE] = 0x22,
227 [BQ27XXX_REG_SOC] = 0x2c,
228 [BQ27XXX_REG_DCAP] = 0x3c,
229 [BQ27XXX_REG_AP] = 0x24,
230 BQ27XXX_DM_REG_ROWS,
231 },
232#define bq27510g1_regs bq27500_regs
233#define bq27510g2_regs bq27500_regs
234 bq27510g3_regs[BQ27XXX_REG_MAX] = {
235 [BQ27XXX_REG_CTRL] = 0x00,
236 [BQ27XXX_REG_TEMP] = 0x06,
237 [BQ27XXX_REG_INT_TEMP] = 0x28,
238 [BQ27XXX_REG_VOLT] = 0x08,
239 [BQ27XXX_REG_AI] = 0x14,
240 [BQ27XXX_REG_FLAGS] = 0x0a,
241 [BQ27XXX_REG_TTE] = 0x16,
242 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
243 [BQ27XXX_REG_TTES] = 0x1a,
244 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
245 [BQ27XXX_REG_NAC] = 0x0c,
246 [BQ27XXX_REG_FCC] = 0x12,
247 [BQ27XXX_REG_CYCT] = 0x1e,
248 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
249 [BQ27XXX_REG_SOC] = 0x20,
250 [BQ27XXX_REG_DCAP] = 0x2e,
251 [BQ27XXX_REG_AP] = INVALID_REG_ADDR,
252 BQ27XXX_DM_REG_ROWS,
253 },
254 bq27520g1_regs[BQ27XXX_REG_MAX] = {
255 [BQ27XXX_REG_CTRL] = 0x00,
256 [BQ27XXX_REG_TEMP] = 0x06,
257 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
258 [BQ27XXX_REG_VOLT] = 0x08,
259 [BQ27XXX_REG_AI] = 0x14,
260 [BQ27XXX_REG_FLAGS] = 0x0a,
261 [BQ27XXX_REG_TTE] = 0x16,
262 [BQ27XXX_REG_TTF] = 0x18,
263 [BQ27XXX_REG_TTES] = 0x1c,
264 [BQ27XXX_REG_TTECP] = 0x26,
265 [BQ27XXX_REG_NAC] = 0x0c,
266 [BQ27XXX_REG_FCC] = 0x12,
267 [BQ27XXX_REG_CYCT] = INVALID_REG_ADDR,
268 [BQ27XXX_REG_AE] = 0x22,
269 [BQ27XXX_REG_SOC] = 0x2c,
270 [BQ27XXX_REG_DCAP] = 0x3c,
271 [BQ27XXX_REG_AP] = 0x24,
272 BQ27XXX_DM_REG_ROWS,
273 },
274 bq27520g2_regs[BQ27XXX_REG_MAX] = {
275 [BQ27XXX_REG_CTRL] = 0x00,
276 [BQ27XXX_REG_TEMP] = 0x06,
277 [BQ27XXX_REG_INT_TEMP] = 0x36,
278 [BQ27XXX_REG_VOLT] = 0x08,
279 [BQ27XXX_REG_AI] = 0x14,
280 [BQ27XXX_REG_FLAGS] = 0x0a,
281 [BQ27XXX_REG_TTE] = 0x16,
282 [BQ27XXX_REG_TTF] = 0x18,
283 [BQ27XXX_REG_TTES] = 0x1c,
284 [BQ27XXX_REG_TTECP] = 0x26,
285 [BQ27XXX_REG_NAC] = 0x0c,
286 [BQ27XXX_REG_FCC] = 0x12,
287 [BQ27XXX_REG_CYCT] = 0x2a,
288 [BQ27XXX_REG_AE] = 0x22,
289 [BQ27XXX_REG_SOC] = 0x2c,
290 [BQ27XXX_REG_DCAP] = 0x3c,
291 [BQ27XXX_REG_AP] = 0x24,
292 BQ27XXX_DM_REG_ROWS,
293 },
294 bq27520g3_regs[BQ27XXX_REG_MAX] = {
295 [BQ27XXX_REG_CTRL] = 0x00,
296 [BQ27XXX_REG_TEMP] = 0x06,
297 [BQ27XXX_REG_INT_TEMP] = 0x36,
298 [BQ27XXX_REG_VOLT] = 0x08,
299 [BQ27XXX_REG_AI] = 0x14,
300 [BQ27XXX_REG_FLAGS] = 0x0a,
301 [BQ27XXX_REG_TTE] = 0x16,
302 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
303 [BQ27XXX_REG_TTES] = 0x1c,
304 [BQ27XXX_REG_TTECP] = 0x26,
305 [BQ27XXX_REG_NAC] = 0x0c,
306 [BQ27XXX_REG_FCC] = 0x12,
307 [BQ27XXX_REG_CYCT] = 0x2a,
308 [BQ27XXX_REG_AE] = 0x22,
309 [BQ27XXX_REG_SOC] = 0x2c,
310 [BQ27XXX_REG_DCAP] = 0x3c,
311 [BQ27XXX_REG_AP] = 0x24,
312 BQ27XXX_DM_REG_ROWS,
313 },
314 bq27520g4_regs[BQ27XXX_REG_MAX] = {
315 [BQ27XXX_REG_CTRL] = 0x00,
316 [BQ27XXX_REG_TEMP] = 0x06,
317 [BQ27XXX_REG_INT_TEMP] = 0x28,
318 [BQ27XXX_REG_VOLT] = 0x08,
319 [BQ27XXX_REG_AI] = 0x14,
320 [BQ27XXX_REG_FLAGS] = 0x0a,
321 [BQ27XXX_REG_TTE] = 0x16,
322 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
323 [BQ27XXX_REG_TTES] = 0x1c,
324 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
325 [BQ27XXX_REG_NAC] = 0x0c,
326 [BQ27XXX_REG_FCC] = 0x12,
327 [BQ27XXX_REG_CYCT] = 0x1e,
328 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
329 [BQ27XXX_REG_SOC] = 0x20,
330 [BQ27XXX_REG_DCAP] = INVALID_REG_ADDR,
331 [BQ27XXX_REG_AP] = INVALID_REG_ADDR,
332 BQ27XXX_DM_REG_ROWS,
333 },
334 bq27521_regs[BQ27XXX_REG_MAX] = {
335 [BQ27XXX_REG_CTRL] = 0x02,
336 [BQ27XXX_REG_TEMP] = 0x0a,
337 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
338 [BQ27XXX_REG_VOLT] = 0x0c,
339 [BQ27XXX_REG_AI] = 0x0e,
340 [BQ27XXX_REG_FLAGS] = 0x08,
341 [BQ27XXX_REG_TTE] = INVALID_REG_ADDR,
342 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
343 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
344 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
345 [BQ27XXX_REG_NAC] = INVALID_REG_ADDR,
346 [BQ27XXX_REG_FCC] = INVALID_REG_ADDR,
347 [BQ27XXX_REG_CYCT] = INVALID_REG_ADDR,
348 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
349 [BQ27XXX_REG_SOC] = INVALID_REG_ADDR,
350 [BQ27XXX_REG_DCAP] = INVALID_REG_ADDR,
351 [BQ27XXX_REG_AP] = INVALID_REG_ADDR,
352 [BQ27XXX_DM_CTRL] = INVALID_REG_ADDR,
353 [BQ27XXX_DM_CLASS] = INVALID_REG_ADDR,
354 [BQ27XXX_DM_BLOCK] = INVALID_REG_ADDR,
355 [BQ27XXX_DM_DATA] = INVALID_REG_ADDR,
356 [BQ27XXX_DM_CKSUM] = INVALID_REG_ADDR,
357 },
358 bq27530_regs[BQ27XXX_REG_MAX] = {
359 [BQ27XXX_REG_CTRL] = 0x00,
360 [BQ27XXX_REG_TEMP] = 0x06,
361 [BQ27XXX_REG_INT_TEMP] = 0x32,
362 [BQ27XXX_REG_VOLT] = 0x08,
363 [BQ27XXX_REG_AI] = 0x14,
364 [BQ27XXX_REG_FLAGS] = 0x0a,
365 [BQ27XXX_REG_TTE] = 0x16,
366 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
367 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
368 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
369 [BQ27XXX_REG_NAC] = 0x0c,
370 [BQ27XXX_REG_FCC] = 0x12,
371 [BQ27XXX_REG_CYCT] = 0x2a,
372 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
373 [BQ27XXX_REG_SOC] = 0x2c,
374 [BQ27XXX_REG_DCAP] = INVALID_REG_ADDR,
375 [BQ27XXX_REG_AP] = 0x24,
376 BQ27XXX_DM_REG_ROWS,
377 },
378#define bq27531_regs bq27530_regs
379 bq27541_regs[BQ27XXX_REG_MAX] = {
380 [BQ27XXX_REG_CTRL] = 0x00,
381 [BQ27XXX_REG_TEMP] = 0x06,
382 [BQ27XXX_REG_INT_TEMP] = 0x28,
383 [BQ27XXX_REG_VOLT] = 0x08,
384 [BQ27XXX_REG_AI] = 0x14,
385 [BQ27XXX_REG_FLAGS] = 0x0a,
386 [BQ27XXX_REG_TTE] = 0x16,
387 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
388 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
389 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
390 [BQ27XXX_REG_NAC] = 0x0c,
391 [BQ27XXX_REG_FCC] = 0x12,
392 [BQ27XXX_REG_CYCT] = 0x2a,
393 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
394 [BQ27XXX_REG_SOC] = 0x2c,
395 [BQ27XXX_REG_DCAP] = 0x3c,
396 [BQ27XXX_REG_AP] = 0x24,
397 BQ27XXX_DM_REG_ROWS,
398 },
399#define bq27542_regs bq27541_regs
400#define bq27546_regs bq27541_regs
401#define bq27742_regs bq27541_regs
402 bq27545_regs[BQ27XXX_REG_MAX] = {
403 [BQ27XXX_REG_CTRL] = 0x00,
404 [BQ27XXX_REG_TEMP] = 0x06,
405 [BQ27XXX_REG_INT_TEMP] = 0x28,
406 [BQ27XXX_REG_VOLT] = 0x08,
407 [BQ27XXX_REG_AI] = 0x14,
408 [BQ27XXX_REG_FLAGS] = 0x0a,
409 [BQ27XXX_REG_TTE] = 0x16,
410 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
411 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
412 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
413 [BQ27XXX_REG_NAC] = 0x0c,
414 [BQ27XXX_REG_FCC] = 0x12,
415 [BQ27XXX_REG_CYCT] = 0x2a,
416 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
417 [BQ27XXX_REG_SOC] = 0x2c,
418 [BQ27XXX_REG_DCAP] = INVALID_REG_ADDR,
419 [BQ27XXX_REG_AP] = 0x24,
420 BQ27XXX_DM_REG_ROWS,
421 },
422 bq27421_regs[BQ27XXX_REG_MAX] = {
423 [BQ27XXX_REG_CTRL] = 0x00,
424 [BQ27XXX_REG_TEMP] = 0x02,
425 [BQ27XXX_REG_INT_TEMP] = 0x1e,
426 [BQ27XXX_REG_VOLT] = 0x04,
427 [BQ27XXX_REG_AI] = 0x10,
428 [BQ27XXX_REG_FLAGS] = 0x06,
429 [BQ27XXX_REG_TTE] = INVALID_REG_ADDR,
430 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
431 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
432 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
433 [BQ27XXX_REG_NAC] = 0x08,
434 [BQ27XXX_REG_FCC] = 0x0e,
435 [BQ27XXX_REG_CYCT] = INVALID_REG_ADDR,
436 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
437 [BQ27XXX_REG_SOC] = 0x1c,
438 [BQ27XXX_REG_DCAP] = 0x3c,
439 [BQ27XXX_REG_AP] = 0x18,
440 BQ27XXX_DM_REG_ROWS,
441 },
442#define bq27411_regs bq27421_regs
443#define bq27425_regs bq27421_regs
444#define bq27426_regs bq27421_regs
445#define bq27441_regs bq27421_regs
446#define bq27621_regs bq27421_regs
447 bq27z561_regs[BQ27XXX_REG_MAX] = {
448 [BQ27XXX_REG_CTRL] = 0x00,
449 [BQ27XXX_REG_TEMP] = 0x06,
450 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
451 [BQ27XXX_REG_VOLT] = 0x08,
452 [BQ27XXX_REG_AI] = 0x14,
453 [BQ27XXX_REG_FLAGS] = 0x0a,
454 [BQ27XXX_REG_TTE] = 0x16,
455 [BQ27XXX_REG_TTF] = 0x18,
456 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
457 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
458 [BQ27XXX_REG_NAC] = INVALID_REG_ADDR,
459 [BQ27XXX_REG_FCC] = 0x12,
460 [BQ27XXX_REG_CYCT] = 0x2a,
461 [BQ27XXX_REG_AE] = 0x22,
462 [BQ27XXX_REG_SOC] = 0x2c,
463 [BQ27XXX_REG_DCAP] = 0x3c,
464 [BQ27XXX_REG_AP] = 0x22,
465 BQ27XXX_DM_REG_ROWS,
466 },
467 bq28z610_regs[BQ27XXX_REG_MAX] = {
468 [BQ27XXX_REG_CTRL] = 0x00,
469 [BQ27XXX_REG_TEMP] = 0x06,
470 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
471 [BQ27XXX_REG_VOLT] = 0x08,
472 [BQ27XXX_REG_AI] = 0x14,
473 [BQ27XXX_REG_FLAGS] = 0x0a,
474 [BQ27XXX_REG_TTE] = 0x16,
475 [BQ27XXX_REG_TTF] = 0x18,
476 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
477 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
478 [BQ27XXX_REG_NAC] = INVALID_REG_ADDR,
479 [BQ27XXX_REG_FCC] = 0x12,
480 [BQ27XXX_REG_CYCT] = 0x2a,
481 [BQ27XXX_REG_AE] = 0x22,
482 [BQ27XXX_REG_SOC] = 0x2c,
483 [BQ27XXX_REG_DCAP] = 0x3c,
484 [BQ27XXX_REG_AP] = 0x22,
485 BQ27XXX_DM_REG_ROWS,
486 };
487
488static enum power_supply_property bq27000_props[] = {
489 POWER_SUPPLY_PROP_STATUS,
490 POWER_SUPPLY_PROP_PRESENT,
491 POWER_SUPPLY_PROP_VOLTAGE_NOW,
492 POWER_SUPPLY_PROP_CURRENT_NOW,
493 POWER_SUPPLY_PROP_CAPACITY,
494 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
495 POWER_SUPPLY_PROP_TEMP,
496 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
497 POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG,
498 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
499 POWER_SUPPLY_PROP_TECHNOLOGY,
500 POWER_SUPPLY_PROP_CHARGE_FULL,
501 POWER_SUPPLY_PROP_CHARGE_NOW,
502 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
503 POWER_SUPPLY_PROP_CYCLE_COUNT,
504 POWER_SUPPLY_PROP_ENERGY_NOW,
505 POWER_SUPPLY_PROP_POWER_AVG,
506 POWER_SUPPLY_PROP_HEALTH,
507 POWER_SUPPLY_PROP_MANUFACTURER,
508};
509
510static enum power_supply_property bq27010_props[] = {
511 POWER_SUPPLY_PROP_STATUS,
512 POWER_SUPPLY_PROP_PRESENT,
513 POWER_SUPPLY_PROP_VOLTAGE_NOW,
514 POWER_SUPPLY_PROP_CURRENT_NOW,
515 POWER_SUPPLY_PROP_CAPACITY,
516 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
517 POWER_SUPPLY_PROP_TEMP,
518 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
519 POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG,
520 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
521 POWER_SUPPLY_PROP_TECHNOLOGY,
522 POWER_SUPPLY_PROP_CHARGE_FULL,
523 POWER_SUPPLY_PROP_CHARGE_NOW,
524 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
525 POWER_SUPPLY_PROP_CYCLE_COUNT,
526 POWER_SUPPLY_PROP_HEALTH,
527 POWER_SUPPLY_PROP_MANUFACTURER,
528};
529
530#define bq2750x_props bq27510g3_props
531#define bq2751x_props bq27510g3_props
532#define bq2752x_props bq27510g3_props
533
534static enum power_supply_property bq27500_props[] = {
535 POWER_SUPPLY_PROP_STATUS,
536 POWER_SUPPLY_PROP_PRESENT,
537 POWER_SUPPLY_PROP_VOLTAGE_NOW,
538 POWER_SUPPLY_PROP_CURRENT_NOW,
539 POWER_SUPPLY_PROP_CAPACITY,
540 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
541 POWER_SUPPLY_PROP_TEMP,
542 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
543 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
544 POWER_SUPPLY_PROP_TECHNOLOGY,
545 POWER_SUPPLY_PROP_CHARGE_FULL,
546 POWER_SUPPLY_PROP_CHARGE_NOW,
547 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
548 POWER_SUPPLY_PROP_CYCLE_COUNT,
549 POWER_SUPPLY_PROP_ENERGY_NOW,
550 POWER_SUPPLY_PROP_POWER_AVG,
551 POWER_SUPPLY_PROP_HEALTH,
552 POWER_SUPPLY_PROP_MANUFACTURER,
553};
554#define bq27510g1_props bq27500_props
555#define bq27510g2_props bq27500_props
556
557static enum power_supply_property bq27510g3_props[] = {
558 POWER_SUPPLY_PROP_STATUS,
559 POWER_SUPPLY_PROP_PRESENT,
560 POWER_SUPPLY_PROP_VOLTAGE_NOW,
561 POWER_SUPPLY_PROP_CURRENT_NOW,
562 POWER_SUPPLY_PROP_CAPACITY,
563 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
564 POWER_SUPPLY_PROP_TEMP,
565 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
566 POWER_SUPPLY_PROP_TECHNOLOGY,
567 POWER_SUPPLY_PROP_CHARGE_FULL,
568 POWER_SUPPLY_PROP_CHARGE_NOW,
569 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
570 POWER_SUPPLY_PROP_CYCLE_COUNT,
571 POWER_SUPPLY_PROP_HEALTH,
572 POWER_SUPPLY_PROP_MANUFACTURER,
573};
574
575static enum power_supply_property bq27520g1_props[] = {
576 POWER_SUPPLY_PROP_STATUS,
577 POWER_SUPPLY_PROP_PRESENT,
578 POWER_SUPPLY_PROP_VOLTAGE_NOW,
579 POWER_SUPPLY_PROP_CURRENT_NOW,
580 POWER_SUPPLY_PROP_CAPACITY,
581 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
582 POWER_SUPPLY_PROP_TEMP,
583 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
584 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
585 POWER_SUPPLY_PROP_TECHNOLOGY,
586 POWER_SUPPLY_PROP_CHARGE_FULL,
587 POWER_SUPPLY_PROP_CHARGE_NOW,
588 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
589 POWER_SUPPLY_PROP_ENERGY_NOW,
590 POWER_SUPPLY_PROP_POWER_AVG,
591 POWER_SUPPLY_PROP_HEALTH,
592 POWER_SUPPLY_PROP_MANUFACTURER,
593};
594
595#define bq27520g2_props bq27500_props
596
597static enum power_supply_property bq27520g3_props[] = {
598 POWER_SUPPLY_PROP_STATUS,
599 POWER_SUPPLY_PROP_PRESENT,
600 POWER_SUPPLY_PROP_VOLTAGE_NOW,
601 POWER_SUPPLY_PROP_CURRENT_NOW,
602 POWER_SUPPLY_PROP_CAPACITY,
603 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
604 POWER_SUPPLY_PROP_TEMP,
605 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
606 POWER_SUPPLY_PROP_TECHNOLOGY,
607 POWER_SUPPLY_PROP_CHARGE_FULL,
608 POWER_SUPPLY_PROP_CHARGE_NOW,
609 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
610 POWER_SUPPLY_PROP_CYCLE_COUNT,
611 POWER_SUPPLY_PROP_ENERGY_NOW,
612 POWER_SUPPLY_PROP_POWER_AVG,
613 POWER_SUPPLY_PROP_HEALTH,
614 POWER_SUPPLY_PROP_MANUFACTURER,
615};
616
617static enum power_supply_property bq27520g4_props[] = {
618 POWER_SUPPLY_PROP_STATUS,
619 POWER_SUPPLY_PROP_PRESENT,
620 POWER_SUPPLY_PROP_VOLTAGE_NOW,
621 POWER_SUPPLY_PROP_CURRENT_NOW,
622 POWER_SUPPLY_PROP_CAPACITY,
623 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
624 POWER_SUPPLY_PROP_TEMP,
625 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
626 POWER_SUPPLY_PROP_TECHNOLOGY,
627 POWER_SUPPLY_PROP_CHARGE_FULL,
628 POWER_SUPPLY_PROP_CHARGE_NOW,
629 POWER_SUPPLY_PROP_CYCLE_COUNT,
630 POWER_SUPPLY_PROP_HEALTH,
631 POWER_SUPPLY_PROP_MANUFACTURER,
632};
633
634static enum power_supply_property bq27521_props[] = {
635 POWER_SUPPLY_PROP_STATUS,
636 POWER_SUPPLY_PROP_PRESENT,
637 POWER_SUPPLY_PROP_VOLTAGE_NOW,
638 POWER_SUPPLY_PROP_CURRENT_NOW,
639 POWER_SUPPLY_PROP_TEMP,
640 POWER_SUPPLY_PROP_TECHNOLOGY,
641};
642
643static enum power_supply_property bq27530_props[] = {
644 POWER_SUPPLY_PROP_STATUS,
645 POWER_SUPPLY_PROP_PRESENT,
646 POWER_SUPPLY_PROP_VOLTAGE_NOW,
647 POWER_SUPPLY_PROP_CURRENT_NOW,
648 POWER_SUPPLY_PROP_CAPACITY,
649 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
650 POWER_SUPPLY_PROP_TEMP,
651 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
652 POWER_SUPPLY_PROP_TECHNOLOGY,
653 POWER_SUPPLY_PROP_CHARGE_FULL,
654 POWER_SUPPLY_PROP_CHARGE_NOW,
655 POWER_SUPPLY_PROP_POWER_AVG,
656 POWER_SUPPLY_PROP_HEALTH,
657 POWER_SUPPLY_PROP_CYCLE_COUNT,
658 POWER_SUPPLY_PROP_MANUFACTURER,
659};
660#define bq27531_props bq27530_props
661
662static enum power_supply_property bq27541_props[] = {
663 POWER_SUPPLY_PROP_STATUS,
664 POWER_SUPPLY_PROP_PRESENT,
665 POWER_SUPPLY_PROP_VOLTAGE_NOW,
666 POWER_SUPPLY_PROP_CURRENT_NOW,
667 POWER_SUPPLY_PROP_CAPACITY,
668 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
669 POWER_SUPPLY_PROP_TEMP,
670 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
671 POWER_SUPPLY_PROP_TECHNOLOGY,
672 POWER_SUPPLY_PROP_CHARGE_FULL,
673 POWER_SUPPLY_PROP_CHARGE_NOW,
674 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
675 POWER_SUPPLY_PROP_CYCLE_COUNT,
676 POWER_SUPPLY_PROP_POWER_AVG,
677 POWER_SUPPLY_PROP_HEALTH,
678 POWER_SUPPLY_PROP_MANUFACTURER,
679};
680#define bq27542_props bq27541_props
681#define bq27546_props bq27541_props
682#define bq27742_props bq27541_props
683
684static enum power_supply_property bq27545_props[] = {
685 POWER_SUPPLY_PROP_STATUS,
686 POWER_SUPPLY_PROP_PRESENT,
687 POWER_SUPPLY_PROP_VOLTAGE_NOW,
688 POWER_SUPPLY_PROP_CURRENT_NOW,
689 POWER_SUPPLY_PROP_CAPACITY,
690 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
691 POWER_SUPPLY_PROP_TEMP,
692 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
693 POWER_SUPPLY_PROP_TECHNOLOGY,
694 POWER_SUPPLY_PROP_CHARGE_FULL,
695 POWER_SUPPLY_PROP_CHARGE_NOW,
696 POWER_SUPPLY_PROP_HEALTH,
697 POWER_SUPPLY_PROP_CYCLE_COUNT,
698 POWER_SUPPLY_PROP_POWER_AVG,
699 POWER_SUPPLY_PROP_MANUFACTURER,
700};
701
702static enum power_supply_property bq27421_props[] = {
703 POWER_SUPPLY_PROP_STATUS,
704 POWER_SUPPLY_PROP_PRESENT,
705 POWER_SUPPLY_PROP_VOLTAGE_NOW,
706 POWER_SUPPLY_PROP_CURRENT_NOW,
707 POWER_SUPPLY_PROP_CAPACITY,
708 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
709 POWER_SUPPLY_PROP_TEMP,
710 POWER_SUPPLY_PROP_TECHNOLOGY,
711 POWER_SUPPLY_PROP_CHARGE_FULL,
712 POWER_SUPPLY_PROP_CHARGE_NOW,
713 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
714 POWER_SUPPLY_PROP_MANUFACTURER,
715};
716#define bq27411_props bq27421_props
717#define bq27425_props bq27421_props
718#define bq27426_props bq27421_props
719#define bq27441_props bq27421_props
720#define bq27621_props bq27421_props
721
722static enum power_supply_property bq27z561_props[] = {
723 POWER_SUPPLY_PROP_STATUS,
724 POWER_SUPPLY_PROP_PRESENT,
725 POWER_SUPPLY_PROP_VOLTAGE_NOW,
726 POWER_SUPPLY_PROP_CURRENT_NOW,
727 POWER_SUPPLY_PROP_CAPACITY,
728 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
729 POWER_SUPPLY_PROP_TEMP,
730 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
731 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
732 POWER_SUPPLY_PROP_TECHNOLOGY,
733 POWER_SUPPLY_PROP_CHARGE_FULL,
734 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
735 POWER_SUPPLY_PROP_CYCLE_COUNT,
736 POWER_SUPPLY_PROP_POWER_AVG,
737 POWER_SUPPLY_PROP_HEALTH,
738 POWER_SUPPLY_PROP_MANUFACTURER,
739};
740
741static enum power_supply_property bq28z610_props[] = {
742 POWER_SUPPLY_PROP_STATUS,
743 POWER_SUPPLY_PROP_PRESENT,
744 POWER_SUPPLY_PROP_VOLTAGE_NOW,
745 POWER_SUPPLY_PROP_CURRENT_NOW,
746 POWER_SUPPLY_PROP_CAPACITY,
747 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
748 POWER_SUPPLY_PROP_TEMP,
749 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
750 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
751 POWER_SUPPLY_PROP_TECHNOLOGY,
752 POWER_SUPPLY_PROP_CHARGE_FULL,
753 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
754 POWER_SUPPLY_PROP_CYCLE_COUNT,
755 POWER_SUPPLY_PROP_POWER_AVG,
756 POWER_SUPPLY_PROP_HEALTH,
757 POWER_SUPPLY_PROP_MANUFACTURER,
758};
759
760struct bq27xxx_dm_reg {
761 u8 subclass_id;
762 u8 offset;
763 u8 bytes;
764 u16 min, max;
765};
766
767enum bq27xxx_dm_reg_id {
768 BQ27XXX_DM_DESIGN_CAPACITY = 0,
769 BQ27XXX_DM_DESIGN_ENERGY,
770 BQ27XXX_DM_TERMINATE_VOLTAGE,
771};
772
773#define bq27000_dm_regs 0
774#define bq27010_dm_regs 0
775#define bq2750x_dm_regs 0
776#define bq2751x_dm_regs 0
777#define bq2752x_dm_regs 0
778
779#if 0
780static struct bq27xxx_dm_reg bq27500_dm_regs[] = {
781 [BQ27XXX_DM_DESIGN_CAPACITY] = { 48, 10, 2, 0, 65535 },
782 [BQ27XXX_DM_DESIGN_ENERGY] = { },
783 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 80, 48, 2, 1000, 32767 },
784};
785#else
786#define bq27500_dm_regs 0
787#endif
788
789
790#define bq27510g1_dm_regs 0
791#define bq27510g2_dm_regs 0
792#define bq27510g3_dm_regs 0
793#define bq27520g1_dm_regs 0
794#define bq27520g2_dm_regs 0
795#define bq27520g3_dm_regs 0
796#define bq27520g4_dm_regs 0
797#define bq27521_dm_regs 0
798#define bq27530_dm_regs 0
799#define bq27531_dm_regs 0
800#define bq27541_dm_regs 0
801#define bq27542_dm_regs 0
802#define bq27546_dm_regs 0
803#define bq27742_dm_regs 0
804
805#if 0
806static struct bq27xxx_dm_reg bq27545_dm_regs[] = {
807 [BQ27XXX_DM_DESIGN_CAPACITY] = { 48, 23, 2, 0, 32767 },
808 [BQ27XXX_DM_DESIGN_ENERGY] = { 48, 25, 2, 0, 32767 },
809 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 80, 67, 2, 2800, 3700 },
810};
811#else
812#define bq27545_dm_regs 0
813#endif
814
815static struct bq27xxx_dm_reg bq27411_dm_regs[] = {
816 [BQ27XXX_DM_DESIGN_CAPACITY] = { 82, 10, 2, 0, 32767 },
817 [BQ27XXX_DM_DESIGN_ENERGY] = { 82, 12, 2, 0, 32767 },
818 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 16, 2, 2800, 3700 },
819};
820
821static struct bq27xxx_dm_reg bq27421_dm_regs[] = {
822 [BQ27XXX_DM_DESIGN_CAPACITY] = { 82, 10, 2, 0, 8000 },
823 [BQ27XXX_DM_DESIGN_ENERGY] = { 82, 12, 2, 0, 32767 },
824 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 16, 2, 2500, 3700 },
825};
826
827static struct bq27xxx_dm_reg bq27425_dm_regs[] = {
828 [BQ27XXX_DM_DESIGN_CAPACITY] = { 82, 12, 2, 0, 32767 },
829 [BQ27XXX_DM_DESIGN_ENERGY] = { 82, 14, 2, 0, 32767 },
830 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 18, 2, 2800, 3700 },
831};
832
833static struct bq27xxx_dm_reg bq27426_dm_regs[] = {
834 [BQ27XXX_DM_DESIGN_CAPACITY] = { 82, 6, 2, 0, 8000 },
835 [BQ27XXX_DM_DESIGN_ENERGY] = { 82, 8, 2, 0, 32767 },
836 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 10, 2, 2500, 3700 },
837};
838
839#if 0
840#define bq27441_dm_regs bq27421_dm_regs
841#else
842#define bq27441_dm_regs 0
843#endif
844
845#if 0
846static struct bq27xxx_dm_reg bq27621_dm_regs[] = {
847 [BQ27XXX_DM_DESIGN_CAPACITY] = { 82, 3, 2, 0, 8000 },
848 [BQ27XXX_DM_DESIGN_ENERGY] = { 82, 5, 2, 0, 32767 },
849 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 9, 2, 2500, 3700 },
850};
851#else
852#define bq27621_dm_regs 0
853#endif
854
855#define bq27z561_dm_regs 0
856#define bq28z610_dm_regs 0
857
858#define BQ27XXX_O_ZERO 0x00000001
859#define BQ27XXX_O_OTDC 0x00000002
860#define BQ27XXX_O_UTOT 0x00000004
861#define BQ27XXX_O_CFGUP 0x00000008
862#define BQ27XXX_O_RAM 0x00000010
863#define BQ27Z561_O_BITS 0x00000020
864
865#define BQ27XXX_DATA(ref, key, opt) { \
866 .opts = (opt), \
867 .unseal_key = key, \
868 .regs = ref##_regs, \
869 .dm_regs = ref##_dm_regs, \
870 .props = ref##_props, \
871 .props_size = ARRAY_SIZE(ref##_props) }
872
873static struct {
874 u32 opts;
875 u32 unseal_key;
876 u8 *regs;
877 struct bq27xxx_dm_reg *dm_regs;
878 enum power_supply_property *props;
879 size_t props_size;
880} bq27xxx_chip_data[] = {
881 [BQ27000] = BQ27XXX_DATA(bq27000, 0 , BQ27XXX_O_ZERO),
882 [BQ27010] = BQ27XXX_DATA(bq27010, 0 , BQ27XXX_O_ZERO),
883 [BQ2750X] = BQ27XXX_DATA(bq2750x, 0 , BQ27XXX_O_OTDC),
884 [BQ2751X] = BQ27XXX_DATA(bq2751x, 0 , BQ27XXX_O_OTDC),
885 [BQ2752X] = BQ27XXX_DATA(bq2752x, 0 , BQ27XXX_O_OTDC),
886 [BQ27500] = BQ27XXX_DATA(bq27500, 0x04143672, BQ27XXX_O_OTDC),
887 [BQ27510G1] = BQ27XXX_DATA(bq27510g1, 0 , BQ27XXX_O_OTDC),
888 [BQ27510G2] = BQ27XXX_DATA(bq27510g2, 0 , BQ27XXX_O_OTDC),
889 [BQ27510G3] = BQ27XXX_DATA(bq27510g3, 0 , BQ27XXX_O_OTDC),
890 [BQ27520G1] = BQ27XXX_DATA(bq27520g1, 0 , BQ27XXX_O_OTDC),
891 [BQ27520G2] = BQ27XXX_DATA(bq27520g2, 0 , BQ27XXX_O_OTDC),
892 [BQ27520G3] = BQ27XXX_DATA(bq27520g3, 0 , BQ27XXX_O_OTDC),
893 [BQ27520G4] = BQ27XXX_DATA(bq27520g4, 0 , BQ27XXX_O_OTDC),
894 [BQ27521] = BQ27XXX_DATA(bq27521, 0 , 0),
895 [BQ27530] = BQ27XXX_DATA(bq27530, 0 , BQ27XXX_O_UTOT),
896 [BQ27531] = BQ27XXX_DATA(bq27531, 0 , BQ27XXX_O_UTOT),
897 [BQ27541] = BQ27XXX_DATA(bq27541, 0 , BQ27XXX_O_OTDC),
898 [BQ27542] = BQ27XXX_DATA(bq27542, 0 , BQ27XXX_O_OTDC),
899 [BQ27546] = BQ27XXX_DATA(bq27546, 0 , BQ27XXX_O_OTDC),
900 [BQ27742] = BQ27XXX_DATA(bq27742, 0 , BQ27XXX_O_OTDC),
901 [BQ27545] = BQ27XXX_DATA(bq27545, 0x04143672, BQ27XXX_O_OTDC),
902 [BQ27411] = BQ27XXX_DATA(bq27411, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
903 [BQ27421] = BQ27XXX_DATA(bq27421, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
904 [BQ27425] = BQ27XXX_DATA(bq27425, 0x04143672, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP),
905 [BQ27426] = BQ27XXX_DATA(bq27426, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
906 [BQ27441] = BQ27XXX_DATA(bq27441, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
907 [BQ27621] = BQ27XXX_DATA(bq27621, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
908 [BQ27Z561] = BQ27XXX_DATA(bq27z561, 0 , BQ27Z561_O_BITS),
909 [BQ28Z610] = BQ27XXX_DATA(bq28z610, 0 , BQ27Z561_O_BITS),
910};
911
912static DEFINE_MUTEX(bq27xxx_list_lock);
913static LIST_HEAD(bq27xxx_battery_devices);
914
915#define BQ27XXX_MSLEEP(i) usleep_range((i)*1000, (i)*1000+500)
916
917#define BQ27XXX_DM_SZ 32
918
919
920
921
922
923
924
925
926
927
928
929struct bq27xxx_dm_buf {
930 u8 class;
931 u8 block;
932 u8 data[BQ27XXX_DM_SZ];
933 bool has_data, dirty;
934};
935
936#define BQ27XXX_DM_BUF(di, i) { \
937 .class = (di)->dm_regs[i].subclass_id, \
938 .block = (di)->dm_regs[i].offset / BQ27XXX_DM_SZ, \
939}
940
941static inline u16 *bq27xxx_dm_reg_ptr(struct bq27xxx_dm_buf *buf,
942 struct bq27xxx_dm_reg *reg)
943{
944 if (buf->class == reg->subclass_id &&
945 buf->block == reg->offset / BQ27XXX_DM_SZ)
946 return (u16 *) (buf->data + reg->offset % BQ27XXX_DM_SZ);
947
948 return NULL;
949}
950
951static const char * const bq27xxx_dm_reg_name[] = {
952 [BQ27XXX_DM_DESIGN_CAPACITY] = "design-capacity",
953 [BQ27XXX_DM_DESIGN_ENERGY] = "design-energy",
954 [BQ27XXX_DM_TERMINATE_VOLTAGE] = "terminate-voltage",
955};
956
957
958static bool bq27xxx_dt_to_nvm = true;
959module_param_named(dt_monitored_battery_updates_nvm, bq27xxx_dt_to_nvm, bool, 0444);
960MODULE_PARM_DESC(dt_monitored_battery_updates_nvm,
961 "Devicetree monitored-battery config updates data memory on NVM/flash chips.\n"
962 "Users must set this =0 when installing a different type of battery!\n"
963 "Default is =1."
964#ifndef CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM
965 "\nSetting this affects future kernel updates, not the current configuration."
966#endif
967);
968
969static int poll_interval_param_set(const char *val, const struct kernel_param *kp)
970{
971 struct bq27xxx_device_info *di;
972 unsigned int prev_val = *(unsigned int *) kp->arg;
973 int ret;
974
975 ret = param_set_uint(val, kp);
976 if (ret < 0 || prev_val == *(unsigned int *) kp->arg)
977 return ret;
978
979 mutex_lock(&bq27xxx_list_lock);
980 list_for_each_entry(di, &bq27xxx_battery_devices, list) {
981 cancel_delayed_work_sync(&di->work);
982 schedule_delayed_work(&di->work, 0);
983 }
984 mutex_unlock(&bq27xxx_list_lock);
985
986 return ret;
987}
988
989static const struct kernel_param_ops param_ops_poll_interval = {
990 .get = param_get_uint,
991 .set = poll_interval_param_set,
992};
993
994static unsigned int poll_interval = 360;
995module_param_cb(poll_interval, ¶m_ops_poll_interval, &poll_interval, 0644);
996MODULE_PARM_DESC(poll_interval,
997 "battery poll interval in seconds - 0 disables polling");
998
999
1000
1001
1002
1003static inline int bq27xxx_read(struct bq27xxx_device_info *di, int reg_index,
1004 bool single)
1005{
1006 int ret;
1007
1008 if (!di || di->regs[reg_index] == INVALID_REG_ADDR)
1009 return -EINVAL;
1010
1011 ret = di->bus.read(di, di->regs[reg_index], single);
1012 if (ret < 0)
1013 dev_dbg(di->dev, "failed to read register 0x%02x (index %d)\n",
1014 di->regs[reg_index], reg_index);
1015
1016 return ret;
1017}
1018
1019static inline int bq27xxx_write(struct bq27xxx_device_info *di, int reg_index,
1020 u16 value, bool single)
1021{
1022 int ret;
1023
1024 if (!di || di->regs[reg_index] == INVALID_REG_ADDR)
1025 return -EINVAL;
1026
1027 if (!di->bus.write)
1028 return -EPERM;
1029
1030 ret = di->bus.write(di, di->regs[reg_index], value, single);
1031 if (ret < 0)
1032 dev_dbg(di->dev, "failed to write register 0x%02x (index %d)\n",
1033 di->regs[reg_index], reg_index);
1034
1035 return ret;
1036}
1037
1038static inline int bq27xxx_read_block(struct bq27xxx_device_info *di, int reg_index,
1039 u8 *data, int len)
1040{
1041 int ret;
1042
1043 if (!di || di->regs[reg_index] == INVALID_REG_ADDR)
1044 return -EINVAL;
1045
1046 if (!di->bus.read_bulk)
1047 return -EPERM;
1048
1049 ret = di->bus.read_bulk(di, di->regs[reg_index], data, len);
1050 if (ret < 0)
1051 dev_dbg(di->dev, "failed to read_bulk register 0x%02x (index %d)\n",
1052 di->regs[reg_index], reg_index);
1053
1054 return ret;
1055}
1056
1057static inline int bq27xxx_write_block(struct bq27xxx_device_info *di, int reg_index,
1058 u8 *data, int len)
1059{
1060 int ret;
1061
1062 if (!di || di->regs[reg_index] == INVALID_REG_ADDR)
1063 return -EINVAL;
1064
1065 if (!di->bus.write_bulk)
1066 return -EPERM;
1067
1068 ret = di->bus.write_bulk(di, di->regs[reg_index], data, len);
1069 if (ret < 0)
1070 dev_dbg(di->dev, "failed to write_bulk register 0x%02x (index %d)\n",
1071 di->regs[reg_index], reg_index);
1072
1073 return ret;
1074}
1075
1076static int bq27xxx_battery_seal(struct bq27xxx_device_info *di)
1077{
1078 int ret;
1079
1080 ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, BQ27XXX_SEALED, false);
1081 if (ret < 0) {
1082 dev_err(di->dev, "bus error on seal: %d\n", ret);
1083 return ret;
1084 }
1085
1086 return 0;
1087}
1088
1089static int bq27xxx_battery_unseal(struct bq27xxx_device_info *di)
1090{
1091 int ret;
1092
1093 if (di->unseal_key == 0) {
1094 dev_err(di->dev, "unseal failed due to missing key\n");
1095 return -EINVAL;
1096 }
1097
1098 ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, (u16)(di->unseal_key >> 16), false);
1099 if (ret < 0)
1100 goto out;
1101
1102 ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, (u16)di->unseal_key, false);
1103 if (ret < 0)
1104 goto out;
1105
1106 return 0;
1107
1108out:
1109 dev_err(di->dev, "bus error on unseal: %d\n", ret);
1110 return ret;
1111}
1112
1113static u8 bq27xxx_battery_checksum_dm_block(struct bq27xxx_dm_buf *buf)
1114{
1115 u16 sum = 0;
1116 int i;
1117
1118 for (i = 0; i < BQ27XXX_DM_SZ; i++)
1119 sum += buf->data[i];
1120 sum &= 0xff;
1121
1122 return 0xff - sum;
1123}
1124
1125static int bq27xxx_battery_read_dm_block(struct bq27xxx_device_info *di,
1126 struct bq27xxx_dm_buf *buf)
1127{
1128 int ret;
1129
1130 buf->has_data = false;
1131
1132 ret = bq27xxx_write(di, BQ27XXX_DM_CLASS, buf->class, true);
1133 if (ret < 0)
1134 goto out;
1135
1136 ret = bq27xxx_write(di, BQ27XXX_DM_BLOCK, buf->block, true);
1137 if (ret < 0)
1138 goto out;
1139
1140 BQ27XXX_MSLEEP(1);
1141
1142 ret = bq27xxx_read_block(di, BQ27XXX_DM_DATA, buf->data, BQ27XXX_DM_SZ);
1143 if (ret < 0)
1144 goto out;
1145
1146 ret = bq27xxx_read(di, BQ27XXX_DM_CKSUM, true);
1147 if (ret < 0)
1148 goto out;
1149
1150 if ((u8)ret != bq27xxx_battery_checksum_dm_block(buf)) {
1151 ret = -EINVAL;
1152 goto out;
1153 }
1154
1155 buf->has_data = true;
1156 buf->dirty = false;
1157
1158 return 0;
1159
1160out:
1161 dev_err(di->dev, "bus error reading chip memory: %d\n", ret);
1162 return ret;
1163}
1164
1165static void bq27xxx_battery_update_dm_block(struct bq27xxx_device_info *di,
1166 struct bq27xxx_dm_buf *buf,
1167 enum bq27xxx_dm_reg_id reg_id,
1168 unsigned int val)
1169{
1170 struct bq27xxx_dm_reg *reg = &di->dm_regs[reg_id];
1171 const char *str = bq27xxx_dm_reg_name[reg_id];
1172 u16 *prev = bq27xxx_dm_reg_ptr(buf, reg);
1173
1174 if (prev == NULL) {
1175 dev_warn(di->dev, "buffer does not match %s dm spec\n", str);
1176 return;
1177 }
1178
1179 if (reg->bytes != 2) {
1180 dev_warn(di->dev, "%s dm spec has unsupported byte size\n", str);
1181 return;
1182 }
1183
1184 if (!buf->has_data)
1185 return;
1186
1187 if (be16_to_cpup(prev) == val) {
1188 dev_info(di->dev, "%s has %u\n", str, val);
1189 return;
1190 }
1191
1192#ifdef CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM
1193 if (!(di->opts & BQ27XXX_O_RAM) && !bq27xxx_dt_to_nvm) {
1194#else
1195 if (!(di->opts & BQ27XXX_O_RAM)) {
1196#endif
1197
1198 dev_warn(di->dev, "%s has %u; update to %u disallowed "
1199#ifdef CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM
1200 "by dt_monitored_battery_updates_nvm=0"
1201#else
1202 "for flash/NVM data memory"
1203#endif
1204 "\n", str, be16_to_cpup(prev), val);
1205 return;
1206 }
1207
1208 dev_info(di->dev, "update %s to %u\n", str, val);
1209
1210 *prev = cpu_to_be16(val);
1211 buf->dirty = true;
1212}
1213
1214static int bq27xxx_battery_cfgupdate_priv(struct bq27xxx_device_info *di, bool active)
1215{
1216 const int limit = 100;
1217 u16 cmd = active ? BQ27XXX_SET_CFGUPDATE : BQ27XXX_SOFT_RESET;
1218 int ret, try = limit;
1219
1220 ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, cmd, false);
1221 if (ret < 0)
1222 return ret;
1223
1224 do {
1225 BQ27XXX_MSLEEP(25);
1226 ret = bq27xxx_read(di, BQ27XXX_REG_FLAGS, false);
1227 if (ret < 0)
1228 return ret;
1229 } while (!!(ret & BQ27XXX_FLAG_CFGUP) != active && --try);
1230
1231 if (!try && di->chip != BQ27425) {
1232 dev_err(di->dev, "timed out waiting for cfgupdate flag %d\n", active);
1233 return -EINVAL;
1234 }
1235
1236 if (limit - try > 3)
1237 dev_warn(di->dev, "cfgupdate %d, retries %d\n", active, limit - try);
1238
1239 return 0;
1240}
1241
1242static inline int bq27xxx_battery_set_cfgupdate(struct bq27xxx_device_info *di)
1243{
1244 int ret = bq27xxx_battery_cfgupdate_priv(di, true);
1245 if (ret < 0 && ret != -EINVAL)
1246 dev_err(di->dev, "bus error on set_cfgupdate: %d\n", ret);
1247
1248 return ret;
1249}
1250
1251static inline int bq27xxx_battery_soft_reset(struct bq27xxx_device_info *di)
1252{
1253 int ret = bq27xxx_battery_cfgupdate_priv(di, false);
1254 if (ret < 0 && ret != -EINVAL)
1255 dev_err(di->dev, "bus error on soft_reset: %d\n", ret);
1256
1257 return ret;
1258}
1259
1260static int bq27xxx_battery_write_dm_block(struct bq27xxx_device_info *di,
1261 struct bq27xxx_dm_buf *buf)
1262{
1263 bool cfgup = di->opts & BQ27XXX_O_CFGUP;
1264 int ret;
1265
1266 if (!buf->dirty)
1267 return 0;
1268
1269 if (cfgup) {
1270 ret = bq27xxx_battery_set_cfgupdate(di);
1271 if (ret < 0)
1272 return ret;
1273 }
1274
1275 ret = bq27xxx_write(di, BQ27XXX_DM_CTRL, 0, true);
1276 if (ret < 0)
1277 goto out;
1278
1279 ret = bq27xxx_write(di, BQ27XXX_DM_CLASS, buf->class, true);
1280 if (ret < 0)
1281 goto out;
1282
1283 ret = bq27xxx_write(di, BQ27XXX_DM_BLOCK, buf->block, true);
1284 if (ret < 0)
1285 goto out;
1286
1287 BQ27XXX_MSLEEP(1);
1288
1289 ret = bq27xxx_write_block(di, BQ27XXX_DM_DATA, buf->data, BQ27XXX_DM_SZ);
1290 if (ret < 0)
1291 goto out;
1292
1293 ret = bq27xxx_write(di, BQ27XXX_DM_CKSUM,
1294 bq27xxx_battery_checksum_dm_block(buf), true);
1295 if (ret < 0)
1296 goto out;
1297
1298
1299
1300
1301
1302
1303 if (cfgup) {
1304 BQ27XXX_MSLEEP(1);
1305 ret = bq27xxx_battery_soft_reset(di);
1306 if (ret < 0)
1307 return ret;
1308 } else {
1309 BQ27XXX_MSLEEP(100);
1310 }
1311
1312 buf->dirty = false;
1313
1314 return 0;
1315
1316out:
1317 if (cfgup)
1318 bq27xxx_battery_soft_reset(di);
1319
1320 dev_err(di->dev, "bus error writing chip memory: %d\n", ret);
1321 return ret;
1322}
1323
1324static void bq27xxx_battery_set_config(struct bq27xxx_device_info *di,
1325 struct power_supply_battery_info *info)
1326{
1327 struct bq27xxx_dm_buf bd = BQ27XXX_DM_BUF(di, BQ27XXX_DM_DESIGN_CAPACITY);
1328 struct bq27xxx_dm_buf bt = BQ27XXX_DM_BUF(di, BQ27XXX_DM_TERMINATE_VOLTAGE);
1329 bool updated;
1330
1331 if (bq27xxx_battery_unseal(di) < 0)
1332 return;
1333
1334 if (info->charge_full_design_uah != -EINVAL &&
1335 info->energy_full_design_uwh != -EINVAL) {
1336 bq27xxx_battery_read_dm_block(di, &bd);
1337
1338 bq27xxx_battery_update_dm_block(di, &bd,
1339 BQ27XXX_DM_DESIGN_CAPACITY,
1340 info->charge_full_design_uah / 1000);
1341 bq27xxx_battery_update_dm_block(di, &bd,
1342 BQ27XXX_DM_DESIGN_ENERGY,
1343 info->energy_full_design_uwh / 1000);
1344 }
1345
1346 if (info->voltage_min_design_uv != -EINVAL) {
1347 bool same = bd.class == bt.class && bd.block == bt.block;
1348 if (!same)
1349 bq27xxx_battery_read_dm_block(di, &bt);
1350 bq27xxx_battery_update_dm_block(di, same ? &bd : &bt,
1351 BQ27XXX_DM_TERMINATE_VOLTAGE,
1352 info->voltage_min_design_uv / 1000);
1353 }
1354
1355 updated = bd.dirty || bt.dirty;
1356
1357 bq27xxx_battery_write_dm_block(di, &bd);
1358 bq27xxx_battery_write_dm_block(di, &bt);
1359
1360 bq27xxx_battery_seal(di);
1361
1362 if (updated && !(di->opts & BQ27XXX_O_CFGUP)) {
1363 bq27xxx_write(di, BQ27XXX_REG_CTRL, BQ27XXX_RESET, false);
1364 BQ27XXX_MSLEEP(300);
1365 }
1366
1367}
1368
1369static void bq27xxx_battery_settings(struct bq27xxx_device_info *di)
1370{
1371 struct power_supply_battery_info info = {};
1372 unsigned int min, max;
1373
1374 if (power_supply_get_battery_info(di->bat, &info) < 0)
1375 return;
1376
1377 if (!di->dm_regs) {
1378 dev_warn(di->dev, "data memory update not supported for chip\n");
1379 return;
1380 }
1381
1382 if (info.energy_full_design_uwh != info.charge_full_design_uah) {
1383 if (info.energy_full_design_uwh == -EINVAL)
1384 dev_warn(di->dev, "missing battery:energy-full-design-microwatt-hours\n");
1385 else if (info.charge_full_design_uah == -EINVAL)
1386 dev_warn(di->dev, "missing battery:charge-full-design-microamp-hours\n");
1387 }
1388
1389
1390 max = di->dm_regs[BQ27XXX_DM_DESIGN_ENERGY].max;
1391 if (info.energy_full_design_uwh > max * 1000) {
1392 dev_err(di->dev, "invalid battery:energy-full-design-microwatt-hours %d\n",
1393 info.energy_full_design_uwh);
1394 info.energy_full_design_uwh = -EINVAL;
1395 }
1396
1397
1398 max = di->dm_regs[BQ27XXX_DM_DESIGN_CAPACITY].max;
1399 if (info.charge_full_design_uah > max * 1000) {
1400 dev_err(di->dev, "invalid battery:charge-full-design-microamp-hours %d\n",
1401 info.charge_full_design_uah);
1402 info.charge_full_design_uah = -EINVAL;
1403 }
1404
1405 min = di->dm_regs[BQ27XXX_DM_TERMINATE_VOLTAGE].min;
1406 max = di->dm_regs[BQ27XXX_DM_TERMINATE_VOLTAGE].max;
1407 if ((info.voltage_min_design_uv < min * 1000 ||
1408 info.voltage_min_design_uv > max * 1000) &&
1409 info.voltage_min_design_uv != -EINVAL) {
1410 dev_err(di->dev, "invalid battery:voltage-min-design-microvolt %d\n",
1411 info.voltage_min_design_uv);
1412 info.voltage_min_design_uv = -EINVAL;
1413 }
1414
1415 if ((info.energy_full_design_uwh != -EINVAL &&
1416 info.charge_full_design_uah != -EINVAL) ||
1417 info.voltage_min_design_uv != -EINVAL)
1418 bq27xxx_battery_set_config(di, &info);
1419}
1420
1421
1422
1423
1424
1425static int bq27xxx_battery_read_soc(struct bq27xxx_device_info *di)
1426{
1427 int soc;
1428
1429 if (di->opts & BQ27XXX_O_ZERO)
1430 soc = bq27xxx_read(di, BQ27XXX_REG_SOC, true);
1431 else
1432 soc = bq27xxx_read(di, BQ27XXX_REG_SOC, false);
1433
1434 if (soc < 0)
1435 dev_dbg(di->dev, "error reading State-of-Charge\n");
1436
1437 return soc;
1438}
1439
1440
1441
1442
1443
1444static int bq27xxx_battery_read_charge(struct bq27xxx_device_info *di, u8 reg)
1445{
1446 int charge;
1447
1448 charge = bq27xxx_read(di, reg, false);
1449 if (charge < 0) {
1450 dev_dbg(di->dev, "error reading charge register %02x: %d\n",
1451 reg, charge);
1452 return charge;
1453 }
1454
1455 if (di->opts & BQ27XXX_O_ZERO)
1456 charge *= BQ27XXX_CURRENT_CONSTANT / BQ27XXX_RS;
1457 else
1458 charge *= 1000;
1459
1460 return charge;
1461}
1462
1463
1464
1465
1466
1467static inline int bq27xxx_battery_read_nac(struct bq27xxx_device_info *di)
1468{
1469 int flags;
1470
1471 if (di->opts & BQ27XXX_O_ZERO) {
1472 flags = bq27xxx_read(di, BQ27XXX_REG_FLAGS, true);
1473 if (flags >= 0 && (flags & BQ27000_FLAG_CI))
1474 return -ENODATA;
1475 }
1476
1477 return bq27xxx_battery_read_charge(di, BQ27XXX_REG_NAC);
1478}
1479
1480
1481
1482
1483
1484static inline int bq27xxx_battery_read_fcc(struct bq27xxx_device_info *di)
1485{
1486 return bq27xxx_battery_read_charge(di, BQ27XXX_REG_FCC);
1487}
1488
1489
1490
1491
1492
1493static int bq27xxx_battery_read_dcap(struct bq27xxx_device_info *di)
1494{
1495 int dcap;
1496
1497 if (di->opts & BQ27XXX_O_ZERO)
1498 dcap = bq27xxx_read(di, BQ27XXX_REG_DCAP, true);
1499 else
1500 dcap = bq27xxx_read(di, BQ27XXX_REG_DCAP, false);
1501
1502 if (dcap < 0) {
1503 dev_dbg(di->dev, "error reading initial last measured discharge\n");
1504 return dcap;
1505 }
1506
1507 if (di->opts & BQ27XXX_O_ZERO)
1508 dcap = (dcap << 8) * BQ27XXX_CURRENT_CONSTANT / BQ27XXX_RS;
1509 else
1510 dcap *= 1000;
1511
1512 return dcap;
1513}
1514
1515
1516
1517
1518
1519static int bq27xxx_battery_read_energy(struct bq27xxx_device_info *di)
1520{
1521 int ae;
1522
1523 ae = bq27xxx_read(di, BQ27XXX_REG_AE, false);
1524 if (ae < 0) {
1525 dev_dbg(di->dev, "error reading available energy\n");
1526 return ae;
1527 }
1528
1529 if (di->opts & BQ27XXX_O_ZERO)
1530 ae *= BQ27XXX_POWER_CONSTANT / BQ27XXX_RS;
1531 else
1532 ae *= 1000;
1533
1534 return ae;
1535}
1536
1537
1538
1539
1540
1541static int bq27xxx_battery_read_temperature(struct bq27xxx_device_info *di)
1542{
1543 int temp;
1544
1545 temp = bq27xxx_read(di, BQ27XXX_REG_TEMP, false);
1546 if (temp < 0) {
1547 dev_err(di->dev, "error reading temperature\n");
1548 return temp;
1549 }
1550
1551 if (di->opts & BQ27XXX_O_ZERO)
1552 temp = 5 * temp / 2;
1553
1554 return temp;
1555}
1556
1557
1558
1559
1560
1561static int bq27xxx_battery_read_cyct(struct bq27xxx_device_info *di)
1562{
1563 int cyct;
1564
1565 cyct = bq27xxx_read(di, BQ27XXX_REG_CYCT, false);
1566 if (cyct < 0)
1567 dev_err(di->dev, "error reading cycle count total\n");
1568
1569 return cyct;
1570}
1571
1572
1573
1574
1575
1576static int bq27xxx_battery_read_time(struct bq27xxx_device_info *di, u8 reg)
1577{
1578 int tval;
1579
1580 tval = bq27xxx_read(di, reg, false);
1581 if (tval < 0) {
1582 dev_dbg(di->dev, "error reading time register %02x: %d\n",
1583 reg, tval);
1584 return tval;
1585 }
1586
1587 if (tval == 65535)
1588 return -ENODATA;
1589
1590 return tval * 60;
1591}
1592
1593
1594
1595
1596
1597static int bq27xxx_battery_read_pwr_avg(struct bq27xxx_device_info *di)
1598{
1599 int tval;
1600
1601 tval = bq27xxx_read(di, BQ27XXX_REG_AP, false);
1602 if (tval < 0) {
1603 dev_err(di->dev, "error reading average power register %02x: %d\n",
1604 BQ27XXX_REG_AP, tval);
1605 return tval;
1606 }
1607
1608 if (di->opts & BQ27XXX_O_ZERO)
1609 return (tval * BQ27XXX_POWER_CONSTANT) / BQ27XXX_RS;
1610 else
1611 return tval;
1612}
1613
1614
1615
1616
1617static bool bq27xxx_battery_overtemp(struct bq27xxx_device_info *di, u16 flags)
1618{
1619 if (di->opts & BQ27XXX_O_OTDC)
1620 return flags & (BQ27XXX_FLAG_OTC | BQ27XXX_FLAG_OTD);
1621 if (di->opts & BQ27XXX_O_UTOT)
1622 return flags & BQ27XXX_FLAG_OT;
1623
1624 return false;
1625}
1626
1627
1628
1629
1630static bool bq27xxx_battery_undertemp(struct bq27xxx_device_info *di, u16 flags)
1631{
1632 if (di->opts & BQ27XXX_O_UTOT)
1633 return flags & BQ27XXX_FLAG_UT;
1634
1635 return false;
1636}
1637
1638
1639
1640
1641static bool bq27xxx_battery_dead(struct bq27xxx_device_info *di, u16 flags)
1642{
1643 if (di->opts & BQ27XXX_O_ZERO)
1644 return flags & (BQ27000_FLAG_EDV1 | BQ27000_FLAG_EDVF);
1645 else if (di->opts & BQ27Z561_O_BITS)
1646 return flags & BQ27Z561_FLAG_FDC;
1647 else
1648 return flags & (BQ27XXX_FLAG_SOC1 | BQ27XXX_FLAG_SOCF);
1649}
1650
1651static int bq27xxx_battery_read_health(struct bq27xxx_device_info *di)
1652{
1653
1654 if (unlikely(bq27xxx_battery_overtemp(di, di->cache.flags)))
1655 return POWER_SUPPLY_HEALTH_OVERHEAT;
1656 if (unlikely(bq27xxx_battery_undertemp(di, di->cache.flags)))
1657 return POWER_SUPPLY_HEALTH_COLD;
1658 if (unlikely(bq27xxx_battery_dead(di, di->cache.flags)))
1659 return POWER_SUPPLY_HEALTH_DEAD;
1660
1661 return POWER_SUPPLY_HEALTH_GOOD;
1662}
1663
1664void bq27xxx_battery_update(struct bq27xxx_device_info *di)
1665{
1666 struct bq27xxx_reg_cache cache = {0, };
1667 bool has_ci_flag = di->opts & BQ27XXX_O_ZERO;
1668 bool has_singe_flag = di->opts & BQ27XXX_O_ZERO;
1669
1670 cache.flags = bq27xxx_read(di, BQ27XXX_REG_FLAGS, has_singe_flag);
1671 if ((cache.flags & 0xff) == 0xff)
1672 cache.flags = -1;
1673 if (cache.flags >= 0) {
1674 cache.temperature = bq27xxx_battery_read_temperature(di);
1675 if (has_ci_flag && (cache.flags & BQ27000_FLAG_CI)) {
1676 dev_info_once(di->dev, "battery is not calibrated! ignoring capacity values\n");
1677 cache.capacity = -ENODATA;
1678 cache.energy = -ENODATA;
1679 cache.time_to_empty = -ENODATA;
1680 cache.time_to_empty_avg = -ENODATA;
1681 cache.time_to_full = -ENODATA;
1682 cache.charge_full = -ENODATA;
1683 cache.health = -ENODATA;
1684 } else {
1685 if (di->regs[BQ27XXX_REG_TTE] != INVALID_REG_ADDR)
1686 cache.time_to_empty = bq27xxx_battery_read_time(di, BQ27XXX_REG_TTE);
1687 if (di->regs[BQ27XXX_REG_TTECP] != INVALID_REG_ADDR)
1688 cache.time_to_empty_avg = bq27xxx_battery_read_time(di, BQ27XXX_REG_TTECP);
1689 if (di->regs[BQ27XXX_REG_TTF] != INVALID_REG_ADDR)
1690 cache.time_to_full = bq27xxx_battery_read_time(di, BQ27XXX_REG_TTF);
1691
1692 cache.charge_full = bq27xxx_battery_read_fcc(di);
1693 cache.capacity = bq27xxx_battery_read_soc(di);
1694 if (di->regs[BQ27XXX_REG_AE] != INVALID_REG_ADDR)
1695 cache.energy = bq27xxx_battery_read_energy(di);
1696 di->cache.flags = cache.flags;
1697 cache.health = bq27xxx_battery_read_health(di);
1698 }
1699 if (di->regs[BQ27XXX_REG_CYCT] != INVALID_REG_ADDR)
1700 cache.cycle_count = bq27xxx_battery_read_cyct(di);
1701 if (di->regs[BQ27XXX_REG_AP] != INVALID_REG_ADDR)
1702 cache.power_avg = bq27xxx_battery_read_pwr_avg(di);
1703
1704
1705 if (di->charge_design_full <= 0)
1706 di->charge_design_full = bq27xxx_battery_read_dcap(di);
1707 }
1708
1709 if ((di->cache.capacity != cache.capacity) ||
1710 (di->cache.flags != cache.flags))
1711 power_supply_changed(di->bat);
1712
1713 if (memcmp(&di->cache, &cache, sizeof(cache)) != 0)
1714 di->cache = cache;
1715
1716 di->last_update = jiffies;
1717}
1718EXPORT_SYMBOL_GPL(bq27xxx_battery_update);
1719
1720static void bq27xxx_battery_poll(struct work_struct *work)
1721{
1722 struct bq27xxx_device_info *di =
1723 container_of(work, struct bq27xxx_device_info,
1724 work.work);
1725
1726 bq27xxx_battery_update(di);
1727
1728 if (poll_interval > 0)
1729 schedule_delayed_work(&di->work, poll_interval * HZ);
1730}
1731
1732
1733
1734
1735
1736
1737static int bq27xxx_battery_current(struct bq27xxx_device_info *di,
1738 union power_supply_propval *val)
1739{
1740 int curr;
1741 int flags;
1742
1743 curr = bq27xxx_read(di, BQ27XXX_REG_AI, false);
1744 if (curr < 0) {
1745 dev_err(di->dev, "error reading current\n");
1746 return curr;
1747 }
1748
1749 if (di->opts & BQ27XXX_O_ZERO) {
1750 flags = bq27xxx_read(di, BQ27XXX_REG_FLAGS, true);
1751 if (flags & BQ27000_FLAG_CHGS) {
1752 dev_dbg(di->dev, "negative current!\n");
1753 curr = -curr;
1754 }
1755
1756 val->intval = curr * BQ27XXX_CURRENT_CONSTANT / BQ27XXX_RS;
1757 } else {
1758
1759 val->intval = (int)((s16)curr) * 1000;
1760 }
1761
1762 return 0;
1763}
1764
1765static int bq27xxx_battery_status(struct bq27xxx_device_info *di,
1766 union power_supply_propval *val)
1767{
1768 int status;
1769
1770 if (di->opts & BQ27XXX_O_ZERO) {
1771 if (di->cache.flags & BQ27000_FLAG_FC)
1772 status = POWER_SUPPLY_STATUS_FULL;
1773 else if (di->cache.flags & BQ27000_FLAG_CHGS)
1774 status = POWER_SUPPLY_STATUS_CHARGING;
1775 else if (power_supply_am_i_supplied(di->bat) > 0)
1776 status = POWER_SUPPLY_STATUS_NOT_CHARGING;
1777 else
1778 status = POWER_SUPPLY_STATUS_DISCHARGING;
1779 } else if (di->opts & BQ27Z561_O_BITS) {
1780 if (di->cache.flags & BQ27Z561_FLAG_FC)
1781 status = POWER_SUPPLY_STATUS_FULL;
1782 else if (di->cache.flags & BQ27Z561_FLAG_DIS_CH)
1783 status = POWER_SUPPLY_STATUS_DISCHARGING;
1784 else
1785 status = POWER_SUPPLY_STATUS_CHARGING;
1786 } else {
1787 if (di->cache.flags & BQ27XXX_FLAG_FC)
1788 status = POWER_SUPPLY_STATUS_FULL;
1789 else if (di->cache.flags & BQ27XXX_FLAG_DSC)
1790 status = POWER_SUPPLY_STATUS_DISCHARGING;
1791 else
1792 status = POWER_SUPPLY_STATUS_CHARGING;
1793 }
1794
1795 val->intval = status;
1796
1797 return 0;
1798}
1799
1800static int bq27xxx_battery_capacity_level(struct bq27xxx_device_info *di,
1801 union power_supply_propval *val)
1802{
1803 int level;
1804
1805 if (di->opts & BQ27XXX_O_ZERO) {
1806 if (di->cache.flags & BQ27000_FLAG_FC)
1807 level = POWER_SUPPLY_CAPACITY_LEVEL_FULL;
1808 else if (di->cache.flags & BQ27000_FLAG_EDV1)
1809 level = POWER_SUPPLY_CAPACITY_LEVEL_LOW;
1810 else if (di->cache.flags & BQ27000_FLAG_EDVF)
1811 level = POWER_SUPPLY_CAPACITY_LEVEL_CRITICAL;
1812 else
1813 level = POWER_SUPPLY_CAPACITY_LEVEL_NORMAL;
1814 } else if (di->opts & BQ27Z561_O_BITS) {
1815 if (di->cache.flags & BQ27Z561_FLAG_FC)
1816 level = POWER_SUPPLY_CAPACITY_LEVEL_FULL;
1817 else if (di->cache.flags & BQ27Z561_FLAG_FDC)
1818 level = POWER_SUPPLY_CAPACITY_LEVEL_CRITICAL;
1819 else
1820 level = POWER_SUPPLY_CAPACITY_LEVEL_NORMAL;
1821 } else {
1822 if (di->cache.flags & BQ27XXX_FLAG_FC)
1823 level = POWER_SUPPLY_CAPACITY_LEVEL_FULL;
1824 else if (di->cache.flags & BQ27XXX_FLAG_SOC1)
1825 level = POWER_SUPPLY_CAPACITY_LEVEL_LOW;
1826 else if (di->cache.flags & BQ27XXX_FLAG_SOCF)
1827 level = POWER_SUPPLY_CAPACITY_LEVEL_CRITICAL;
1828 else
1829 level = POWER_SUPPLY_CAPACITY_LEVEL_NORMAL;
1830 }
1831
1832 val->intval = level;
1833
1834 return 0;
1835}
1836
1837
1838
1839
1840
1841static int bq27xxx_battery_voltage(struct bq27xxx_device_info *di,
1842 union power_supply_propval *val)
1843{
1844 int volt;
1845
1846 volt = bq27xxx_read(di, BQ27XXX_REG_VOLT, false);
1847 if (volt < 0) {
1848 dev_err(di->dev, "error reading voltage\n");
1849 return volt;
1850 }
1851
1852 val->intval = volt * 1000;
1853
1854 return 0;
1855}
1856
1857static int bq27xxx_simple_value(int value,
1858 union power_supply_propval *val)
1859{
1860 if (value < 0)
1861 return value;
1862
1863 val->intval = value;
1864
1865 return 0;
1866}
1867
1868static int bq27xxx_battery_get_property(struct power_supply *psy,
1869 enum power_supply_property psp,
1870 union power_supply_propval *val)
1871{
1872 int ret = 0;
1873 struct bq27xxx_device_info *di = power_supply_get_drvdata(psy);
1874
1875 mutex_lock(&di->lock);
1876 if (time_is_before_jiffies(di->last_update + 5 * HZ)) {
1877 cancel_delayed_work_sync(&di->work);
1878 bq27xxx_battery_poll(&di->work.work);
1879 }
1880 mutex_unlock(&di->lock);
1881
1882 if (psp != POWER_SUPPLY_PROP_PRESENT && di->cache.flags < 0)
1883 return -ENODEV;
1884
1885 switch (psp) {
1886 case POWER_SUPPLY_PROP_STATUS:
1887 ret = bq27xxx_battery_status(di, val);
1888 break;
1889 case POWER_SUPPLY_PROP_VOLTAGE_NOW:
1890 ret = bq27xxx_battery_voltage(di, val);
1891 break;
1892 case POWER_SUPPLY_PROP_PRESENT:
1893 val->intval = di->cache.flags < 0 ? 0 : 1;
1894 break;
1895 case POWER_SUPPLY_PROP_CURRENT_NOW:
1896 ret = bq27xxx_battery_current(di, val);
1897 break;
1898 case POWER_SUPPLY_PROP_CAPACITY:
1899 ret = bq27xxx_simple_value(di->cache.capacity, val);
1900 break;
1901 case POWER_SUPPLY_PROP_CAPACITY_LEVEL:
1902 ret = bq27xxx_battery_capacity_level(di, val);
1903 break;
1904 case POWER_SUPPLY_PROP_TEMP:
1905 ret = bq27xxx_simple_value(di->cache.temperature, val);
1906 if (ret == 0)
1907 val->intval -= 2731;
1908 break;
1909 case POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW:
1910 ret = bq27xxx_simple_value(di->cache.time_to_empty, val);
1911 break;
1912 case POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG:
1913 ret = bq27xxx_simple_value(di->cache.time_to_empty_avg, val);
1914 break;
1915 case POWER_SUPPLY_PROP_TIME_TO_FULL_NOW:
1916 ret = bq27xxx_simple_value(di->cache.time_to_full, val);
1917 break;
1918 case POWER_SUPPLY_PROP_TECHNOLOGY:
1919 val->intval = POWER_SUPPLY_TECHNOLOGY_LION;
1920 break;
1921 case POWER_SUPPLY_PROP_CHARGE_NOW:
1922 ret = bq27xxx_simple_value(bq27xxx_battery_read_nac(di), val);
1923 break;
1924 case POWER_SUPPLY_PROP_CHARGE_FULL:
1925 ret = bq27xxx_simple_value(di->cache.charge_full, val);
1926 break;
1927 case POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN:
1928 ret = bq27xxx_simple_value(di->charge_design_full, val);
1929 break;
1930
1931
1932
1933
1934 case POWER_SUPPLY_PROP_ENERGY_FULL_DESIGN:
1935 case POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN:
1936 return -EINVAL;
1937 case POWER_SUPPLY_PROP_CYCLE_COUNT:
1938 ret = bq27xxx_simple_value(di->cache.cycle_count, val);
1939 break;
1940 case POWER_SUPPLY_PROP_ENERGY_NOW:
1941 ret = bq27xxx_simple_value(di->cache.energy, val);
1942 break;
1943 case POWER_SUPPLY_PROP_POWER_AVG:
1944 ret = bq27xxx_simple_value(di->cache.power_avg, val);
1945 break;
1946 case POWER_SUPPLY_PROP_HEALTH:
1947 ret = bq27xxx_simple_value(di->cache.health, val);
1948 break;
1949 case POWER_SUPPLY_PROP_MANUFACTURER:
1950 val->strval = BQ27XXX_MANUFACTURER;
1951 break;
1952 default:
1953 return -EINVAL;
1954 }
1955
1956 return ret;
1957}
1958
1959static void bq27xxx_external_power_changed(struct power_supply *psy)
1960{
1961 struct bq27xxx_device_info *di = power_supply_get_drvdata(psy);
1962
1963 cancel_delayed_work_sync(&di->work);
1964 schedule_delayed_work(&di->work, 0);
1965}
1966
1967int bq27xxx_battery_setup(struct bq27xxx_device_info *di)
1968{
1969 struct power_supply_desc *psy_desc;
1970 struct power_supply_config psy_cfg = {
1971 .of_node = di->dev->of_node,
1972 .drv_data = di,
1973 };
1974
1975 INIT_DELAYED_WORK(&di->work, bq27xxx_battery_poll);
1976 mutex_init(&di->lock);
1977
1978 di->regs = bq27xxx_chip_data[di->chip].regs;
1979 di->unseal_key = bq27xxx_chip_data[di->chip].unseal_key;
1980 di->dm_regs = bq27xxx_chip_data[di->chip].dm_regs;
1981 di->opts = bq27xxx_chip_data[di->chip].opts;
1982
1983 psy_desc = devm_kzalloc(di->dev, sizeof(*psy_desc), GFP_KERNEL);
1984 if (!psy_desc)
1985 return -ENOMEM;
1986
1987 psy_desc->name = di->name;
1988 psy_desc->type = POWER_SUPPLY_TYPE_BATTERY;
1989 psy_desc->properties = bq27xxx_chip_data[di->chip].props;
1990 psy_desc->num_properties = bq27xxx_chip_data[di->chip].props_size;
1991 psy_desc->get_property = bq27xxx_battery_get_property;
1992 psy_desc->external_power_changed = bq27xxx_external_power_changed;
1993
1994 di->bat = power_supply_register_no_ws(di->dev, psy_desc, &psy_cfg);
1995 if (IS_ERR(di->bat)) {
1996 if (PTR_ERR(di->bat) == -EPROBE_DEFER)
1997 dev_dbg(di->dev, "failed to register battery, deferring probe\n");
1998 else
1999 dev_err(di->dev, "failed to register battery\n");
2000 return PTR_ERR(di->bat);
2001 }
2002
2003 bq27xxx_battery_settings(di);
2004 bq27xxx_battery_update(di);
2005
2006 mutex_lock(&bq27xxx_list_lock);
2007 list_add(&di->list, &bq27xxx_battery_devices);
2008 mutex_unlock(&bq27xxx_list_lock);
2009
2010 return 0;
2011}
2012EXPORT_SYMBOL_GPL(bq27xxx_battery_setup);
2013
2014void bq27xxx_battery_teardown(struct bq27xxx_device_info *di)
2015{
2016
2017
2018
2019
2020
2021
2022 poll_interval = 0;
2023
2024 cancel_delayed_work_sync(&di->work);
2025
2026 power_supply_unregister(di->bat);
2027
2028 mutex_lock(&bq27xxx_list_lock);
2029 list_del(&di->list);
2030 mutex_unlock(&bq27xxx_list_lock);
2031
2032 mutex_destroy(&di->lock);
2033}
2034EXPORT_SYMBOL_GPL(bq27xxx_battery_teardown);
2035
2036MODULE_AUTHOR("Rodolfo Giometti <giometti@linux.it>");
2037MODULE_DESCRIPTION("BQ27xxx battery monitor driver");
2038MODULE_LICENSE("GPL");
2039
