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8#include <dt-bindings/soc/zte,pm_domains.h>
9#include "zx2967_pm_domains.h"
10
11static u16 zx296718_offsets[REG_ARRAY_SIZE] = {
12 [REG_CLKEN] = 0x18,
13 [REG_ISOEN] = 0x1c,
14 [REG_RSTEN] = 0x20,
15 [REG_PWREN] = 0x24,
16 [REG_ACK_SYNC] = 0x28,
17};
18
19enum {
20 PCU_DM_VOU = 0,
21 PCU_DM_SAPPU,
22 PCU_DM_VDE,
23 PCU_DM_VCE,
24 PCU_DM_HDE,
25 PCU_DM_VIU,
26 PCU_DM_USB20,
27 PCU_DM_USB21,
28 PCU_DM_USB30,
29 PCU_DM_HSIC,
30 PCU_DM_GMAC,
31 PCU_DM_TS,
32};
33
34static struct zx2967_pm_domain vou_domain = {
35 .dm = {
36 .name = "vou_domain",
37 },
38 .bit = PCU_DM_VOU,
39 .polarity = PWREN,
40 .reg_offset = zx296718_offsets,
41};
42
43static struct zx2967_pm_domain sappu_domain = {
44 .dm = {
45 .name = "sappu_domain",
46 },
47 .bit = PCU_DM_SAPPU,
48 .polarity = PWREN,
49 .reg_offset = zx296718_offsets,
50};
51
52static struct zx2967_pm_domain vde_domain = {
53 .dm = {
54 .name = "vde_domain",
55 },
56 .bit = PCU_DM_VDE,
57 .polarity = PWREN,
58 .reg_offset = zx296718_offsets,
59};
60
61static struct zx2967_pm_domain vce_domain = {
62 .dm = {
63 .name = "vce_domain",
64 },
65 .bit = PCU_DM_VCE,
66 .polarity = PWREN,
67 .reg_offset = zx296718_offsets,
68};
69
70static struct zx2967_pm_domain hde_domain = {
71 .dm = {
72 .name = "hde_domain",
73 },
74 .bit = PCU_DM_HDE,
75 .polarity = PWREN,
76 .reg_offset = zx296718_offsets,
77};
78
79static struct zx2967_pm_domain viu_domain = {
80 .dm = {
81 .name = "viu_domain",
82 },
83 .bit = PCU_DM_VIU,
84 .polarity = PWREN,
85 .reg_offset = zx296718_offsets,
86};
87
88static struct zx2967_pm_domain usb20_domain = {
89 .dm = {
90 .name = "usb20_domain",
91 },
92 .bit = PCU_DM_USB20,
93 .polarity = PWREN,
94 .reg_offset = zx296718_offsets,
95};
96
97static struct zx2967_pm_domain usb21_domain = {
98 .dm = {
99 .name = "usb21_domain",
100 },
101 .bit = PCU_DM_USB21,
102 .polarity = PWREN,
103 .reg_offset = zx296718_offsets,
104};
105
106static struct zx2967_pm_domain usb30_domain = {
107 .dm = {
108 .name = "usb30_domain",
109 },
110 .bit = PCU_DM_USB30,
111 .polarity = PWREN,
112 .reg_offset = zx296718_offsets,
113};
114
115static struct zx2967_pm_domain hsic_domain = {
116 .dm = {
117 .name = "hsic_domain",
118 },
119 .bit = PCU_DM_HSIC,
120 .polarity = PWREN,
121 .reg_offset = zx296718_offsets,
122};
123
124static struct zx2967_pm_domain gmac_domain = {
125 .dm = {
126 .name = "gmac_domain",
127 },
128 .bit = PCU_DM_GMAC,
129 .polarity = PWREN,
130 .reg_offset = zx296718_offsets,
131};
132
133static struct zx2967_pm_domain ts_domain = {
134 .dm = {
135 .name = "ts_domain",
136 },
137 .bit = PCU_DM_TS,
138 .polarity = PWREN,
139 .reg_offset = zx296718_offsets,
140};
141
142static struct generic_pm_domain *zx296718_pm_domains[] = {
143 [DM_ZX296718_VOU] = &vou_domain.dm,
144 [DM_ZX296718_SAPPU] = &sappu_domain.dm,
145 [DM_ZX296718_VDE] = &vde_domain.dm,
146 [DM_ZX296718_VCE] = &vce_domain.dm,
147 [DM_ZX296718_HDE] = &hde_domain.dm,
148 [DM_ZX296718_VIU] = &viu_domain.dm,
149 [DM_ZX296718_USB20] = &usb20_domain.dm,
150 [DM_ZX296718_USB21] = &usb21_domain.dm,
151 [DM_ZX296718_USB30] = &usb30_domain.dm,
152 [DM_ZX296718_HSIC] = &hsic_domain.dm,
153 [DM_ZX296718_GMAC] = &gmac_domain.dm,
154 [DM_ZX296718_TS] = &ts_domain.dm,
155};
156
157static int zx296718_pd_probe(struct platform_device *pdev)
158{
159 return zx2967_pd_probe(pdev,
160 zx296718_pm_domains,
161 ARRAY_SIZE(zx296718_pm_domains));
162}
163
164static const struct of_device_id zx296718_pm_domain_matches[] = {
165 { .compatible = "zte,zx296718-pcu", },
166 { },
167};
168
169static struct platform_driver zx296718_pd_driver = {
170 .driver = {
171 .name = "zx296718-powerdomain",
172 .of_match_table = zx296718_pm_domain_matches,
173 },
174 .probe = zx296718_pd_probe,
175};
176
177static int __init zx296718_pd_init(void)
178{
179 return platform_driver_register(&zx296718_pd_driver);
180}
181subsys_initcall(zx296718_pd_init);
182
