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16#ifndef _SH_CSS_INTERNAL_H_
17#define _SH_CSS_INTERNAL_H_
18
19#include <system_global.h>
20#include <math_support.h>
21#include <type_support.h>
22#include <platform_support.h>
23#include <stdarg.h>
24
25#if !defined(HAS_NO_INPUT_FORMATTER)
26#include "input_formatter.h"
27#endif
28#include "input_system.h"
29
30#include "ia_css_types.h"
31#include "ia_css_acc_types.h"
32#include "ia_css_buffer.h"
33
34#include "ia_css_binary.h"
35#include "sh_css_firmware.h"
36#include "sh_css_legacy.h"
37#include "sh_css_defs.h"
38#include "sh_css_uds.h"
39#include "dma.h"
40#include "ia_css_circbuf_comm.h"
41#include "ia_css_frame_comm.h"
42#include "ia_css_3a.h"
43#include "ia_css_dvs.h"
44#include "ia_css_metadata.h"
45#include "runtime/bufq/interface/ia_css_bufq.h"
46#include "ia_css_timer.h"
47
48
49#define IA_CSS_NUM_CB_SEM_READ_RESOURCE 2
50#define IA_CSS_NUM_CB_SEM_WRITE_RESOURCE 1
51#define IA_CSS_NUM_CBS 2
52#define IA_CSS_CB_MAX_ELEMS 2
53
54
55
56
57
58#define IA_CSS_COPYSINK_SEM_INDEX 0
59#define IA_CSS_TAGGER_SEM_INDEX 1
60
61
62#define IA_CSS_POST_OUT_EVENT_FORCE 2
63
64#define SH_CSS_MAX_BINARY_NAME 64
65
66#define SP_DEBUG_NONE (0)
67#define SP_DEBUG_DUMP (1)
68#define SP_DEBUG_COPY (2)
69#define SP_DEBUG_TRACE (3)
70#define SP_DEBUG_MINIMAL (4)
71
72#define SP_DEBUG SP_DEBUG_NONE
73#define SP_DEBUG_MINIMAL_OVERWRITE 1
74
75#define SH_CSS_TNR_BIT_DEPTH 8
76#define SH_CSS_REF_BIT_DEPTH 8
77
78
79#define NUM_CONTINUOUS_FRAMES 15
80#define NUM_MIPI_FRAMES_PER_STREAM 2
81
82#define NUM_ONLINE_INIT_CONTINUOUS_FRAMES 2
83
84#define NR_OF_PIPELINES IA_CSS_PIPE_ID_NUM
85
86#define SH_CSS_MAX_IF_CONFIGS 3
87#define SH_CSS_IF_CONFIG_NOT_NEEDED 0xFF
88
89#if defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401)
90#define SH_CSS_ENABLE_METADATA
91#endif
92
93#if defined(SH_CSS_ENABLE_METADATA) && !defined(USE_INPUT_SYSTEM_VERSION_2401)
94#define SH_CSS_ENABLE_METADATA_THREAD
95#endif
96
97
98
99
100
101
102
103
104
105
106#if defined(SH_CSS_ENABLE_METADATA_THREAD)
107#define SH_CSS_SP_INTERNAL_METADATA_THREAD 1
108#else
109#define SH_CSS_SP_INTERNAL_METADATA_THREAD 0
110#endif
111
112#define SH_CSS_SP_INTERNAL_SERVICE_THREAD 1
113
114#define SH_CSS_MAX_SP_THREADS 5
115
116#define SH_CSS_MAX_SP_INTERNAL_THREADS (\
117 SH_CSS_SP_INTERNAL_SERVICE_THREAD +\
118 SH_CSS_SP_INTERNAL_METADATA_THREAD)
119
120#define SH_CSS_MAX_PIPELINES SH_CSS_MAX_SP_THREADS
121
122
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135
136
137
138#define CALC_ALIGNMENT_MEMBER(x, y) (CEIL_MUL(x, y) - x)
139#define SIZE_OF_HRT_VADDRESS sizeof(hive_uint32)
140#define SIZE_OF_IA_CSS_PTR sizeof(uint32_t)
141
142
143#define NUM_OF_SPS 1
144
145#define NUM_OF_BLS 0
146
147
148enum sh_css_order_binaries {
149 SP_FIRMWARE = 0,
150 ISP_FIRMWARE
151};
152
153
154
155
156
157enum sh_css_pipe_config_override {
158 SH_CSS_PIPE_CONFIG_OVRD_NONE = 0,
159 SH_CSS_PIPE_CONFIG_OVRD_NO_OVRD = 0xffff
160};
161
162enum host2sp_commands {
163 host2sp_cmd_error = 0,
164
165
166
167
168
169
170
171 host2sp_cmd_ready = 1,
172
173 host2sp_cmd_dummy,
174 host2sp_cmd_start_flash,
175 host2sp_cmd_terminate,
176 N_host2sp_cmd
177};
178
179
180
181
182
183
184
185
186
187
188enum sh_css_sp_event_type {
189 SH_CSS_SP_EVENT_OUTPUT_FRAME_DONE,
190 SH_CSS_SP_EVENT_SECOND_OUTPUT_FRAME_DONE,
191 SH_CSS_SP_EVENT_VF_OUTPUT_FRAME_DONE,
192 SH_CSS_SP_EVENT_SECOND_VF_OUTPUT_FRAME_DONE,
193 SH_CSS_SP_EVENT_3A_STATISTICS_DONE,
194 SH_CSS_SP_EVENT_DIS_STATISTICS_DONE,
195 SH_CSS_SP_EVENT_PIPELINE_DONE,
196 SH_CSS_SP_EVENT_FRAME_TAGGED,
197 SH_CSS_SP_EVENT_INPUT_FRAME_DONE,
198 SH_CSS_SP_EVENT_METADATA_DONE,
199 SH_CSS_SP_EVENT_LACE_STATISTICS_DONE,
200 SH_CSS_SP_EVENT_ACC_STAGE_COMPLETE,
201 SH_CSS_SP_EVENT_TIMER,
202 SH_CSS_SP_EVENT_PORT_EOF,
203 SH_CSS_SP_EVENT_FW_WARNING,
204 SH_CSS_SP_EVENT_FW_ASSERT,
205 SH_CSS_SP_EVENT_NR_OF_TYPES
206};
207
208
209
210
211
212struct sh_css_ddr_address_map {
213 ia_css_ptr isp_param;
214 ia_css_ptr isp_mem_param[SH_CSS_MAX_STAGES][IA_CSS_NUM_MEMORIES];
215 ia_css_ptr macc_tbl;
216 ia_css_ptr fpn_tbl;
217 ia_css_ptr sc_tbl;
218 ia_css_ptr tetra_r_x;
219 ia_css_ptr tetra_r_y;
220 ia_css_ptr tetra_gr_x;
221 ia_css_ptr tetra_gr_y;
222 ia_css_ptr tetra_gb_x;
223 ia_css_ptr tetra_gb_y;
224 ia_css_ptr tetra_b_x;
225 ia_css_ptr tetra_b_y;
226 ia_css_ptr tetra_ratb_x;
227 ia_css_ptr tetra_ratb_y;
228 ia_css_ptr tetra_batr_x;
229 ia_css_ptr tetra_batr_y;
230 ia_css_ptr dvs_6axis_params_y;
231};
232
233#define SIZE_OF_SH_CSS_DDR_ADDRESS_MAP_STRUCT \
234 (SIZE_OF_HRT_VADDRESS + \
235 (SH_CSS_MAX_STAGES * IA_CSS_NUM_MEMORIES * SIZE_OF_HRT_VADDRESS) + \
236 (16 * SIZE_OF_HRT_VADDRESS))
237
238
239struct sh_css_ddr_address_map_size {
240 size_t isp_param;
241 size_t isp_mem_param[SH_CSS_MAX_STAGES][IA_CSS_NUM_MEMORIES];
242 size_t macc_tbl;
243 size_t fpn_tbl;
244 size_t sc_tbl;
245 size_t tetra_r_x;
246 size_t tetra_r_y;
247 size_t tetra_gr_x;
248 size_t tetra_gr_y;
249 size_t tetra_gb_x;
250 size_t tetra_gb_y;
251 size_t tetra_b_x;
252 size_t tetra_b_y;
253 size_t tetra_ratb_x;
254 size_t tetra_ratb_y;
255 size_t tetra_batr_x;
256 size_t tetra_batr_y;
257 size_t dvs_6axis_params_y;
258};
259
260struct sh_css_ddr_address_map_compound {
261 struct sh_css_ddr_address_map map;
262 struct sh_css_ddr_address_map_size size;
263};
264
265struct ia_css_isp_parameter_set_info {
266 struct sh_css_ddr_address_map
267 mem_map;
268
269 u32
270 isp_parameters_id;
271 ia_css_ptr
272 output_frame_ptr;
273};
274
275
276
277struct sh_css_binary_args {
278 struct ia_css_frame *in_frame;
279 const struct ia_css_frame
280 *delay_frames[MAX_NUM_VIDEO_DELAY_FRAMES];
281 const struct ia_css_frame *tnr_frames[NUM_TNR_FRAMES];
282 struct ia_css_frame
283 *out_frame[IA_CSS_BINARY_MAX_OUTPUT_PORTS];
284 struct ia_css_frame *out_vf_frame;
285 bool copy_vf;
286 bool copy_output;
287 unsigned int vf_downscale_log2;
288};
289
290#if SP_DEBUG == SP_DEBUG_DUMP
291
292#define SH_CSS_NUM_SP_DEBUG 48
293
294struct sh_css_sp_debug_state {
295 unsigned int error;
296 unsigned int debug[SH_CSS_NUM_SP_DEBUG];
297};
298
299#elif SP_DEBUG == SP_DEBUG_COPY
300
301#define SH_CSS_SP_DBG_TRACE_DEPTH (40)
302
303struct sh_css_sp_debug_trace {
304 u16 frame;
305 u16 line;
306 u16 pixel_distance;
307 u16 mipi_used_dword;
308 u16 sp_index;
309};
310
311struct sh_css_sp_debug_state {
312 u16 if_start_line;
313 u16 if_start_column;
314 u16 if_cropped_height;
315 u16 if_cropped_width;
316 unsigned int index;
317 struct sh_css_sp_debug_trace
318 trace[SH_CSS_SP_DBG_TRACE_DEPTH];
319};
320
321#elif SP_DEBUG == SP_DEBUG_TRACE
322
323#if 1
324
325#define SH_CSS_SP_DBG_NR_OF_TRACES (1)
326#define SH_CSS_SP_DBG_TRACE_DEPTH (40)
327#else
328
329#define SH_CSS_SP_DBG_NR_OF_TRACES (4)
330#define SH_CSS_SP_DBG_TRACE_DEPTH (10)
331#endif
332
333#define SH_CSS_SP_DBG_TRACE_FILE_ID_BIT_POS (13)
334
335struct sh_css_sp_debug_trace {
336 u16 time_stamp;
337 u16 location;
338 u32 data;
339};
340
341struct sh_css_sp_debug_state {
342 struct sh_css_sp_debug_trace
343 trace[SH_CSS_SP_DBG_NR_OF_TRACES][SH_CSS_SP_DBG_TRACE_DEPTH];
344 u16 index_last[SH_CSS_SP_DBG_NR_OF_TRACES];
345 u8 index[SH_CSS_SP_DBG_NR_OF_TRACES];
346};
347
348#elif SP_DEBUG == SP_DEBUG_MINIMAL
349
350#define SH_CSS_NUM_SP_DEBUG 128
351
352struct sh_css_sp_debug_state {
353 unsigned int error;
354 unsigned int debug[SH_CSS_NUM_SP_DEBUG];
355};
356
357#endif
358
359struct sh_css_sp_debug_command {
360
361
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365
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367
368
369
370
371 u32 dma_sw_reg;
372};
373
374#if !defined(HAS_NO_INPUT_FORMATTER)
375
376struct sh_css_sp_input_formatter_set {
377 u32 stream_format;
378 input_formatter_cfg_t config_a;
379 input_formatter_cfg_t config_b;
380};
381#endif
382
383#define IA_CSS_MIPI_SIZE_CHECK_MAX_NOF_ENTRIES_PER_PORT (3)
384
385
386struct sh_css_sp_config {
387 u8 no_isp_sync;
388 u8 enable_raw_pool_locking;
389 u8 lock_all;
390
391
392
393
394#if !defined(HAS_NO_INPUT_FORMATTER)
395 struct {
396 u8 a_changed;
397 u8 b_changed;
398 u8 isp_2ppc;
399 struct sh_css_sp_input_formatter_set
400 set[SH_CSS_MAX_IF_CONFIGS];
401 } input_formatter;
402#endif
403#if !defined(HAS_NO_INPUT_SYSTEM) && defined(USE_INPUT_SYSTEM_VERSION_2)
404 sync_generator_cfg_t sync_gen;
405 tpg_cfg_t tpg;
406 prbs_cfg_t prbs;
407 input_system_cfg_t input_circuit;
408 u8 input_circuit_cfg_changed;
409 u32 mipi_sizes_for_check[N_CSI_PORTS][IA_CSS_MIPI_SIZE_CHECK_MAX_NOF_ENTRIES_PER_PORT];
410#endif
411 u8 enable_isys_event_queue;
412 u8 disable_cont_vf;
413};
414
415enum sh_css_stage_type {
416 SH_CSS_SP_STAGE_TYPE = 0,
417 SH_CSS_ISP_STAGE_TYPE = 1
418};
419
420#define SH_CSS_NUM_STAGE_TYPES 2
421
422#define SH_CSS_PIPE_CONFIG_SAMPLE_PARAMS BIT(0)
423#define SH_CSS_PIPE_CONFIG_SAMPLE_PARAMS_MASK \
424 ((SH_CSS_PIPE_CONFIG_SAMPLE_PARAMS << SH_CSS_MAX_SP_THREADS) - 1)
425
426#if !defined(HAS_NO_INPUT_SYSTEM) && defined(USE_INPUT_SYSTEM_VERSION_2401)
427struct sh_css_sp_pipeline_terminal {
428 union {
429
430 virtual_input_system_stream_t
431 virtual_input_system_stream[IA_CSS_STREAM_MAX_ISYS_STREAM_PER_CH];
432 } context;
433
434
435
436
437 union {
438
439 virtual_input_system_stream_cfg_t
440 virtual_input_system_stream_cfg[IA_CSS_STREAM_MAX_ISYS_STREAM_PER_CH];
441 } ctrl;
442};
443
444struct sh_css_sp_pipeline_io {
445 struct sh_css_sp_pipeline_terminal input;
446
447
448};
449
450
451
452
453
454struct sh_css_sp_pipeline_io_status {
455 u32 active[N_INPUT_SYSTEM_CSI_PORT];
456 u32 running[N_INPUT_SYSTEM_CSI_PORT];
457};
458
459#endif
460enum sh_css_port_dir {
461 SH_CSS_PORT_INPUT = 0,
462 SH_CSS_PORT_OUTPUT = 1
463};
464
465enum sh_css_port_type {
466 SH_CSS_HOST_TYPE = 0,
467 SH_CSS_COPYSINK_TYPE = 1,
468 SH_CSS_TAGGERSINK_TYPE = 2
469};
470
471
472#define SH_CSS_PORT_FLD_WIDTH_IN_BITS (4)
473#define SH_CSS_PORT_TYPE_BIT_FLD(pt) (0x1 << (pt))
474#define SH_CSS_PORT_FLD(pd) ((pd) ? SH_CSS_PORT_FLD_WIDTH_IN_BITS : 0)
475#define SH_CSS_PIPE_PORT_CONFIG_ON(p, pd, pt) ((p) |= (SH_CSS_PORT_TYPE_BIT_FLD(pt) << SH_CSS_PORT_FLD(pd)))
476#define SH_CSS_PIPE_PORT_CONFIG_OFF(p, pd, pt) ((p) &= ~(SH_CSS_PORT_TYPE_BIT_FLD(pt) << SH_CSS_PORT_FLD(pd)))
477#define SH_CSS_PIPE_PORT_CONFIG_SET(p, pd, pt, val) ((val) ? \
478 SH_CSS_PIPE_PORT_CONFIG_ON(p, pd, pt) : SH_CSS_PIPE_PORT_CONFIG_OFF(p, pd, pt))
479#define SH_CSS_PIPE_PORT_CONFIG_GET(p, pd, pt) ((p) & (SH_CSS_PORT_TYPE_BIT_FLD(pt) << SH_CSS_PORT_FLD(pd)))
480#define SH_CSS_PIPE_PORT_CONFIG_IS_CONTINUOUS(p) \
481 (!(SH_CSS_PIPE_PORT_CONFIG_GET(p, SH_CSS_PORT_INPUT, SH_CSS_HOST_TYPE) && \
482 SH_CSS_PIPE_PORT_CONFIG_GET(p, SH_CSS_PORT_OUTPUT, SH_CSS_HOST_TYPE)))
483
484#define IA_CSS_ACQUIRE_ISP_POS 31
485
486
487#define SH_CSS_METADATA_ENABLED 0x01
488#define SH_CSS_METADATA_PROCESSED 0x02
489#define SH_CSS_METADATA_OFFLINE_MODE 0x04
490#define SH_CSS_METADATA_WAIT_INPUT 0x08
491
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494
495
496
497
498
499void
500ia_css_metadata_free_multiple(unsigned int num_bufs,
501 struct ia_css_metadata **bufs);
502
503
504#define QOS_INVALID (~0U)
505#define QOS_ALL_STAGES_DISABLED (0U)
506#define QOS_STAGE_MASK(num) (0x00000001 << num)
507#define SH_CSS_IS_QOS_PIPE(pipe) ((pipe)->pipe_qos_config != QOS_INVALID)
508#define SH_CSS_QOS_STAGE_ENABLE(pipe, num) ((pipe)->pipe_qos_config |= QOS_STAGE_MASK(num))
509#define SH_CSS_QOS_STAGE_DISABLE(pipe, num) ((pipe)->pipe_qos_config &= ~QOS_STAGE_MASK(num))
510#define SH_CSS_QOS_STAGE_IS_ENABLED(pipe, num) ((pipe)->pipe_qos_config & QOS_STAGE_MASK(num))
511#define SH_CSS_QOS_STAGE_IS_ALL_DISABLED(pipe) ((pipe)->pipe_qos_config == QOS_ALL_STAGES_DISABLED)
512#define SH_CSS_QOS_MODE_PIPE_ADD(mode, pipe) ((mode) |= (0x1 << (pipe)->pipe_id))
513#define SH_CSS_QOS_MODE_PIPE_REMOVE(mode, pipe) ((mode) &= ~(0x1 << (pipe)->pipe_id))
514#define SH_CSS_IS_QOS_ONLY_MODE(mode) ((mode) == (0x1 << IA_CSS_PIPE_ID_ACC))
515
516
517struct sh_css_sp_pipeline {
518 u32 pipe_id;
519 u32 pipe_num;
520 u32 thread_id;
521 u32 pipe_config;
522 u32 pipe_qos_config;
523
524 u32 inout_port_config;
525 u32 required_bds_factor;
526 u32 dvs_frame_delay;
527 u32 input_system_mode;
528 u32 port_id;
529 u32 num_stages;
530 u32 running;
531 ia_css_ptr sp_stage_addr[SH_CSS_MAX_STAGES];
532 ia_css_ptr scaler_pp_lut;
533 u32 dummy;
534
535 s32 num_execs;
536
537#if defined(SH_CSS_ENABLE_METADATA)
538 struct {
539 u32 format;
540 u32 width;
541 u32 height;
542 u32 stride;
543 u32 size;
544 ia_css_ptr cont_buf;
545 } metadata;
546#endif
547#if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS)
548 u32 output_frame_queue_id;
549#endif
550 union {
551 struct {
552 u32 bytes_available;
553 } bin;
554 struct {
555 u32 height;
556 u32 width;
557 u32 padded_width;
558 u32 max_input_width;
559 u32 raw_bit_depth;
560 } raw;
561 } copy;
562
563
564
565
566 struct {
567 u32 internal_frame_origin_x_bqs_on_sctbl;
568 u32 internal_frame_origin_y_bqs_on_sctbl;
569 } shading;
570};
571
572
573
574
575
576
577
578
579
580
581#define SH_CSS_NUM_DYNAMIC_FRAME_IDS (3)
582
583struct ia_css_frames_sp {
584 struct ia_css_frame_sp in;
585 struct ia_css_frame_sp out[IA_CSS_BINARY_MAX_OUTPUT_PORTS];
586 struct ia_css_resolution effective_in_res;
587 struct ia_css_frame_sp out_vf;
588 struct ia_css_frame_sp_info internal_frame_info;
589 struct ia_css_buffer_sp s3a_buf;
590 struct ia_css_buffer_sp dvs_buf;
591#if defined SH_CSS_ENABLE_METADATA
592 struct ia_css_buffer_sp metadata_buf;
593#endif
594};
595
596
597struct sh_css_isp_stage {
598
599
600
601
602
603
604
605
606 struct ia_css_blob_info blob_info;
607 struct ia_css_binary_info binary_info;
608 char binary_name[SH_CSS_MAX_BINARY_NAME];
609 struct ia_css_isp_param_css_segments mem_initializers;
610};
611
612
613struct sh_css_sp_stage {
614
615
616
617
618
619
620
621
622 u8 num;
623 u8 isp_online;
624 u8 isp_copy_vf;
625 u8 isp_copy_output;
626 u8 sp_enable_xnr;
627 u8 isp_deci_log_factor;
628 u8 isp_vf_downscale_bits;
629 u8 deinterleaved;
630
631
632
633
634
635 u8 program_input_circuit;
636
637 u8 func;
638
639
640 u8 stage_type;
641 u8 num_stripes;
642 u8 isp_pipe_version;
643 struct {
644 u8 vf_output;
645 u8 s3a;
646 u8 sdis;
647 u8 dvs_stats;
648 u8 lace_stats;
649 } enable;
650
651
652
653 struct sh_css_crop_pos sp_out_crop_pos;
654 struct ia_css_frames_sp frames;
655 struct ia_css_resolution dvs_envelope;
656 struct sh_css_uds_info uds;
657 ia_css_ptr isp_stage_addr;
658 ia_css_ptr xmem_bin_addr;
659 ia_css_ptr xmem_map_addr;
660
661 u16 top_cropping;
662 u16 row_stripes_height;
663 u16 row_stripes_overlap_lines;
664 u8 if_config_index;
665};
666
667
668
669
670
671
672
673
674
675
676
677
678
679struct sh_css_sp_group {
680 struct sh_css_sp_config config;
681 struct sh_css_sp_pipeline pipe[SH_CSS_MAX_SP_THREADS];
682#if !defined(HAS_NO_INPUT_SYSTEM) && defined(USE_INPUT_SYSTEM_VERSION_2401)
683 struct sh_css_sp_pipeline_io pipe_io[SH_CSS_MAX_SP_THREADS];
684 struct sh_css_sp_pipeline_io_status pipe_io_status;
685#endif
686 struct sh_css_sp_debug_command debug;
687};
688
689
690struct sh_css_sp_per_frame_data {
691
692 ia_css_ptr sp_group_addr;
693};
694
695#define SH_CSS_NUM_SDW_IRQS 3
696
697
698struct sh_css_sp_output {
699 unsigned int bin_copy_bytes_copied;
700#if SP_DEBUG != SP_DEBUG_NONE
701 struct sh_css_sp_debug_state debug;
702#endif
703 unsigned int sw_interrupt_value[SH_CSS_NUM_SDW_IRQS];
704};
705
706#define CONFIG_ON_FRAME_ENQUEUE() 0
707
708
709
710
711
712
713
714
715#define IA_CSS_NUM_ELEMS_HOST2SP_BUFFER_QUEUE 6
716#define IA_CSS_NUM_ELEMS_HOST2SP_PARAM_QUEUE 3
717#define IA_CSS_NUM_ELEMS_HOST2SP_TAG_CMD_QUEUE 6
718
719
720
721
722#define IA_CSS_NUM_ELEMS_SP2HOST_ISYS_EVENT_QUEUE (2 * N_CSI_PORTS)
723
724
725
726#define IA_CSS_NUM_ELEMS_HOST2SP_ISYS_EVENT_QUEUE (2 * N_CSI_PORTS)
727
728#define IA_CSS_NUM_ELEMS_HOST2SP_PSYS_EVENT_QUEUE 13
729#define IA_CSS_NUM_ELEMS_SP2HOST_BUFFER_QUEUE 19
730#define IA_CSS_NUM_ELEMS_SP2HOST_PSYS_EVENT_QUEUE 26
731
732struct sh_css_hmm_buffer {
733 union {
734 struct ia_css_isp_3a_statistics s3a;
735 struct ia_css_isp_dvs_statistics dis;
736 ia_css_ptr skc_dvs_statistics;
737 ia_css_ptr lace_stat;
738 struct ia_css_metadata metadata;
739 struct frame_data_wrapper {
740 ia_css_ptr frame_data;
741 u32 flashed;
742 u32 exp_id;
743 u32 isp_parameters_id;
744
745#if CONFIG_ON_FRAME_ENQUEUE()
746 struct sh_css_config_on_frame_enqueue config_on_frame_enqueue;
747#endif
748 } frame;
749 ia_css_ptr ddr_ptrs;
750 } payload;
751
752
753
754
755
756
757 CSS_ALIGN(u64 cookie_ptr, 8);
758 u64 kernel_ptr;
759 struct ia_css_time_meas timing_data;
760 clock_value_t isys_eof_clock_tick;
761};
762
763#if CONFIG_ON_FRAME_ENQUEUE()
764#define SIZE_OF_FRAME_STRUCT \
765 (SIZE_OF_HRT_VADDRESS + \
766 (3 * sizeof(uint32_t)) + \
767 sizeof(uint32_t))
768#else
769#define SIZE_OF_FRAME_STRUCT \
770 (SIZE_OF_HRT_VADDRESS + \
771 (3 * sizeof(uint32_t)))
772#endif
773
774#define SIZE_OF_PAYLOAD_UNION \
775 (MAX(MAX(MAX(MAX( \
776 SIZE_OF_IA_CSS_ISP_3A_STATISTICS_STRUCT, \
777 SIZE_OF_IA_CSS_ISP_DVS_STATISTICS_STRUCT), \
778 SIZE_OF_IA_CSS_METADATA_STRUCT), \
779 SIZE_OF_FRAME_STRUCT), \
780 SIZE_OF_HRT_VADDRESS))
781
782
783#define SIZE_OF_SH_CSS_HMM_BUFFER_STRUCT \
784 (SIZE_OF_PAYLOAD_UNION + \
785 CALC_ALIGNMENT_MEMBER(SIZE_OF_PAYLOAD_UNION, 8) + \
786 8 + \
787 8 + \
788 SIZE_OF_IA_CSS_TIME_MEAS_STRUCT + \
789 SIZE_OF_IA_CSS_CLOCK_TICK_STRUCT + \
790 CALC_ALIGNMENT_MEMBER(SIZE_OF_IA_CSS_CLOCK_TICK_STRUCT, 8))
791
792enum sh_css_queue_type {
793 sh_css_invalid_queue_type = -1,
794 sh_css_host2sp_buffer_queue,
795 sh_css_sp2host_buffer_queue,
796 sh_css_host2sp_psys_event_queue,
797 sh_css_sp2host_psys_event_queue,
798 sh_css_sp2host_isys_event_queue,
799 sh_css_host2sp_isys_event_queue,
800 sh_css_host2sp_tag_cmd_queue,
801};
802
803struct sh_css_event_irq_mask {
804 u16 or_mask;
805 u16 and_mask;
806};
807
808#define SIZE_OF_SH_CSS_EVENT_IRQ_MASK_STRUCT \
809 (2 * sizeof(uint16_t))
810
811struct host_sp_communication {
812
813
814
815
816 u32 host2sp_command;
817
818
819
820
821
822
823
824
825
826
827
828 ia_css_ptr host2sp_offline_frames[NUM_CONTINUOUS_FRAMES];
829 ia_css_ptr host2sp_offline_metadata[NUM_CONTINUOUS_FRAMES];
830
831#if defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401)
832 ia_css_ptr host2sp_mipi_frames[N_CSI_PORTS][NUM_MIPI_FRAMES_PER_STREAM];
833 ia_css_ptr host2sp_mipi_metadata[N_CSI_PORTS][NUM_MIPI_FRAMES_PER_STREAM];
834 u32 host2sp_num_mipi_frames[N_CSI_PORTS];
835#endif
836 u32 host2sp_cont_avail_num_raw_frames;
837 u32 host2sp_cont_extra_num_raw_frames;
838 u32 host2sp_cont_target_num_raw_frames;
839 struct sh_css_event_irq_mask host2sp_event_irq_mask[NR_OF_PIPELINES];
840
841};
842
843#if defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401)
844#define SIZE_OF_HOST_SP_COMMUNICATION_STRUCT \
845 (sizeof(uint32_t) + \
846 (NUM_CONTINUOUS_FRAMES * SIZE_OF_HRT_VADDRESS * 2) + \
847 (N_CSI_PORTS * NUM_MIPI_FRAMES_PER_STREAM * SIZE_OF_HRT_VADDRESS * 2) + \
848 ((3 + N_CSI_PORTS) * sizeof(uint32_t)) + \
849 (NR_OF_PIPELINES * SIZE_OF_SH_CSS_EVENT_IRQ_MASK_STRUCT))
850#else
851#define SIZE_OF_HOST_SP_COMMUNICATION_STRUCT \
852 (sizeof(uint32_t) + \
853 (NUM_CONTINUOUS_FRAMES * SIZE_OF_HRT_VADDRESS * 2) + \
854 (3 * sizeof(uint32_t)) + \
855 (NR_OF_PIPELINES * SIZE_OF_SH_CSS_EVENT_IRQ_MASK_STRUCT))
856#endif
857
858struct host_sp_queues {
859
860
861
862
863
864 ia_css_circbuf_desc_t host2sp_buffer_queues_desc
865 [SH_CSS_MAX_SP_THREADS][SH_CSS_MAX_NUM_QUEUES];
866 ia_css_circbuf_elem_t host2sp_buffer_queues_elems
867 [SH_CSS_MAX_SP_THREADS][SH_CSS_MAX_NUM_QUEUES]
868 [IA_CSS_NUM_ELEMS_HOST2SP_BUFFER_QUEUE];
869 ia_css_circbuf_desc_t sp2host_buffer_queues_desc
870 [SH_CSS_MAX_NUM_QUEUES];
871 ia_css_circbuf_elem_t sp2host_buffer_queues_elems
872 [SH_CSS_MAX_NUM_QUEUES][IA_CSS_NUM_ELEMS_SP2HOST_BUFFER_QUEUE];
873
874
875
876
877 ia_css_circbuf_desc_t host2sp_psys_event_queue_desc;
878
879 ia_css_circbuf_elem_t host2sp_psys_event_queue_elems
880 [IA_CSS_NUM_ELEMS_HOST2SP_PSYS_EVENT_QUEUE];
881 ia_css_circbuf_desc_t sp2host_psys_event_queue_desc;
882
883 ia_css_circbuf_elem_t sp2host_psys_event_queue_elems
884 [IA_CSS_NUM_ELEMS_SP2HOST_PSYS_EVENT_QUEUE];
885
886
887
888
889 ia_css_circbuf_desc_t host2sp_isys_event_queue_desc;
890
891 ia_css_circbuf_elem_t host2sp_isys_event_queue_elems
892 [IA_CSS_NUM_ELEMS_HOST2SP_ISYS_EVENT_QUEUE];
893 ia_css_circbuf_desc_t sp2host_isys_event_queue_desc;
894
895 ia_css_circbuf_elem_t sp2host_isys_event_queue_elems
896 [IA_CSS_NUM_ELEMS_SP2HOST_ISYS_EVENT_QUEUE];
897
898
899
900
901 ia_css_circbuf_desc_t host2sp_tag_cmd_queue_desc;
902
903 ia_css_circbuf_elem_t host2sp_tag_cmd_queue_elems
904 [IA_CSS_NUM_ELEMS_HOST2SP_TAG_CMD_QUEUE];
905};
906
907#define SIZE_OF_QUEUES_ELEMS \
908 (SIZE_OF_IA_CSS_CIRCBUF_ELEM_S_STRUCT * \
909 ((SH_CSS_MAX_SP_THREADS * SH_CSS_MAX_NUM_QUEUES * IA_CSS_NUM_ELEMS_HOST2SP_BUFFER_QUEUE) + \
910 (SH_CSS_MAX_NUM_QUEUES * IA_CSS_NUM_ELEMS_SP2HOST_BUFFER_QUEUE) + \
911 (IA_CSS_NUM_ELEMS_HOST2SP_PSYS_EVENT_QUEUE) + \
912 (IA_CSS_NUM_ELEMS_SP2HOST_PSYS_EVENT_QUEUE) + \
913 (IA_CSS_NUM_ELEMS_HOST2SP_ISYS_EVENT_QUEUE) + \
914 (IA_CSS_NUM_ELEMS_SP2HOST_ISYS_EVENT_QUEUE) + \
915 (IA_CSS_NUM_ELEMS_HOST2SP_TAG_CMD_QUEUE)))
916
917#define IA_CSS_NUM_CIRCBUF_DESCS 5
918
919#define SIZE_OF_QUEUES_DESC \
920 ((SH_CSS_MAX_SP_THREADS * SH_CSS_MAX_NUM_QUEUES * \
921 SIZE_OF_IA_CSS_CIRCBUF_DESC_S_STRUCT) + \
922 (SH_CSS_MAX_NUM_QUEUES * SIZE_OF_IA_CSS_CIRCBUF_DESC_S_STRUCT) + \
923 (IA_CSS_NUM_CIRCBUF_DESCS * SIZE_OF_IA_CSS_CIRCBUF_DESC_S_STRUCT))
924
925#define SIZE_OF_HOST_SP_QUEUES_STRUCT \
926 (SIZE_OF_QUEUES_ELEMS + SIZE_OF_QUEUES_DESC)
927
928extern int (*sh_css_printf)(const char *fmt, va_list args);
929
930static inline void
931sh_css_print(const char *fmt, ...)
932{
933 va_list ap;
934
935 if (sh_css_printf) {
936 va_start(ap, fmt);
937 sh_css_printf(fmt, ap);
938 va_end(ap);
939 }
940}
941
942static inline void
943sh_css_vprint(const char *fmt, va_list args)
944{
945 if (sh_css_printf)
946 sh_css_printf(fmt, args);
947}
948
949
950
951
952
953
954ia_css_ptr sh_css_params_ddr_address_map(void);
955
956int
957sh_css_params_init(void);
958
959void
960sh_css_params_uninit(void);
961
962
963void sh_css_flush(struct ia_css_acc_fw *fw);
964
965void
966sh_css_binary_args_reset(struct sh_css_binary_args *args);
967
968
969bool
970sh_css_frame_equal_types(const struct ia_css_frame *frame_a,
971 const struct ia_css_frame *frame_b);
972
973bool
974sh_css_frame_info_equal_resolution(const struct ia_css_frame_info *info_a,
975 const struct ia_css_frame_info *info_b);
976
977void
978sh_css_capture_enable_bayer_downscaling(bool enable);
979
980void
981sh_css_binary_print(const struct ia_css_binary *binary);
982
983
984
985void
986sh_css_frame_info_set_width(struct ia_css_frame_info *info,
987 unsigned int width,
988 unsigned int aligned);
989
990#if !defined(HAS_NO_INPUT_SYSTEM) && defined(USE_INPUT_SYSTEM_VERSION_2)
991
992unsigned int
993sh_css_get_mipi_sizes_for_check(const unsigned int port,
994 const unsigned int idx);
995
996#endif
997
998ia_css_ptr
999sh_css_store_sp_group_to_ddr(void);
1000
1001ia_css_ptr
1002sh_css_store_sp_stage_to_ddr(unsigned int pipe, unsigned int stage);
1003
1004ia_css_ptr
1005sh_css_store_isp_stage_to_ddr(unsigned int pipe, unsigned int stage);
1006
1007void
1008sh_css_update_uds_and_crop_info(
1009 const struct ia_css_binary_info *info,
1010 const struct ia_css_frame_info *in_frame_info,
1011 const struct ia_css_frame_info *out_frame_info,
1012 const struct ia_css_resolution *dvs_env,
1013 const struct ia_css_dz_config *zoom,
1014 const struct ia_css_vector *motion_vector,
1015 struct sh_css_uds_info *uds,
1016 struct sh_css_crop_pos *sp_out_crop_pos,
1017
1018 bool enable_zoom
1019);
1020
1021void
1022sh_css_invalidate_shading_tables(struct ia_css_stream *stream);
1023
1024struct ia_css_pipeline *
1025ia_css_pipe_get_pipeline(const struct ia_css_pipe *pipe);
1026
1027unsigned int
1028ia_css_pipe_get_pipe_num(const struct ia_css_pipe *pipe);
1029
1030unsigned int
1031ia_css_pipe_get_isp_pipe_version(const struct ia_css_pipe *pipe);
1032
1033bool
1034sh_css_continuous_is_enabled(uint8_t pipe_num);
1035
1036struct ia_css_pipe *
1037find_pipe_by_num(uint32_t pipe_num);
1038
1039#ifdef USE_INPUT_SYSTEM_VERSION_2401
1040void
1041ia_css_get_crop_offsets(
1042 struct ia_css_pipe *pipe,
1043 struct ia_css_frame_info *in_frame);
1044#endif
1045
1046#endif
1047