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11#include <linux/delay.h>
12#include <linux/pm_runtime.h>
13#include <media/v4l2-common.h>
14#include <media/v4l2-event.h>
15#include <media/v4l2-fh.h>
16#include <media/v4l2-ioctl.h>
17#include <media/v4l2-mc.h>
18#include <media/v4l2-subdev.h>
19#include <media/videobuf2-dma-contig.h>
20
21#include "rkisp1-common.h"
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34
35#define RKISP1_SP_DEV_NAME RKISP1_DRIVER_NAME "_selfpath"
36#define RKISP1_MP_DEV_NAME RKISP1_DRIVER_NAME "_mainpath"
37
38#define RKISP1_MIN_BUFFERS_NEEDED 3
39
40enum rkisp1_plane {
41 RKISP1_PLANE_Y = 0,
42 RKISP1_PLANE_CB = 1,
43 RKISP1_PLANE_CR = 2
44};
45
46
47
48
49
50
51
52
53struct rkisp1_capture_fmt_cfg {
54 u32 fourcc;
55 u8 uv_swap;
56 u32 write_format;
57 u32 output_format;
58};
59
60struct rkisp1_capture_ops {
61 void (*config)(struct rkisp1_capture *cap);
62 void (*stop)(struct rkisp1_capture *cap);
63 void (*enable)(struct rkisp1_capture *cap);
64 void (*disable)(struct rkisp1_capture *cap);
65 void (*set_data_path)(struct rkisp1_capture *cap);
66 bool (*is_stopped)(struct rkisp1_capture *cap);
67};
68
69struct rkisp1_capture_config {
70 const struct rkisp1_capture_fmt_cfg *fmts;
71 int fmt_size;
72 struct {
73 u32 y_size_init;
74 u32 cb_size_init;
75 u32 cr_size_init;
76 u32 y_base_ad_init;
77 u32 cb_base_ad_init;
78 u32 cr_base_ad_init;
79 u32 y_offs_cnt_init;
80 u32 cb_offs_cnt_init;
81 u32 cr_offs_cnt_init;
82 } mi;
83};
84
85static const struct rkisp1_capture_fmt_cfg rkisp1_mp_fmts[] = {
86
87 {
88 .fourcc = V4L2_PIX_FMT_YUYV,
89 .uv_swap = 0,
90 .write_format = RKISP1_MI_CTRL_MP_WRITE_YUVINT,
91 }, {
92 .fourcc = V4L2_PIX_FMT_YVYU,
93 .uv_swap = 1,
94 .write_format = RKISP1_MI_CTRL_MP_WRITE_YUVINT,
95 }, {
96 .fourcc = V4L2_PIX_FMT_VYUY,
97 .write_format = RKISP1_MI_CTRL_MP_WRITE_YUVINT,
98 }, {
99 .fourcc = V4L2_PIX_FMT_YUV422P,
100 .uv_swap = 0,
101 .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8,
102 }, {
103 .fourcc = V4L2_PIX_FMT_NV16,
104 .uv_swap = 0,
105 .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_SPLA,
106 }, {
107 .fourcc = V4L2_PIX_FMT_NV61,
108 .uv_swap = 1,
109 .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_SPLA,
110 }, {
111 .fourcc = V4L2_PIX_FMT_YVU422M,
112 .uv_swap = 1,
113 .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8,
114 },
115
116 {
117 .fourcc = V4L2_PIX_FMT_NV21,
118 .uv_swap = 1,
119 .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_SPLA,
120 }, {
121 .fourcc = V4L2_PIX_FMT_NV12,
122 .uv_swap = 0,
123 .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_SPLA,
124 }, {
125 .fourcc = V4L2_PIX_FMT_NV21M,
126 .uv_swap = 1,
127 .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_SPLA,
128 }, {
129 .fourcc = V4L2_PIX_FMT_NV12M,
130 .uv_swap = 0,
131 .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_SPLA,
132 }, {
133 .fourcc = V4L2_PIX_FMT_YUV420,
134 .uv_swap = 0,
135 .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8,
136 }, {
137 .fourcc = V4L2_PIX_FMT_YVU420,
138 .uv_swap = 1,
139 .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8,
140 },
141
142 {
143 .fourcc = V4L2_PIX_FMT_YUV444M,
144 .uv_swap = 0,
145 .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8,
146 },
147
148 {
149 .fourcc = V4L2_PIX_FMT_GREY,
150 .uv_swap = 0,
151 .write_format = RKISP1_MI_CTRL_MP_WRITE_YUVINT,
152 },
153
154 {
155 .fourcc = V4L2_PIX_FMT_SRGGB8,
156 .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8,
157 }, {
158 .fourcc = V4L2_PIX_FMT_SGRBG8,
159 .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8,
160 }, {
161 .fourcc = V4L2_PIX_FMT_SGBRG8,
162 .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8,
163 }, {
164 .fourcc = V4L2_PIX_FMT_SBGGR8,
165 .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8,
166 }, {
167 .fourcc = V4L2_PIX_FMT_SRGGB10,
168 .write_format = RKISP1_MI_CTRL_MP_WRITE_RAW12,
169 }, {
170 .fourcc = V4L2_PIX_FMT_SGRBG10,
171 .write_format = RKISP1_MI_CTRL_MP_WRITE_RAW12,
172 }, {
173 .fourcc = V4L2_PIX_FMT_SGBRG10,
174 .write_format = RKISP1_MI_CTRL_MP_WRITE_RAW12,
175 }, {
176 .fourcc = V4L2_PIX_FMT_SBGGR10,
177 .write_format = RKISP1_MI_CTRL_MP_WRITE_RAW12,
178 }, {
179 .fourcc = V4L2_PIX_FMT_SRGGB12,
180 .write_format = RKISP1_MI_CTRL_MP_WRITE_RAW12,
181 }, {
182 .fourcc = V4L2_PIX_FMT_SGRBG12,
183 .write_format = RKISP1_MI_CTRL_MP_WRITE_RAW12,
184 }, {
185 .fourcc = V4L2_PIX_FMT_SGBRG12,
186 .write_format = RKISP1_MI_CTRL_MP_WRITE_RAW12,
187 }, {
188 .fourcc = V4L2_PIX_FMT_SBGGR12,
189 .write_format = RKISP1_MI_CTRL_MP_WRITE_RAW12,
190 },
191};
192
193static const struct rkisp1_capture_fmt_cfg rkisp1_sp_fmts[] = {
194
195 {
196 .fourcc = V4L2_PIX_FMT_YUYV,
197 .uv_swap = 0,
198 .write_format = RKISP1_MI_CTRL_SP_WRITE_INT,
199 .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV422,
200 }, {
201 .fourcc = V4L2_PIX_FMT_YVYU,
202 .uv_swap = 1,
203 .write_format = RKISP1_MI_CTRL_SP_WRITE_INT,
204 .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV422,
205 }, {
206 .fourcc = V4L2_PIX_FMT_VYUY,
207 .uv_swap = 1,
208 .write_format = RKISP1_MI_CTRL_SP_WRITE_INT,
209 .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV422,
210 }, {
211 .fourcc = V4L2_PIX_FMT_YUV422P,
212 .uv_swap = 0,
213 .write_format = RKISP1_MI_CTRL_SP_WRITE_PLA,
214 .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV422,
215 }, {
216 .fourcc = V4L2_PIX_FMT_NV16,
217 .uv_swap = 0,
218 .write_format = RKISP1_MI_CTRL_SP_WRITE_SPLA,
219 .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV422,
220 }, {
221 .fourcc = V4L2_PIX_FMT_NV61,
222 .uv_swap = 1,
223 .write_format = RKISP1_MI_CTRL_SP_WRITE_SPLA,
224 .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV422,
225 }, {
226 .fourcc = V4L2_PIX_FMT_YVU422M,
227 .uv_swap = 1,
228 .write_format = RKISP1_MI_CTRL_SP_WRITE_PLA,
229 .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV422,
230 },
231
232 {
233 .fourcc = V4L2_PIX_FMT_NV21,
234 .uv_swap = 1,
235 .write_format = RKISP1_MI_CTRL_SP_WRITE_SPLA,
236 .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV420,
237 }, {
238 .fourcc = V4L2_PIX_FMT_NV12,
239 .uv_swap = 0,
240 .write_format = RKISP1_MI_CTRL_SP_WRITE_SPLA,
241 .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV420,
242 }, {
243 .fourcc = V4L2_PIX_FMT_NV21M,
244 .uv_swap = 1,
245 .write_format = RKISP1_MI_CTRL_SP_WRITE_SPLA,
246 .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV420,
247 }, {
248 .fourcc = V4L2_PIX_FMT_NV12M,
249 .uv_swap = 0,
250 .write_format = RKISP1_MI_CTRL_SP_WRITE_SPLA,
251 .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV420,
252 }, {
253 .fourcc = V4L2_PIX_FMT_YUV420,
254 .uv_swap = 0,
255 .write_format = RKISP1_MI_CTRL_SP_WRITE_PLA,
256 .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV420,
257 }, {
258 .fourcc = V4L2_PIX_FMT_YVU420,
259 .uv_swap = 1,
260 .write_format = RKISP1_MI_CTRL_SP_WRITE_PLA,
261 .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV420,
262 },
263
264 {
265 .fourcc = V4L2_PIX_FMT_YUV444M,
266 .uv_swap = 0,
267 .write_format = RKISP1_MI_CTRL_SP_WRITE_PLA,
268 .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV444,
269 },
270
271 {
272 .fourcc = V4L2_PIX_FMT_GREY,
273 .uv_swap = 0,
274 .write_format = RKISP1_MI_CTRL_SP_WRITE_INT,
275 .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV400,
276 },
277
278 {
279 .fourcc = V4L2_PIX_FMT_RGB24,
280 .write_format = RKISP1_MI_CTRL_SP_WRITE_PLA,
281 .output_format = RKISP1_MI_CTRL_SP_OUTPUT_RGB888,
282 }, {
283 .fourcc = V4L2_PIX_FMT_RGB565,
284 .write_format = RKISP1_MI_CTRL_SP_WRITE_PLA,
285 .output_format = RKISP1_MI_CTRL_SP_OUTPUT_RGB565,
286 },
287};
288
289static const struct rkisp1_capture_config rkisp1_capture_config_mp = {
290 .fmts = rkisp1_mp_fmts,
291 .fmt_size = ARRAY_SIZE(rkisp1_mp_fmts),
292 .mi = {
293 .y_size_init = RKISP1_CIF_MI_MP_Y_SIZE_INIT,
294 .cb_size_init = RKISP1_CIF_MI_MP_CB_SIZE_INIT,
295 .cr_size_init = RKISP1_CIF_MI_MP_CR_SIZE_INIT,
296 .y_base_ad_init = RKISP1_CIF_MI_MP_Y_BASE_AD_INIT,
297 .cb_base_ad_init = RKISP1_CIF_MI_MP_CB_BASE_AD_INIT,
298 .cr_base_ad_init = RKISP1_CIF_MI_MP_CR_BASE_AD_INIT,
299 .y_offs_cnt_init = RKISP1_CIF_MI_MP_Y_OFFS_CNT_INIT,
300 .cb_offs_cnt_init = RKISP1_CIF_MI_MP_CB_OFFS_CNT_INIT,
301 .cr_offs_cnt_init = RKISP1_CIF_MI_MP_CR_OFFS_CNT_INIT,
302 },
303};
304
305static const struct rkisp1_capture_config rkisp1_capture_config_sp = {
306 .fmts = rkisp1_sp_fmts,
307 .fmt_size = ARRAY_SIZE(rkisp1_sp_fmts),
308 .mi = {
309 .y_size_init = RKISP1_CIF_MI_SP_Y_SIZE_INIT,
310 .cb_size_init = RKISP1_CIF_MI_SP_CB_SIZE_INIT,
311 .cr_size_init = RKISP1_CIF_MI_SP_CR_SIZE_INIT,
312 .y_base_ad_init = RKISP1_CIF_MI_SP_Y_BASE_AD_INIT,
313 .cb_base_ad_init = RKISP1_CIF_MI_SP_CB_BASE_AD_INIT,
314 .cr_base_ad_init = RKISP1_CIF_MI_SP_CR_BASE_AD_INIT,
315 .y_offs_cnt_init = RKISP1_CIF_MI_SP_Y_OFFS_CNT_INIT,
316 .cb_offs_cnt_init = RKISP1_CIF_MI_SP_CB_OFFS_CNT_INIT,
317 .cr_offs_cnt_init = RKISP1_CIF_MI_SP_CR_OFFS_CNT_INIT,
318 },
319};
320
321static inline struct rkisp1_vdev_node *
322rkisp1_vdev_to_node(struct video_device *vdev)
323{
324 return container_of(vdev, struct rkisp1_vdev_node, vdev);
325}
326
327
328
329
330
331static void rkisp1_mi_config_ctrl(struct rkisp1_capture *cap)
332{
333 u32 mi_ctrl = rkisp1_read(cap->rkisp1, RKISP1_CIF_MI_CTRL);
334
335 mi_ctrl &= ~GENMASK(17, 16);
336 mi_ctrl |= RKISP1_CIF_MI_CTRL_BURST_LEN_LUM_64;
337
338 mi_ctrl &= ~GENMASK(19, 18);
339 mi_ctrl |= RKISP1_CIF_MI_CTRL_BURST_LEN_CHROM_64;
340
341 mi_ctrl |= RKISP1_CIF_MI_CTRL_INIT_BASE_EN |
342 RKISP1_CIF_MI_CTRL_INIT_OFFSET_EN;
343
344 rkisp1_write(cap->rkisp1, mi_ctrl, RKISP1_CIF_MI_CTRL);
345}
346
347static u32 rkisp1_pixfmt_comp_size(const struct v4l2_pix_format_mplane *pixm,
348 unsigned int component)
349{
350
351
352
353
354
355 if (!component && pixm->num_planes == 1)
356 return pixm->plane_fmt[0].bytesperline * pixm->height;
357 return pixm->plane_fmt[component].sizeimage;
358}
359
360static void rkisp1_irq_frame_end_enable(struct rkisp1_capture *cap)
361{
362 u32 mi_imsc = rkisp1_read(cap->rkisp1, RKISP1_CIF_MI_IMSC);
363
364 mi_imsc |= RKISP1_CIF_MI_FRAME(cap);
365 rkisp1_write(cap->rkisp1, mi_imsc, RKISP1_CIF_MI_IMSC);
366}
367
368static void rkisp1_mp_config(struct rkisp1_capture *cap)
369{
370 const struct v4l2_pix_format_mplane *pixm = &cap->pix.fmt;
371 struct rkisp1_device *rkisp1 = cap->rkisp1;
372 u32 reg;
373
374 rkisp1_write(rkisp1, rkisp1_pixfmt_comp_size(pixm, RKISP1_PLANE_Y),
375 cap->config->mi.y_size_init);
376 rkisp1_write(rkisp1, rkisp1_pixfmt_comp_size(pixm, RKISP1_PLANE_CB),
377 cap->config->mi.cb_size_init);
378 rkisp1_write(rkisp1, rkisp1_pixfmt_comp_size(pixm, RKISP1_PLANE_CR),
379 cap->config->mi.cr_size_init);
380
381 rkisp1_irq_frame_end_enable(cap);
382
383
384 if (cap->pix.info->comp_planes == 2) {
385 reg = rkisp1_read(rkisp1, RKISP1_CIF_MI_XTD_FORMAT_CTRL);
386 if (cap->pix.cfg->uv_swap)
387 reg |= RKISP1_CIF_MI_XTD_FMT_CTRL_MP_CB_CR_SWAP;
388 else
389 reg &= ~RKISP1_CIF_MI_XTD_FMT_CTRL_MP_CB_CR_SWAP;
390 rkisp1_write(rkisp1, reg, RKISP1_CIF_MI_XTD_FORMAT_CTRL);
391 }
392
393 rkisp1_mi_config_ctrl(cap);
394
395 reg = rkisp1_read(rkisp1, RKISP1_CIF_MI_CTRL);
396 reg &= ~RKISP1_MI_CTRL_MP_FMT_MASK;
397 reg |= cap->pix.cfg->write_format;
398 rkisp1_write(rkisp1, reg, RKISP1_CIF_MI_CTRL);
399
400 reg = rkisp1_read(rkisp1, RKISP1_CIF_MI_CTRL);
401 reg |= RKISP1_CIF_MI_MP_AUTOUPDATE_ENABLE;
402 rkisp1_write(rkisp1, reg, RKISP1_CIF_MI_CTRL);
403}
404
405static void rkisp1_sp_config(struct rkisp1_capture *cap)
406{
407 const struct v4l2_pix_format_mplane *pixm = &cap->pix.fmt;
408 struct rkisp1_device *rkisp1 = cap->rkisp1;
409 u32 mi_ctrl, reg;
410
411 rkisp1_write(rkisp1, rkisp1_pixfmt_comp_size(pixm, RKISP1_PLANE_Y),
412 cap->config->mi.y_size_init);
413 rkisp1_write(rkisp1, rkisp1_pixfmt_comp_size(pixm, RKISP1_PLANE_CB),
414 cap->config->mi.cb_size_init);
415 rkisp1_write(rkisp1, rkisp1_pixfmt_comp_size(pixm, RKISP1_PLANE_CR),
416 cap->config->mi.cr_size_init);
417
418 rkisp1_write(rkisp1, pixm->width, RKISP1_CIF_MI_SP_Y_PIC_WIDTH);
419 rkisp1_write(rkisp1, pixm->height, RKISP1_CIF_MI_SP_Y_PIC_HEIGHT);
420 rkisp1_write(rkisp1, cap->sp_y_stride, RKISP1_CIF_MI_SP_Y_LLENGTH);
421
422 rkisp1_irq_frame_end_enable(cap);
423
424
425 if (cap->pix.info->comp_planes == 2) {
426 reg = rkisp1_read(rkisp1, RKISP1_CIF_MI_XTD_FORMAT_CTRL);
427 if (cap->pix.cfg->uv_swap)
428 reg |= RKISP1_CIF_MI_XTD_FMT_CTRL_SP_CB_CR_SWAP;
429 else
430 reg &= ~RKISP1_CIF_MI_XTD_FMT_CTRL_SP_CB_CR_SWAP;
431 rkisp1_write(rkisp1, reg, RKISP1_CIF_MI_XTD_FORMAT_CTRL);
432 }
433
434 rkisp1_mi_config_ctrl(cap);
435
436 mi_ctrl = rkisp1_read(rkisp1, RKISP1_CIF_MI_CTRL);
437 mi_ctrl &= ~RKISP1_MI_CTRL_SP_FMT_MASK;
438 mi_ctrl |= cap->pix.cfg->write_format |
439 RKISP1_MI_CTRL_SP_INPUT_YUV422 |
440 cap->pix.cfg->output_format |
441 RKISP1_CIF_MI_SP_AUTOUPDATE_ENABLE;
442 rkisp1_write(rkisp1, mi_ctrl, RKISP1_CIF_MI_CTRL);
443}
444
445static void rkisp1_mp_disable(struct rkisp1_capture *cap)
446{
447 u32 mi_ctrl = rkisp1_read(cap->rkisp1, RKISP1_CIF_MI_CTRL);
448
449 mi_ctrl &= ~(RKISP1_CIF_MI_CTRL_MP_ENABLE |
450 RKISP1_CIF_MI_CTRL_RAW_ENABLE);
451 rkisp1_write(cap->rkisp1, mi_ctrl, RKISP1_CIF_MI_CTRL);
452}
453
454static void rkisp1_sp_disable(struct rkisp1_capture *cap)
455{
456 u32 mi_ctrl = rkisp1_read(cap->rkisp1, RKISP1_CIF_MI_CTRL);
457
458 mi_ctrl &= ~RKISP1_CIF_MI_CTRL_SP_ENABLE;
459 rkisp1_write(cap->rkisp1, mi_ctrl, RKISP1_CIF_MI_CTRL);
460}
461
462static void rkisp1_mp_enable(struct rkisp1_capture *cap)
463{
464 u32 mi_ctrl;
465
466 rkisp1_mp_disable(cap);
467
468 mi_ctrl = rkisp1_read(cap->rkisp1, RKISP1_CIF_MI_CTRL);
469 if (v4l2_is_format_bayer(cap->pix.info))
470 mi_ctrl |= RKISP1_CIF_MI_CTRL_RAW_ENABLE;
471
472 else
473 mi_ctrl |= RKISP1_CIF_MI_CTRL_MP_ENABLE;
474
475 rkisp1_write(cap->rkisp1, mi_ctrl, RKISP1_CIF_MI_CTRL);
476}
477
478static void rkisp1_sp_enable(struct rkisp1_capture *cap)
479{
480 u32 mi_ctrl = rkisp1_read(cap->rkisp1, RKISP1_CIF_MI_CTRL);
481
482 mi_ctrl |= RKISP1_CIF_MI_CTRL_SP_ENABLE;
483 rkisp1_write(cap->rkisp1, mi_ctrl, RKISP1_CIF_MI_CTRL);
484}
485
486static void rkisp1_mp_sp_stop(struct rkisp1_capture *cap)
487{
488 if (!cap->is_streaming)
489 return;
490 rkisp1_write(cap->rkisp1,
491 RKISP1_CIF_MI_FRAME(cap), RKISP1_CIF_MI_ICR);
492 cap->ops->disable(cap);
493}
494
495static bool rkisp1_mp_is_stopped(struct rkisp1_capture *cap)
496{
497 u32 en = RKISP1_CIF_MI_CTRL_SHD_MP_IN_ENABLED |
498 RKISP1_CIF_MI_CTRL_SHD_RAW_OUT_ENABLED;
499
500 return !(rkisp1_read(cap->rkisp1, RKISP1_CIF_MI_CTRL_SHD) & en);
501}
502
503static bool rkisp1_sp_is_stopped(struct rkisp1_capture *cap)
504{
505 return !(rkisp1_read(cap->rkisp1, RKISP1_CIF_MI_CTRL_SHD) &
506 RKISP1_CIF_MI_CTRL_SHD_SP_IN_ENABLED);
507}
508
509static void rkisp1_mp_set_data_path(struct rkisp1_capture *cap)
510{
511 u32 dpcl = rkisp1_read(cap->rkisp1, RKISP1_CIF_VI_DPCL);
512
513 dpcl = dpcl | RKISP1_CIF_VI_DPCL_CHAN_MODE_MP |
514 RKISP1_CIF_VI_DPCL_MP_MUX_MRSZ_MI;
515 rkisp1_write(cap->rkisp1, dpcl, RKISP1_CIF_VI_DPCL);
516}
517
518static void rkisp1_sp_set_data_path(struct rkisp1_capture *cap)
519{
520 u32 dpcl = rkisp1_read(cap->rkisp1, RKISP1_CIF_VI_DPCL);
521
522 dpcl |= RKISP1_CIF_VI_DPCL_CHAN_MODE_SP;
523 rkisp1_write(cap->rkisp1, dpcl, RKISP1_CIF_VI_DPCL);
524}
525
526static struct rkisp1_capture_ops rkisp1_capture_ops_mp = {
527 .config = rkisp1_mp_config,
528 .enable = rkisp1_mp_enable,
529 .disable = rkisp1_mp_disable,
530 .stop = rkisp1_mp_sp_stop,
531 .set_data_path = rkisp1_mp_set_data_path,
532 .is_stopped = rkisp1_mp_is_stopped,
533};
534
535static struct rkisp1_capture_ops rkisp1_capture_ops_sp = {
536 .config = rkisp1_sp_config,
537 .enable = rkisp1_sp_enable,
538 .disable = rkisp1_sp_disable,
539 .stop = rkisp1_mp_sp_stop,
540 .set_data_path = rkisp1_sp_set_data_path,
541 .is_stopped = rkisp1_sp_is_stopped,
542};
543
544
545
546
547
548static int rkisp1_dummy_buf_create(struct rkisp1_capture *cap)
549{
550 const struct v4l2_pix_format_mplane *pixm = &cap->pix.fmt;
551 struct rkisp1_dummy_buffer *dummy_buf = &cap->buf.dummy;
552
553 dummy_buf->size = max3(rkisp1_pixfmt_comp_size(pixm, RKISP1_PLANE_Y),
554 rkisp1_pixfmt_comp_size(pixm, RKISP1_PLANE_CB),
555 rkisp1_pixfmt_comp_size(pixm, RKISP1_PLANE_CR));
556
557
558 dummy_buf->vaddr = dma_alloc_attrs(cap->rkisp1->dev,
559 dummy_buf->size,
560 &dummy_buf->dma_addr,
561 GFP_KERNEL,
562 DMA_ATTR_NO_KERNEL_MAPPING);
563 if (!dummy_buf->vaddr)
564 return -ENOMEM;
565
566 return 0;
567}
568
569static void rkisp1_dummy_buf_destroy(struct rkisp1_capture *cap)
570{
571 dma_free_attrs(cap->rkisp1->dev,
572 cap->buf.dummy.size, cap->buf.dummy.vaddr,
573 cap->buf.dummy.dma_addr, DMA_ATTR_NO_KERNEL_MAPPING);
574}
575
576static void rkisp1_set_next_buf(struct rkisp1_capture *cap)
577{
578 cap->buf.curr = cap->buf.next;
579 cap->buf.next = NULL;
580
581 if (!list_empty(&cap->buf.queue)) {
582 u32 *buff_addr;
583
584 cap->buf.next = list_first_entry(&cap->buf.queue, struct rkisp1_buffer, queue);
585 list_del(&cap->buf.next->queue);
586
587 buff_addr = cap->buf.next->buff_addr;
588
589 rkisp1_write(cap->rkisp1,
590 buff_addr[RKISP1_PLANE_Y],
591 cap->config->mi.y_base_ad_init);
592 rkisp1_write(cap->rkisp1,
593 buff_addr[RKISP1_PLANE_CB],
594 cap->config->mi.cb_base_ad_init);
595 rkisp1_write(cap->rkisp1,
596 buff_addr[RKISP1_PLANE_CR],
597 cap->config->mi.cr_base_ad_init);
598 } else {
599
600
601
602
603 rkisp1_write(cap->rkisp1,
604 cap->buf.dummy.dma_addr,
605 cap->config->mi.y_base_ad_init);
606 rkisp1_write(cap->rkisp1,
607 cap->buf.dummy.dma_addr,
608 cap->config->mi.cb_base_ad_init);
609 rkisp1_write(cap->rkisp1,
610 cap->buf.dummy.dma_addr,
611 cap->config->mi.cr_base_ad_init);
612 }
613
614
615 rkisp1_write(cap->rkisp1, 0, cap->config->mi.y_offs_cnt_init);
616 rkisp1_write(cap->rkisp1, 0, cap->config->mi.cb_offs_cnt_init);
617 rkisp1_write(cap->rkisp1, 0, cap->config->mi.cr_offs_cnt_init);
618}
619
620
621
622
623
624
625static void rkisp1_handle_buffer(struct rkisp1_capture *cap)
626{
627 struct rkisp1_isp *isp = &cap->rkisp1->isp;
628 struct rkisp1_buffer *curr_buf;
629 unsigned long flags;
630
631 spin_lock_irqsave(&cap->buf.lock, flags);
632 curr_buf = cap->buf.curr;
633
634 if (curr_buf) {
635 curr_buf->vb.sequence = atomic_read(&isp->frame_sequence);
636 curr_buf->vb.vb2_buf.timestamp = ktime_get_boottime_ns();
637 curr_buf->vb.field = V4L2_FIELD_NONE;
638 vb2_buffer_done(&curr_buf->vb.vb2_buf, VB2_BUF_STATE_DONE);
639 } else {
640 cap->rkisp1->debug.frame_drop[cap->id]++;
641 }
642
643 rkisp1_set_next_buf(cap);
644 spin_unlock_irqrestore(&cap->buf.lock, flags);
645}
646
647void rkisp1_capture_isr(struct rkisp1_device *rkisp1)
648{
649 unsigned int i;
650 u32 status;
651
652 status = rkisp1_read(rkisp1, RKISP1_CIF_MI_MIS);
653 rkisp1_write(rkisp1, status, RKISP1_CIF_MI_ICR);
654
655 for (i = 0; i < ARRAY_SIZE(rkisp1->capture_devs); ++i) {
656 struct rkisp1_capture *cap = &rkisp1->capture_devs[i];
657
658 if (!(status & RKISP1_CIF_MI_FRAME(cap)))
659 continue;
660 if (!cap->is_stopping) {
661 rkisp1_handle_buffer(cap);
662 continue;
663 }
664
665
666
667
668
669
670
671
672 if (!cap->ops->is_stopped(cap)) {
673 cap->ops->stop(cap);
674 continue;
675 }
676 cap->is_stopping = false;
677 cap->is_streaming = false;
678 wake_up(&cap->done);
679 }
680}
681
682
683
684
685
686static int rkisp1_vb2_queue_setup(struct vb2_queue *queue,
687 unsigned int *num_buffers,
688 unsigned int *num_planes,
689 unsigned int sizes[],
690 struct device *alloc_devs[])
691{
692 struct rkisp1_capture *cap = queue->drv_priv;
693 const struct v4l2_pix_format_mplane *pixm = &cap->pix.fmt;
694 unsigned int i;
695
696 if (*num_planes) {
697 if (*num_planes != pixm->num_planes)
698 return -EINVAL;
699
700 for (i = 0; i < pixm->num_planes; i++)
701 if (sizes[i] < pixm->plane_fmt[i].sizeimage)
702 return -EINVAL;
703 } else {
704 *num_planes = pixm->num_planes;
705 for (i = 0; i < pixm->num_planes; i++)
706 sizes[i] = pixm->plane_fmt[i].sizeimage;
707 }
708
709 return 0;
710}
711
712static void rkisp1_vb2_buf_queue(struct vb2_buffer *vb)
713{
714 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
715 struct rkisp1_buffer *ispbuf =
716 container_of(vbuf, struct rkisp1_buffer, vb);
717 struct rkisp1_capture *cap = vb->vb2_queue->drv_priv;
718 const struct v4l2_pix_format_mplane *pixm = &cap->pix.fmt;
719 unsigned long flags;
720 unsigned int i;
721
722 memset(ispbuf->buff_addr, 0, sizeof(ispbuf->buff_addr));
723 for (i = 0; i < pixm->num_planes; i++)
724 ispbuf->buff_addr[i] = vb2_dma_contig_plane_dma_addr(vb, i);
725
726
727 if (pixm->num_planes == 1) {
728 ispbuf->buff_addr[RKISP1_PLANE_CB] =
729 ispbuf->buff_addr[RKISP1_PLANE_Y] +
730 rkisp1_pixfmt_comp_size(pixm, RKISP1_PLANE_Y);
731 ispbuf->buff_addr[RKISP1_PLANE_CR] =
732 ispbuf->buff_addr[RKISP1_PLANE_CB] +
733 rkisp1_pixfmt_comp_size(pixm, RKISP1_PLANE_CB);
734 }
735
736
737
738
739
740 if (cap->pix.info->comp_planes == 3 && cap->pix.cfg->uv_swap)
741 swap(ispbuf->buff_addr[RKISP1_PLANE_CR],
742 ispbuf->buff_addr[RKISP1_PLANE_CB]);
743
744 spin_lock_irqsave(&cap->buf.lock, flags);
745 list_add_tail(&ispbuf->queue, &cap->buf.queue);
746 spin_unlock_irqrestore(&cap->buf.lock, flags);
747}
748
749static int rkisp1_vb2_buf_prepare(struct vb2_buffer *vb)
750{
751 struct rkisp1_capture *cap = vb->vb2_queue->drv_priv;
752 unsigned int i;
753
754 for (i = 0; i < cap->pix.fmt.num_planes; i++) {
755 unsigned long size = cap->pix.fmt.plane_fmt[i].sizeimage;
756
757 if (vb2_plane_size(vb, i) < size) {
758 dev_err(cap->rkisp1->dev,
759 "User buffer too small (%ld < %ld)\n",
760 vb2_plane_size(vb, i), size);
761 return -EINVAL;
762 }
763 vb2_set_plane_payload(vb, i, size);
764 }
765
766 return 0;
767}
768
769static void rkisp1_return_all_buffers(struct rkisp1_capture *cap,
770 enum vb2_buffer_state state)
771{
772 unsigned long flags;
773 struct rkisp1_buffer *buf;
774
775 spin_lock_irqsave(&cap->buf.lock, flags);
776 if (cap->buf.curr) {
777 vb2_buffer_done(&cap->buf.curr->vb.vb2_buf, state);
778 cap->buf.curr = NULL;
779 }
780 if (cap->buf.next) {
781 vb2_buffer_done(&cap->buf.next->vb.vb2_buf, state);
782 cap->buf.next = NULL;
783 }
784 while (!list_empty(&cap->buf.queue)) {
785 buf = list_first_entry(&cap->buf.queue,
786 struct rkisp1_buffer, queue);
787 list_del(&buf->queue);
788 vb2_buffer_done(&buf->vb.vb2_buf, state);
789 }
790 spin_unlock_irqrestore(&cap->buf.lock, flags);
791}
792
793
794
795
796
797
798
799
800
801
802
803
804
805static int rkisp1_pipeline_sink_walk(struct media_entity *from,
806 struct media_entity *until,
807 int (*cb)(struct media_entity *from,
808 struct media_entity *curr))
809{
810 struct media_entity *entity = from;
811 struct media_pad *pad;
812 unsigned int i;
813 int ret;
814
815 while (1) {
816 pad = NULL;
817
818 for (i = 0; i < entity->num_pads; i++) {
819 struct media_pad *spad = &entity->pads[i];
820
821 if (!(spad->flags & MEDIA_PAD_FL_SINK))
822 continue;
823 pad = media_entity_remote_pad(spad);
824 if (pad && is_media_entity_v4l2_subdev(pad->entity))
825 break;
826 }
827 if (!pad || !is_media_entity_v4l2_subdev(pad->entity))
828 break;
829
830 entity = pad->entity;
831 if (entity == until)
832 break;
833
834 ret = cb(from, entity);
835 if (ret)
836 return ret;
837 }
838
839 return 0;
840}
841
842static int rkisp1_pipeline_disable_cb(struct media_entity *from,
843 struct media_entity *curr)
844{
845 struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(curr);
846
847 return v4l2_subdev_call(sd, video, s_stream, false);
848}
849
850static int rkisp1_pipeline_enable_cb(struct media_entity *from,
851 struct media_entity *curr)
852{
853 struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(curr);
854
855 return v4l2_subdev_call(sd, video, s_stream, true);
856}
857
858static void rkisp1_stream_stop(struct rkisp1_capture *cap)
859{
860 int ret;
861
862
863 cap->is_stopping = true;
864 ret = wait_event_timeout(cap->done,
865 !cap->is_streaming,
866 msecs_to_jiffies(1000));
867 if (!ret) {
868 cap->rkisp1->debug.stop_timeout[cap->id]++;
869 cap->ops->stop(cap);
870 cap->is_stopping = false;
871 cap->is_streaming = false;
872 }
873}
874
875static void rkisp1_vb2_stop_streaming(struct vb2_queue *queue)
876{
877 struct rkisp1_capture *cap = queue->drv_priv;
878 struct rkisp1_vdev_node *node = &cap->vnode;
879 struct rkisp1_device *rkisp1 = cap->rkisp1;
880 int ret;
881
882 mutex_lock(&cap->rkisp1->stream_lock);
883
884 rkisp1_stream_stop(cap);
885 media_pipeline_stop(&node->vdev.entity);
886 ret = rkisp1_pipeline_sink_walk(&node->vdev.entity, NULL,
887 rkisp1_pipeline_disable_cb);
888 if (ret)
889 dev_err(rkisp1->dev,
890 "pipeline stream-off failed error:%d\n", ret);
891
892 rkisp1_return_all_buffers(cap, VB2_BUF_STATE_ERROR);
893
894 v4l2_pipeline_pm_put(&node->vdev.entity);
895 ret = pm_runtime_put(rkisp1->dev);
896 if (ret < 0)
897 dev_err(rkisp1->dev, "power down failed error:%d\n", ret);
898
899 rkisp1_dummy_buf_destroy(cap);
900
901 mutex_unlock(&cap->rkisp1->stream_lock);
902}
903
904
905
906
907
908
909
910static void rkisp1_stream_start(struct rkisp1_capture *cap)
911{
912 struct rkisp1_device *rkisp1 = cap->rkisp1;
913 struct rkisp1_capture *other = &rkisp1->capture_devs[cap->id ^ 1];
914
915 cap->ops->set_data_path(cap);
916 cap->ops->config(cap);
917
918
919 rkisp1_set_next_buf(cap);
920 cap->ops->enable(cap);
921
922
923
924
925
926
927
928
929
930 if (!other->is_streaming) {
931
932 rkisp1_write(rkisp1,
933 RKISP1_CIF_MI_INIT_SOFT_UPD, RKISP1_CIF_MI_INIT);
934 rkisp1_set_next_buf(cap);
935 }
936 cap->is_streaming = true;
937}
938
939static int
940rkisp1_vb2_start_streaming(struct vb2_queue *queue, unsigned int count)
941{
942 struct rkisp1_capture *cap = queue->drv_priv;
943 struct media_entity *entity = &cap->vnode.vdev.entity;
944 int ret;
945
946 mutex_lock(&cap->rkisp1->stream_lock);
947
948 ret = rkisp1_dummy_buf_create(cap);
949 if (ret)
950 goto err_ret_buffers;
951
952 ret = pm_runtime_get_sync(cap->rkisp1->dev);
953 if (ret < 0) {
954 dev_err(cap->rkisp1->dev, "power up failed %d\n", ret);
955 goto err_destroy_dummy;
956 }
957 ret = v4l2_pipeline_pm_get(entity);
958 if (ret) {
959 dev_err(cap->rkisp1->dev, "open cif pipeline failed %d\n", ret);
960 goto err_pipe_pm_put;
961 }
962
963 rkisp1_stream_start(cap);
964
965
966 ret = rkisp1_pipeline_sink_walk(entity, NULL,
967 rkisp1_pipeline_enable_cb);
968 if (ret)
969 goto err_stop_stream;
970
971 ret = media_pipeline_start(entity, &cap->rkisp1->pipe);
972 if (ret) {
973 dev_err(cap->rkisp1->dev, "start pipeline failed %d\n", ret);
974 goto err_pipe_disable;
975 }
976
977 mutex_unlock(&cap->rkisp1->stream_lock);
978
979 return 0;
980
981err_pipe_disable:
982 rkisp1_pipeline_sink_walk(entity, NULL, rkisp1_pipeline_disable_cb);
983err_stop_stream:
984 rkisp1_stream_stop(cap);
985 v4l2_pipeline_pm_put(entity);
986err_pipe_pm_put:
987 pm_runtime_put(cap->rkisp1->dev);
988err_destroy_dummy:
989 rkisp1_dummy_buf_destroy(cap);
990err_ret_buffers:
991 rkisp1_return_all_buffers(cap, VB2_BUF_STATE_QUEUED);
992 mutex_unlock(&cap->rkisp1->stream_lock);
993
994 return ret;
995}
996
997static struct vb2_ops rkisp1_vb2_ops = {
998 .queue_setup = rkisp1_vb2_queue_setup,
999 .buf_queue = rkisp1_vb2_buf_queue,
1000 .buf_prepare = rkisp1_vb2_buf_prepare,
1001 .wait_prepare = vb2_ops_wait_prepare,
1002 .wait_finish = vb2_ops_wait_finish,
1003 .stop_streaming = rkisp1_vb2_stop_streaming,
1004 .start_streaming = rkisp1_vb2_start_streaming,
1005};
1006
1007
1008
1009
1010
1011static const struct v4l2_format_info *
1012rkisp1_fill_pixfmt(struct v4l2_pix_format_mplane *pixm,
1013 enum rkisp1_stream_id id)
1014{
1015 struct v4l2_plane_pix_format *plane_y = &pixm->plane_fmt[0];
1016 const struct v4l2_format_info *info;
1017 unsigned int i;
1018 u32 stride;
1019
1020 info = v4l2_format_info(pixm->pixelformat);
1021 pixm->num_planes = info->mem_planes;
1022 stride = info->bpp[0] * pixm->width;
1023
1024 if (id == RKISP1_MAINPATH || plane_y->bytesperline < stride)
1025 plane_y->bytesperline = stride;
1026 plane_y->sizeimage = plane_y->bytesperline * pixm->height;
1027
1028
1029 stride = DIV_ROUND_UP(plane_y->bytesperline, info->bpp[0]);
1030
1031 for (i = 1; i < info->comp_planes; i++) {
1032 struct v4l2_plane_pix_format *plane = &pixm->plane_fmt[i];
1033
1034
1035 plane->bytesperline = DIV_ROUND_UP(stride, info->hdiv) *
1036 info->bpp[i];
1037 plane->sizeimage = plane->bytesperline *
1038 DIV_ROUND_UP(pixm->height, info->vdiv);
1039 }
1040
1041
1042
1043
1044
1045
1046
1047 if (info->mem_planes == 1)
1048 for (i = 1; i < info->comp_planes; i++)
1049 plane_y->sizeimage += pixm->plane_fmt[i].sizeimage;
1050
1051 return info;
1052}
1053
1054static const struct rkisp1_capture_fmt_cfg *
1055rkisp1_find_fmt_cfg(const struct rkisp1_capture *cap, const u32 pixelfmt)
1056{
1057 unsigned int i;
1058
1059 for (i = 0; i < cap->config->fmt_size; i++) {
1060 if (cap->config->fmts[i].fourcc == pixelfmt)
1061 return &cap->config->fmts[i];
1062 }
1063 return NULL;
1064}
1065
1066static void rkisp1_try_fmt(const struct rkisp1_capture *cap,
1067 struct v4l2_pix_format_mplane *pixm,
1068 const struct rkisp1_capture_fmt_cfg **fmt_cfg,
1069 const struct v4l2_format_info **fmt_info)
1070{
1071 const struct rkisp1_capture_config *config = cap->config;
1072 struct rkisp1_capture *other_cap =
1073 &cap->rkisp1->capture_devs[cap->id ^ 1];
1074 const struct rkisp1_capture_fmt_cfg *fmt;
1075 const struct v4l2_format_info *info;
1076 const unsigned int max_widths[] = { RKISP1_RSZ_MP_SRC_MAX_WIDTH,
1077 RKISP1_RSZ_SP_SRC_MAX_WIDTH };
1078 const unsigned int max_heights[] = { RKISP1_RSZ_MP_SRC_MAX_HEIGHT,
1079 RKISP1_RSZ_SP_SRC_MAX_HEIGHT};
1080
1081 fmt = rkisp1_find_fmt_cfg(cap, pixm->pixelformat);
1082 if (!fmt) {
1083 fmt = config->fmts;
1084 pixm->pixelformat = fmt->fourcc;
1085 }
1086
1087 pixm->width = clamp_t(u32, pixm->width,
1088 RKISP1_RSZ_SRC_MIN_WIDTH, max_widths[cap->id]);
1089 pixm->height = clamp_t(u32, pixm->height,
1090 RKISP1_RSZ_SRC_MIN_HEIGHT, max_heights[cap->id]);
1091
1092 pixm->field = V4L2_FIELD_NONE;
1093 pixm->colorspace = V4L2_COLORSPACE_DEFAULT;
1094 pixm->ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT;
1095
1096 info = rkisp1_fill_pixfmt(pixm, cap->id);
1097
1098
1099 if (other_cap->is_streaming)
1100 pixm->quantization = other_cap->pix.fmt.quantization;
1101
1102 else if (!pixm->quantization ||
1103 pixm->quantization > V4L2_QUANTIZATION_LIM_RANGE)
1104 pixm->quantization = V4L2_QUANTIZATION_FULL_RANGE;
1105
1106 if (fmt_cfg)
1107 *fmt_cfg = fmt;
1108 if (fmt_info)
1109 *fmt_info = info;
1110}
1111
1112static void rkisp1_set_fmt(struct rkisp1_capture *cap,
1113 struct v4l2_pix_format_mplane *pixm)
1114{
1115 rkisp1_try_fmt(cap, pixm, &cap->pix.cfg, &cap->pix.info);
1116 cap->pix.fmt = *pixm;
1117
1118
1119 if (cap->id == RKISP1_SELFPATH)
1120 cap->sp_y_stride = pixm->plane_fmt[0].bytesperline /
1121 cap->pix.info->bpp[0];
1122}
1123
1124static int rkisp1_try_fmt_vid_cap_mplane(struct file *file, void *fh,
1125 struct v4l2_format *f)
1126{
1127 struct rkisp1_capture *cap = video_drvdata(file);
1128
1129 rkisp1_try_fmt(cap, &f->fmt.pix_mp, NULL, NULL);
1130
1131 return 0;
1132}
1133
1134static int rkisp1_enum_fmt_vid_cap_mplane(struct file *file, void *priv,
1135 struct v4l2_fmtdesc *f)
1136{
1137 struct rkisp1_capture *cap = video_drvdata(file);
1138 const struct rkisp1_capture_fmt_cfg *fmt = NULL;
1139
1140 if (f->index >= cap->config->fmt_size)
1141 return -EINVAL;
1142
1143 fmt = &cap->config->fmts[f->index];
1144 f->pixelformat = fmt->fourcc;
1145
1146 return 0;
1147}
1148
1149static int rkisp1_s_fmt_vid_cap_mplane(struct file *file,
1150 void *priv, struct v4l2_format *f)
1151{
1152 struct rkisp1_capture *cap = video_drvdata(file);
1153 struct rkisp1_vdev_node *node =
1154 rkisp1_vdev_to_node(&cap->vnode.vdev);
1155
1156 if (vb2_is_busy(&node->buf_queue))
1157 return -EBUSY;
1158
1159 rkisp1_set_fmt(cap, &f->fmt.pix_mp);
1160
1161 return 0;
1162}
1163
1164static int rkisp1_g_fmt_vid_cap_mplane(struct file *file, void *fh,
1165 struct v4l2_format *f)
1166{
1167 struct rkisp1_capture *cap = video_drvdata(file);
1168
1169 f->fmt.pix_mp = cap->pix.fmt;
1170
1171 return 0;
1172}
1173
1174static int
1175rkisp1_querycap(struct file *file, void *priv, struct v4l2_capability *cap)
1176{
1177 struct rkisp1_capture *cap_dev = video_drvdata(file);
1178 struct rkisp1_device *rkisp1 = cap_dev->rkisp1;
1179
1180 strscpy(cap->driver, rkisp1->dev->driver->name, sizeof(cap->driver));
1181 strscpy(cap->card, rkisp1->dev->driver->name, sizeof(cap->card));
1182 strscpy(cap->bus_info, RKISP1_BUS_INFO, sizeof(cap->bus_info));
1183
1184 return 0;
1185}
1186
1187static const struct v4l2_ioctl_ops rkisp1_v4l2_ioctl_ops = {
1188 .vidioc_reqbufs = vb2_ioctl_reqbufs,
1189 .vidioc_querybuf = vb2_ioctl_querybuf,
1190 .vidioc_create_bufs = vb2_ioctl_create_bufs,
1191 .vidioc_qbuf = vb2_ioctl_qbuf,
1192 .vidioc_expbuf = vb2_ioctl_expbuf,
1193 .vidioc_dqbuf = vb2_ioctl_dqbuf,
1194 .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
1195 .vidioc_streamon = vb2_ioctl_streamon,
1196 .vidioc_streamoff = vb2_ioctl_streamoff,
1197 .vidioc_try_fmt_vid_cap_mplane = rkisp1_try_fmt_vid_cap_mplane,
1198 .vidioc_s_fmt_vid_cap_mplane = rkisp1_s_fmt_vid_cap_mplane,
1199 .vidioc_g_fmt_vid_cap_mplane = rkisp1_g_fmt_vid_cap_mplane,
1200 .vidioc_enum_fmt_vid_cap = rkisp1_enum_fmt_vid_cap_mplane,
1201 .vidioc_querycap = rkisp1_querycap,
1202 .vidioc_subscribe_event = v4l2_ctrl_subscribe_event,
1203 .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
1204};
1205
1206static int rkisp1_capture_link_validate(struct media_link *link)
1207{
1208 struct video_device *vdev =
1209 media_entity_to_video_device(link->sink->entity);
1210 struct v4l2_subdev *sd =
1211 media_entity_to_v4l2_subdev(link->source->entity);
1212 struct rkisp1_capture *cap = video_get_drvdata(vdev);
1213 struct rkisp1_isp *isp = &cap->rkisp1->isp;
1214 u8 isp_pix_enc = isp->src_fmt->pixel_enc;
1215 u8 cap_pix_enc = cap->pix.info->pixel_enc;
1216 struct v4l2_subdev_format sd_fmt;
1217 int ret;
1218
1219 if (cap->id == RKISP1_SELFPATH &&
1220 isp->src_fmt->mbus_code != MEDIA_BUS_FMT_YUYV8_2X8) {
1221 dev_err(cap->rkisp1->dev,
1222 "selfpath only supports MEDIA_BUS_FMT_YUYV8_2X8\n");
1223 return -EPIPE;
1224 }
1225
1226 if (cap_pix_enc != isp_pix_enc &&
1227 !(isp_pix_enc == V4L2_PIXEL_ENC_YUV &&
1228 cap_pix_enc == V4L2_PIXEL_ENC_RGB)) {
1229 dev_err(cap->rkisp1->dev,
1230 "format type mismatch in link '%s:%d->%s:%d'\n",
1231 link->source->entity->name, link->source->index,
1232 link->sink->entity->name, link->sink->index);
1233 return -EPIPE;
1234 }
1235
1236 sd_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
1237 sd_fmt.pad = link->source->index;
1238 ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &sd_fmt);
1239 if (ret)
1240 return ret;
1241
1242 if (sd_fmt.format.height != cap->pix.fmt.height ||
1243 sd_fmt.format.width != cap->pix.fmt.width)
1244 return -EPIPE;
1245
1246 return 0;
1247}
1248
1249
1250
1251
1252
1253static const struct media_entity_operations rkisp1_media_ops = {
1254 .link_validate = rkisp1_capture_link_validate,
1255};
1256
1257static const struct v4l2_file_operations rkisp1_fops = {
1258 .open = v4l2_fh_open,
1259 .release = vb2_fop_release,
1260 .unlocked_ioctl = video_ioctl2,
1261 .poll = vb2_fop_poll,
1262 .mmap = vb2_fop_mmap,
1263};
1264
1265static void rkisp1_unregister_capture(struct rkisp1_capture *cap)
1266{
1267 media_entity_cleanup(&cap->vnode.vdev.entity);
1268 video_unregister_device(&cap->vnode.vdev);
1269}
1270
1271void rkisp1_capture_devs_unregister(struct rkisp1_device *rkisp1)
1272{
1273 struct rkisp1_capture *mp = &rkisp1->capture_devs[RKISP1_MAINPATH];
1274 struct rkisp1_capture *sp = &rkisp1->capture_devs[RKISP1_SELFPATH];
1275
1276 rkisp1_unregister_capture(mp);
1277 rkisp1_unregister_capture(sp);
1278}
1279
1280static int rkisp1_register_capture(struct rkisp1_capture *cap)
1281{
1282 const char * const dev_names[] = {RKISP1_MP_DEV_NAME,
1283 RKISP1_SP_DEV_NAME};
1284 struct v4l2_device *v4l2_dev = &cap->rkisp1->v4l2_dev;
1285 struct video_device *vdev = &cap->vnode.vdev;
1286 struct rkisp1_vdev_node *node;
1287 struct vb2_queue *q;
1288 int ret;
1289
1290 strscpy(vdev->name, dev_names[cap->id], sizeof(vdev->name));
1291 node = rkisp1_vdev_to_node(vdev);
1292 mutex_init(&node->vlock);
1293
1294 vdev->ioctl_ops = &rkisp1_v4l2_ioctl_ops;
1295 vdev->release = video_device_release_empty;
1296 vdev->fops = &rkisp1_fops;
1297 vdev->minor = -1;
1298 vdev->v4l2_dev = v4l2_dev;
1299 vdev->lock = &node->vlock;
1300 vdev->device_caps = V4L2_CAP_VIDEO_CAPTURE_MPLANE |
1301 V4L2_CAP_STREAMING;
1302 vdev->entity.ops = &rkisp1_media_ops;
1303 video_set_drvdata(vdev, cap);
1304 vdev->vfl_dir = VFL_DIR_RX;
1305 node->pad.flags = MEDIA_PAD_FL_SINK;
1306
1307 q = &node->buf_queue;
1308 q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
1309 q->io_modes = VB2_MMAP | VB2_DMABUF;
1310 q->drv_priv = cap;
1311 q->ops = &rkisp1_vb2_ops;
1312 q->mem_ops = &vb2_dma_contig_memops;
1313 q->buf_struct_size = sizeof(struct rkisp1_buffer);
1314 q->min_buffers_needed = RKISP1_MIN_BUFFERS_NEEDED;
1315 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1316 q->lock = &node->vlock;
1317 q->dev = cap->rkisp1->dev;
1318 ret = vb2_queue_init(q);
1319 if (ret) {
1320 dev_err(cap->rkisp1->dev,
1321 "vb2 queue init failed (err=%d)\n", ret);
1322 return ret;
1323 }
1324
1325 vdev->queue = q;
1326
1327 ret = video_register_device(vdev, VFL_TYPE_VIDEO, -1);
1328 if (ret) {
1329 dev_err(cap->rkisp1->dev,
1330 "failed to register %s, ret=%d\n", vdev->name, ret);
1331 return ret;
1332 }
1333 v4l2_info(v4l2_dev, "registered %s as /dev/video%d\n", vdev->name,
1334 vdev->num);
1335
1336 ret = media_entity_pads_init(&vdev->entity, 1, &node->pad);
1337 if (ret) {
1338 video_unregister_device(vdev);
1339 return ret;
1340 }
1341
1342 return 0;
1343}
1344
1345static void
1346rkisp1_capture_init(struct rkisp1_device *rkisp1, enum rkisp1_stream_id id)
1347{
1348 struct rkisp1_capture *cap = &rkisp1->capture_devs[id];
1349 struct v4l2_pix_format_mplane pixm;
1350
1351 memset(cap, 0, sizeof(*cap));
1352 cap->id = id;
1353 cap->rkisp1 = rkisp1;
1354
1355 INIT_LIST_HEAD(&cap->buf.queue);
1356 init_waitqueue_head(&cap->done);
1357 spin_lock_init(&cap->buf.lock);
1358 if (cap->id == RKISP1_SELFPATH) {
1359 cap->ops = &rkisp1_capture_ops_sp;
1360 cap->config = &rkisp1_capture_config_sp;
1361 } else {
1362 cap->ops = &rkisp1_capture_ops_mp;
1363 cap->config = &rkisp1_capture_config_mp;
1364 }
1365
1366 cap->is_streaming = false;
1367
1368 memset(&pixm, 0, sizeof(pixm));
1369 pixm.pixelformat = V4L2_PIX_FMT_YUYV;
1370 pixm.width = RKISP1_DEFAULT_WIDTH;
1371 pixm.height = RKISP1_DEFAULT_HEIGHT;
1372 rkisp1_set_fmt(cap, &pixm);
1373}
1374
1375int rkisp1_capture_devs_register(struct rkisp1_device *rkisp1)
1376{
1377 struct rkisp1_capture *cap;
1378 unsigned int i, j;
1379 int ret;
1380
1381 for (i = 0; i < ARRAY_SIZE(rkisp1->capture_devs); i++) {
1382 rkisp1_capture_init(rkisp1, i);
1383 cap = &rkisp1->capture_devs[i];
1384 cap->rkisp1 = rkisp1;
1385 ret = rkisp1_register_capture(cap);
1386 if (ret)
1387 goto err_unreg_capture_devs;
1388 }
1389
1390 return 0;
1391
1392err_unreg_capture_devs:
1393 for (j = 0; j < i; j++) {
1394 cap = &rkisp1->capture_devs[j];
1395 rkisp1_unregister_capture(cap);
1396 }
1397
1398 return ret;
1399}
1400
