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7#include <linux/console.h>
8#include <linux/module.h>
9#include <linux/slab.h>
10#include <linux/serial_core.h>
11#include <linux/serial_reg.h>
12#include <linux/of_address.h>
13#include <linux/of_irq.h>
14#include <linux/of_platform.h>
15#include <linux/pm_runtime.h>
16#include <linux/clk.h>
17#include <linux/reset.h>
18
19#include "8250.h"
20
21struct of_serial_info {
22 struct clk *clk;
23 struct reset_control *rst;
24 int type;
25 int line;
26};
27
28
29
30
31static int of_platform_serial_setup(struct platform_device *ofdev,
32 int type, struct uart_8250_port *up,
33 struct of_serial_info *info)
34{
35 struct resource resource;
36 struct device_node *np = ofdev->dev.of_node;
37 struct uart_port *port = &up->port;
38 u32 clk, spd, prop;
39 int ret, irq;
40
41 memset(port, 0, sizeof *port);
42
43 pm_runtime_enable(&ofdev->dev);
44 pm_runtime_get_sync(&ofdev->dev);
45
46 if (of_property_read_u32(np, "clock-frequency", &clk)) {
47
48
49 info->clk = devm_clk_get(&ofdev->dev, NULL);
50 if (IS_ERR(info->clk)) {
51 ret = PTR_ERR(info->clk);
52 if (ret != -EPROBE_DEFER)
53 dev_warn(&ofdev->dev,
54 "failed to get clock: %d\n", ret);
55 goto err_pmruntime;
56 }
57
58 ret = clk_prepare_enable(info->clk);
59 if (ret < 0)
60 goto err_pmruntime;
61
62 clk = clk_get_rate(info->clk);
63 }
64
65 if (of_property_read_u32(np, "current-speed", &spd) == 0)
66 port->custom_divisor = clk / (16 * spd);
67
68 ret = of_address_to_resource(np, 0, &resource);
69 if (ret) {
70 dev_warn(&ofdev->dev, "invalid address\n");
71 goto err_unprepare;
72 }
73
74 port->flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF | UPF_FIXED_PORT |
75 UPF_FIXED_TYPE;
76 spin_lock_init(&port->lock);
77
78 if (resource_type(&resource) == IORESOURCE_IO) {
79 port->iotype = UPIO_PORT;
80 port->iobase = resource.start;
81 } else {
82 port->mapbase = resource.start;
83 port->mapsize = resource_size(&resource);
84
85
86 if (of_property_read_u32(np, "reg-offset", &prop) == 0)
87 port->mapbase += prop;
88
89 port->iotype = UPIO_MEM;
90 if (of_property_read_u32(np, "reg-io-width", &prop) == 0) {
91 switch (prop) {
92 case 1:
93 port->iotype = UPIO_MEM;
94 break;
95 case 2:
96 port->iotype = UPIO_MEM16;
97 break;
98 case 4:
99 port->iotype = of_device_is_big_endian(np) ?
100 UPIO_MEM32BE : UPIO_MEM32;
101 break;
102 default:
103 dev_warn(&ofdev->dev, "unsupported reg-io-width (%d)\n",
104 prop);
105 ret = -EINVAL;
106 goto err_unprepare;
107 }
108 }
109 port->flags |= UPF_IOREMAP;
110 }
111
112
113 if (of_device_is_compatible(np, "mrvl,mmp-uart"))
114 port->regshift = 2;
115
116
117 if (of_property_read_u32(np, "reg-shift", &prop) == 0)
118 port->regshift = prop;
119
120
121 if (of_property_read_u32(np, "fifo-size", &prop) == 0)
122 port->fifosize = prop;
123
124
125 ret = of_alias_get_id(np, "serial");
126 if (ret >= 0)
127 port->line = ret;
128
129 irq = of_irq_get(np, 0);
130 if (irq < 0) {
131 if (irq == -EPROBE_DEFER) {
132 ret = -EPROBE_DEFER;
133 goto err_unprepare;
134 }
135
136 irq = 0;
137 }
138
139 port->irq = irq;
140
141 info->rst = devm_reset_control_get_optional_shared(&ofdev->dev, NULL);
142 if (IS_ERR(info->rst)) {
143 ret = PTR_ERR(info->rst);
144 goto err_unprepare;
145 }
146
147 ret = reset_control_deassert(info->rst);
148 if (ret)
149 goto err_unprepare;
150
151 port->type = type;
152 port->uartclk = clk;
153
154 if (of_property_read_bool(np, "no-loopback-test"))
155 port->flags |= UPF_SKIP_TEST;
156
157 port->dev = &ofdev->dev;
158 port->rs485_config = serial8250_em485_config;
159 up->rs485_start_tx = serial8250_em485_start_tx;
160 up->rs485_stop_tx = serial8250_em485_stop_tx;
161
162 switch (type) {
163 case PORT_RT2880:
164 port->iotype = UPIO_AU;
165 break;
166 }
167
168 if (IS_ENABLED(CONFIG_SERIAL_8250_FSL) &&
169 (of_device_is_compatible(np, "fsl,ns16550") ||
170 of_device_is_compatible(np, "fsl,16550-FIFO64"))) {
171 port->handle_irq = fsl8250_handle_irq;
172 port->has_sysrq = IS_ENABLED(CONFIG_SERIAL_8250_CONSOLE);
173 }
174
175 return 0;
176err_unprepare:
177 clk_disable_unprepare(info->clk);
178err_pmruntime:
179 pm_runtime_put_sync(&ofdev->dev);
180 pm_runtime_disable(&ofdev->dev);
181 return ret;
182}
183
184
185
186
187static int of_platform_serial_probe(struct platform_device *ofdev)
188{
189 struct of_serial_info *info;
190 struct uart_8250_port port8250;
191 unsigned int port_type;
192 u32 tx_threshold;
193 int ret;
194
195 port_type = (unsigned long)of_device_get_match_data(&ofdev->dev);
196 if (port_type == PORT_UNKNOWN)
197 return -EINVAL;
198
199 if (of_property_read_bool(ofdev->dev.of_node, "used-by-rtas"))
200 return -EBUSY;
201
202 info = kzalloc(sizeof(*info), GFP_KERNEL);
203 if (info == NULL)
204 return -ENOMEM;
205
206 memset(&port8250, 0, sizeof(port8250));
207 ret = of_platform_serial_setup(ofdev, port_type, &port8250, info);
208 if (ret)
209 goto err_free;
210
211 if (port8250.port.fifosize)
212 port8250.capabilities = UART_CAP_FIFO;
213
214
215 if ((of_property_read_u32(ofdev->dev.of_node, "tx-threshold",
216 &tx_threshold) == 0) &&
217 (tx_threshold < port8250.port.fifosize))
218 port8250.tx_loadsz = port8250.port.fifosize - tx_threshold;
219
220 if (of_property_read_bool(ofdev->dev.of_node, "auto-flow-control"))
221 port8250.capabilities |= UART_CAP_AFE;
222
223 if (of_property_read_u32(ofdev->dev.of_node,
224 "overrun-throttle-ms",
225 &port8250.overrun_backoff_time_ms) != 0)
226 port8250.overrun_backoff_time_ms = 0;
227
228 ret = serial8250_register_8250_port(&port8250);
229 if (ret < 0)
230 goto err_dispose;
231
232 info->type = port_type;
233 info->line = ret;
234 platform_set_drvdata(ofdev, info);
235 return 0;
236err_dispose:
237 irq_dispose_mapping(port8250.port.irq);
238 pm_runtime_put_sync(&ofdev->dev);
239 pm_runtime_disable(&ofdev->dev);
240 clk_disable_unprepare(info->clk);
241err_free:
242 kfree(info);
243 return ret;
244}
245
246
247
248
249static int of_platform_serial_remove(struct platform_device *ofdev)
250{
251 struct of_serial_info *info = platform_get_drvdata(ofdev);
252
253 serial8250_unregister_port(info->line);
254
255 reset_control_assert(info->rst);
256 pm_runtime_put_sync(&ofdev->dev);
257 pm_runtime_disable(&ofdev->dev);
258 clk_disable_unprepare(info->clk);
259 kfree(info);
260 return 0;
261}
262
263#ifdef CONFIG_PM_SLEEP
264static int of_serial_suspend(struct device *dev)
265{
266 struct of_serial_info *info = dev_get_drvdata(dev);
267 struct uart_8250_port *port8250 = serial8250_get_port(info->line);
268 struct uart_port *port = &port8250->port;
269
270 serial8250_suspend_port(info->line);
271
272 if (!uart_console(port) || console_suspend_enabled) {
273 pm_runtime_put_sync(dev);
274 clk_disable_unprepare(info->clk);
275 }
276 return 0;
277}
278
279static int of_serial_resume(struct device *dev)
280{
281 struct of_serial_info *info = dev_get_drvdata(dev);
282 struct uart_8250_port *port8250 = serial8250_get_port(info->line);
283 struct uart_port *port = &port8250->port;
284
285 if (!uart_console(port) || console_suspend_enabled) {
286 pm_runtime_get_sync(dev);
287 clk_prepare_enable(info->clk);
288 }
289
290 serial8250_resume_port(info->line);
291
292 return 0;
293}
294#endif
295static SIMPLE_DEV_PM_OPS(of_serial_pm_ops, of_serial_suspend, of_serial_resume);
296
297
298
299
300static const struct of_device_id of_platform_serial_table[] = {
301 { .compatible = "ns8250", .data = (void *)PORT_8250, },
302 { .compatible = "ns16450", .data = (void *)PORT_16450, },
303 { .compatible = "ns16550a", .data = (void *)PORT_16550A, },
304 { .compatible = "ns16550", .data = (void *)PORT_16550, },
305 { .compatible = "ns16750", .data = (void *)PORT_16750, },
306 { .compatible = "ns16850", .data = (void *)PORT_16850, },
307 { .compatible = "nxp,lpc3220-uart", .data = (void *)PORT_LPC3220, },
308 { .compatible = "ralink,rt2880-uart", .data = (void *)PORT_RT2880, },
309 { .compatible = "intel,xscale-uart", .data = (void *)PORT_XSCALE, },
310 { .compatible = "altr,16550-FIFO32",
311 .data = (void *)PORT_ALTR_16550_F32, },
312 { .compatible = "altr,16550-FIFO64",
313 .data = (void *)PORT_ALTR_16550_F64, },
314 { .compatible = "altr,16550-FIFO128",
315 .data = (void *)PORT_ALTR_16550_F128, },
316 { .compatible = "mediatek,mtk-btif",
317 .data = (void *)PORT_MTK_BTIF, },
318 { .compatible = "mrvl,mmp-uart",
319 .data = (void *)PORT_XSCALE, },
320 { .compatible = "ti,da830-uart", .data = (void *)PORT_DA830, },
321 { .compatible = "nuvoton,npcm750-uart", .data = (void *)PORT_NPCM, },
322 { },
323};
324MODULE_DEVICE_TABLE(of, of_platform_serial_table);
325
326static struct platform_driver of_platform_serial_driver = {
327 .driver = {
328 .name = "of_serial",
329 .of_match_table = of_platform_serial_table,
330 .pm = &of_serial_pm_ops,
331 },
332 .probe = of_platform_serial_probe,
333 .remove = of_platform_serial_remove,
334};
335
336module_platform_driver(of_platform_serial_driver);
337
338MODULE_AUTHOR("Arnd Bergmann <arnd@arndb.de>");
339MODULE_LICENSE("GPL");
340MODULE_DESCRIPTION("Serial Port driver for Open Firmware platform devices");
341
