1/* SPDX-License-Identifier: GPL-2.0+ */ 2/* 3 * PIC32 Integrated Serial Driver. 4 * 5 * Copyright (C) 2015 Microchip Technology, Inc. 6 * 7 * Authors: 8 * Sorin-Andrei Pistirica <andrei.pistirica@microchip.com> 9 */ 10#ifndef __DT_PIC32_UART_H__ 11#define __DT_PIC32_UART_H__ 12 13#define PIC32_UART_DFLT_BRATE (9600) 14#define PIC32_UART_TX_FIFO_DEPTH (8) 15#define PIC32_UART_RX_FIFO_DEPTH (8) 16 17#define PIC32_UART_MODE 0x00 18#define PIC32_UART_STA 0x10 19#define PIC32_UART_TX 0x20 20#define PIC32_UART_RX 0x30 21#define PIC32_UART_BRG 0x40 22 23struct pic32_console_opt { 24 int baud; 25 int parity; 26 int bits; 27 int flow; 28}; 29 30/* struct pic32_sport - pic32 serial port descriptor 31 * @port: uart port descriptor 32 * @idx: port index 33 * @irq_fault: virtual fault interrupt number 34 * @irqflags_fault: flags related to fault irq 35 * @irq_fault_name: irq fault name 36 * @irq_rx: virtual rx interrupt number 37 * @irqflags_rx: flags related to rx irq 38 * @irq_rx_name: irq rx name 39 * @irq_tx: virtual tx interrupt number 40 * @irqflags_tx: : flags related to tx irq 41 * @irq_tx_name: irq tx name 42 * @cts_gpio: clear to send gpio 43 * @dev: device descriptor 44 **/ 45struct pic32_sport { 46 struct uart_port port; 47 struct pic32_console_opt opt; 48 int idx; 49 50 int irq_fault; 51 int irqflags_fault; 52 const char *irq_fault_name; 53 int irq_rx; 54 int irqflags_rx; 55 const char *irq_rx_name; 56 int irq_tx; 57 int irqflags_tx; 58 const char *irq_tx_name; 59 u8 enable_tx_irq; 60 61 bool hw_flow_ctrl; 62 int cts_gpio; 63 64 int ref_clk; 65 struct clk *clk; 66 67 struct device *dev; 68}; 69#define to_pic32_sport(c) container_of(c, struct pic32_sport, port) 70#define pic32_get_port(sport) (&sport->port) 71#define pic32_get_opt(sport) (&sport->opt) 72#define tx_irq_enabled(sport) (sport->enable_tx_irq) 73 74static inline void pic32_uart_writel(struct pic32_sport *sport, 75 u32 reg, u32 val) 76{ 77 struct uart_port *port = pic32_get_port(sport); 78 79 __raw_writel(val, port->membase + reg); 80} 81 82static inline u32 pic32_uart_readl(struct pic32_sport *sport, u32 reg) 83{ 84 struct uart_port *port = pic32_get_port(sport); 85 86 return __raw_readl(port->membase + reg); 87} 88 89/* pic32 uart mode register bits */ 90#define PIC32_UART_MODE_ON BIT(15) 91#define PIC32_UART_MODE_FRZ BIT(14) 92#define PIC32_UART_MODE_SIDL BIT(13) 93#define PIC32_UART_MODE_IREN BIT(12) 94#define PIC32_UART_MODE_RTSMD BIT(11) 95#define PIC32_UART_MODE_RESV1 BIT(10) 96#define PIC32_UART_MODE_UEN1 BIT(9) 97#define PIC32_UART_MODE_UEN0 BIT(8) 98#define PIC32_UART_MODE_WAKE BIT(7) 99#define PIC32_UART_MODE_LPBK BIT(6) 100#define PIC32_UART_MODE_ABAUD BIT(5) 101#define PIC32_UART_MODE_RXINV BIT(4) 102#define PIC32_UART_MODE_BRGH BIT(3) 103#define PIC32_UART_MODE_PDSEL1 BIT(2) 104#define PIC32_UART_MODE_PDSEL0 BIT(1) 105#define PIC32_UART_MODE_STSEL BIT(0) 106 107/* pic32 uart status register bits */ 108#define PIC32_UART_STA_UTXISEL1 BIT(15) 109#define PIC32_UART_STA_UTXISEL0 BIT(14) 110#define PIC32_UART_STA_UTXINV BIT(13) 111#define PIC32_UART_STA_URXEN BIT(12) 112#define PIC32_UART_STA_UTXBRK BIT(11) 113#define PIC32_UART_STA_UTXEN BIT(10) 114#define PIC32_UART_STA_UTXBF BIT(9) 115#define PIC32_UART_STA_TRMT BIT(8) 116#define PIC32_UART_STA_URXISEL1 BIT(7) 117#define PIC32_UART_STA_URXISEL0 BIT(6) 118#define PIC32_UART_STA_ADDEN BIT(5) 119#define PIC32_UART_STA_RIDLE BIT(4) 120#define PIC32_UART_STA_PERR BIT(3) 121#define PIC32_UART_STA_FERR BIT(2) 122#define PIC32_UART_STA_OERR BIT(1) 123#define PIC32_UART_STA_URXDA BIT(0) 124 125#endif /* __DT_PIC32_UART_H__ */ 126