linux/drivers/usb/cdns3/core.h
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   1/* SPDX-License-Identifier: GPL-2.0 */
   2/*
   3 * Cadence USBSS DRD Header File.
   4 *
   5 * Copyright (C) 2017-2018 NXP
   6 * Copyright (C) 2018-2019 Cadence.
   7 *
   8 * Authors: Peter Chen <peter.chen@nxp.com>
   9 *          Pawel Laszczak <pawell@cadence.com>
  10 */
  11#include <linux/usb/otg.h>
  12#include <linux/usb/role.h>
  13
  14#ifndef __LINUX_CDNS3_CORE_H
  15#define __LINUX_CDNS3_CORE_H
  16
  17struct cdns3;
  18
  19/**
  20 * struct cdns3_role_driver - host/gadget role driver
  21 * @start: start this role
  22 * @stop: stop this role
  23 * @suspend: suspend callback for this role
  24 * @resume: resume callback for this role
  25 * @irq: irq handler for this role
  26 * @name: role name string (host/gadget)
  27 * @state: current state
  28 */
  29struct cdns3_role_driver {
  30        int (*start)(struct cdns3 *cdns);
  31        void (*stop)(struct cdns3 *cdns);
  32        int (*suspend)(struct cdns3 *cdns, bool do_wakeup);
  33        int (*resume)(struct cdns3 *cdns, bool hibernated);
  34        const char *name;
  35#define CDNS3_ROLE_STATE_INACTIVE       0
  36#define CDNS3_ROLE_STATE_ACTIVE         1
  37        int state;
  38};
  39
  40#define CDNS3_XHCI_RESOURCES_NUM        2
  41/**
  42 * struct cdns3 - Representation of Cadence USB3 DRD controller.
  43 * @dev: pointer to Cadence device struct
  44 * @xhci_regs: pointer to base of xhci registers
  45 * @xhci_res: the resource for xhci
  46 * @dev_regs: pointer to base of dev registers
  47 * @otg_res: the resource for otg
  48 * @otg_v0_regs: pointer to base of v0 otg registers
  49 * @otg_v1_regs: pointer to base of v1 otg registers
  50 * @otg_regs: pointer to base of otg registers
  51 * @otg_irq: irq number for otg controller
  52 * @dev_irq: irq number for device controller
  53 * @roles: array of supported roles for this controller
  54 * @role: current role
  55 * @host_dev: the child host device pointer for cdns3 core
  56 * @gadget_dev: the child gadget device pointer for cdns3 core
  57 * @usb2_phy: pointer to USB2 PHY
  58 * @usb3_phy: pointer to USB3 PHY
  59 * @mutex: the mutex for concurrent code at driver
  60 * @dr_mode: supported mode of operation it can be only Host, only Device
  61 *           or OTG mode that allow to switch between Device and Host mode.
  62 *           This field based on firmware setting, kernel configuration
  63 *           and hardware configuration.
  64 * @role_sw: pointer to role switch object.
  65 */
  66struct cdns3 {
  67        struct device                   *dev;
  68        void __iomem                    *xhci_regs;
  69        struct resource                 xhci_res[CDNS3_XHCI_RESOURCES_NUM];
  70        struct cdns3_usb_regs __iomem   *dev_regs;
  71
  72        struct resource                 otg_res;
  73        struct cdns3_otg_legacy_regs    *otg_v0_regs;
  74        struct cdns3_otg_regs           *otg_v1_regs;
  75        struct cdns3_otg_common_regs    *otg_regs;
  76#define CDNS3_CONTROLLER_V0     0
  77#define CDNS3_CONTROLLER_V1     1
  78        u32                             version;
  79
  80        int                             otg_irq;
  81        int                             dev_irq;
  82        struct cdns3_role_driver        *roles[USB_ROLE_DEVICE + 1];
  83        enum usb_role                   role;
  84        struct platform_device          *host_dev;
  85        struct cdns3_device             *gadget_dev;
  86        struct phy                      *usb2_phy;
  87        struct phy                      *usb3_phy;
  88        /* mutext used in workqueue*/
  89        struct mutex                    mutex;
  90        enum usb_dr_mode                dr_mode;
  91        struct usb_role_switch          *role_sw;
  92};
  93
  94int cdns3_hw_role_switch(struct cdns3 *cdns);
  95
  96#endif /* __LINUX_CDNS3_CORE_H */
  97