linux/drivers/usb/gadget/udc/s3c2410_udc.c
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   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * linux/drivers/usb/gadget/s3c2410_udc.c
   4 *
   5 * Samsung S3C24xx series on-chip full speed USB device controllers
   6 *
   7 * Copyright (C) 2004-2007 Herbert Pötzl - Arnaud Patard
   8 *      Additional cleanups by Ben Dooks <ben-linux@fluff.org>
   9 */
  10
  11#define pr_fmt(fmt) "s3c2410_udc: " fmt
  12
  13#include <linux/module.h>
  14#include <linux/kernel.h>
  15#include <linux/delay.h>
  16#include <linux/ioport.h>
  17#include <linux/sched.h>
  18#include <linux/slab.h>
  19#include <linux/errno.h>
  20#include <linux/init.h>
  21#include <linux/timer.h>
  22#include <linux/list.h>
  23#include <linux/interrupt.h>
  24#include <linux/platform_device.h>
  25#include <linux/clk.h>
  26#include <linux/gpio.h>
  27#include <linux/prefetch.h>
  28#include <linux/io.h>
  29
  30#include <linux/debugfs.h>
  31#include <linux/seq_file.h>
  32
  33#include <linux/usb.h>
  34#include <linux/usb/gadget.h>
  35
  36#include <asm/byteorder.h>
  37#include <asm/irq.h>
  38#include <asm/unaligned.h>
  39#include <mach/irqs.h>
  40
  41#include <mach/hardware.h>
  42
  43#include <plat/regs-udc.h>
  44#include <linux/platform_data/usb-s3c2410_udc.h>
  45
  46
  47#include "s3c2410_udc.h"
  48
  49#define DRIVER_DESC     "S3C2410 USB Device Controller Gadget"
  50#define DRIVER_AUTHOR   "Herbert Pötzl <herbert@13thfloor.at>, " \
  51                        "Arnaud Patard <arnaud.patard@rtp-net.org>"
  52
  53static const char               gadget_name[] = "s3c2410_udc";
  54static const char               driver_desc[] = DRIVER_DESC;
  55
  56static struct s3c2410_udc       *the_controller;
  57static struct clk               *udc_clock;
  58static struct clk               *usb_bus_clock;
  59static void __iomem             *base_addr;
  60static u64                      rsrc_start;
  61static u64                      rsrc_len;
  62static struct dentry            *s3c2410_udc_debugfs_root;
  63
  64static inline u32 udc_read(u32 reg)
  65{
  66        return readb(base_addr + reg);
  67}
  68
  69static inline void udc_write(u32 value, u32 reg)
  70{
  71        writeb(value, base_addr + reg);
  72}
  73
  74static inline void udc_writeb(void __iomem *base, u32 value, u32 reg)
  75{
  76        writeb(value, base + reg);
  77}
  78
  79static struct s3c2410_udc_mach_info *udc_info;
  80
  81/*************************** DEBUG FUNCTION ***************************/
  82#define DEBUG_NORMAL    1
  83#define DEBUG_VERBOSE   2
  84
  85#ifdef CONFIG_USB_S3C2410_DEBUG
  86#define USB_S3C2410_DEBUG_LEVEL 0
  87
  88static uint32_t s3c2410_ticks = 0;
  89
  90__printf(2, 3)
  91static void dprintk(int level, const char *fmt, ...)
  92{
  93        static long prevticks;
  94        static int invocation;
  95        struct va_format vaf;
  96        va_list args;
  97
  98        if (level > USB_S3C2410_DEBUG_LEVEL)
  99                return;
 100
 101        va_start(args, fmt);
 102
 103        vaf.fmt = fmt;
 104        vaf.va = &args;
 105
 106        if (s3c2410_ticks != prevticks) {
 107                prevticks = s3c2410_ticks;
 108                invocation = 0;
 109        }
 110
 111        pr_debug("%1lu.%02d USB: %pV", prevticks, invocation++, &vaf);
 112
 113        va_end(args);
 114}
 115#else
 116__printf(2, 3)
 117static void dprintk(int level, const char *fmt, ...)
 118{
 119}
 120#endif
 121
 122static int s3c2410_udc_debugfs_show(struct seq_file *m, void *p)
 123{
 124        u32 addr_reg, pwr_reg, ep_int_reg, usb_int_reg;
 125        u32 ep_int_en_reg, usb_int_en_reg, ep0_csr;
 126        u32 ep1_i_csr1, ep1_i_csr2, ep1_o_csr1, ep1_o_csr2;
 127        u32 ep2_i_csr1, ep2_i_csr2, ep2_o_csr1, ep2_o_csr2;
 128
 129        addr_reg       = udc_read(S3C2410_UDC_FUNC_ADDR_REG);
 130        pwr_reg        = udc_read(S3C2410_UDC_PWR_REG);
 131        ep_int_reg     = udc_read(S3C2410_UDC_EP_INT_REG);
 132        usb_int_reg    = udc_read(S3C2410_UDC_USB_INT_REG);
 133        ep_int_en_reg  = udc_read(S3C2410_UDC_EP_INT_EN_REG);
 134        usb_int_en_reg = udc_read(S3C2410_UDC_USB_INT_EN_REG);
 135        udc_write(0, S3C2410_UDC_INDEX_REG);
 136        ep0_csr        = udc_read(S3C2410_UDC_IN_CSR1_REG);
 137        udc_write(1, S3C2410_UDC_INDEX_REG);
 138        ep1_i_csr1     = udc_read(S3C2410_UDC_IN_CSR1_REG);
 139        ep1_i_csr2     = udc_read(S3C2410_UDC_IN_CSR2_REG);
 140        ep1_o_csr1     = udc_read(S3C2410_UDC_IN_CSR1_REG);
 141        ep1_o_csr2     = udc_read(S3C2410_UDC_IN_CSR2_REG);
 142        udc_write(2, S3C2410_UDC_INDEX_REG);
 143        ep2_i_csr1     = udc_read(S3C2410_UDC_IN_CSR1_REG);
 144        ep2_i_csr2     = udc_read(S3C2410_UDC_IN_CSR2_REG);
 145        ep2_o_csr1     = udc_read(S3C2410_UDC_IN_CSR1_REG);
 146        ep2_o_csr2     = udc_read(S3C2410_UDC_IN_CSR2_REG);
 147
 148        seq_printf(m, "FUNC_ADDR_REG  : 0x%04X\n"
 149                 "PWR_REG        : 0x%04X\n"
 150                 "EP_INT_REG     : 0x%04X\n"
 151                 "USB_INT_REG    : 0x%04X\n"
 152                 "EP_INT_EN_REG  : 0x%04X\n"
 153                 "USB_INT_EN_REG : 0x%04X\n"
 154                 "EP0_CSR        : 0x%04X\n"
 155                 "EP1_I_CSR1     : 0x%04X\n"
 156                 "EP1_I_CSR2     : 0x%04X\n"
 157                 "EP1_O_CSR1     : 0x%04X\n"
 158                 "EP1_O_CSR2     : 0x%04X\n"
 159                 "EP2_I_CSR1     : 0x%04X\n"
 160                 "EP2_I_CSR2     : 0x%04X\n"
 161                 "EP2_O_CSR1     : 0x%04X\n"
 162                 "EP2_O_CSR2     : 0x%04X\n",
 163                        addr_reg, pwr_reg, ep_int_reg, usb_int_reg,
 164                        ep_int_en_reg, usb_int_en_reg, ep0_csr,
 165                        ep1_i_csr1, ep1_i_csr2, ep1_o_csr1, ep1_o_csr2,
 166                        ep2_i_csr1, ep2_i_csr2, ep2_o_csr1, ep2_o_csr2
 167                );
 168
 169        return 0;
 170}
 171DEFINE_SHOW_ATTRIBUTE(s3c2410_udc_debugfs);
 172
 173/* io macros */
 174
 175static inline void s3c2410_udc_clear_ep0_opr(void __iomem *base)
 176{
 177        udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 178        udc_writeb(base, S3C2410_UDC_EP0_CSR_SOPKTRDY,
 179                        S3C2410_UDC_EP0_CSR_REG);
 180}
 181
 182static inline void s3c2410_udc_clear_ep0_sst(void __iomem *base)
 183{
 184        udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 185        writeb(0x00, base + S3C2410_UDC_EP0_CSR_REG);
 186}
 187
 188static inline void s3c2410_udc_clear_ep0_se(void __iomem *base)
 189{
 190        udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 191        udc_writeb(base, S3C2410_UDC_EP0_CSR_SSE, S3C2410_UDC_EP0_CSR_REG);
 192}
 193
 194static inline void s3c2410_udc_set_ep0_ipr(void __iomem *base)
 195{
 196        udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 197        udc_writeb(base, S3C2410_UDC_EP0_CSR_IPKRDY, S3C2410_UDC_EP0_CSR_REG);
 198}
 199
 200static inline void s3c2410_udc_set_ep0_de(void __iomem *base)
 201{
 202        udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 203        udc_writeb(base, S3C2410_UDC_EP0_CSR_DE, S3C2410_UDC_EP0_CSR_REG);
 204}
 205
 206inline void s3c2410_udc_set_ep0_ss(void __iomem *b)
 207{
 208        udc_writeb(b, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 209        udc_writeb(b, S3C2410_UDC_EP0_CSR_SENDSTL, S3C2410_UDC_EP0_CSR_REG);
 210}
 211
 212static inline void s3c2410_udc_set_ep0_de_out(void __iomem *base)
 213{
 214        udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 215
 216        udc_writeb(base, (S3C2410_UDC_EP0_CSR_SOPKTRDY
 217                                | S3C2410_UDC_EP0_CSR_DE),
 218                        S3C2410_UDC_EP0_CSR_REG);
 219}
 220
 221static inline void s3c2410_udc_set_ep0_de_in(void __iomem *base)
 222{
 223        udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 224        udc_writeb(base, (S3C2410_UDC_EP0_CSR_IPKRDY
 225                        | S3C2410_UDC_EP0_CSR_DE),
 226                S3C2410_UDC_EP0_CSR_REG);
 227}
 228
 229/*------------------------- I/O ----------------------------------*/
 230
 231/*
 232 *      s3c2410_udc_done
 233 */
 234static void s3c2410_udc_done(struct s3c2410_ep *ep,
 235                struct s3c2410_request *req, int status)
 236{
 237        unsigned halted = ep->halted;
 238
 239        list_del_init(&req->queue);
 240
 241        if (likely(req->req.status == -EINPROGRESS))
 242                req->req.status = status;
 243        else
 244                status = req->req.status;
 245
 246        ep->halted = 1;
 247        usb_gadget_giveback_request(&ep->ep, &req->req);
 248        ep->halted = halted;
 249}
 250
 251static void s3c2410_udc_nuke(struct s3c2410_udc *udc,
 252                struct s3c2410_ep *ep, int status)
 253{
 254        while (!list_empty(&ep->queue)) {
 255                struct s3c2410_request *req;
 256                req = list_entry(ep->queue.next, struct s3c2410_request,
 257                                queue);
 258                s3c2410_udc_done(ep, req, status);
 259        }
 260}
 261
 262static inline int s3c2410_udc_fifo_count_out(void)
 263{
 264        int tmp;
 265
 266        tmp = udc_read(S3C2410_UDC_OUT_FIFO_CNT2_REG) << 8;
 267        tmp |= udc_read(S3C2410_UDC_OUT_FIFO_CNT1_REG);
 268        return tmp;
 269}
 270
 271/*
 272 *      s3c2410_udc_write_packet
 273 */
 274static inline int s3c2410_udc_write_packet(int fifo,
 275                struct s3c2410_request *req,
 276                unsigned max)
 277{
 278        unsigned len = min(req->req.length - req->req.actual, max);
 279        u8 *buf = req->req.buf + req->req.actual;
 280
 281        prefetch(buf);
 282
 283        dprintk(DEBUG_VERBOSE, "%s %d %d %d %d\n", __func__,
 284                req->req.actual, req->req.length, len, req->req.actual + len);
 285
 286        req->req.actual += len;
 287
 288        udelay(5);
 289        writesb(base_addr + fifo, buf, len);
 290        return len;
 291}
 292
 293/*
 294 *      s3c2410_udc_write_fifo
 295 *
 296 * return:  0 = still running, 1 = completed, negative = errno
 297 */
 298static int s3c2410_udc_write_fifo(struct s3c2410_ep *ep,
 299                struct s3c2410_request *req)
 300{
 301        unsigned        count;
 302        int             is_last;
 303        u32             idx;
 304        int             fifo_reg;
 305        u32             ep_csr;
 306
 307        idx = ep->bEndpointAddress & 0x7F;
 308        switch (idx) {
 309        default:
 310                idx = 0;
 311                fallthrough;
 312        case 0:
 313                fifo_reg = S3C2410_UDC_EP0_FIFO_REG;
 314                break;
 315        case 1:
 316                fifo_reg = S3C2410_UDC_EP1_FIFO_REG;
 317                break;
 318        case 2:
 319                fifo_reg = S3C2410_UDC_EP2_FIFO_REG;
 320                break;
 321        case 3:
 322                fifo_reg = S3C2410_UDC_EP3_FIFO_REG;
 323                break;
 324        case 4:
 325                fifo_reg = S3C2410_UDC_EP4_FIFO_REG;
 326                break;
 327        }
 328
 329        count = s3c2410_udc_write_packet(fifo_reg, req, ep->ep.maxpacket);
 330
 331        /* last packet is often short (sometimes a zlp) */
 332        if (count != ep->ep.maxpacket)
 333                is_last = 1;
 334        else if (req->req.length != req->req.actual || req->req.zero)
 335                is_last = 0;
 336        else
 337                is_last = 2;
 338
 339        /* Only ep0 debug messages are interesting */
 340        if (idx == 0)
 341                dprintk(DEBUG_NORMAL,
 342                        "Written ep%d %d.%d of %d b [last %d,z %d]\n",
 343                        idx, count, req->req.actual, req->req.length,
 344                        is_last, req->req.zero);
 345
 346        if (is_last) {
 347                /* The order is important. It prevents sending 2 packets
 348                 * at the same time */
 349
 350                if (idx == 0) {
 351                        /* Reset signal => no need to say 'data sent' */
 352                        if (!(udc_read(S3C2410_UDC_USB_INT_REG)
 353                                        & S3C2410_UDC_USBINT_RESET))
 354                                s3c2410_udc_set_ep0_de_in(base_addr);
 355                        ep->dev->ep0state = EP0_IDLE;
 356                } else {
 357                        udc_write(idx, S3C2410_UDC_INDEX_REG);
 358                        ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
 359                        udc_write(idx, S3C2410_UDC_INDEX_REG);
 360                        udc_write(ep_csr | S3C2410_UDC_ICSR1_PKTRDY,
 361                                        S3C2410_UDC_IN_CSR1_REG);
 362                }
 363
 364                s3c2410_udc_done(ep, req, 0);
 365                is_last = 1;
 366        } else {
 367                if (idx == 0) {
 368                        /* Reset signal => no need to say 'data sent' */
 369                        if (!(udc_read(S3C2410_UDC_USB_INT_REG)
 370                                        & S3C2410_UDC_USBINT_RESET))
 371                                s3c2410_udc_set_ep0_ipr(base_addr);
 372                } else {
 373                        udc_write(idx, S3C2410_UDC_INDEX_REG);
 374                        ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
 375                        udc_write(idx, S3C2410_UDC_INDEX_REG);
 376                        udc_write(ep_csr | S3C2410_UDC_ICSR1_PKTRDY,
 377                                        S3C2410_UDC_IN_CSR1_REG);
 378                }
 379        }
 380
 381        return is_last;
 382}
 383
 384static inline int s3c2410_udc_read_packet(int fifo, u8 *buf,
 385                struct s3c2410_request *req, unsigned avail)
 386{
 387        unsigned len;
 388
 389        len = min(req->req.length - req->req.actual, avail);
 390        req->req.actual += len;
 391
 392        readsb(fifo + base_addr, buf, len);
 393        return len;
 394}
 395
 396/*
 397 * return:  0 = still running, 1 = queue empty, negative = errno
 398 */
 399static int s3c2410_udc_read_fifo(struct s3c2410_ep *ep,
 400                                 struct s3c2410_request *req)
 401{
 402        u8              *buf;
 403        u32             ep_csr;
 404        unsigned        bufferspace;
 405        int             is_last = 1;
 406        unsigned        avail;
 407        int             fifo_count = 0;
 408        u32             idx;
 409        int             fifo_reg;
 410
 411        idx = ep->bEndpointAddress & 0x7F;
 412
 413        switch (idx) {
 414        default:
 415                idx = 0;
 416                fallthrough;
 417        case 0:
 418                fifo_reg = S3C2410_UDC_EP0_FIFO_REG;
 419                break;
 420        case 1:
 421                fifo_reg = S3C2410_UDC_EP1_FIFO_REG;
 422                break;
 423        case 2:
 424                fifo_reg = S3C2410_UDC_EP2_FIFO_REG;
 425                break;
 426        case 3:
 427                fifo_reg = S3C2410_UDC_EP3_FIFO_REG;
 428                break;
 429        case 4:
 430                fifo_reg = S3C2410_UDC_EP4_FIFO_REG;
 431                break;
 432        }
 433
 434        if (!req->req.length)
 435                return 1;
 436
 437        buf = req->req.buf + req->req.actual;
 438        bufferspace = req->req.length - req->req.actual;
 439        if (!bufferspace) {
 440                dprintk(DEBUG_NORMAL, "%s: buffer full!\n", __func__);
 441                return -1;
 442        }
 443
 444        udc_write(idx, S3C2410_UDC_INDEX_REG);
 445
 446        fifo_count = s3c2410_udc_fifo_count_out();
 447        dprintk(DEBUG_NORMAL, "%s fifo count : %d\n", __func__, fifo_count);
 448
 449        if (fifo_count > ep->ep.maxpacket)
 450                avail = ep->ep.maxpacket;
 451        else
 452                avail = fifo_count;
 453
 454        fifo_count = s3c2410_udc_read_packet(fifo_reg, buf, req, avail);
 455
 456        /* checking this with ep0 is not accurate as we already
 457         * read a control request
 458         **/
 459        if (idx != 0 && fifo_count < ep->ep.maxpacket) {
 460                is_last = 1;
 461                /* overflowed this request?  flush extra data */
 462                if (fifo_count != avail)
 463                        req->req.status = -EOVERFLOW;
 464        } else {
 465                is_last = (req->req.length <= req->req.actual) ? 1 : 0;
 466        }
 467
 468        udc_write(idx, S3C2410_UDC_INDEX_REG);
 469        fifo_count = s3c2410_udc_fifo_count_out();
 470
 471        /* Only ep0 debug messages are interesting */
 472        if (idx == 0)
 473                dprintk(DEBUG_VERBOSE, "%s fifo count : %d [last %d]\n",
 474                        __func__, fifo_count, is_last);
 475
 476        if (is_last) {
 477                if (idx == 0) {
 478                        s3c2410_udc_set_ep0_de_out(base_addr);
 479                        ep->dev->ep0state = EP0_IDLE;
 480                } else {
 481                        udc_write(idx, S3C2410_UDC_INDEX_REG);
 482                        ep_csr = udc_read(S3C2410_UDC_OUT_CSR1_REG);
 483                        udc_write(idx, S3C2410_UDC_INDEX_REG);
 484                        udc_write(ep_csr & ~S3C2410_UDC_OCSR1_PKTRDY,
 485                                        S3C2410_UDC_OUT_CSR1_REG);
 486                }
 487
 488                s3c2410_udc_done(ep, req, 0);
 489        } else {
 490                if (idx == 0) {
 491                        s3c2410_udc_clear_ep0_opr(base_addr);
 492                } else {
 493                        udc_write(idx, S3C2410_UDC_INDEX_REG);
 494                        ep_csr = udc_read(S3C2410_UDC_OUT_CSR1_REG);
 495                        udc_write(idx, S3C2410_UDC_INDEX_REG);
 496                        udc_write(ep_csr & ~S3C2410_UDC_OCSR1_PKTRDY,
 497                                        S3C2410_UDC_OUT_CSR1_REG);
 498                }
 499        }
 500
 501        return is_last;
 502}
 503
 504static int s3c2410_udc_read_fifo_crq(struct usb_ctrlrequest *crq)
 505{
 506        unsigned char *outbuf = (unsigned char *)crq;
 507        int bytes_read = 0;
 508
 509        udc_write(0, S3C2410_UDC_INDEX_REG);
 510
 511        bytes_read = s3c2410_udc_fifo_count_out();
 512
 513        dprintk(DEBUG_NORMAL, "%s: fifo_count=%d\n", __func__, bytes_read);
 514
 515        if (bytes_read > sizeof(struct usb_ctrlrequest))
 516                bytes_read = sizeof(struct usb_ctrlrequest);
 517
 518        readsb(S3C2410_UDC_EP0_FIFO_REG + base_addr, outbuf, bytes_read);
 519
 520        dprintk(DEBUG_VERBOSE, "%s: len=%d %02x:%02x {%x,%x,%x}\n", __func__,
 521                bytes_read, crq->bRequest, crq->bRequestType,
 522                crq->wValue, crq->wIndex, crq->wLength);
 523
 524        return bytes_read;
 525}
 526
 527static int s3c2410_udc_get_status(struct s3c2410_udc *dev,
 528                struct usb_ctrlrequest *crq)
 529{
 530        u16 status = 0;
 531        u8 ep_num = crq->wIndex & 0x7F;
 532        u8 is_in = crq->wIndex & USB_DIR_IN;
 533
 534        switch (crq->bRequestType & USB_RECIP_MASK) {
 535        case USB_RECIP_INTERFACE:
 536                break;
 537
 538        case USB_RECIP_DEVICE:
 539                status = dev->devstatus;
 540                break;
 541
 542        case USB_RECIP_ENDPOINT:
 543                if (ep_num > 4 || crq->wLength > 2)
 544                        return 1;
 545
 546                if (ep_num == 0) {
 547                        udc_write(0, S3C2410_UDC_INDEX_REG);
 548                        status = udc_read(S3C2410_UDC_IN_CSR1_REG);
 549                        status = status & S3C2410_UDC_EP0_CSR_SENDSTL;
 550                } else {
 551                        udc_write(ep_num, S3C2410_UDC_INDEX_REG);
 552                        if (is_in) {
 553                                status = udc_read(S3C2410_UDC_IN_CSR1_REG);
 554                                status = status & S3C2410_UDC_ICSR1_SENDSTL;
 555                        } else {
 556                                status = udc_read(S3C2410_UDC_OUT_CSR1_REG);
 557                                status = status & S3C2410_UDC_OCSR1_SENDSTL;
 558                        }
 559                }
 560
 561                status = status ? 1 : 0;
 562                break;
 563
 564        default:
 565                return 1;
 566        }
 567
 568        /* Seems to be needed to get it working. ouch :( */
 569        udelay(5);
 570        udc_write(status & 0xFF, S3C2410_UDC_EP0_FIFO_REG);
 571        udc_write(status >> 8, S3C2410_UDC_EP0_FIFO_REG);
 572        s3c2410_udc_set_ep0_de_in(base_addr);
 573
 574        return 0;
 575}
 576/*------------------------- usb state machine -------------------------------*/
 577static int s3c2410_udc_set_halt(struct usb_ep *_ep, int value);
 578
 579static void s3c2410_udc_handle_ep0_idle(struct s3c2410_udc *dev,
 580                                        struct s3c2410_ep *ep,
 581                                        struct usb_ctrlrequest *crq,
 582                                        u32 ep0csr)
 583{
 584        int len, ret, tmp;
 585
 586        /* start control request? */
 587        if (!(ep0csr & S3C2410_UDC_EP0_CSR_OPKRDY))
 588                return;
 589
 590        s3c2410_udc_nuke(dev, ep, -EPROTO);
 591
 592        len = s3c2410_udc_read_fifo_crq(crq);
 593        if (len != sizeof(*crq)) {
 594                dprintk(DEBUG_NORMAL, "setup begin: fifo READ ERROR"
 595                        " wanted %d bytes got %d. Stalling out...\n",
 596                        sizeof(*crq), len);
 597                s3c2410_udc_set_ep0_ss(base_addr);
 598                return;
 599        }
 600
 601        dprintk(DEBUG_NORMAL, "bRequest = %d bRequestType %d wLength = %d\n",
 602                crq->bRequest, crq->bRequestType, crq->wLength);
 603
 604        /* cope with automagic for some standard requests. */
 605        dev->req_std = (crq->bRequestType & USB_TYPE_MASK)
 606                == USB_TYPE_STANDARD;
 607        dev->req_config = 0;
 608        dev->req_pending = 1;
 609
 610        switch (crq->bRequest) {
 611        case USB_REQ_SET_CONFIGURATION:
 612                dprintk(DEBUG_NORMAL, "USB_REQ_SET_CONFIGURATION ...\n");
 613
 614                if (crq->bRequestType == USB_RECIP_DEVICE) {
 615                        dev->req_config = 1;
 616                        s3c2410_udc_set_ep0_de_out(base_addr);
 617                }
 618                break;
 619
 620        case USB_REQ_SET_INTERFACE:
 621                dprintk(DEBUG_NORMAL, "USB_REQ_SET_INTERFACE ...\n");
 622
 623                if (crq->bRequestType == USB_RECIP_INTERFACE) {
 624                        dev->req_config = 1;
 625                        s3c2410_udc_set_ep0_de_out(base_addr);
 626                }
 627                break;
 628
 629        case USB_REQ_SET_ADDRESS:
 630                dprintk(DEBUG_NORMAL, "USB_REQ_SET_ADDRESS ...\n");
 631
 632                if (crq->bRequestType == USB_RECIP_DEVICE) {
 633                        tmp = crq->wValue & 0x7F;
 634                        dev->address = tmp;
 635                        udc_write((tmp | S3C2410_UDC_FUNCADDR_UPDATE),
 636                                        S3C2410_UDC_FUNC_ADDR_REG);
 637                        s3c2410_udc_set_ep0_de_out(base_addr);
 638                        return;
 639                }
 640                break;
 641
 642        case USB_REQ_GET_STATUS:
 643                dprintk(DEBUG_NORMAL, "USB_REQ_GET_STATUS ...\n");
 644                s3c2410_udc_clear_ep0_opr(base_addr);
 645
 646                if (dev->req_std) {
 647                        if (!s3c2410_udc_get_status(dev, crq))
 648                                return;
 649                }
 650                break;
 651
 652        case USB_REQ_CLEAR_FEATURE:
 653                s3c2410_udc_clear_ep0_opr(base_addr);
 654
 655                if (crq->bRequestType != USB_RECIP_ENDPOINT)
 656                        break;
 657
 658                if (crq->wValue != USB_ENDPOINT_HALT || crq->wLength != 0)
 659                        break;
 660
 661                s3c2410_udc_set_halt(&dev->ep[crq->wIndex & 0x7f].ep, 0);
 662                s3c2410_udc_set_ep0_de_out(base_addr);
 663                return;
 664
 665        case USB_REQ_SET_FEATURE:
 666                s3c2410_udc_clear_ep0_opr(base_addr);
 667
 668                if (crq->bRequestType != USB_RECIP_ENDPOINT)
 669                        break;
 670
 671                if (crq->wValue != USB_ENDPOINT_HALT || crq->wLength != 0)
 672                        break;
 673
 674                s3c2410_udc_set_halt(&dev->ep[crq->wIndex & 0x7f].ep, 1);
 675                s3c2410_udc_set_ep0_de_out(base_addr);
 676                return;
 677
 678        default:
 679                s3c2410_udc_clear_ep0_opr(base_addr);
 680                break;
 681        }
 682
 683        if (crq->bRequestType & USB_DIR_IN)
 684                dev->ep0state = EP0_IN_DATA_PHASE;
 685        else
 686                dev->ep0state = EP0_OUT_DATA_PHASE;
 687
 688        if (!dev->driver)
 689                return;
 690
 691        /* deliver the request to the gadget driver */
 692        ret = dev->driver->setup(&dev->gadget, crq);
 693        if (ret < 0) {
 694                if (dev->req_config) {
 695                        dprintk(DEBUG_NORMAL, "config change %02x fail %d?\n",
 696                                crq->bRequest, ret);
 697                        return;
 698                }
 699
 700                if (ret == -EOPNOTSUPP)
 701                        dprintk(DEBUG_NORMAL, "Operation not supported\n");
 702                else
 703                        dprintk(DEBUG_NORMAL,
 704                                "dev->driver->setup failed. (%d)\n", ret);
 705
 706                udelay(5);
 707                s3c2410_udc_set_ep0_ss(base_addr);
 708                s3c2410_udc_set_ep0_de_out(base_addr);
 709                dev->ep0state = EP0_IDLE;
 710                /* deferred i/o == no response yet */
 711        } else if (dev->req_pending) {
 712                dprintk(DEBUG_VERBOSE, "dev->req_pending... what now?\n");
 713                dev->req_pending = 0;
 714        }
 715
 716        dprintk(DEBUG_VERBOSE, "ep0state %s\n", ep0states[dev->ep0state]);
 717}
 718
 719static void s3c2410_udc_handle_ep0(struct s3c2410_udc *dev)
 720{
 721        u32                     ep0csr;
 722        struct s3c2410_ep       *ep = &dev->ep[0];
 723        struct s3c2410_request  *req;
 724        struct usb_ctrlrequest  crq;
 725
 726        if (list_empty(&ep->queue))
 727                req = NULL;
 728        else
 729                req = list_entry(ep->queue.next, struct s3c2410_request, queue);
 730
 731        /* We make the assumption that S3C2410_UDC_IN_CSR1_REG equal to
 732         * S3C2410_UDC_EP0_CSR_REG when index is zero */
 733
 734        udc_write(0, S3C2410_UDC_INDEX_REG);
 735        ep0csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
 736
 737        dprintk(DEBUG_NORMAL, "ep0csr %x ep0state %s\n",
 738                ep0csr, ep0states[dev->ep0state]);
 739
 740        /* clear stall status */
 741        if (ep0csr & S3C2410_UDC_EP0_CSR_SENTSTL) {
 742                s3c2410_udc_nuke(dev, ep, -EPIPE);
 743                dprintk(DEBUG_NORMAL, "... clear SENT_STALL ...\n");
 744                s3c2410_udc_clear_ep0_sst(base_addr);
 745                dev->ep0state = EP0_IDLE;
 746                return;
 747        }
 748
 749        /* clear setup end */
 750        if (ep0csr & S3C2410_UDC_EP0_CSR_SE) {
 751                dprintk(DEBUG_NORMAL, "... serviced SETUP_END ...\n");
 752                s3c2410_udc_nuke(dev, ep, 0);
 753                s3c2410_udc_clear_ep0_se(base_addr);
 754                dev->ep0state = EP0_IDLE;
 755        }
 756
 757        switch (dev->ep0state) {
 758        case EP0_IDLE:
 759                s3c2410_udc_handle_ep0_idle(dev, ep, &crq, ep0csr);
 760                break;
 761
 762        case EP0_IN_DATA_PHASE:                 /* GET_DESCRIPTOR etc */
 763                dprintk(DEBUG_NORMAL, "EP0_IN_DATA_PHASE ... what now?\n");
 764                if (!(ep0csr & S3C2410_UDC_EP0_CSR_IPKRDY) && req)
 765                        s3c2410_udc_write_fifo(ep, req);
 766                break;
 767
 768        case EP0_OUT_DATA_PHASE:                /* SET_DESCRIPTOR etc */
 769                dprintk(DEBUG_NORMAL, "EP0_OUT_DATA_PHASE ... what now?\n");
 770                if ((ep0csr & S3C2410_UDC_EP0_CSR_OPKRDY) && req)
 771                        s3c2410_udc_read_fifo(ep, req);
 772                break;
 773
 774        case EP0_END_XFER:
 775                dprintk(DEBUG_NORMAL, "EP0_END_XFER ... what now?\n");
 776                dev->ep0state = EP0_IDLE;
 777                break;
 778
 779        case EP0_STALL:
 780                dprintk(DEBUG_NORMAL, "EP0_STALL ... what now?\n");
 781                dev->ep0state = EP0_IDLE;
 782                break;
 783        }
 784}
 785
 786/*
 787 *      handle_ep - Manage I/O endpoints
 788 */
 789
 790static void s3c2410_udc_handle_ep(struct s3c2410_ep *ep)
 791{
 792        struct s3c2410_request  *req;
 793        int                     is_in = ep->bEndpointAddress & USB_DIR_IN;
 794        u32                     ep_csr1;
 795        u32                     idx;
 796
 797        if (likely(!list_empty(&ep->queue)))
 798                req = list_entry(ep->queue.next,
 799                                struct s3c2410_request, queue);
 800        else
 801                req = NULL;
 802
 803        idx = ep->bEndpointAddress & 0x7F;
 804
 805        if (is_in) {
 806                udc_write(idx, S3C2410_UDC_INDEX_REG);
 807                ep_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
 808                dprintk(DEBUG_VERBOSE, "ep%01d write csr:%02x %d\n",
 809                        idx, ep_csr1, req ? 1 : 0);
 810
 811                if (ep_csr1 & S3C2410_UDC_ICSR1_SENTSTL) {
 812                        dprintk(DEBUG_VERBOSE, "st\n");
 813                        udc_write(idx, S3C2410_UDC_INDEX_REG);
 814                        udc_write(ep_csr1 & ~S3C2410_UDC_ICSR1_SENTSTL,
 815                                        S3C2410_UDC_IN_CSR1_REG);
 816                        return;
 817                }
 818
 819                if (!(ep_csr1 & S3C2410_UDC_ICSR1_PKTRDY) && req)
 820                        s3c2410_udc_write_fifo(ep, req);
 821        } else {
 822                udc_write(idx, S3C2410_UDC_INDEX_REG);
 823                ep_csr1 = udc_read(S3C2410_UDC_OUT_CSR1_REG);
 824                dprintk(DEBUG_VERBOSE, "ep%01d rd csr:%02x\n", idx, ep_csr1);
 825
 826                if (ep_csr1 & S3C2410_UDC_OCSR1_SENTSTL) {
 827                        udc_write(idx, S3C2410_UDC_INDEX_REG);
 828                        udc_write(ep_csr1 & ~S3C2410_UDC_OCSR1_SENTSTL,
 829                                        S3C2410_UDC_OUT_CSR1_REG);
 830                        return;
 831                }
 832
 833                if ((ep_csr1 & S3C2410_UDC_OCSR1_PKTRDY) && req)
 834                        s3c2410_udc_read_fifo(ep, req);
 835        }
 836}
 837
 838#include <mach/regs-irq.h>
 839
 840/*
 841 *      s3c2410_udc_irq - interrupt handler
 842 */
 843static irqreturn_t s3c2410_udc_irq(int dummy, void *_dev)
 844{
 845        struct s3c2410_udc *dev = _dev;
 846        int usb_status;
 847        int usbd_status;
 848        int pwr_reg;
 849        int ep0csr;
 850        int i;
 851        u32 idx, idx2;
 852        unsigned long flags;
 853
 854        spin_lock_irqsave(&dev->lock, flags);
 855
 856        /* Driver connected ? */
 857        if (!dev->driver) {
 858                /* Clear interrupts */
 859                udc_write(udc_read(S3C2410_UDC_USB_INT_REG),
 860                                S3C2410_UDC_USB_INT_REG);
 861                udc_write(udc_read(S3C2410_UDC_EP_INT_REG),
 862                                S3C2410_UDC_EP_INT_REG);
 863        }
 864
 865        /* Save index */
 866        idx = udc_read(S3C2410_UDC_INDEX_REG);
 867
 868        /* Read status registers */
 869        usb_status = udc_read(S3C2410_UDC_USB_INT_REG);
 870        usbd_status = udc_read(S3C2410_UDC_EP_INT_REG);
 871        pwr_reg = udc_read(S3C2410_UDC_PWR_REG);
 872
 873        udc_writeb(base_addr, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 874        ep0csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
 875
 876        dprintk(DEBUG_NORMAL, "usbs=%02x, usbds=%02x, pwr=%02x ep0csr=%02x\n",
 877                usb_status, usbd_status, pwr_reg, ep0csr);
 878
 879        /*
 880         * Now, handle interrupts. There's two types :
 881         * - Reset, Resume, Suspend coming -> usb_int_reg
 882         * - EP -> ep_int_reg
 883         */
 884
 885        /* RESET */
 886        if (usb_status & S3C2410_UDC_USBINT_RESET) {
 887                /* two kind of reset :
 888                 * - reset start -> pwr reg = 8
 889                 * - reset end   -> pwr reg = 0
 890                 **/
 891                dprintk(DEBUG_NORMAL, "USB reset csr %x pwr %x\n",
 892                        ep0csr, pwr_reg);
 893
 894                dev->gadget.speed = USB_SPEED_UNKNOWN;
 895                udc_write(0x00, S3C2410_UDC_INDEX_REG);
 896                udc_write((dev->ep[0].ep.maxpacket & 0x7ff) >> 3,
 897                                S3C2410_UDC_MAXP_REG);
 898                dev->address = 0;
 899
 900                dev->ep0state = EP0_IDLE;
 901                dev->gadget.speed = USB_SPEED_FULL;
 902
 903                /* clear interrupt */
 904                udc_write(S3C2410_UDC_USBINT_RESET,
 905                                S3C2410_UDC_USB_INT_REG);
 906
 907                udc_write(idx, S3C2410_UDC_INDEX_REG);
 908                spin_unlock_irqrestore(&dev->lock, flags);
 909                return IRQ_HANDLED;
 910        }
 911
 912        /* RESUME */
 913        if (usb_status & S3C2410_UDC_USBINT_RESUME) {
 914                dprintk(DEBUG_NORMAL, "USB resume\n");
 915
 916                /* clear interrupt */
 917                udc_write(S3C2410_UDC_USBINT_RESUME,
 918                                S3C2410_UDC_USB_INT_REG);
 919
 920                if (dev->gadget.speed != USB_SPEED_UNKNOWN
 921                                && dev->driver
 922                                && dev->driver->resume)
 923                        dev->driver->resume(&dev->gadget);
 924        }
 925
 926        /* SUSPEND */
 927        if (usb_status & S3C2410_UDC_USBINT_SUSPEND) {
 928                dprintk(DEBUG_NORMAL, "USB suspend\n");
 929
 930                /* clear interrupt */
 931                udc_write(S3C2410_UDC_USBINT_SUSPEND,
 932                                S3C2410_UDC_USB_INT_REG);
 933
 934                if (dev->gadget.speed != USB_SPEED_UNKNOWN
 935                                && dev->driver
 936                                && dev->driver->suspend)
 937                        dev->driver->suspend(&dev->gadget);
 938
 939                dev->ep0state = EP0_IDLE;
 940        }
 941
 942        /* EP */
 943        /* control traffic */
 944        /* check on ep0csr != 0 is not a good idea as clearing in_pkt_ready
 945         * generate an interrupt
 946         */
 947        if (usbd_status & S3C2410_UDC_INT_EP0) {
 948                dprintk(DEBUG_VERBOSE, "USB ep0 irq\n");
 949                /* Clear the interrupt bit by setting it to 1 */
 950                udc_write(S3C2410_UDC_INT_EP0, S3C2410_UDC_EP_INT_REG);
 951                s3c2410_udc_handle_ep0(dev);
 952        }
 953
 954        /* endpoint data transfers */
 955        for (i = 1; i < S3C2410_ENDPOINTS; i++) {
 956                u32 tmp = 1 << i;
 957                if (usbd_status & tmp) {
 958                        dprintk(DEBUG_VERBOSE, "USB ep%d irq\n", i);
 959
 960                        /* Clear the interrupt bit by setting it to 1 */
 961                        udc_write(tmp, S3C2410_UDC_EP_INT_REG);
 962                        s3c2410_udc_handle_ep(&dev->ep[i]);
 963                }
 964        }
 965
 966        /* what else causes this interrupt? a receive! who is it? */
 967        if (!usb_status && !usbd_status && !pwr_reg && !ep0csr) {
 968                for (i = 1; i < S3C2410_ENDPOINTS; i++) {
 969                        idx2 = udc_read(S3C2410_UDC_INDEX_REG);
 970                        udc_write(i, S3C2410_UDC_INDEX_REG);
 971
 972                        if (udc_read(S3C2410_UDC_OUT_CSR1_REG) & 0x1)
 973                                s3c2410_udc_handle_ep(&dev->ep[i]);
 974
 975                        /* restore index */
 976                        udc_write(idx2, S3C2410_UDC_INDEX_REG);
 977                }
 978        }
 979
 980        dprintk(DEBUG_VERBOSE, "irq: %d s3c2410_udc_done.\n", IRQ_USBD);
 981
 982        /* Restore old index */
 983        udc_write(idx, S3C2410_UDC_INDEX_REG);
 984
 985        spin_unlock_irqrestore(&dev->lock, flags);
 986
 987        return IRQ_HANDLED;
 988}
 989/*------------------------- s3c2410_ep_ops ----------------------------------*/
 990
 991static inline struct s3c2410_ep *to_s3c2410_ep(struct usb_ep *ep)
 992{
 993        return container_of(ep, struct s3c2410_ep, ep);
 994}
 995
 996static inline struct s3c2410_udc *to_s3c2410_udc(struct usb_gadget *gadget)
 997{
 998        return container_of(gadget, struct s3c2410_udc, gadget);
 999}
1000
1001static inline struct s3c2410_request *to_s3c2410_req(struct usb_request *req)
1002{
1003        return container_of(req, struct s3c2410_request, req);
1004}
1005
1006/*
1007 *      s3c2410_udc_ep_enable
1008 */
1009static int s3c2410_udc_ep_enable(struct usb_ep *_ep,
1010                                 const struct usb_endpoint_descriptor *desc)
1011{
1012        struct s3c2410_udc      *dev;
1013        struct s3c2410_ep       *ep;
1014        u32                     max, tmp;
1015        unsigned long           flags;
1016        u32                     csr1, csr2;
1017        u32                     int_en_reg;
1018
1019        ep = to_s3c2410_ep(_ep);
1020
1021        if (!_ep || !desc
1022                        || _ep->name == ep0name
1023                        || desc->bDescriptorType != USB_DT_ENDPOINT)
1024                return -EINVAL;
1025
1026        dev = ep->dev;
1027        if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)
1028                return -ESHUTDOWN;
1029
1030        max = usb_endpoint_maxp(desc);
1031
1032        local_irq_save(flags);
1033        _ep->maxpacket = max;
1034        ep->ep.desc = desc;
1035        ep->halted = 0;
1036        ep->bEndpointAddress = desc->bEndpointAddress;
1037
1038        /* set max packet */
1039        udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1040        udc_write(max >> 3, S3C2410_UDC_MAXP_REG);
1041
1042        /* set type, direction, address; reset fifo counters */
1043        if (desc->bEndpointAddress & USB_DIR_IN) {
1044                csr1 = S3C2410_UDC_ICSR1_FFLUSH|S3C2410_UDC_ICSR1_CLRDT;
1045                csr2 = S3C2410_UDC_ICSR2_MODEIN|S3C2410_UDC_ICSR2_DMAIEN;
1046
1047                udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1048                udc_write(csr1, S3C2410_UDC_IN_CSR1_REG);
1049                udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1050                udc_write(csr2, S3C2410_UDC_IN_CSR2_REG);
1051        } else {
1052                /* don't flush in fifo or it will cause endpoint interrupt */
1053                csr1 = S3C2410_UDC_ICSR1_CLRDT;
1054                csr2 = S3C2410_UDC_ICSR2_DMAIEN;
1055
1056                udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1057                udc_write(csr1, S3C2410_UDC_IN_CSR1_REG);
1058                udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1059                udc_write(csr2, S3C2410_UDC_IN_CSR2_REG);
1060
1061                csr1 = S3C2410_UDC_OCSR1_FFLUSH | S3C2410_UDC_OCSR1_CLRDT;
1062                csr2 = S3C2410_UDC_OCSR2_DMAIEN;
1063
1064                udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1065                udc_write(csr1, S3C2410_UDC_OUT_CSR1_REG);
1066                udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1067                udc_write(csr2, S3C2410_UDC_OUT_CSR2_REG);
1068        }
1069
1070        /* enable irqs */
1071        int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG);
1072        udc_write(int_en_reg | (1 << ep->num), S3C2410_UDC_EP_INT_EN_REG);
1073
1074        /* print some debug message */
1075        tmp = desc->bEndpointAddress;
1076        dprintk(DEBUG_NORMAL, "enable %s(%d) ep%x%s-blk max %02x\n",
1077                 _ep->name, ep->num, tmp,
1078                 desc->bEndpointAddress & USB_DIR_IN ? "in" : "out", max);
1079
1080        local_irq_restore(flags);
1081        s3c2410_udc_set_halt(_ep, 0);
1082
1083        return 0;
1084}
1085
1086/*
1087 * s3c2410_udc_ep_disable
1088 */
1089static int s3c2410_udc_ep_disable(struct usb_ep *_ep)
1090{
1091        struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1092        unsigned long flags;
1093        u32 int_en_reg;
1094
1095        if (!_ep || !ep->ep.desc) {
1096                dprintk(DEBUG_NORMAL, "%s not enabled\n",
1097                        _ep ? ep->ep.name : NULL);
1098                return -EINVAL;
1099        }
1100
1101        local_irq_save(flags);
1102
1103        dprintk(DEBUG_NORMAL, "ep_disable: %s\n", _ep->name);
1104
1105        ep->ep.desc = NULL;
1106        ep->halted = 1;
1107
1108        s3c2410_udc_nuke(ep->dev, ep, -ESHUTDOWN);
1109
1110        /* disable irqs */
1111        int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG);
1112        udc_write(int_en_reg & ~(1<<ep->num), S3C2410_UDC_EP_INT_EN_REG);
1113
1114        local_irq_restore(flags);
1115
1116        dprintk(DEBUG_NORMAL, "%s disabled\n", _ep->name);
1117
1118        return 0;
1119}
1120
1121/*
1122 * s3c2410_udc_alloc_request
1123 */
1124static struct usb_request *
1125s3c2410_udc_alloc_request(struct usb_ep *_ep, gfp_t mem_flags)
1126{
1127        struct s3c2410_request *req;
1128
1129        dprintk(DEBUG_VERBOSE, "%s(%p,%d)\n", __func__, _ep, mem_flags);
1130
1131        if (!_ep)
1132                return NULL;
1133
1134        req = kzalloc(sizeof(struct s3c2410_request), mem_flags);
1135        if (!req)
1136                return NULL;
1137
1138        INIT_LIST_HEAD(&req->queue);
1139        return &req->req;
1140}
1141
1142/*
1143 * s3c2410_udc_free_request
1144 */
1145static void
1146s3c2410_udc_free_request(struct usb_ep *_ep, struct usb_request *_req)
1147{
1148        struct s3c2410_ep       *ep = to_s3c2410_ep(_ep);
1149        struct s3c2410_request  *req = to_s3c2410_req(_req);
1150
1151        dprintk(DEBUG_VERBOSE, "%s(%p,%p)\n", __func__, _ep, _req);
1152
1153        if (!ep || !_req || (!ep->ep.desc && _ep->name != ep0name))
1154                return;
1155
1156        WARN_ON(!list_empty(&req->queue));
1157        kfree(req);
1158}
1159
1160/*
1161 *      s3c2410_udc_queue
1162 */
1163static int s3c2410_udc_queue(struct usb_ep *_ep, struct usb_request *_req,
1164                gfp_t gfp_flags)
1165{
1166        struct s3c2410_request  *req = to_s3c2410_req(_req);
1167        struct s3c2410_ep       *ep = to_s3c2410_ep(_ep);
1168        struct s3c2410_udc      *dev;
1169        u32                     ep_csr = 0;
1170        int                     fifo_count = 0;
1171        unsigned long           flags;
1172
1173        if (unlikely(!_ep || (!ep->ep.desc && ep->ep.name != ep0name))) {
1174                dprintk(DEBUG_NORMAL, "%s: invalid args\n", __func__);
1175                return -EINVAL;
1176        }
1177
1178        dev = ep->dev;
1179        if (unlikely(!dev->driver
1180                        || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
1181                return -ESHUTDOWN;
1182        }
1183
1184        local_irq_save(flags);
1185
1186        if (unlikely(!_req || !_req->complete
1187                        || !_req->buf || !list_empty(&req->queue))) {
1188                if (!_req)
1189                        dprintk(DEBUG_NORMAL, "%s: 1 X X X\n", __func__);
1190                else {
1191                        dprintk(DEBUG_NORMAL, "%s: 0 %01d %01d %01d\n",
1192                                __func__, !_req->complete, !_req->buf,
1193                                !list_empty(&req->queue));
1194                }
1195
1196                local_irq_restore(flags);
1197                return -EINVAL;
1198        }
1199
1200        _req->status = -EINPROGRESS;
1201        _req->actual = 0;
1202
1203        dprintk(DEBUG_VERBOSE, "%s: ep%x len %d\n",
1204                 __func__, ep->bEndpointAddress, _req->length);
1205
1206        if (ep->bEndpointAddress) {
1207                udc_write(ep->bEndpointAddress & 0x7F, S3C2410_UDC_INDEX_REG);
1208
1209                ep_csr = udc_read((ep->bEndpointAddress & USB_DIR_IN)
1210                                ? S3C2410_UDC_IN_CSR1_REG
1211                                : S3C2410_UDC_OUT_CSR1_REG);
1212                fifo_count = s3c2410_udc_fifo_count_out();
1213        } else {
1214                udc_write(0, S3C2410_UDC_INDEX_REG);
1215                ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
1216                fifo_count = s3c2410_udc_fifo_count_out();
1217        }
1218
1219        /* kickstart this i/o queue? */
1220        if (list_empty(&ep->queue) && !ep->halted) {
1221                if (ep->bEndpointAddress == 0 /* ep0 */) {
1222                        switch (dev->ep0state) {
1223                        case EP0_IN_DATA_PHASE:
1224                                if (!(ep_csr&S3C2410_UDC_EP0_CSR_IPKRDY)
1225                                                && s3c2410_udc_write_fifo(ep,
1226                                                        req)) {
1227                                        dev->ep0state = EP0_IDLE;
1228                                        req = NULL;
1229                                }
1230                                break;
1231
1232                        case EP0_OUT_DATA_PHASE:
1233                                if ((!_req->length)
1234                                        || ((ep_csr & S3C2410_UDC_OCSR1_PKTRDY)
1235                                                && s3c2410_udc_read_fifo(ep,
1236                                                        req))) {
1237                                        dev->ep0state = EP0_IDLE;
1238                                        req = NULL;
1239                                }
1240                                break;
1241
1242                        default:
1243                                local_irq_restore(flags);
1244                                return -EL2HLT;
1245                        }
1246                } else if ((ep->bEndpointAddress & USB_DIR_IN) != 0
1247                                && (!(ep_csr&S3C2410_UDC_OCSR1_PKTRDY))
1248                                && s3c2410_udc_write_fifo(ep, req)) {
1249                        req = NULL;
1250                } else if ((ep_csr & S3C2410_UDC_OCSR1_PKTRDY)
1251                                && fifo_count
1252                                && s3c2410_udc_read_fifo(ep, req)) {
1253                        req = NULL;
1254                }
1255        }
1256
1257        /* pio or dma irq handler advances the queue. */
1258        if (likely(req))
1259                list_add_tail(&req->queue, &ep->queue);
1260
1261        local_irq_restore(flags);
1262
1263        dprintk(DEBUG_VERBOSE, "%s ok\n", __func__);
1264        return 0;
1265}
1266
1267/*
1268 *      s3c2410_udc_dequeue
1269 */
1270static int s3c2410_udc_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1271{
1272        struct s3c2410_ep       *ep = to_s3c2410_ep(_ep);
1273        struct s3c2410_udc      *udc;
1274        int                     retval = -EINVAL;
1275        unsigned long           flags;
1276        struct s3c2410_request  *req = NULL;
1277
1278        dprintk(DEBUG_VERBOSE, "%s(%p,%p)\n", __func__, _ep, _req);
1279
1280        if (!the_controller->driver)
1281                return -ESHUTDOWN;
1282
1283        if (!_ep || !_req)
1284                return retval;
1285
1286        udc = to_s3c2410_udc(ep->gadget);
1287
1288        local_irq_save(flags);
1289
1290        list_for_each_entry(req, &ep->queue, queue) {
1291                if (&req->req == _req) {
1292                        list_del_init(&req->queue);
1293                        _req->status = -ECONNRESET;
1294                        retval = 0;
1295                        break;
1296                }
1297        }
1298
1299        if (retval == 0) {
1300                dprintk(DEBUG_VERBOSE,
1301                        "dequeued req %p from %s, len %d buf %p\n",
1302                        req, _ep->name, _req->length, _req->buf);
1303
1304                s3c2410_udc_done(ep, req, -ECONNRESET);
1305        }
1306
1307        local_irq_restore(flags);
1308        return retval;
1309}
1310
1311/*
1312 * s3c2410_udc_set_halt
1313 */
1314static int s3c2410_udc_set_halt(struct usb_ep *_ep, int value)
1315{
1316        struct s3c2410_ep       *ep = to_s3c2410_ep(_ep);
1317        u32                     ep_csr = 0;
1318        unsigned long           flags;
1319        u32                     idx;
1320
1321        if (unlikely(!_ep || (!ep->ep.desc && ep->ep.name != ep0name))) {
1322                dprintk(DEBUG_NORMAL, "%s: inval 2\n", __func__);
1323                return -EINVAL;
1324        }
1325
1326        local_irq_save(flags);
1327
1328        idx = ep->bEndpointAddress & 0x7F;
1329
1330        if (idx == 0) {
1331                s3c2410_udc_set_ep0_ss(base_addr);
1332                s3c2410_udc_set_ep0_de_out(base_addr);
1333        } else {
1334                udc_write(idx, S3C2410_UDC_INDEX_REG);
1335                ep_csr = udc_read((ep->bEndpointAddress & USB_DIR_IN)
1336                                ? S3C2410_UDC_IN_CSR1_REG
1337                                : S3C2410_UDC_OUT_CSR1_REG);
1338
1339                if ((ep->bEndpointAddress & USB_DIR_IN) != 0) {
1340                        if (value)
1341                                udc_write(ep_csr | S3C2410_UDC_ICSR1_SENDSTL,
1342                                        S3C2410_UDC_IN_CSR1_REG);
1343                        else {
1344                                ep_csr &= ~S3C2410_UDC_ICSR1_SENDSTL;
1345                                udc_write(ep_csr, S3C2410_UDC_IN_CSR1_REG);
1346                                ep_csr |= S3C2410_UDC_ICSR1_CLRDT;
1347                                udc_write(ep_csr, S3C2410_UDC_IN_CSR1_REG);
1348                        }
1349                } else {
1350                        if (value)
1351                                udc_write(ep_csr | S3C2410_UDC_OCSR1_SENDSTL,
1352                                        S3C2410_UDC_OUT_CSR1_REG);
1353                        else {
1354                                ep_csr &= ~S3C2410_UDC_OCSR1_SENDSTL;
1355                                udc_write(ep_csr, S3C2410_UDC_OUT_CSR1_REG);
1356                                ep_csr |= S3C2410_UDC_OCSR1_CLRDT;
1357                                udc_write(ep_csr, S3C2410_UDC_OUT_CSR1_REG);
1358                        }
1359                }
1360        }
1361
1362        ep->halted = value ? 1 : 0;
1363        local_irq_restore(flags);
1364
1365        return 0;
1366}
1367
1368static const struct usb_ep_ops s3c2410_ep_ops = {
1369        .enable         = s3c2410_udc_ep_enable,
1370        .disable        = s3c2410_udc_ep_disable,
1371
1372        .alloc_request  = s3c2410_udc_alloc_request,
1373        .free_request   = s3c2410_udc_free_request,
1374
1375        .queue          = s3c2410_udc_queue,
1376        .dequeue        = s3c2410_udc_dequeue,
1377
1378        .set_halt       = s3c2410_udc_set_halt,
1379};
1380
1381/*------------------------- usb_gadget_ops ----------------------------------*/
1382
1383/*
1384 *      s3c2410_udc_get_frame
1385 */
1386static int s3c2410_udc_get_frame(struct usb_gadget *_gadget)
1387{
1388        int tmp;
1389
1390        dprintk(DEBUG_VERBOSE, "%s()\n", __func__);
1391
1392        tmp = udc_read(S3C2410_UDC_FRAME_NUM2_REG) << 8;
1393        tmp |= udc_read(S3C2410_UDC_FRAME_NUM1_REG);
1394        return tmp;
1395}
1396
1397/*
1398 *      s3c2410_udc_wakeup
1399 */
1400static int s3c2410_udc_wakeup(struct usb_gadget *_gadget)
1401{
1402        dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1403        return 0;
1404}
1405
1406/*
1407 *      s3c2410_udc_set_selfpowered
1408 */
1409static int s3c2410_udc_set_selfpowered(struct usb_gadget *gadget, int value)
1410{
1411        struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1412
1413        dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1414
1415        gadget->is_selfpowered = (value != 0);
1416        if (value)
1417                udc->devstatus |= (1 << USB_DEVICE_SELF_POWERED);
1418        else
1419                udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
1420
1421        return 0;
1422}
1423
1424static void s3c2410_udc_disable(struct s3c2410_udc *dev);
1425static void s3c2410_udc_enable(struct s3c2410_udc *dev);
1426
1427static int s3c2410_udc_set_pullup(struct s3c2410_udc *udc, int is_on)
1428{
1429        dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1430
1431        if (udc_info && (udc_info->udc_command ||
1432                gpio_is_valid(udc_info->pullup_pin))) {
1433
1434                if (is_on)
1435                        s3c2410_udc_enable(udc);
1436                else {
1437                        if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
1438                                if (udc->driver && udc->driver->disconnect)
1439                                        udc->driver->disconnect(&udc->gadget);
1440
1441                        }
1442                        s3c2410_udc_disable(udc);
1443                }
1444        } else {
1445                return -EOPNOTSUPP;
1446        }
1447
1448        return 0;
1449}
1450
1451static int s3c2410_udc_vbus_session(struct usb_gadget *gadget, int is_active)
1452{
1453        struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1454
1455        dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1456
1457        udc->vbus = (is_active != 0);
1458        s3c2410_udc_set_pullup(udc, is_active);
1459        return 0;
1460}
1461
1462static int s3c2410_udc_pullup(struct usb_gadget *gadget, int is_on)
1463{
1464        struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1465
1466        dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1467
1468        s3c2410_udc_set_pullup(udc, is_on);
1469        return 0;
1470}
1471
1472static irqreturn_t s3c2410_udc_vbus_irq(int irq, void *_dev)
1473{
1474        struct s3c2410_udc      *dev = _dev;
1475        unsigned int            value;
1476
1477        dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1478
1479        value = gpio_get_value(udc_info->vbus_pin) ? 1 : 0;
1480        if (udc_info->vbus_pin_inverted)
1481                value = !value;
1482
1483        if (value != dev->vbus)
1484                s3c2410_udc_vbus_session(&dev->gadget, value);
1485
1486        return IRQ_HANDLED;
1487}
1488
1489static int s3c2410_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
1490{
1491        dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1492
1493        if (udc_info && udc_info->vbus_draw) {
1494                udc_info->vbus_draw(ma);
1495                return 0;
1496        }
1497
1498        return -ENOTSUPP;
1499}
1500
1501static int s3c2410_udc_start(struct usb_gadget *g,
1502                struct usb_gadget_driver *driver);
1503static int s3c2410_udc_stop(struct usb_gadget *g);
1504
1505static const struct usb_gadget_ops s3c2410_ops = {
1506        .get_frame              = s3c2410_udc_get_frame,
1507        .wakeup                 = s3c2410_udc_wakeup,
1508        .set_selfpowered        = s3c2410_udc_set_selfpowered,
1509        .pullup                 = s3c2410_udc_pullup,
1510        .vbus_session           = s3c2410_udc_vbus_session,
1511        .vbus_draw              = s3c2410_vbus_draw,
1512        .udc_start              = s3c2410_udc_start,
1513        .udc_stop               = s3c2410_udc_stop,
1514};
1515
1516static void s3c2410_udc_command(enum s3c2410_udc_cmd_e cmd)
1517{
1518        if (!udc_info)
1519                return;
1520
1521        if (udc_info->udc_command) {
1522                udc_info->udc_command(cmd);
1523        } else if (gpio_is_valid(udc_info->pullup_pin)) {
1524                int value;
1525
1526                switch (cmd) {
1527                case S3C2410_UDC_P_ENABLE:
1528                        value = 1;
1529                        break;
1530                case S3C2410_UDC_P_DISABLE:
1531                        value = 0;
1532                        break;
1533                default:
1534                        return;
1535                }
1536                value ^= udc_info->pullup_pin_inverted;
1537
1538                gpio_set_value(udc_info->pullup_pin, value);
1539        }
1540}
1541
1542/*------------------------- gadget driver handling---------------------------*/
1543/*
1544 * s3c2410_udc_disable
1545 */
1546static void s3c2410_udc_disable(struct s3c2410_udc *dev)
1547{
1548        dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1549
1550        /* Disable all interrupts */
1551        udc_write(0x00, S3C2410_UDC_USB_INT_EN_REG);
1552        udc_write(0x00, S3C2410_UDC_EP_INT_EN_REG);
1553
1554        /* Clear the interrupt registers */
1555        udc_write(S3C2410_UDC_USBINT_RESET
1556                                | S3C2410_UDC_USBINT_RESUME
1557                                | S3C2410_UDC_USBINT_SUSPEND,
1558                        S3C2410_UDC_USB_INT_REG);
1559
1560        udc_write(0x1F, S3C2410_UDC_EP_INT_REG);
1561
1562        /* Good bye, cruel world */
1563        s3c2410_udc_command(S3C2410_UDC_P_DISABLE);
1564
1565        /* Set speed to unknown */
1566        dev->gadget.speed = USB_SPEED_UNKNOWN;
1567}
1568
1569/*
1570 * s3c2410_udc_reinit
1571 */
1572static void s3c2410_udc_reinit(struct s3c2410_udc *dev)
1573{
1574        u32 i;
1575
1576        /* device/ep0 records init */
1577        INIT_LIST_HEAD(&dev->gadget.ep_list);
1578        INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
1579        dev->ep0state = EP0_IDLE;
1580
1581        for (i = 0; i < S3C2410_ENDPOINTS; i++) {
1582                struct s3c2410_ep *ep = &dev->ep[i];
1583
1584                if (i != 0)
1585                        list_add_tail(&ep->ep.ep_list, &dev->gadget.ep_list);
1586
1587                ep->dev = dev;
1588                ep->ep.desc = NULL;
1589                ep->halted = 0;
1590                INIT_LIST_HEAD(&ep->queue);
1591                usb_ep_set_maxpacket_limit(&ep->ep, ep->ep.maxpacket);
1592        }
1593}
1594
1595/*
1596 * s3c2410_udc_enable
1597 */
1598static void s3c2410_udc_enable(struct s3c2410_udc *dev)
1599{
1600        int i;
1601
1602        dprintk(DEBUG_NORMAL, "s3c2410_udc_enable called\n");
1603
1604        /* dev->gadget.speed = USB_SPEED_UNKNOWN; */
1605        dev->gadget.speed = USB_SPEED_FULL;
1606
1607        /* Set MAXP for all endpoints */
1608        for (i = 0; i < S3C2410_ENDPOINTS; i++) {
1609                udc_write(i, S3C2410_UDC_INDEX_REG);
1610                udc_write((dev->ep[i].ep.maxpacket & 0x7ff) >> 3,
1611                                S3C2410_UDC_MAXP_REG);
1612        }
1613
1614        /* Set default power state */
1615        udc_write(DEFAULT_POWER_STATE, S3C2410_UDC_PWR_REG);
1616
1617        /* Enable reset and suspend interrupt interrupts */
1618        udc_write(S3C2410_UDC_USBINT_RESET | S3C2410_UDC_USBINT_SUSPEND,
1619                        S3C2410_UDC_USB_INT_EN_REG);
1620
1621        /* Enable ep0 interrupt */
1622        udc_write(S3C2410_UDC_INT_EP0, S3C2410_UDC_EP_INT_EN_REG);
1623
1624        /* time to say "hello, world" */
1625        s3c2410_udc_command(S3C2410_UDC_P_ENABLE);
1626}
1627
1628static int s3c2410_udc_start(struct usb_gadget *g,
1629                struct usb_gadget_driver *driver)
1630{
1631        struct s3c2410_udc *udc = to_s3c2410(g);
1632
1633        dprintk(DEBUG_NORMAL, "%s() '%s'\n", __func__, driver->driver.name);
1634
1635        /* Hook the driver */
1636        udc->driver = driver;
1637
1638        /* Enable udc */
1639        s3c2410_udc_enable(udc);
1640
1641        return 0;
1642}
1643
1644static int s3c2410_udc_stop(struct usb_gadget *g)
1645{
1646        struct s3c2410_udc *udc = to_s3c2410(g);
1647
1648        udc->driver = NULL;
1649
1650        /* Disable udc */
1651        s3c2410_udc_disable(udc);
1652
1653        return 0;
1654}
1655
1656/*---------------------------------------------------------------------------*/
1657static struct s3c2410_udc memory = {
1658        .gadget = {
1659                .ops            = &s3c2410_ops,
1660                .ep0            = &memory.ep[0].ep,
1661                .name           = gadget_name,
1662                .dev = {
1663                        .init_name      = "gadget",
1664                },
1665        },
1666
1667        /* control endpoint */
1668        .ep[0] = {
1669                .num            = 0,
1670                .ep = {
1671                        .name           = ep0name,
1672                        .ops            = &s3c2410_ep_ops,
1673                        .maxpacket      = EP0_FIFO_SIZE,
1674                        .caps           = USB_EP_CAPS(USB_EP_CAPS_TYPE_CONTROL,
1675                                                USB_EP_CAPS_DIR_ALL),
1676                },
1677                .dev            = &memory,
1678        },
1679
1680        /* first group of endpoints */
1681        .ep[1] = {
1682                .num            = 1,
1683                .ep = {
1684                        .name           = "ep1-bulk",
1685                        .ops            = &s3c2410_ep_ops,
1686                        .maxpacket      = EP_FIFO_SIZE,
1687                        .caps           = USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK,
1688                                                USB_EP_CAPS_DIR_ALL),
1689                },
1690                .dev            = &memory,
1691                .fifo_size      = EP_FIFO_SIZE,
1692                .bEndpointAddress = 1,
1693                .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1694        },
1695        .ep[2] = {
1696                .num            = 2,
1697                .ep = {
1698                        .name           = "ep2-bulk",
1699                        .ops            = &s3c2410_ep_ops,
1700                        .maxpacket      = EP_FIFO_SIZE,
1701                        .caps           = USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK,
1702                                                USB_EP_CAPS_DIR_ALL),
1703                },
1704                .dev            = &memory,
1705                .fifo_size      = EP_FIFO_SIZE,
1706                .bEndpointAddress = 2,
1707                .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1708        },
1709        .ep[3] = {
1710                .num            = 3,
1711                .ep = {
1712                        .name           = "ep3-bulk",
1713                        .ops            = &s3c2410_ep_ops,
1714                        .maxpacket      = EP_FIFO_SIZE,
1715                        .caps           = USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK,
1716                                                USB_EP_CAPS_DIR_ALL),
1717                },
1718                .dev            = &memory,
1719                .fifo_size      = EP_FIFO_SIZE,
1720                .bEndpointAddress = 3,
1721                .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1722        },
1723        .ep[4] = {
1724                .num            = 4,
1725                .ep = {
1726                        .name           = "ep4-bulk",
1727                        .ops            = &s3c2410_ep_ops,
1728                        .maxpacket      = EP_FIFO_SIZE,
1729                        .caps           = USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK,
1730                                                USB_EP_CAPS_DIR_ALL),
1731                },
1732                .dev            = &memory,
1733                .fifo_size      = EP_FIFO_SIZE,
1734                .bEndpointAddress = 4,
1735                .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1736        }
1737
1738};
1739
1740/*
1741 *      probe - binds to the platform device
1742 */
1743static int s3c2410_udc_probe(struct platform_device *pdev)
1744{
1745        struct s3c2410_udc *udc = &memory;
1746        struct device *dev = &pdev->dev;
1747        int retval;
1748        int irq;
1749
1750        dev_dbg(dev, "%s()\n", __func__);
1751
1752        usb_bus_clock = clk_get(NULL, "usb-bus-gadget");
1753        if (IS_ERR(usb_bus_clock)) {
1754                dev_err(dev, "failed to get usb bus clock source\n");
1755                return PTR_ERR(usb_bus_clock);
1756        }
1757
1758        clk_prepare_enable(usb_bus_clock);
1759
1760        udc_clock = clk_get(NULL, "usb-device");
1761        if (IS_ERR(udc_clock)) {
1762                dev_err(dev, "failed to get udc clock source\n");
1763                return PTR_ERR(udc_clock);
1764        }
1765
1766        clk_prepare_enable(udc_clock);
1767
1768        mdelay(10);
1769
1770        dev_dbg(dev, "got and enabled clocks\n");
1771
1772        if (strncmp(pdev->name, "s3c2440", 7) == 0) {
1773                dev_info(dev, "S3C2440: increasing FIFO to 128 bytes\n");
1774                memory.ep[1].fifo_size = S3C2440_EP_FIFO_SIZE;
1775                memory.ep[2].fifo_size = S3C2440_EP_FIFO_SIZE;
1776                memory.ep[3].fifo_size = S3C2440_EP_FIFO_SIZE;
1777                memory.ep[4].fifo_size = S3C2440_EP_FIFO_SIZE;
1778        }
1779
1780        spin_lock_init(&udc->lock);
1781        udc_info = dev_get_platdata(&pdev->dev);
1782
1783        rsrc_start = S3C2410_PA_USBDEV;
1784        rsrc_len   = S3C24XX_SZ_USBDEV;
1785
1786        if (!request_mem_region(rsrc_start, rsrc_len, gadget_name))
1787                return -EBUSY;
1788
1789        base_addr = ioremap(rsrc_start, rsrc_len);
1790        if (!base_addr) {
1791                retval = -ENOMEM;
1792                goto err_mem;
1793        }
1794
1795        the_controller = udc;
1796        platform_set_drvdata(pdev, udc);
1797
1798        s3c2410_udc_disable(udc);
1799        s3c2410_udc_reinit(udc);
1800
1801        /* irq setup after old hardware state is cleaned up */
1802        retval = request_irq(IRQ_USBD, s3c2410_udc_irq,
1803                             0, gadget_name, udc);
1804
1805        if (retval != 0) {
1806                dev_err(dev, "cannot get irq %i, err %d\n", IRQ_USBD, retval);
1807                retval = -EBUSY;
1808                goto err_map;
1809        }
1810
1811        dev_dbg(dev, "got irq %i\n", IRQ_USBD);
1812
1813        if (udc_info && udc_info->vbus_pin > 0) {
1814                retval = gpio_request(udc_info->vbus_pin, "udc vbus");
1815                if (retval < 0) {
1816                        dev_err(dev, "cannot claim vbus pin\n");
1817                        goto err_int;
1818                }
1819
1820                irq = gpio_to_irq(udc_info->vbus_pin);
1821                if (irq < 0) {
1822                        dev_err(dev, "no irq for gpio vbus pin\n");
1823                        retval = irq;
1824                        goto err_gpio_claim;
1825                }
1826
1827                retval = request_irq(irq, s3c2410_udc_vbus_irq,
1828                                     IRQF_TRIGGER_RISING
1829                                     | IRQF_TRIGGER_FALLING | IRQF_SHARED,
1830                                     gadget_name, udc);
1831
1832                if (retval != 0) {
1833                        dev_err(dev, "can't get vbus irq %d, err %d\n",
1834                                irq, retval);
1835                        retval = -EBUSY;
1836                        goto err_gpio_claim;
1837                }
1838
1839                dev_dbg(dev, "got irq %i\n", irq);
1840        } else {
1841                udc->vbus = 1;
1842        }
1843
1844        if (udc_info && !udc_info->udc_command &&
1845                gpio_is_valid(udc_info->pullup_pin)) {
1846
1847                retval = gpio_request_one(udc_info->pullup_pin,
1848                                udc_info->vbus_pin_inverted ?
1849                                GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW,
1850                                "udc pullup");
1851                if (retval)
1852                        goto err_vbus_irq;
1853        }
1854
1855        retval = usb_add_gadget_udc(&pdev->dev, &udc->gadget);
1856        if (retval)
1857                goto err_add_udc;
1858
1859        udc->regs_info = debugfs_create_file("registers", S_IRUGO,
1860                                             s3c2410_udc_debugfs_root, udc,
1861                                             &s3c2410_udc_debugfs_fops);
1862
1863        dev_dbg(dev, "probe ok\n");
1864
1865        return 0;
1866
1867err_add_udc:
1868        if (udc_info && !udc_info->udc_command &&
1869                        gpio_is_valid(udc_info->pullup_pin))
1870                gpio_free(udc_info->pullup_pin);
1871err_vbus_irq:
1872        if (udc_info && udc_info->vbus_pin > 0)
1873                free_irq(gpio_to_irq(udc_info->vbus_pin), udc);
1874err_gpio_claim:
1875        if (udc_info && udc_info->vbus_pin > 0)
1876                gpio_free(udc_info->vbus_pin);
1877err_int:
1878        free_irq(IRQ_USBD, udc);
1879err_map:
1880        iounmap(base_addr);
1881err_mem:
1882        release_mem_region(rsrc_start, rsrc_len);
1883
1884        return retval;
1885}
1886
1887/*
1888 *      s3c2410_udc_remove
1889 */
1890static int s3c2410_udc_remove(struct platform_device *pdev)
1891{
1892        struct s3c2410_udc *udc = platform_get_drvdata(pdev);
1893        unsigned int irq;
1894
1895        dev_dbg(&pdev->dev, "%s()\n", __func__);
1896
1897        if (udc->driver)
1898                return -EBUSY;
1899
1900        usb_del_gadget_udc(&udc->gadget);
1901        debugfs_remove(udc->regs_info);
1902
1903        if (udc_info && !udc_info->udc_command &&
1904                gpio_is_valid(udc_info->pullup_pin))
1905                gpio_free(udc_info->pullup_pin);
1906
1907        if (udc_info && udc_info->vbus_pin > 0) {
1908                irq = gpio_to_irq(udc_info->vbus_pin);
1909                free_irq(irq, udc);
1910        }
1911
1912        free_irq(IRQ_USBD, udc);
1913
1914        iounmap(base_addr);
1915        release_mem_region(rsrc_start, rsrc_len);
1916
1917        if (!IS_ERR(udc_clock) && udc_clock != NULL) {
1918                clk_disable_unprepare(udc_clock);
1919                clk_put(udc_clock);
1920                udc_clock = NULL;
1921        }
1922
1923        if (!IS_ERR(usb_bus_clock) && usb_bus_clock != NULL) {
1924                clk_disable_unprepare(usb_bus_clock);
1925                clk_put(usb_bus_clock);
1926                usb_bus_clock = NULL;
1927        }
1928
1929        dev_dbg(&pdev->dev, "%s: remove ok\n", __func__);
1930        return 0;
1931}
1932
1933#ifdef CONFIG_PM
1934static int
1935s3c2410_udc_suspend(struct platform_device *pdev, pm_message_t message)
1936{
1937        s3c2410_udc_command(S3C2410_UDC_P_DISABLE);
1938
1939        return 0;
1940}
1941
1942static int s3c2410_udc_resume(struct platform_device *pdev)
1943{
1944        s3c2410_udc_command(S3C2410_UDC_P_ENABLE);
1945
1946        return 0;
1947}
1948#else
1949#define s3c2410_udc_suspend     NULL
1950#define s3c2410_udc_resume      NULL
1951#endif
1952
1953static const struct platform_device_id s3c_udc_ids[] = {
1954        { "s3c2410-usbgadget", },
1955        { "s3c2440-usbgadget", },
1956        { }
1957};
1958MODULE_DEVICE_TABLE(platform, s3c_udc_ids);
1959
1960static struct platform_driver udc_driver_24x0 = {
1961        .driver         = {
1962                .name   = "s3c24x0-usbgadget",
1963        },
1964        .probe          = s3c2410_udc_probe,
1965        .remove         = s3c2410_udc_remove,
1966        .suspend        = s3c2410_udc_suspend,
1967        .resume         = s3c2410_udc_resume,
1968        .id_table       = s3c_udc_ids,
1969};
1970
1971static int __init udc_init(void)
1972{
1973        int retval;
1974
1975        dprintk(DEBUG_NORMAL, "%s\n", gadget_name);
1976
1977        s3c2410_udc_debugfs_root = debugfs_create_dir(gadget_name,
1978                                                      usb_debug_root);
1979
1980        retval = platform_driver_register(&udc_driver_24x0);
1981        if (retval)
1982                goto err;
1983
1984        return 0;
1985
1986err:
1987        debugfs_remove(s3c2410_udc_debugfs_root);
1988        return retval;
1989}
1990
1991static void __exit udc_exit(void)
1992{
1993        platform_driver_unregister(&udc_driver_24x0);
1994        debugfs_remove_recursive(s3c2410_udc_debugfs_root);
1995}
1996
1997module_init(udc_init);
1998module_exit(udc_exit);
1999
2000MODULE_AUTHOR(DRIVER_AUTHOR);
2001MODULE_DESCRIPTION(DRIVER_DESC);
2002MODULE_LICENSE("GPL");
2003