linux/drivers/usb/host/ehci-hcd.c
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   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * Enhanced Host Controller Interface (EHCI) driver for USB.
   4 *
   5 * Maintainer: Alan Stern <stern@rowland.harvard.edu>
   6 *
   7 * Copyright (c) 2000-2004 by David Brownell
   8 */
   9
  10#include <linux/module.h>
  11#include <linux/pci.h>
  12#include <linux/dmapool.h>
  13#include <linux/kernel.h>
  14#include <linux/delay.h>
  15#include <linux/ioport.h>
  16#include <linux/sched.h>
  17#include <linux/vmalloc.h>
  18#include <linux/errno.h>
  19#include <linux/init.h>
  20#include <linux/hrtimer.h>
  21#include <linux/list.h>
  22#include <linux/interrupt.h>
  23#include <linux/usb.h>
  24#include <linux/usb/hcd.h>
  25#include <linux/usb/otg.h>
  26#include <linux/moduleparam.h>
  27#include <linux/dma-mapping.h>
  28#include <linux/debugfs.h>
  29#include <linux/slab.h>
  30
  31#include <asm/byteorder.h>
  32#include <asm/io.h>
  33#include <asm/irq.h>
  34#include <asm/unaligned.h>
  35
  36#if defined(CONFIG_PPC_PS3)
  37#include <asm/firmware.h>
  38#endif
  39
  40/*-------------------------------------------------------------------------*/
  41
  42/*
  43 * EHCI hc_driver implementation ... experimental, incomplete.
  44 * Based on the final 1.0 register interface specification.
  45 *
  46 * USB 2.0 shows up in upcoming www.pcmcia.org technology.
  47 * First was PCMCIA, like ISA; then CardBus, which is PCI.
  48 * Next comes "CardBay", using USB 2.0 signals.
  49 *
  50 * Contains additional contributions by Brad Hards, Rory Bolt, and others.
  51 * Special thanks to Intel and VIA for providing host controllers to
  52 * test this driver on, and Cypress (including In-System Design) for
  53 * providing early devices for those host controllers to talk to!
  54 */
  55
  56#define DRIVER_AUTHOR "David Brownell"
  57#define DRIVER_DESC "USB 2.0 'Enhanced' Host Controller (EHCI) Driver"
  58
  59static const char       hcd_name [] = "ehci_hcd";
  60
  61
  62#undef EHCI_URB_TRACE
  63
  64/* magic numbers that can affect system performance */
  65#define EHCI_TUNE_CERR          3       /* 0-3 qtd retries; 0 == don't stop */
  66#define EHCI_TUNE_RL_HS         4       /* nak throttle; see 4.9 */
  67#define EHCI_TUNE_RL_TT         0
  68#define EHCI_TUNE_MULT_HS       1       /* 1-3 transactions/uframe; 4.10.3 */
  69#define EHCI_TUNE_MULT_TT       1
  70/*
  71 * Some drivers think it's safe to schedule isochronous transfers more than
  72 * 256 ms into the future (partly as a result of an old bug in the scheduling
  73 * code).  In an attempt to avoid trouble, we will use a minimum scheduling
  74 * length of 512 frames instead of 256.
  75 */
  76#define EHCI_TUNE_FLS           1       /* (medium) 512-frame schedule */
  77
  78/* Initial IRQ latency:  faster than hw default */
  79static int log2_irq_thresh = 0;         // 0 to 6
  80module_param (log2_irq_thresh, int, S_IRUGO);
  81MODULE_PARM_DESC (log2_irq_thresh, "log2 IRQ latency, 1-64 microframes");
  82
  83/* initial park setting:  slower than hw default */
  84static unsigned park = 0;
  85module_param (park, uint, S_IRUGO);
  86MODULE_PARM_DESC (park, "park setting; 1-3 back-to-back async packets");
  87
  88/* for flakey hardware, ignore overcurrent indicators */
  89static bool ignore_oc;
  90module_param (ignore_oc, bool, S_IRUGO);
  91MODULE_PARM_DESC (ignore_oc, "ignore bogus hardware overcurrent indications");
  92
  93#define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
  94
  95/*-------------------------------------------------------------------------*/
  96
  97#include "ehci.h"
  98#include "pci-quirks.h"
  99
 100static void compute_tt_budget(u8 budget_table[EHCI_BANDWIDTH_SIZE],
 101                struct ehci_tt *tt);
 102
 103/*
 104 * The MosChip MCS9990 controller updates its microframe counter
 105 * a little before the frame counter, and occasionally we will read
 106 * the invalid intermediate value.  Avoid problems by checking the
 107 * microframe number (the low-order 3 bits); if they are 0 then
 108 * re-read the register to get the correct value.
 109 */
 110static unsigned ehci_moschip_read_frame_index(struct ehci_hcd *ehci)
 111{
 112        unsigned uf;
 113
 114        uf = ehci_readl(ehci, &ehci->regs->frame_index);
 115        if (unlikely((uf & 7) == 0))
 116                uf = ehci_readl(ehci, &ehci->regs->frame_index);
 117        return uf;
 118}
 119
 120static inline unsigned ehci_read_frame_index(struct ehci_hcd *ehci)
 121{
 122        if (ehci->frame_index_bug)
 123                return ehci_moschip_read_frame_index(ehci);
 124        return ehci_readl(ehci, &ehci->regs->frame_index);
 125}
 126
 127#include "ehci-dbg.c"
 128
 129/*-------------------------------------------------------------------------*/
 130
 131/*
 132 * ehci_handshake - spin reading hc until handshake completes or fails
 133 * @ptr: address of hc register to be read
 134 * @mask: bits to look at in result of read
 135 * @done: value of those bits when handshake succeeds
 136 * @usec: timeout in microseconds
 137 *
 138 * Returns negative errno, or zero on success
 139 *
 140 * Success happens when the "mask" bits have the specified value (hardware
 141 * handshake done).  There are two failure modes:  "usec" have passed (major
 142 * hardware flakeout), or the register reads as all-ones (hardware removed).
 143 *
 144 * That last failure should_only happen in cases like physical cardbus eject
 145 * before driver shutdown. But it also seems to be caused by bugs in cardbus
 146 * bridge shutdown:  shutting down the bridge before the devices using it.
 147 */
 148int ehci_handshake(struct ehci_hcd *ehci, void __iomem *ptr,
 149                   u32 mask, u32 done, int usec)
 150{
 151        u32     result;
 152
 153        do {
 154                result = ehci_readl(ehci, ptr);
 155                if (result == ~(u32)0)          /* card removed */
 156                        return -ENODEV;
 157                result &= mask;
 158                if (result == done)
 159                        return 0;
 160                udelay (1);
 161                usec--;
 162        } while (usec > 0);
 163        return -ETIMEDOUT;
 164}
 165EXPORT_SYMBOL_GPL(ehci_handshake);
 166
 167/* check TDI/ARC silicon is in host mode */
 168static int tdi_in_host_mode (struct ehci_hcd *ehci)
 169{
 170        u32             tmp;
 171
 172        tmp = ehci_readl(ehci, &ehci->regs->usbmode);
 173        return (tmp & 3) == USBMODE_CM_HC;
 174}
 175
 176/*
 177 * Force HC to halt state from unknown (EHCI spec section 2.3).
 178 * Must be called with interrupts enabled and the lock not held.
 179 */
 180static int ehci_halt (struct ehci_hcd *ehci)
 181{
 182        u32     temp;
 183
 184        spin_lock_irq(&ehci->lock);
 185
 186        /* disable any irqs left enabled by previous code */
 187        ehci_writel(ehci, 0, &ehci->regs->intr_enable);
 188
 189        if (ehci_is_TDI(ehci) && !tdi_in_host_mode(ehci)) {
 190                spin_unlock_irq(&ehci->lock);
 191                return 0;
 192        }
 193
 194        /*
 195         * This routine gets called during probe before ehci->command
 196         * has been initialized, so we can't rely on its value.
 197         */
 198        ehci->command &= ~CMD_RUN;
 199        temp = ehci_readl(ehci, &ehci->regs->command);
 200        temp &= ~(CMD_RUN | CMD_IAAD);
 201        ehci_writel(ehci, temp, &ehci->regs->command);
 202
 203        spin_unlock_irq(&ehci->lock);
 204        synchronize_irq(ehci_to_hcd(ehci)->irq);
 205
 206        return ehci_handshake(ehci, &ehci->regs->status,
 207                          STS_HALT, STS_HALT, 16 * 125);
 208}
 209
 210/* put TDI/ARC silicon into EHCI mode */
 211static void tdi_reset (struct ehci_hcd *ehci)
 212{
 213        u32             tmp;
 214
 215        tmp = ehci_readl(ehci, &ehci->regs->usbmode);
 216        tmp |= USBMODE_CM_HC;
 217        /* The default byte access to MMR space is LE after
 218         * controller reset. Set the required endian mode
 219         * for transfer buffers to match the host microprocessor
 220         */
 221        if (ehci_big_endian_mmio(ehci))
 222                tmp |= USBMODE_BE;
 223        ehci_writel(ehci, tmp, &ehci->regs->usbmode);
 224}
 225
 226/*
 227 * Reset a non-running (STS_HALT == 1) controller.
 228 * Must be called with interrupts enabled and the lock not held.
 229 */
 230int ehci_reset(struct ehci_hcd *ehci)
 231{
 232        int     retval;
 233        u32     command = ehci_readl(ehci, &ehci->regs->command);
 234
 235        /* If the EHCI debug controller is active, special care must be
 236         * taken before and after a host controller reset */
 237        if (ehci->debug && !dbgp_reset_prep(ehci_to_hcd(ehci)))
 238                ehci->debug = NULL;
 239
 240        command |= CMD_RESET;
 241        dbg_cmd (ehci, "reset", command);
 242        ehci_writel(ehci, command, &ehci->regs->command);
 243        ehci->rh_state = EHCI_RH_HALTED;
 244        ehci->next_statechange = jiffies;
 245        retval = ehci_handshake(ehci, &ehci->regs->command,
 246                            CMD_RESET, 0, 250 * 1000);
 247
 248        if (ehci->has_hostpc) {
 249                ehci_writel(ehci, USBMODE_EX_HC | USBMODE_EX_VBPS,
 250                                &ehci->regs->usbmode_ex);
 251                ehci_writel(ehci, TXFIFO_DEFAULT, &ehci->regs->txfill_tuning);
 252        }
 253        if (retval)
 254                return retval;
 255
 256        if (ehci_is_TDI(ehci))
 257                tdi_reset (ehci);
 258
 259        if (ehci->debug)
 260                dbgp_external_startup(ehci_to_hcd(ehci));
 261
 262        ehci->port_c_suspend = ehci->suspended_ports =
 263                        ehci->resuming_ports = 0;
 264        return retval;
 265}
 266EXPORT_SYMBOL_GPL(ehci_reset);
 267
 268/*
 269 * Idle the controller (turn off the schedules).
 270 * Must be called with interrupts enabled and the lock not held.
 271 */
 272static void ehci_quiesce (struct ehci_hcd *ehci)
 273{
 274        u32     temp;
 275
 276        if (ehci->rh_state != EHCI_RH_RUNNING)
 277                return;
 278
 279        /* wait for any schedule enables/disables to take effect */
 280        temp = (ehci->command << 10) & (STS_ASS | STS_PSS);
 281        ehci_handshake(ehci, &ehci->regs->status, STS_ASS | STS_PSS, temp,
 282                        16 * 125);
 283
 284        /* then disable anything that's still active */
 285        spin_lock_irq(&ehci->lock);
 286        ehci->command &= ~(CMD_ASE | CMD_PSE);
 287        ehci_writel(ehci, ehci->command, &ehci->regs->command);
 288        spin_unlock_irq(&ehci->lock);
 289
 290        /* hardware can take 16 microframes to turn off ... */
 291        ehci_handshake(ehci, &ehci->regs->status, STS_ASS | STS_PSS, 0,
 292                        16 * 125);
 293}
 294
 295/*-------------------------------------------------------------------------*/
 296
 297static void end_iaa_cycle(struct ehci_hcd *ehci);
 298static void end_unlink_async(struct ehci_hcd *ehci);
 299static void unlink_empty_async(struct ehci_hcd *ehci);
 300static void ehci_work(struct ehci_hcd *ehci);
 301static void start_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh);
 302static void end_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh);
 303static int ehci_port_power(struct ehci_hcd *ehci, int portnum, bool enable);
 304
 305#include "ehci-timer.c"
 306#include "ehci-hub.c"
 307#include "ehci-mem.c"
 308#include "ehci-q.c"
 309#include "ehci-sched.c"
 310#include "ehci-sysfs.c"
 311
 312/*-------------------------------------------------------------------------*/
 313
 314/* On some systems, leaving remote wakeup enabled prevents system shutdown.
 315 * The firmware seems to think that powering off is a wakeup event!
 316 * This routine turns off remote wakeup and everything else, on all ports.
 317 */
 318static void ehci_turn_off_all_ports(struct ehci_hcd *ehci)
 319{
 320        int     port = HCS_N_PORTS(ehci->hcs_params);
 321
 322        while (port--) {
 323                spin_unlock_irq(&ehci->lock);
 324                ehci_port_power(ehci, port, false);
 325                spin_lock_irq(&ehci->lock);
 326                ehci_writel(ehci, PORT_RWC_BITS,
 327                                &ehci->regs->port_status[port]);
 328        }
 329}
 330
 331/*
 332 * Halt HC, turn off all ports, and let the BIOS use the companion controllers.
 333 * Must be called with interrupts enabled and the lock not held.
 334 */
 335static void ehci_silence_controller(struct ehci_hcd *ehci)
 336{
 337        ehci_halt(ehci);
 338
 339        spin_lock_irq(&ehci->lock);
 340        ehci->rh_state = EHCI_RH_HALTED;
 341        ehci_turn_off_all_ports(ehci);
 342
 343        /* make BIOS/etc use companion controller during reboot */
 344        ehci_writel(ehci, 0, &ehci->regs->configured_flag);
 345
 346        /* unblock posted writes */
 347        ehci_readl(ehci, &ehci->regs->configured_flag);
 348        spin_unlock_irq(&ehci->lock);
 349}
 350
 351/* ehci_shutdown kick in for silicon on any bus (not just pci, etc).
 352 * This forcibly disables dma and IRQs, helping kexec and other cases
 353 * where the next system software may expect clean state.
 354 */
 355static void ehci_shutdown(struct usb_hcd *hcd)
 356{
 357        struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 358
 359        /**
 360         * Protect the system from crashing at system shutdown in cases where
 361         * usb host is not added yet from OTG controller driver.
 362         * As ehci_setup() not done yet, so stop accessing registers or
 363         * variables initialized in ehci_setup()
 364         */
 365        if (!ehci->sbrn)
 366                return;
 367
 368        spin_lock_irq(&ehci->lock);
 369        ehci->shutdown = true;
 370        ehci->rh_state = EHCI_RH_STOPPING;
 371        ehci->enabled_hrtimer_events = 0;
 372        spin_unlock_irq(&ehci->lock);
 373
 374        ehci_silence_controller(ehci);
 375
 376        hrtimer_cancel(&ehci->hrtimer);
 377}
 378
 379/*-------------------------------------------------------------------------*/
 380
 381/*
 382 * ehci_work is called from some interrupts, timers, and so on.
 383 * it calls driver completion functions, after dropping ehci->lock.
 384 */
 385static void ehci_work (struct ehci_hcd *ehci)
 386{
 387        /* another CPU may drop ehci->lock during a schedule scan while
 388         * it reports urb completions.  this flag guards against bogus
 389         * attempts at re-entrant schedule scanning.
 390         */
 391        if (ehci->scanning) {
 392                ehci->need_rescan = true;
 393                return;
 394        }
 395        ehci->scanning = true;
 396
 397 rescan:
 398        ehci->need_rescan = false;
 399        if (ehci->async_count)
 400                scan_async(ehci);
 401        if (ehci->intr_count > 0)
 402                scan_intr(ehci);
 403        if (ehci->isoc_count > 0)
 404                scan_isoc(ehci);
 405        if (ehci->need_rescan)
 406                goto rescan;
 407        ehci->scanning = false;
 408
 409        /* the IO watchdog guards against hardware or driver bugs that
 410         * misplace IRQs, and should let us run completely without IRQs.
 411         * such lossage has been observed on both VT6202 and VT8235.
 412         */
 413        turn_on_io_watchdog(ehci);
 414}
 415
 416/*
 417 * Called when the ehci_hcd module is removed.
 418 */
 419static void ehci_stop (struct usb_hcd *hcd)
 420{
 421        struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 422
 423        ehci_dbg (ehci, "stop\n");
 424
 425        /* no more interrupts ... */
 426
 427        spin_lock_irq(&ehci->lock);
 428        ehci->enabled_hrtimer_events = 0;
 429        spin_unlock_irq(&ehci->lock);
 430
 431        ehci_quiesce(ehci);
 432        ehci_silence_controller(ehci);
 433        ehci_reset (ehci);
 434
 435        hrtimer_cancel(&ehci->hrtimer);
 436        remove_sysfs_files(ehci);
 437        remove_debug_files (ehci);
 438
 439        /* root hub is shut down separately (first, when possible) */
 440        spin_lock_irq (&ehci->lock);
 441        end_free_itds(ehci);
 442        spin_unlock_irq (&ehci->lock);
 443        ehci_mem_cleanup (ehci);
 444
 445        if (ehci->amd_pll_fix == 1)
 446                usb_amd_dev_put();
 447
 448        dbg_status (ehci, "ehci_stop completed",
 449                    ehci_readl(ehci, &ehci->regs->status));
 450}
 451
 452/* one-time init, only for memory state */
 453static int ehci_init(struct usb_hcd *hcd)
 454{
 455        struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
 456        u32                     temp;
 457        int                     retval;
 458        u32                     hcc_params;
 459        struct ehci_qh_hw       *hw;
 460
 461        spin_lock_init(&ehci->lock);
 462
 463        /*
 464         * keep io watchdog by default, those good HCDs could turn off it later
 465         */
 466        ehci->need_io_watchdog = 1;
 467
 468        hrtimer_init(&ehci->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
 469        ehci->hrtimer.function = ehci_hrtimer_func;
 470        ehci->next_hrtimer_event = EHCI_HRTIMER_NO_EVENT;
 471
 472        hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
 473
 474        /*
 475         * by default set standard 80% (== 100 usec/uframe) max periodic
 476         * bandwidth as required by USB 2.0
 477         */
 478        ehci->uframe_periodic_max = 100;
 479
 480        /*
 481         * hw default: 1K periodic list heads, one per frame.
 482         * periodic_size can shrink by USBCMD update if hcc_params allows.
 483         */
 484        ehci->periodic_size = DEFAULT_I_TDPS;
 485        INIT_LIST_HEAD(&ehci->async_unlink);
 486        INIT_LIST_HEAD(&ehci->async_idle);
 487        INIT_LIST_HEAD(&ehci->intr_unlink_wait);
 488        INIT_LIST_HEAD(&ehci->intr_unlink);
 489        INIT_LIST_HEAD(&ehci->intr_qh_list);
 490        INIT_LIST_HEAD(&ehci->cached_itd_list);
 491        INIT_LIST_HEAD(&ehci->cached_sitd_list);
 492        INIT_LIST_HEAD(&ehci->tt_list);
 493
 494        if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
 495                /* periodic schedule size can be smaller than default */
 496                switch (EHCI_TUNE_FLS) {
 497                case 0: ehci->periodic_size = 1024; break;
 498                case 1: ehci->periodic_size = 512; break;
 499                case 2: ehci->periodic_size = 256; break;
 500                default:        BUG();
 501                }
 502        }
 503        if ((retval = ehci_mem_init(ehci, GFP_KERNEL)) < 0)
 504                return retval;
 505
 506        /* controllers may cache some of the periodic schedule ... */
 507        if (HCC_ISOC_CACHE(hcc_params))         // full frame cache
 508                ehci->i_thresh = 0;
 509        else                                    // N microframes cached
 510                ehci->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
 511
 512        /*
 513         * dedicate a qh for the async ring head, since we couldn't unlink
 514         * a 'real' qh without stopping the async schedule [4.8].  use it
 515         * as the 'reclamation list head' too.
 516         * its dummy is used in hw_alt_next of many tds, to prevent the qh
 517         * from automatically advancing to the next td after short reads.
 518         */
 519        ehci->async->qh_next.qh = NULL;
 520        hw = ehci->async->hw;
 521        hw->hw_next = QH_NEXT(ehci, ehci->async->qh_dma);
 522        hw->hw_info1 = cpu_to_hc32(ehci, QH_HEAD);
 523#if defined(CONFIG_PPC_PS3)
 524        hw->hw_info1 |= cpu_to_hc32(ehci, QH_INACTIVATE);
 525#endif
 526        hw->hw_token = cpu_to_hc32(ehci, QTD_STS_HALT);
 527        hw->hw_qtd_next = EHCI_LIST_END(ehci);
 528        ehci->async->qh_state = QH_STATE_LINKED;
 529        hw->hw_alt_next = QTD_NEXT(ehci, ehci->async->dummy->qtd_dma);
 530
 531        /* clear interrupt enables, set irq latency */
 532        if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
 533                log2_irq_thresh = 0;
 534        temp = 1 << (16 + log2_irq_thresh);
 535        if (HCC_PER_PORT_CHANGE_EVENT(hcc_params)) {
 536                ehci->has_ppcd = 1;
 537                ehci_dbg(ehci, "enable per-port change event\n");
 538                temp |= CMD_PPCEE;
 539        }
 540        if (HCC_CANPARK(hcc_params)) {
 541                /* HW default park == 3, on hardware that supports it (like
 542                 * NVidia and ALI silicon), maximizes throughput on the async
 543                 * schedule by avoiding QH fetches between transfers.
 544                 *
 545                 * With fast usb storage devices and NForce2, "park" seems to
 546                 * make problems:  throughput reduction (!), data errors...
 547                 */
 548                if (park) {
 549                        park = min(park, (unsigned) 3);
 550                        temp |= CMD_PARK;
 551                        temp |= park << 8;
 552                }
 553                ehci_dbg(ehci, "park %d\n", park);
 554        }
 555        if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
 556                /* periodic schedule size can be smaller than default */
 557                temp &= ~(3 << 2);
 558                temp |= (EHCI_TUNE_FLS << 2);
 559        }
 560        ehci->command = temp;
 561
 562        /* Accept arbitrarily long scatter-gather lists */
 563        if (!hcd->localmem_pool)
 564                hcd->self.sg_tablesize = ~0;
 565
 566        /* Prepare for unlinking active QHs */
 567        ehci->old_current = ~0;
 568        return 0;
 569}
 570
 571/* start HC running; it's halted, ehci_init() has been run (once) */
 572static int ehci_run (struct usb_hcd *hcd)
 573{
 574        struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 575        u32                     temp;
 576        u32                     hcc_params;
 577
 578        hcd->uses_new_polling = 1;
 579
 580        /* EHCI spec section 4.1 */
 581
 582        ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list);
 583        ehci_writel(ehci, (u32)ehci->async->qh_dma, &ehci->regs->async_next);
 584
 585        /*
 586         * hcc_params controls whether ehci->regs->segment must (!!!)
 587         * be used; it constrains QH/ITD/SITD and QTD locations.
 588         * dma_pool consistent memory always uses segment zero.
 589         * streaming mappings for I/O buffers, like pci_map_single(),
 590         * can return segments above 4GB, if the device allows.
 591         *
 592         * NOTE:  the dma mask is visible through dev->dma_mask, so
 593         * drivers can pass this info along ... like NETIF_F_HIGHDMA,
 594         * Scsi_Host.highmem_io, and so forth.  It's readonly to all
 595         * host side drivers though.
 596         */
 597        hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
 598        if (HCC_64BIT_ADDR(hcc_params)) {
 599                ehci_writel(ehci, 0, &ehci->regs->segment);
 600#if 0
 601// this is deeply broken on almost all architectures
 602                if (!dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64)))
 603                        ehci_info(ehci, "enabled 64bit DMA\n");
 604#endif
 605        }
 606
 607
 608        // Philips, Intel, and maybe others need CMD_RUN before the
 609        // root hub will detect new devices (why?); NEC doesn't
 610        ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
 611        ehci->command |= CMD_RUN;
 612        ehci_writel(ehci, ehci->command, &ehci->regs->command);
 613        dbg_cmd (ehci, "init", ehci->command);
 614
 615        /*
 616         * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
 617         * are explicitly handed to companion controller(s), so no TT is
 618         * involved with the root hub.  (Except where one is integrated,
 619         * and there's no companion controller unless maybe for USB OTG.)
 620         *
 621         * Turning on the CF flag will transfer ownership of all ports
 622         * from the companions to the EHCI controller.  If any of the
 623         * companions are in the middle of a port reset at the time, it
 624         * could cause trouble.  Write-locking ehci_cf_port_reset_rwsem
 625         * guarantees that no resets are in progress.  After we set CF,
 626         * a short delay lets the hardware catch up; new resets shouldn't
 627         * be started before the port switching actions could complete.
 628         */
 629        down_write(&ehci_cf_port_reset_rwsem);
 630        ehci->rh_state = EHCI_RH_RUNNING;
 631        ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
 632        ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
 633        msleep(5);
 634        up_write(&ehci_cf_port_reset_rwsem);
 635        ehci->last_periodic_enable = ktime_get_real();
 636
 637        temp = HC_VERSION(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
 638        ehci_info (ehci,
 639                "USB %x.%x started, EHCI %x.%02x%s\n",
 640                ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f),
 641                temp >> 8, temp & 0xff,
 642                ignore_oc ? ", overcurrent ignored" : "");
 643
 644        ehci_writel(ehci, INTR_MASK,
 645                    &ehci->regs->intr_enable); /* Turn On Interrupts */
 646
 647        /* GRR this is run-once init(), being done every time the HC starts.
 648         * So long as they're part of class devices, we can't do it init()
 649         * since the class device isn't created that early.
 650         */
 651        create_debug_files(ehci);
 652        create_sysfs_files(ehci);
 653
 654        return 0;
 655}
 656
 657int ehci_setup(struct usb_hcd *hcd)
 658{
 659        struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 660        int retval;
 661
 662        ehci->regs = (void __iomem *)ehci->caps +
 663            HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
 664        dbg_hcs_params(ehci, "reset");
 665        dbg_hcc_params(ehci, "reset");
 666
 667        /* cache this readonly data; minimize chip reads */
 668        ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
 669
 670        ehci->sbrn = HCD_USB2;
 671
 672        /* data structure init */
 673        retval = ehci_init(hcd);
 674        if (retval)
 675                return retval;
 676
 677        retval = ehci_halt(ehci);
 678        if (retval) {
 679                ehci_mem_cleanup(ehci);
 680                return retval;
 681        }
 682
 683        ehci_reset(ehci);
 684
 685        return 0;
 686}
 687EXPORT_SYMBOL_GPL(ehci_setup);
 688
 689/*-------------------------------------------------------------------------*/
 690
 691static irqreturn_t ehci_irq (struct usb_hcd *hcd)
 692{
 693        struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 694        u32                     status, masked_status, pcd_status = 0, cmd;
 695        int                     bh;
 696        unsigned long           flags;
 697
 698        /*
 699         * For threadirqs option we use spin_lock_irqsave() variant to prevent
 700         * deadlock with ehci hrtimer callback, because hrtimer callbacks run
 701         * in interrupt context even when threadirqs is specified. We can go
 702         * back to spin_lock() variant when hrtimer callbacks become threaded.
 703         */
 704        spin_lock_irqsave(&ehci->lock, flags);
 705
 706        status = ehci_readl(ehci, &ehci->regs->status);
 707
 708        /* e.g. cardbus physical eject */
 709        if (status == ~(u32) 0) {
 710                ehci_dbg (ehci, "device removed\n");
 711                goto dead;
 712        }
 713
 714        /*
 715         * We don't use STS_FLR, but some controllers don't like it to
 716         * remain on, so mask it out along with the other status bits.
 717         */
 718        masked_status = status & (INTR_MASK | STS_FLR);
 719
 720        /* Shared IRQ? */
 721        if (!masked_status || unlikely(ehci->rh_state == EHCI_RH_HALTED)) {
 722                spin_unlock_irqrestore(&ehci->lock, flags);
 723                return IRQ_NONE;
 724        }
 725
 726        /* clear (just) interrupts */
 727        ehci_writel(ehci, masked_status, &ehci->regs->status);
 728        cmd = ehci_readl(ehci, &ehci->regs->command);
 729        bh = 0;
 730
 731        /* normal [4.15.1.2] or error [4.15.1.1] completion */
 732        if (likely ((status & (STS_INT|STS_ERR)) != 0)) {
 733                if (likely ((status & STS_ERR) == 0))
 734                        INCR(ehci->stats.normal);
 735                else
 736                        INCR(ehci->stats.error);
 737                bh = 1;
 738        }
 739
 740        /* complete the unlinking of some qh [4.15.2.3] */
 741        if (status & STS_IAA) {
 742
 743                /* Turn off the IAA watchdog */
 744                ehci->enabled_hrtimer_events &= ~BIT(EHCI_HRTIMER_IAA_WATCHDOG);
 745
 746                /*
 747                 * Mild optimization: Allow another IAAD to reset the
 748                 * hrtimer, if one occurs before the next expiration.
 749                 * In theory we could always cancel the hrtimer, but
 750                 * tests show that about half the time it will be reset
 751                 * for some other event anyway.
 752                 */
 753                if (ehci->next_hrtimer_event == EHCI_HRTIMER_IAA_WATCHDOG)
 754                        ++ehci->next_hrtimer_event;
 755
 756                /* guard against (alleged) silicon errata */
 757                if (cmd & CMD_IAAD)
 758                        ehci_dbg(ehci, "IAA with IAAD still set?\n");
 759                if (ehci->iaa_in_progress)
 760                        INCR(ehci->stats.iaa);
 761                end_iaa_cycle(ehci);
 762        }
 763
 764        /* remote wakeup [4.3.1] */
 765        if (status & STS_PCD) {
 766                unsigned        i = HCS_N_PORTS (ehci->hcs_params);
 767                u32             ppcd = ~0;
 768
 769                /* kick root hub later */
 770                pcd_status = status;
 771
 772                /* resume root hub? */
 773                if (ehci->rh_state == EHCI_RH_SUSPENDED)
 774                        usb_hcd_resume_root_hub(hcd);
 775
 776                /* get per-port change detect bits */
 777                if (ehci->has_ppcd)
 778                        ppcd = status >> 16;
 779
 780                while (i--) {
 781                        int pstatus;
 782
 783                        /* leverage per-port change bits feature */
 784                        if (!(ppcd & (1 << i)))
 785                                continue;
 786                        pstatus = ehci_readl(ehci,
 787                                         &ehci->regs->port_status[i]);
 788
 789                        if (pstatus & PORT_OWNER)
 790                                continue;
 791                        if (!(test_bit(i, &ehci->suspended_ports) &&
 792                                        ((pstatus & PORT_RESUME) ||
 793                                                !(pstatus & PORT_SUSPEND)) &&
 794                                        (pstatus & PORT_PE) &&
 795                                        ehci->reset_done[i] == 0))
 796                                continue;
 797
 798                        /* start USB_RESUME_TIMEOUT msec resume signaling from
 799                         * this port, and make hub_wq collect
 800                         * PORT_STAT_C_SUSPEND to stop that signaling.
 801                         */
 802                        ehci->reset_done[i] = jiffies +
 803                                msecs_to_jiffies(USB_RESUME_TIMEOUT);
 804                        set_bit(i, &ehci->resuming_ports);
 805                        ehci_dbg (ehci, "port %d remote wakeup\n", i + 1);
 806                        usb_hcd_start_port_resume(&hcd->self, i);
 807                        mod_timer(&hcd->rh_timer, ehci->reset_done[i]);
 808                }
 809        }
 810
 811        /* PCI errors [4.15.2.4] */
 812        if (unlikely ((status & STS_FATAL) != 0)) {
 813                ehci_err(ehci, "fatal error\n");
 814                dbg_cmd(ehci, "fatal", cmd);
 815                dbg_status(ehci, "fatal", status);
 816dead:
 817                usb_hc_died(hcd);
 818
 819                /* Don't let the controller do anything more */
 820                ehci->shutdown = true;
 821                ehci->rh_state = EHCI_RH_STOPPING;
 822                ehci->command &= ~(CMD_RUN | CMD_ASE | CMD_PSE);
 823                ehci_writel(ehci, ehci->command, &ehci->regs->command);
 824                ehci_writel(ehci, 0, &ehci->regs->intr_enable);
 825                ehci_handle_controller_death(ehci);
 826
 827                /* Handle completions when the controller stops */
 828                bh = 0;
 829        }
 830
 831        if (bh)
 832                ehci_work (ehci);
 833        spin_unlock_irqrestore(&ehci->lock, flags);
 834        if (pcd_status)
 835                usb_hcd_poll_rh_status(hcd);
 836        return IRQ_HANDLED;
 837}
 838
 839/*-------------------------------------------------------------------------*/
 840
 841/*
 842 * non-error returns are a promise to giveback() the urb later
 843 * we drop ownership so next owner (or urb unlink) can get it
 844 *
 845 * urb + dev is in hcd.self.controller.urb_list
 846 * we're queueing TDs onto software and hardware lists
 847 *
 848 * hcd-specific init for hcpriv hasn't been done yet
 849 *
 850 * NOTE:  control, bulk, and interrupt share the same code to append TDs
 851 * to a (possibly active) QH, and the same QH scanning code.
 852 */
 853static int ehci_urb_enqueue (
 854        struct usb_hcd  *hcd,
 855        struct urb      *urb,
 856        gfp_t           mem_flags
 857) {
 858        struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 859        struct list_head        qtd_list;
 860
 861        INIT_LIST_HEAD (&qtd_list);
 862
 863        switch (usb_pipetype (urb->pipe)) {
 864        case PIPE_CONTROL:
 865                /* qh_completions() code doesn't handle all the fault cases
 866                 * in multi-TD control transfers.  Even 1KB is rare anyway.
 867                 */
 868                if (urb->transfer_buffer_length > (16 * 1024))
 869                        return -EMSGSIZE;
 870                /* FALLTHROUGH */
 871        /* case PIPE_BULK: */
 872        default:
 873                if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
 874                        return -ENOMEM;
 875                return submit_async(ehci, urb, &qtd_list, mem_flags);
 876
 877        case PIPE_INTERRUPT:
 878                if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
 879                        return -ENOMEM;
 880                return intr_submit(ehci, urb, &qtd_list, mem_flags);
 881
 882        case PIPE_ISOCHRONOUS:
 883                if (urb->dev->speed == USB_SPEED_HIGH)
 884                        return itd_submit (ehci, urb, mem_flags);
 885                else
 886                        return sitd_submit (ehci, urb, mem_flags);
 887        }
 888}
 889
 890/* remove from hardware lists
 891 * completions normally happen asynchronously
 892 */
 893
 894static int ehci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
 895{
 896        struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 897        struct ehci_qh          *qh;
 898        unsigned long           flags;
 899        int                     rc;
 900
 901        spin_lock_irqsave (&ehci->lock, flags);
 902        rc = usb_hcd_check_unlink_urb(hcd, urb, status);
 903        if (rc)
 904                goto done;
 905
 906        if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
 907                /*
 908                 * We don't expedite dequeue for isochronous URBs.
 909                 * Just wait until they complete normally or their
 910                 * time slot expires.
 911                 */
 912        } else {
 913                qh = (struct ehci_qh *) urb->hcpriv;
 914                qh->unlink_reason |= QH_UNLINK_REQUESTED;
 915                switch (qh->qh_state) {
 916                case QH_STATE_LINKED:
 917                        if (usb_pipetype(urb->pipe) == PIPE_INTERRUPT)
 918                                start_unlink_intr(ehci, qh);
 919                        else
 920                                start_unlink_async(ehci, qh);
 921                        break;
 922                case QH_STATE_COMPLETING:
 923                        qh->dequeue_during_giveback = 1;
 924                        break;
 925                case QH_STATE_UNLINK:
 926                case QH_STATE_UNLINK_WAIT:
 927                        /* already started */
 928                        break;
 929                case QH_STATE_IDLE:
 930                        /* QH might be waiting for a Clear-TT-Buffer */
 931                        qh_completions(ehci, qh);
 932                        break;
 933                }
 934        }
 935done:
 936        spin_unlock_irqrestore (&ehci->lock, flags);
 937        return rc;
 938}
 939
 940/*-------------------------------------------------------------------------*/
 941
 942// bulk qh holds the data toggle
 943
 944static void
 945ehci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
 946{
 947        struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 948        unsigned long           flags;
 949        struct ehci_qh          *qh;
 950
 951        /* ASSERT:  any requests/urbs are being unlinked */
 952        /* ASSERT:  nobody can be submitting urbs for this any more */
 953
 954rescan:
 955        spin_lock_irqsave (&ehci->lock, flags);
 956        qh = ep->hcpriv;
 957        if (!qh)
 958                goto done;
 959
 960        /* endpoints can be iso streams.  for now, we don't
 961         * accelerate iso completions ... so spin a while.
 962         */
 963        if (qh->hw == NULL) {
 964                struct ehci_iso_stream  *stream = ep->hcpriv;
 965
 966                if (!list_empty(&stream->td_list))
 967                        goto idle_timeout;
 968
 969                /* BUG_ON(!list_empty(&stream->free_list)); */
 970                reserve_release_iso_bandwidth(ehci, stream, -1);
 971                kfree(stream);
 972                goto done;
 973        }
 974
 975        qh->unlink_reason |= QH_UNLINK_REQUESTED;
 976        switch (qh->qh_state) {
 977        case QH_STATE_LINKED:
 978                if (list_empty(&qh->qtd_list))
 979                        qh->unlink_reason |= QH_UNLINK_QUEUE_EMPTY;
 980                else
 981                        WARN_ON(1);
 982                if (usb_endpoint_type(&ep->desc) != USB_ENDPOINT_XFER_INT)
 983                        start_unlink_async(ehci, qh);
 984                else
 985                        start_unlink_intr(ehci, qh);
 986                fallthrough;
 987        case QH_STATE_COMPLETING:       /* already in unlinking */
 988        case QH_STATE_UNLINK:           /* wait for hw to finish? */
 989        case QH_STATE_UNLINK_WAIT:
 990idle_timeout:
 991                spin_unlock_irqrestore (&ehci->lock, flags);
 992                schedule_timeout_uninterruptible(1);
 993                goto rescan;
 994        case QH_STATE_IDLE:             /* fully unlinked */
 995                if (qh->clearing_tt)
 996                        goto idle_timeout;
 997                if (list_empty (&qh->qtd_list)) {
 998                        if (qh->ps.bw_uperiod)
 999                                reserve_release_intr_bandwidth(ehci, qh, -1);
1000                        qh_destroy(ehci, qh);
1001                        break;
1002                }
1003                fallthrough;
1004        default:
1005                /* caller was supposed to have unlinked any requests;
1006                 * that's not our job.  just leak this memory.
1007                 */
1008                ehci_err (ehci, "qh %p (#%02x) state %d%s\n",
1009                        qh, ep->desc.bEndpointAddress, qh->qh_state,
1010                        list_empty (&qh->qtd_list) ? "" : "(has tds)");
1011                break;
1012        }
1013 done:
1014        ep->hcpriv = NULL;
1015        spin_unlock_irqrestore (&ehci->lock, flags);
1016}
1017
1018static void
1019ehci_endpoint_reset(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
1020{
1021        struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1022        struct ehci_qh          *qh;
1023        int                     eptype = usb_endpoint_type(&ep->desc);
1024        int                     epnum = usb_endpoint_num(&ep->desc);
1025        int                     is_out = usb_endpoint_dir_out(&ep->desc);
1026        unsigned long           flags;
1027
1028        if (eptype != USB_ENDPOINT_XFER_BULK && eptype != USB_ENDPOINT_XFER_INT)
1029                return;
1030
1031        spin_lock_irqsave(&ehci->lock, flags);
1032        qh = ep->hcpriv;
1033
1034        /* For Bulk and Interrupt endpoints we maintain the toggle state
1035         * in the hardware; the toggle bits in udev aren't used at all.
1036         * When an endpoint is reset by usb_clear_halt() we must reset
1037         * the toggle bit in the QH.
1038         */
1039        if (qh) {
1040                if (!list_empty(&qh->qtd_list)) {
1041                        WARN_ONCE(1, "clear_halt for a busy endpoint\n");
1042                } else {
1043                        /* The toggle value in the QH can't be updated
1044                         * while the QH is active.  Unlink it now;
1045                         * re-linking will call qh_refresh().
1046                         */
1047                        usb_settoggle(qh->ps.udev, epnum, is_out, 0);
1048                        qh->unlink_reason |= QH_UNLINK_REQUESTED;
1049                        if (eptype == USB_ENDPOINT_XFER_BULK)
1050                                start_unlink_async(ehci, qh);
1051                        else
1052                                start_unlink_intr(ehci, qh);
1053                }
1054        }
1055        spin_unlock_irqrestore(&ehci->lock, flags);
1056}
1057
1058static int ehci_get_frame (struct usb_hcd *hcd)
1059{
1060        struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
1061        return (ehci_read_frame_index(ehci) >> 3) % ehci->periodic_size;
1062}
1063
1064/*-------------------------------------------------------------------------*/
1065
1066/* Device addition and removal */
1067
1068static void ehci_remove_device(struct usb_hcd *hcd, struct usb_device *udev)
1069{
1070        struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1071
1072        spin_lock_irq(&ehci->lock);
1073        drop_tt(udev);
1074        spin_unlock_irq(&ehci->lock);
1075}
1076
1077/*-------------------------------------------------------------------------*/
1078
1079#ifdef  CONFIG_PM
1080
1081/* suspend/resume, section 4.3 */
1082
1083/* These routines handle the generic parts of controller suspend/resume */
1084
1085int ehci_suspend(struct usb_hcd *hcd, bool do_wakeup)
1086{
1087        struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1088
1089        if (time_before(jiffies, ehci->next_statechange))
1090                msleep(10);
1091
1092        /*
1093         * Root hub was already suspended.  Disable IRQ emission and
1094         * mark HW unaccessible.  The PM and USB cores make sure that
1095         * the root hub is either suspended or stopped.
1096         */
1097        ehci_prepare_ports_for_controller_suspend(ehci, do_wakeup);
1098
1099        spin_lock_irq(&ehci->lock);
1100        ehci_writel(ehci, 0, &ehci->regs->intr_enable);
1101        (void) ehci_readl(ehci, &ehci->regs->intr_enable);
1102
1103        clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1104        spin_unlock_irq(&ehci->lock);
1105
1106        synchronize_irq(hcd->irq);
1107
1108        /* Check for race with a wakeup request */
1109        if (do_wakeup && HCD_WAKEUP_PENDING(hcd)) {
1110                ehci_resume(hcd, false);
1111                return -EBUSY;
1112        }
1113
1114        return 0;
1115}
1116EXPORT_SYMBOL_GPL(ehci_suspend);
1117
1118/* Returns 0 if power was preserved, 1 if power was lost */
1119int ehci_resume(struct usb_hcd *hcd, bool force_reset)
1120{
1121        struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1122
1123        if (time_before(jiffies, ehci->next_statechange))
1124                msleep(100);
1125
1126        /* Mark hardware accessible again as we are back to full power by now */
1127        set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1128
1129        if (ehci->shutdown)
1130                return 0;               /* Controller is dead */
1131
1132        /*
1133         * If CF is still set and reset isn't forced
1134         * then we maintained suspend power.
1135         * Just undo the effect of ehci_suspend().
1136         */
1137        if (ehci_readl(ehci, &ehci->regs->configured_flag) == FLAG_CF &&
1138                        !force_reset) {
1139                int     mask = INTR_MASK;
1140
1141                ehci_prepare_ports_for_controller_resume(ehci);
1142
1143                spin_lock_irq(&ehci->lock);
1144                if (ehci->shutdown)
1145                        goto skip;
1146
1147                if (!hcd->self.root_hub->do_remote_wakeup)
1148                        mask &= ~STS_PCD;
1149                ehci_writel(ehci, mask, &ehci->regs->intr_enable);
1150                ehci_readl(ehci, &ehci->regs->intr_enable);
1151 skip:
1152                spin_unlock_irq(&ehci->lock);
1153                return 0;
1154        }
1155
1156        /*
1157         * Else reset, to cope with power loss or resume from hibernation
1158         * having let the firmware kick in during reboot.
1159         */
1160        usb_root_hub_lost_power(hcd->self.root_hub);
1161        (void) ehci_halt(ehci);
1162        (void) ehci_reset(ehci);
1163
1164        spin_lock_irq(&ehci->lock);
1165        if (ehci->shutdown)
1166                goto skip;
1167
1168        ehci_writel(ehci, ehci->command, &ehci->regs->command);
1169        ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
1170        ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
1171
1172        ehci->rh_state = EHCI_RH_SUSPENDED;
1173        spin_unlock_irq(&ehci->lock);
1174
1175        return 1;
1176}
1177EXPORT_SYMBOL_GPL(ehci_resume);
1178
1179#endif
1180
1181/*-------------------------------------------------------------------------*/
1182
1183/*
1184 * Generic structure: This gets copied for platform drivers so that
1185 * individual entries can be overridden as needed.
1186 */
1187
1188static const struct hc_driver ehci_hc_driver = {
1189        .description =          hcd_name,
1190        .product_desc =         "EHCI Host Controller",
1191        .hcd_priv_size =        sizeof(struct ehci_hcd),
1192
1193        /*
1194         * generic hardware linkage
1195         */
1196        .irq =                  ehci_irq,
1197        .flags =                HCD_MEMORY | HCD_DMA | HCD_USB2 | HCD_BH,
1198
1199        /*
1200         * basic lifecycle operations
1201         */
1202        .reset =                ehci_setup,
1203        .start =                ehci_run,
1204        .stop =                 ehci_stop,
1205        .shutdown =             ehci_shutdown,
1206
1207        /*
1208         * managing i/o requests and associated device resources
1209         */
1210        .urb_enqueue =          ehci_urb_enqueue,
1211        .urb_dequeue =          ehci_urb_dequeue,
1212        .endpoint_disable =     ehci_endpoint_disable,
1213        .endpoint_reset =       ehci_endpoint_reset,
1214        .clear_tt_buffer_complete =     ehci_clear_tt_buffer_complete,
1215
1216        /*
1217         * scheduling support
1218         */
1219        .get_frame_number =     ehci_get_frame,
1220
1221        /*
1222         * root hub support
1223         */
1224        .hub_status_data =      ehci_hub_status_data,
1225        .hub_control =          ehci_hub_control,
1226        .bus_suspend =          ehci_bus_suspend,
1227        .bus_resume =           ehci_bus_resume,
1228        .relinquish_port =      ehci_relinquish_port,
1229        .port_handed_over =     ehci_port_handed_over,
1230        .get_resuming_ports =   ehci_get_resuming_ports,
1231
1232        /*
1233         * device support
1234         */
1235        .free_dev =             ehci_remove_device,
1236};
1237
1238void ehci_init_driver(struct hc_driver *drv,
1239                const struct ehci_driver_overrides *over)
1240{
1241        /* Copy the generic table to drv and then apply the overrides */
1242        *drv = ehci_hc_driver;
1243
1244        if (over) {
1245                drv->hcd_priv_size += over->extra_priv_size;
1246                if (over->reset)
1247                        drv->reset = over->reset;
1248                if (over->port_power)
1249                        drv->port_power = over->port_power;
1250        }
1251}
1252EXPORT_SYMBOL_GPL(ehci_init_driver);
1253
1254/*-------------------------------------------------------------------------*/
1255
1256MODULE_DESCRIPTION(DRIVER_DESC);
1257MODULE_AUTHOR (DRIVER_AUTHOR);
1258MODULE_LICENSE ("GPL");
1259
1260#ifdef CONFIG_USB_EHCI_SH
1261#include "ehci-sh.c"
1262#define PLATFORM_DRIVER         ehci_hcd_sh_driver
1263#endif
1264
1265#ifdef CONFIG_PPC_PS3
1266#include "ehci-ps3.c"
1267#define PS3_SYSTEM_BUS_DRIVER   ps3_ehci_driver
1268#endif
1269
1270#ifdef CONFIG_USB_EHCI_HCD_PPC_OF
1271#include "ehci-ppc-of.c"
1272#define OF_PLATFORM_DRIVER      ehci_hcd_ppc_of_driver
1273#endif
1274
1275#ifdef CONFIG_XPS_USB_HCD_XILINX
1276#include "ehci-xilinx-of.c"
1277#define XILINX_OF_PLATFORM_DRIVER       ehci_hcd_xilinx_of_driver
1278#endif
1279
1280#ifdef CONFIG_USB_EHCI_HCD_PMC_MSP
1281#include "ehci-pmcmsp.c"
1282#define PLATFORM_DRIVER         ehci_hcd_msp_driver
1283#endif
1284
1285#ifdef CONFIG_SPARC_LEON
1286#include "ehci-grlib.c"
1287#define PLATFORM_DRIVER         ehci_grlib_driver
1288#endif
1289
1290static int __init ehci_hcd_init(void)
1291{
1292        int retval = 0;
1293
1294        if (usb_disabled())
1295                return -ENODEV;
1296
1297        printk(KERN_INFO "%s: " DRIVER_DESC "\n", hcd_name);
1298        set_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1299        if (test_bit(USB_UHCI_LOADED, &usb_hcds_loaded) ||
1300                        test_bit(USB_OHCI_LOADED, &usb_hcds_loaded))
1301                printk(KERN_WARNING "Warning! ehci_hcd should always be loaded"
1302                                " before uhci_hcd and ohci_hcd, not after\n");
1303
1304        pr_debug("%s: block sizes: qh %zd qtd %zd itd %zd sitd %zd\n",
1305                 hcd_name,
1306                 sizeof(struct ehci_qh), sizeof(struct ehci_qtd),
1307                 sizeof(struct ehci_itd), sizeof(struct ehci_sitd));
1308
1309#ifdef CONFIG_DYNAMIC_DEBUG
1310        ehci_debug_root = debugfs_create_dir("ehci", usb_debug_root);
1311#endif
1312
1313#ifdef PLATFORM_DRIVER
1314        retval = platform_driver_register(&PLATFORM_DRIVER);
1315        if (retval < 0)
1316                goto clean0;
1317#endif
1318
1319#ifdef PS3_SYSTEM_BUS_DRIVER
1320        retval = ps3_ehci_driver_register(&PS3_SYSTEM_BUS_DRIVER);
1321        if (retval < 0)
1322                goto clean2;
1323#endif
1324
1325#ifdef OF_PLATFORM_DRIVER
1326        retval = platform_driver_register(&OF_PLATFORM_DRIVER);
1327        if (retval < 0)
1328                goto clean3;
1329#endif
1330
1331#ifdef XILINX_OF_PLATFORM_DRIVER
1332        retval = platform_driver_register(&XILINX_OF_PLATFORM_DRIVER);
1333        if (retval < 0)
1334                goto clean4;
1335#endif
1336        return retval;
1337
1338#ifdef XILINX_OF_PLATFORM_DRIVER
1339        /* platform_driver_unregister(&XILINX_OF_PLATFORM_DRIVER); */
1340clean4:
1341#endif
1342#ifdef OF_PLATFORM_DRIVER
1343        platform_driver_unregister(&OF_PLATFORM_DRIVER);
1344clean3:
1345#endif
1346#ifdef PS3_SYSTEM_BUS_DRIVER
1347        ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1348clean2:
1349#endif
1350#ifdef PLATFORM_DRIVER
1351        platform_driver_unregister(&PLATFORM_DRIVER);
1352clean0:
1353#endif
1354#ifdef CONFIG_DYNAMIC_DEBUG
1355        debugfs_remove(ehci_debug_root);
1356        ehci_debug_root = NULL;
1357#endif
1358        clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1359        return retval;
1360}
1361module_init(ehci_hcd_init);
1362
1363static void __exit ehci_hcd_cleanup(void)
1364{
1365#ifdef XILINX_OF_PLATFORM_DRIVER
1366        platform_driver_unregister(&XILINX_OF_PLATFORM_DRIVER);
1367#endif
1368#ifdef OF_PLATFORM_DRIVER
1369        platform_driver_unregister(&OF_PLATFORM_DRIVER);
1370#endif
1371#ifdef PLATFORM_DRIVER
1372        platform_driver_unregister(&PLATFORM_DRIVER);
1373#endif
1374#ifdef PS3_SYSTEM_BUS_DRIVER
1375        ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1376#endif
1377#ifdef CONFIG_DYNAMIC_DEBUG
1378        debugfs_remove(ehci_debug_root);
1379#endif
1380        clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1381}
1382module_exit(ehci_hcd_cleanup);
1383