linux/drivers/usb/host/xhci-mtk.c
<<
>>
Prefs
   1// SPDX-License-Identifier: GPL-2.0
   2/*
   3 * MediaTek xHCI Host Controller Driver
   4 *
   5 * Copyright (c) 2015 MediaTek Inc.
   6 * Author:
   7 *  Chunfeng Yun <chunfeng.yun@mediatek.com>
   8 */
   9
  10#include <linux/clk.h>
  11#include <linux/dma-mapping.h>
  12#include <linux/iopoll.h>
  13#include <linux/kernel.h>
  14#include <linux/mfd/syscon.h>
  15#include <linux/module.h>
  16#include <linux/of.h>
  17#include <linux/platform_device.h>
  18#include <linux/pm_runtime.h>
  19#include <linux/regmap.h>
  20#include <linux/regulator/consumer.h>
  21
  22#include "xhci.h"
  23#include "xhci-mtk.h"
  24
  25/* ip_pw_ctrl0 register */
  26#define CTRL0_IP_SW_RST BIT(0)
  27
  28/* ip_pw_ctrl1 register */
  29#define CTRL1_IP_HOST_PDN       BIT(0)
  30
  31/* ip_pw_ctrl2 register */
  32#define CTRL2_IP_DEV_PDN        BIT(0)
  33
  34/* ip_pw_sts1 register */
  35#define STS1_IP_SLEEP_STS       BIT(30)
  36#define STS1_U3_MAC_RST BIT(16)
  37#define STS1_XHCI_RST           BIT(11)
  38#define STS1_SYS125_RST BIT(10)
  39#define STS1_REF_RST            BIT(8)
  40#define STS1_SYSPLL_STABLE      BIT(0)
  41
  42/* ip_xhci_cap register */
  43#define CAP_U3_PORT_NUM(p)      ((p) & 0xff)
  44#define CAP_U2_PORT_NUM(p)      (((p) >> 8) & 0xff)
  45
  46/* u3_ctrl_p register */
  47#define CTRL_U3_PORT_HOST_SEL   BIT(2)
  48#define CTRL_U3_PORT_PDN        BIT(1)
  49#define CTRL_U3_PORT_DIS        BIT(0)
  50
  51/* u2_ctrl_p register */
  52#define CTRL_U2_PORT_HOST_SEL   BIT(2)
  53#define CTRL_U2_PORT_PDN        BIT(1)
  54#define CTRL_U2_PORT_DIS        BIT(0)
  55
  56/* u2_phy_pll register */
  57#define CTRL_U2_FORCE_PLL_STB   BIT(28)
  58
  59/* usb remote wakeup registers in syscon */
  60/* mt8173 etc */
  61#define PERI_WK_CTRL1   0x4
  62#define WC1_IS_C(x)     (((x) & 0xf) << 26)  /* cycle debounce */
  63#define WC1_IS_EN       BIT(25)
  64#define WC1_IS_P        BIT(6)  /* polarity for ip sleep */
  65
  66/* mt2712 etc */
  67#define PERI_SSUSB_SPM_CTRL     0x0
  68#define SSC_IP_SLEEP_EN BIT(4)
  69#define SSC_SPM_INT_EN          BIT(1)
  70
  71enum ssusb_uwk_vers {
  72        SSUSB_UWK_V1 = 1,
  73        SSUSB_UWK_V2,
  74};
  75
  76static int xhci_mtk_host_enable(struct xhci_hcd_mtk *mtk)
  77{
  78        struct mu3c_ippc_regs __iomem *ippc = mtk->ippc_regs;
  79        u32 value, check_val;
  80        int u3_ports_disabed = 0;
  81        int ret;
  82        int i;
  83
  84        if (!mtk->has_ippc)
  85                return 0;
  86
  87        /* power on host ip */
  88        value = readl(&ippc->ip_pw_ctr1);
  89        value &= ~CTRL1_IP_HOST_PDN;
  90        writel(value, &ippc->ip_pw_ctr1);
  91
  92        /* power on and enable u3 ports except skipped ones */
  93        for (i = 0; i < mtk->num_u3_ports; i++) {
  94                if ((0x1 << i) & mtk->u3p_dis_msk) {
  95                        u3_ports_disabed++;
  96                        continue;
  97                }
  98
  99                value = readl(&ippc->u3_ctrl_p[i]);
 100                value &= ~(CTRL_U3_PORT_PDN | CTRL_U3_PORT_DIS);
 101                value |= CTRL_U3_PORT_HOST_SEL;
 102                writel(value, &ippc->u3_ctrl_p[i]);
 103        }
 104
 105        /* power on and enable all u2 ports */
 106        for (i = 0; i < mtk->num_u2_ports; i++) {
 107                value = readl(&ippc->u2_ctrl_p[i]);
 108                value &= ~(CTRL_U2_PORT_PDN | CTRL_U2_PORT_DIS);
 109                value |= CTRL_U2_PORT_HOST_SEL;
 110                writel(value, &ippc->u2_ctrl_p[i]);
 111        }
 112
 113        /*
 114         * wait for clocks to be stable, and clock domains reset to
 115         * be inactive after power on and enable ports
 116         */
 117        check_val = STS1_SYSPLL_STABLE | STS1_REF_RST |
 118                        STS1_SYS125_RST | STS1_XHCI_RST;
 119
 120        if (mtk->num_u3_ports > u3_ports_disabed)
 121                check_val |= STS1_U3_MAC_RST;
 122
 123        ret = readl_poll_timeout(&ippc->ip_pw_sts1, value,
 124                          (check_val == (value & check_val)), 100, 20000);
 125        if (ret) {
 126                dev_err(mtk->dev, "clocks are not stable (0x%x)\n", value);
 127                return ret;
 128        }
 129
 130        return 0;
 131}
 132
 133static int xhci_mtk_host_disable(struct xhci_hcd_mtk *mtk)
 134{
 135        struct mu3c_ippc_regs __iomem *ippc = mtk->ippc_regs;
 136        u32 value;
 137        int ret;
 138        int i;
 139
 140        if (!mtk->has_ippc)
 141                return 0;
 142
 143        /* power down u3 ports except skipped ones */
 144        for (i = 0; i < mtk->num_u3_ports; i++) {
 145                if ((0x1 << i) & mtk->u3p_dis_msk)
 146                        continue;
 147
 148                value = readl(&ippc->u3_ctrl_p[i]);
 149                value |= CTRL_U3_PORT_PDN;
 150                writel(value, &ippc->u3_ctrl_p[i]);
 151        }
 152
 153        /* power down all u2 ports */
 154        for (i = 0; i < mtk->num_u2_ports; i++) {
 155                value = readl(&ippc->u2_ctrl_p[i]);
 156                value |= CTRL_U2_PORT_PDN;
 157                writel(value, &ippc->u2_ctrl_p[i]);
 158        }
 159
 160        /* power down host ip */
 161        value = readl(&ippc->ip_pw_ctr1);
 162        value |= CTRL1_IP_HOST_PDN;
 163        writel(value, &ippc->ip_pw_ctr1);
 164
 165        /* wait for host ip to sleep */
 166        ret = readl_poll_timeout(&ippc->ip_pw_sts1, value,
 167                          (value & STS1_IP_SLEEP_STS), 100, 100000);
 168        if (ret) {
 169                dev_err(mtk->dev, "ip sleep failed!!!\n");
 170                return ret;
 171        }
 172        return 0;
 173}
 174
 175static int xhci_mtk_ssusb_config(struct xhci_hcd_mtk *mtk)
 176{
 177        struct mu3c_ippc_regs __iomem *ippc = mtk->ippc_regs;
 178        u32 value;
 179
 180        if (!mtk->has_ippc)
 181                return 0;
 182
 183        /* reset whole ip */
 184        value = readl(&ippc->ip_pw_ctr0);
 185        value |= CTRL0_IP_SW_RST;
 186        writel(value, &ippc->ip_pw_ctr0);
 187        udelay(1);
 188        value = readl(&ippc->ip_pw_ctr0);
 189        value &= ~CTRL0_IP_SW_RST;
 190        writel(value, &ippc->ip_pw_ctr0);
 191
 192        /*
 193         * device ip is default power-on in fact
 194         * power down device ip, otherwise ip-sleep will fail
 195         */
 196        value = readl(&ippc->ip_pw_ctr2);
 197        value |= CTRL2_IP_DEV_PDN;
 198        writel(value, &ippc->ip_pw_ctr2);
 199
 200        value = readl(&ippc->ip_xhci_cap);
 201        mtk->num_u3_ports = CAP_U3_PORT_NUM(value);
 202        mtk->num_u2_ports = CAP_U2_PORT_NUM(value);
 203        dev_dbg(mtk->dev, "%s u2p:%d, u3p:%d\n", __func__,
 204                        mtk->num_u2_ports, mtk->num_u3_ports);
 205
 206        return xhci_mtk_host_enable(mtk);
 207}
 208
 209static int xhci_mtk_clks_get(struct xhci_hcd_mtk *mtk)
 210{
 211        struct device *dev = mtk->dev;
 212
 213        mtk->sys_clk = devm_clk_get(dev, "sys_ck");
 214        if (IS_ERR(mtk->sys_clk)) {
 215                dev_err(dev, "fail to get sys_ck\n");
 216                return PTR_ERR(mtk->sys_clk);
 217        }
 218
 219        mtk->xhci_clk = devm_clk_get_optional(dev, "xhci_ck");
 220        if (IS_ERR(mtk->xhci_clk))
 221                return PTR_ERR(mtk->xhci_clk);
 222
 223        mtk->ref_clk = devm_clk_get_optional(dev, "ref_ck");
 224        if (IS_ERR(mtk->ref_clk))
 225                return PTR_ERR(mtk->ref_clk);
 226
 227        mtk->mcu_clk = devm_clk_get_optional(dev, "mcu_ck");
 228        if (IS_ERR(mtk->mcu_clk))
 229                return PTR_ERR(mtk->mcu_clk);
 230
 231        mtk->dma_clk = devm_clk_get_optional(dev, "dma_ck");
 232        return PTR_ERR_OR_ZERO(mtk->dma_clk);
 233}
 234
 235static int xhci_mtk_clks_enable(struct xhci_hcd_mtk *mtk)
 236{
 237        int ret;
 238
 239        ret = clk_prepare_enable(mtk->ref_clk);
 240        if (ret) {
 241                dev_err(mtk->dev, "failed to enable ref_clk\n");
 242                goto ref_clk_err;
 243        }
 244
 245        ret = clk_prepare_enable(mtk->sys_clk);
 246        if (ret) {
 247                dev_err(mtk->dev, "failed to enable sys_clk\n");
 248                goto sys_clk_err;
 249        }
 250
 251        ret = clk_prepare_enable(mtk->xhci_clk);
 252        if (ret) {
 253                dev_err(mtk->dev, "failed to enable xhci_clk\n");
 254                goto xhci_clk_err;
 255        }
 256
 257        ret = clk_prepare_enable(mtk->mcu_clk);
 258        if (ret) {
 259                dev_err(mtk->dev, "failed to enable mcu_clk\n");
 260                goto mcu_clk_err;
 261        }
 262
 263        ret = clk_prepare_enable(mtk->dma_clk);
 264        if (ret) {
 265                dev_err(mtk->dev, "failed to enable dma_clk\n");
 266                goto dma_clk_err;
 267        }
 268
 269        return 0;
 270
 271dma_clk_err:
 272        clk_disable_unprepare(mtk->mcu_clk);
 273mcu_clk_err:
 274        clk_disable_unprepare(mtk->xhci_clk);
 275xhci_clk_err:
 276        clk_disable_unprepare(mtk->sys_clk);
 277sys_clk_err:
 278        clk_disable_unprepare(mtk->ref_clk);
 279ref_clk_err:
 280        return ret;
 281}
 282
 283static void xhci_mtk_clks_disable(struct xhci_hcd_mtk *mtk)
 284{
 285        clk_disable_unprepare(mtk->dma_clk);
 286        clk_disable_unprepare(mtk->mcu_clk);
 287        clk_disable_unprepare(mtk->xhci_clk);
 288        clk_disable_unprepare(mtk->sys_clk);
 289        clk_disable_unprepare(mtk->ref_clk);
 290}
 291
 292/* only clocks can be turn off for ip-sleep wakeup mode */
 293static void usb_wakeup_ip_sleep_set(struct xhci_hcd_mtk *mtk, bool enable)
 294{
 295        u32 reg, msk, val;
 296
 297        switch (mtk->uwk_vers) {
 298        case SSUSB_UWK_V1:
 299                reg = mtk->uwk_reg_base + PERI_WK_CTRL1;
 300                msk = WC1_IS_EN | WC1_IS_C(0xf) | WC1_IS_P;
 301                val = enable ? (WC1_IS_EN | WC1_IS_C(0x8)) : 0;
 302                break;
 303        case SSUSB_UWK_V2:
 304                reg = mtk->uwk_reg_base + PERI_SSUSB_SPM_CTRL;
 305                msk = SSC_IP_SLEEP_EN | SSC_SPM_INT_EN;
 306                val = enable ? msk : 0;
 307                break;
 308        default:
 309                return;
 310        }
 311        regmap_update_bits(mtk->uwk, reg, msk, val);
 312}
 313
 314static int usb_wakeup_of_property_parse(struct xhci_hcd_mtk *mtk,
 315                                struct device_node *dn)
 316{
 317        struct of_phandle_args args;
 318        int ret;
 319
 320        /* Wakeup function is optional */
 321        mtk->uwk_en = of_property_read_bool(dn, "wakeup-source");
 322        if (!mtk->uwk_en)
 323                return 0;
 324
 325        ret = of_parse_phandle_with_fixed_args(dn,
 326                                "mediatek,syscon-wakeup", 2, 0, &args);
 327        if (ret)
 328                return ret;
 329
 330        mtk->uwk_reg_base = args.args[0];
 331        mtk->uwk_vers = args.args[1];
 332        mtk->uwk = syscon_node_to_regmap(args.np);
 333        of_node_put(args.np);
 334        dev_info(mtk->dev, "uwk - reg:0x%x, version:%d\n",
 335                        mtk->uwk_reg_base, mtk->uwk_vers);
 336
 337        return PTR_ERR_OR_ZERO(mtk->uwk);
 338
 339}
 340
 341static void usb_wakeup_set(struct xhci_hcd_mtk *mtk, bool enable)
 342{
 343        if (mtk->uwk_en)
 344                usb_wakeup_ip_sleep_set(mtk, enable);
 345}
 346
 347static int xhci_mtk_setup(struct usb_hcd *hcd);
 348static const struct xhci_driver_overrides xhci_mtk_overrides __initconst = {
 349        .reset = xhci_mtk_setup,
 350};
 351
 352static struct hc_driver __read_mostly xhci_mtk_hc_driver;
 353
 354static int xhci_mtk_ldos_enable(struct xhci_hcd_mtk *mtk)
 355{
 356        int ret;
 357
 358        ret = regulator_enable(mtk->vbus);
 359        if (ret) {
 360                dev_err(mtk->dev, "failed to enable vbus\n");
 361                return ret;
 362        }
 363
 364        ret = regulator_enable(mtk->vusb33);
 365        if (ret) {
 366                dev_err(mtk->dev, "failed to enable vusb33\n");
 367                regulator_disable(mtk->vbus);
 368                return ret;
 369        }
 370        return 0;
 371}
 372
 373static void xhci_mtk_ldos_disable(struct xhci_hcd_mtk *mtk)
 374{
 375        regulator_disable(mtk->vbus);
 376        regulator_disable(mtk->vusb33);
 377}
 378
 379static void xhci_mtk_quirks(struct device *dev, struct xhci_hcd *xhci)
 380{
 381        struct usb_hcd *hcd = xhci_to_hcd(xhci);
 382        struct xhci_hcd_mtk *mtk = hcd_to_mtk(hcd);
 383
 384        /*
 385         * As of now platform drivers don't provide MSI support so we ensure
 386         * here that the generic code does not try to make a pci_dev from our
 387         * dev struct in order to setup MSI
 388         */
 389        xhci->quirks |= XHCI_PLAT;
 390        xhci->quirks |= XHCI_MTK_HOST;
 391        /*
 392         * MTK host controller gives a spurious successful event after a
 393         * short transfer. Ignore it.
 394         */
 395        xhci->quirks |= XHCI_SPURIOUS_SUCCESS;
 396        if (mtk->lpm_support)
 397                xhci->quirks |= XHCI_LPM_SUPPORT;
 398}
 399
 400/* called during probe() after chip reset completes */
 401static int xhci_mtk_setup(struct usb_hcd *hcd)
 402{
 403        struct xhci_hcd_mtk *mtk = hcd_to_mtk(hcd);
 404        int ret;
 405
 406        if (usb_hcd_is_primary_hcd(hcd)) {
 407                ret = xhci_mtk_ssusb_config(mtk);
 408                if (ret)
 409                        return ret;
 410        }
 411
 412        ret = xhci_gen_setup(hcd, xhci_mtk_quirks);
 413        if (ret)
 414                return ret;
 415
 416        if (usb_hcd_is_primary_hcd(hcd)) {
 417                ret = xhci_mtk_sch_init(mtk);
 418                if (ret)
 419                        return ret;
 420        }
 421
 422        return ret;
 423}
 424
 425static int xhci_mtk_probe(struct platform_device *pdev)
 426{
 427        struct device *dev = &pdev->dev;
 428        struct device_node *node = dev->of_node;
 429        struct xhci_hcd_mtk *mtk;
 430        const struct hc_driver *driver;
 431        struct xhci_hcd *xhci;
 432        struct resource *res;
 433        struct usb_hcd *hcd;
 434        int ret = -ENODEV;
 435        int irq;
 436
 437        if (usb_disabled())
 438                return -ENODEV;
 439
 440        driver = &xhci_mtk_hc_driver;
 441        mtk = devm_kzalloc(dev, sizeof(*mtk), GFP_KERNEL);
 442        if (!mtk)
 443                return -ENOMEM;
 444
 445        mtk->dev = dev;
 446        mtk->vbus = devm_regulator_get(dev, "vbus");
 447        if (IS_ERR(mtk->vbus)) {
 448                dev_err(dev, "fail to get vbus\n");
 449                return PTR_ERR(mtk->vbus);
 450        }
 451
 452        mtk->vusb33 = devm_regulator_get(dev, "vusb33");
 453        if (IS_ERR(mtk->vusb33)) {
 454                dev_err(dev, "fail to get vusb33\n");
 455                return PTR_ERR(mtk->vusb33);
 456        }
 457
 458        ret = xhci_mtk_clks_get(mtk);
 459        if (ret)
 460                return ret;
 461
 462        mtk->lpm_support = of_property_read_bool(node, "usb3-lpm-capable");
 463        /* optional property, ignore the error if it does not exist */
 464        of_property_read_u32(node, "mediatek,u3p-dis-msk",
 465                             &mtk->u3p_dis_msk);
 466
 467        ret = usb_wakeup_of_property_parse(mtk, node);
 468        if (ret) {
 469                dev_err(dev, "failed to parse uwk property\n");
 470                return ret;
 471        }
 472
 473        pm_runtime_enable(dev);
 474        pm_runtime_get_sync(dev);
 475        device_enable_async_suspend(dev);
 476
 477        ret = xhci_mtk_ldos_enable(mtk);
 478        if (ret)
 479                goto disable_pm;
 480
 481        ret = xhci_mtk_clks_enable(mtk);
 482        if (ret)
 483                goto disable_ldos;
 484
 485        irq = platform_get_irq(pdev, 0);
 486        if (irq < 0) {
 487                ret = irq;
 488                goto disable_clk;
 489        }
 490
 491        hcd = usb_create_hcd(driver, dev, dev_name(dev));
 492        if (!hcd) {
 493                ret = -ENOMEM;
 494                goto disable_clk;
 495        }
 496
 497        /*
 498         * USB 2.0 roothub is stored in the platform_device.
 499         * Swap it with mtk HCD.
 500         */
 501        mtk->hcd = platform_get_drvdata(pdev);
 502        platform_set_drvdata(pdev, mtk);
 503
 504        res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mac");
 505        hcd->regs = devm_ioremap_resource(dev, res);
 506        if (IS_ERR(hcd->regs)) {
 507                ret = PTR_ERR(hcd->regs);
 508                goto put_usb2_hcd;
 509        }
 510        hcd->rsrc_start = res->start;
 511        hcd->rsrc_len = resource_size(res);
 512
 513        res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ippc");
 514        if (res) {      /* ippc register is optional */
 515                mtk->ippc_regs = devm_ioremap_resource(dev, res);
 516                if (IS_ERR(mtk->ippc_regs)) {
 517                        ret = PTR_ERR(mtk->ippc_regs);
 518                        goto put_usb2_hcd;
 519                }
 520                mtk->has_ippc = true;
 521        } else {
 522                mtk->has_ippc = false;
 523        }
 524
 525        device_init_wakeup(dev, true);
 526
 527        xhci = hcd_to_xhci(hcd);
 528        xhci->main_hcd = hcd;
 529
 530        /*
 531         * imod_interval is the interrupt moderation value in nanoseconds.
 532         * The increment interval is 8 times as much as that defined in
 533         * the xHCI spec on MTK's controller.
 534         */
 535        xhci->imod_interval = 5000;
 536        device_property_read_u32(dev, "imod-interval-ns", &xhci->imod_interval);
 537
 538        xhci->shared_hcd = usb_create_shared_hcd(driver, dev,
 539                        dev_name(dev), hcd);
 540        if (!xhci->shared_hcd) {
 541                ret = -ENOMEM;
 542                goto disable_device_wakeup;
 543        }
 544
 545        ret = usb_add_hcd(hcd, irq, IRQF_SHARED);
 546        if (ret)
 547                goto put_usb3_hcd;
 548
 549        if (HCC_MAX_PSA(xhci->hcc_params) >= 4)
 550                xhci->shared_hcd->can_do_streams = 1;
 551
 552        ret = usb_add_hcd(xhci->shared_hcd, irq, IRQF_SHARED);
 553        if (ret)
 554                goto dealloc_usb2_hcd;
 555
 556        return 0;
 557
 558dealloc_usb2_hcd:
 559        usb_remove_hcd(hcd);
 560
 561put_usb3_hcd:
 562        xhci_mtk_sch_exit(mtk);
 563        usb_put_hcd(xhci->shared_hcd);
 564
 565disable_device_wakeup:
 566        device_init_wakeup(dev, false);
 567
 568put_usb2_hcd:
 569        usb_put_hcd(hcd);
 570
 571disable_clk:
 572        xhci_mtk_clks_disable(mtk);
 573
 574disable_ldos:
 575        xhci_mtk_ldos_disable(mtk);
 576
 577disable_pm:
 578        pm_runtime_put_sync(dev);
 579        pm_runtime_disable(dev);
 580        return ret;
 581}
 582
 583static int xhci_mtk_remove(struct platform_device *dev)
 584{
 585        struct xhci_hcd_mtk *mtk = platform_get_drvdata(dev);
 586        struct usb_hcd  *hcd = mtk->hcd;
 587        struct xhci_hcd *xhci = hcd_to_xhci(hcd);
 588        struct usb_hcd  *shared_hcd = xhci->shared_hcd;
 589
 590        pm_runtime_put_noidle(&dev->dev);
 591        pm_runtime_disable(&dev->dev);
 592
 593        usb_remove_hcd(shared_hcd);
 594        xhci->shared_hcd = NULL;
 595        device_init_wakeup(&dev->dev, false);
 596
 597        usb_remove_hcd(hcd);
 598        usb_put_hcd(shared_hcd);
 599        usb_put_hcd(hcd);
 600        xhci_mtk_sch_exit(mtk);
 601        xhci_mtk_clks_disable(mtk);
 602        xhci_mtk_ldos_disable(mtk);
 603
 604        return 0;
 605}
 606
 607/*
 608 * if ip sleep fails, and all clocks are disabled, access register will hang
 609 * AHB bus, so stop polling roothubs to avoid regs access on bus suspend.
 610 * and no need to check whether ip sleep failed or not; this will cause SPM
 611 * to wake up system immediately after system suspend complete if ip sleep
 612 * fails, it is what we wanted.
 613 */
 614static int __maybe_unused xhci_mtk_suspend(struct device *dev)
 615{
 616        struct xhci_hcd_mtk *mtk = dev_get_drvdata(dev);
 617        struct usb_hcd *hcd = mtk->hcd;
 618        struct xhci_hcd *xhci = hcd_to_xhci(hcd);
 619
 620        xhci_dbg(xhci, "%s: stop port polling\n", __func__);
 621        clear_bit(HCD_FLAG_POLL_RH, &hcd->flags);
 622        del_timer_sync(&hcd->rh_timer);
 623        clear_bit(HCD_FLAG_POLL_RH, &xhci->shared_hcd->flags);
 624        del_timer_sync(&xhci->shared_hcd->rh_timer);
 625
 626        xhci_mtk_host_disable(mtk);
 627        xhci_mtk_clks_disable(mtk);
 628        usb_wakeup_set(mtk, true);
 629        return 0;
 630}
 631
 632static int __maybe_unused xhci_mtk_resume(struct device *dev)
 633{
 634        struct xhci_hcd_mtk *mtk = dev_get_drvdata(dev);
 635        struct usb_hcd *hcd = mtk->hcd;
 636        struct xhci_hcd *xhci = hcd_to_xhci(hcd);
 637
 638        usb_wakeup_set(mtk, false);
 639        xhci_mtk_clks_enable(mtk);
 640        xhci_mtk_host_enable(mtk);
 641
 642        xhci_dbg(xhci, "%s: restart port polling\n", __func__);
 643        set_bit(HCD_FLAG_POLL_RH, &xhci->shared_hcd->flags);
 644        usb_hcd_poll_rh_status(xhci->shared_hcd);
 645        set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
 646        usb_hcd_poll_rh_status(hcd);
 647        return 0;
 648}
 649
 650static const struct dev_pm_ops xhci_mtk_pm_ops = {
 651        SET_SYSTEM_SLEEP_PM_OPS(xhci_mtk_suspend, xhci_mtk_resume)
 652};
 653#define DEV_PM_OPS IS_ENABLED(CONFIG_PM) ? &xhci_mtk_pm_ops : NULL
 654
 655#ifdef CONFIG_OF
 656static const struct of_device_id mtk_xhci_of_match[] = {
 657        { .compatible = "mediatek,mt8173-xhci"},
 658        { .compatible = "mediatek,mtk-xhci"},
 659        { },
 660};
 661MODULE_DEVICE_TABLE(of, mtk_xhci_of_match);
 662#endif
 663
 664static struct platform_driver mtk_xhci_driver = {
 665        .probe  = xhci_mtk_probe,
 666        .remove = xhci_mtk_remove,
 667        .driver = {
 668                .name = "xhci-mtk",
 669                .pm = DEV_PM_OPS,
 670                .of_match_table = of_match_ptr(mtk_xhci_of_match),
 671        },
 672};
 673MODULE_ALIAS("platform:xhci-mtk");
 674
 675static int __init xhci_mtk_init(void)
 676{
 677        xhci_init_driver(&xhci_mtk_hc_driver, &xhci_mtk_overrides);
 678        return platform_driver_register(&mtk_xhci_driver);
 679}
 680module_init(xhci_mtk_init);
 681
 682static void __exit xhci_mtk_exit(void)
 683{
 684        platform_driver_unregister(&mtk_xhci_driver);
 685}
 686module_exit(xhci_mtk_exit);
 687
 688MODULE_AUTHOR("Chunfeng Yun <chunfeng.yun@mediatek.com>");
 689MODULE_DESCRIPTION("MediaTek xHCI Host Controller Driver");
 690MODULE_LICENSE("GPL v2");
 691