1/* SPDX-License-Identifier: GPL-2.0-only */ 2/* 3 * Copyright (c) 2015, The Linux Foundation. All rights reserved. 4 */ 5 6#ifndef _DT_BINDINGS_CLK_MSM_MMCC_8996_H 7#define _DT_BINDINGS_CLK_MSM_MMCC_8996_H 8 9#define MMPLL0_EARLY 0 10#define MMPLL0_PLL 1 11#define MMPLL1_EARLY 2 12#define MMPLL1_PLL 3 13#define MMPLL2_EARLY 4 14#define MMPLL2_PLL 5 15#define MMPLL3_EARLY 6 16#define MMPLL3_PLL 7 17#define MMPLL4_EARLY 8 18#define MMPLL4_PLL 9 19#define MMPLL5_EARLY 10 20#define MMPLL5_PLL 11 21#define MMPLL8_EARLY 12 22#define MMPLL8_PLL 13 23#define MMPLL9_EARLY 14 24#define MMPLL9_PLL 15 25#define AHB_CLK_SRC 16 26#define AXI_CLK_SRC 17 27#define MAXI_CLK_SRC 18 28#define DSA_CORE_CLK_SRC 19 29#define GFX3D_CLK_SRC 20 30#define RBBMTIMER_CLK_SRC 21 31#define ISENSE_CLK_SRC 22 32#define RBCPR_CLK_SRC 23 33#define VIDEO_CORE_CLK_SRC 24 34#define VIDEO_SUBCORE0_CLK_SRC 25 35#define VIDEO_SUBCORE1_CLK_SRC 26 36#define PCLK0_CLK_SRC 27 37#define PCLK1_CLK_SRC 28 38#define MDP_CLK_SRC 29 39#define EXTPCLK_CLK_SRC 30 40#define VSYNC_CLK_SRC 31 41#define HDMI_CLK_SRC 32 42#define BYTE0_CLK_SRC 33 43#define BYTE1_CLK_SRC 34 44#define ESC0_CLK_SRC 35 45#define ESC1_CLK_SRC 36 46#define CAMSS_GP0_CLK_SRC 37 47#define CAMSS_GP1_CLK_SRC 38 48#define MCLK0_CLK_SRC 39 49#define MCLK1_CLK_SRC 40 50#define MCLK2_CLK_SRC 41 51#define MCLK3_CLK_SRC 42 52#define CCI_CLK_SRC 43 53#define CSI0PHYTIMER_CLK_SRC 44 54#define CSI1PHYTIMER_CLK_SRC 45 55#define CSI2PHYTIMER_CLK_SRC 46 56#define CSIPHY0_3P_CLK_SRC 47 57#define CSIPHY1_3P_CLK_SRC 48 58#define CSIPHY2_3P_CLK_SRC 49 59#define JPEG0_CLK_SRC 50 60#define JPEG2_CLK_SRC 51 61#define JPEG_DMA_CLK_SRC 52 62#define VFE0_CLK_SRC 53 63#define VFE1_CLK_SRC 54 64#define CPP_CLK_SRC 55 65#define CSI0_CLK_SRC 56 66#define CSI1_CLK_SRC 57 67#define CSI2_CLK_SRC 58 68#define CSI3_CLK_SRC 59 69#define FD_CORE_CLK_SRC 60 70#define MMSS_CXO_CLK 61 71#define MMSS_SLEEPCLK_CLK 62 72#define MMSS_MMAGIC_AHB_CLK 63 73#define MMSS_MMAGIC_CFG_AHB_CLK 64 74#define MMSS_MISC_AHB_CLK 65 75#define MMSS_MISC_CXO_CLK 66 76#define MMSS_BTO_AHB_CLK 67 77#define MMSS_MMAGIC_AXI_CLK 68 78#define MMSS_S0_AXI_CLK 69 79#define MMSS_MMAGIC_MAXI_CLK 70 80#define DSA_CORE_CLK 71 81#define DSA_NOC_CFG_AHB_CLK 72 82#define MMAGIC_CAMSS_AXI_CLK 73 83#define MMAGIC_CAMSS_NOC_CFG_AHB_CLK 74 84#define THROTTLE_CAMSS_CXO_CLK 75 85#define THROTTLE_CAMSS_AHB_CLK 76 86#define THROTTLE_CAMSS_AXI_CLK 77 87#define SMMU_VFE_AHB_CLK 78 88#define SMMU_VFE_AXI_CLK 79 89#define SMMU_CPP_AHB_CLK 80 90#define SMMU_CPP_AXI_CLK 81 91#define SMMU_JPEG_AHB_CLK 82 92#define SMMU_JPEG_AXI_CLK 83 93#define MMAGIC_MDSS_AXI_CLK 84 94#define MMAGIC_MDSS_NOC_CFG_AHB_CLK 85 95#define THROTTLE_MDSS_CXO_CLK 86 96#define THROTTLE_MDSS_AHB_CLK 87 97#define THROTTLE_MDSS_AXI_CLK 88 98#define SMMU_ROT_AHB_CLK 89 99#define SMMU_ROT_AXI_CLK 90 100#define SMMU_MDP_AHB_CLK 91 101#define SMMU_MDP_AXI_CLK 92 102#define MMAGIC_VIDEO_AXI_CLK 93 103#define MMAGIC_VIDEO_NOC_CFG_AHB_CLK 94 104#define THROTTLE_VIDEO_CXO_CLK 95 105#define THROTTLE_VIDEO_AHB_CLK 96 106#define THROTTLE_VIDEO_AXI_CLK 97 107#define SMMU_VIDEO_AHB_CLK 98 108#define SMMU_VIDEO_AXI_CLK 99 109#define MMAGIC_BIMC_AXI_CLK 100 110#define MMAGIC_BIMC_NOC_CFG_AHB_CLK 101 111#define GPU_GX_GFX3D_CLK 102 112#define GPU_GX_RBBMTIMER_CLK 103 113#define GPU_AHB_CLK 104 114#define GPU_AON_ISENSE_CLK 105 115#define VMEM_MAXI_CLK 106 116#define VMEM_AHB_CLK 107 117#define MMSS_RBCPR_CLK 108 118#define MMSS_RBCPR_AHB_CLK 109 119#define VIDEO_CORE_CLK 110 120#define VIDEO_AXI_CLK 111 121#define VIDEO_MAXI_CLK 112 122#define VIDEO_AHB_CLK 113 123#define VIDEO_SUBCORE0_CLK 114 124#define VIDEO_SUBCORE1_CLK 115 125#define MDSS_AHB_CLK 116 126#define MDSS_HDMI_AHB_CLK 117 127#define MDSS_AXI_CLK 118 128#define MDSS_PCLK0_CLK 119 129#define MDSS_PCLK1_CLK 120 130#define MDSS_MDP_CLK 121 131#define MDSS_EXTPCLK_CLK 122 132#define MDSS_VSYNC_CLK 123 133#define MDSS_HDMI_CLK 124 134#define MDSS_BYTE0_CLK 125 135#define MDSS_BYTE1_CLK 126 136#define MDSS_ESC0_CLK 127 137#define MDSS_ESC1_CLK 128 138#define CAMSS_TOP_AHB_CLK 129 139#define CAMSS_AHB_CLK 130 140#define CAMSS_MICRO_AHB_CLK 131 141#define CAMSS_GP0_CLK 132 142#define CAMSS_GP1_CLK 133 143#define CAMSS_MCLK0_CLK 134 144#define CAMSS_MCLK1_CLK 135 145#define CAMSS_MCLK2_CLK 136 146#define CAMSS_MCLK3_CLK 137 147#define CAMSS_CCI_CLK 138 148#define CAMSS_CCI_AHB_CLK 139 149#define CAMSS_CSI0PHYTIMER_CLK 140 150#define CAMSS_CSI1PHYTIMER_CLK 141 151#define CAMSS_CSI2PHYTIMER_CLK 142 152#define CAMSS_CSIPHY0_3P_CLK 143 153#define CAMSS_CSIPHY1_3P_CLK 144 154#define CAMSS_CSIPHY2_3P_CLK 145 155#define CAMSS_JPEG0_CLK 146 156#define CAMSS_JPEG2_CLK 147 157#define CAMSS_JPEG_DMA_CLK 148 158#define CAMSS_JPEG_AHB_CLK 149 159#define CAMSS_JPEG_AXI_CLK 150 160#define CAMSS_VFE_AHB_CLK 151 161#define CAMSS_VFE_AXI_CLK 152 162#define CAMSS_VFE0_CLK 153 163#define CAMSS_VFE0_STREAM_CLK 154 164#define CAMSS_VFE0_AHB_CLK 155 165#define CAMSS_VFE1_CLK 156 166#define CAMSS_VFE1_STREAM_CLK 157 167#define CAMSS_VFE1_AHB_CLK 158 168#define CAMSS_CSI_VFE0_CLK 159 169#define CAMSS_CSI_VFE1_CLK 160 170#define CAMSS_CPP_VBIF_AHB_CLK 161 171#define CAMSS_CPP_AXI_CLK 162 172#define CAMSS_CPP_CLK 163 173#define CAMSS_CPP_AHB_CLK 164 174#define CAMSS_CSI0_CLK 165 175#define CAMSS_CSI0_AHB_CLK 166 176#define CAMSS_CSI0PHY_CLK 167 177#define CAMSS_CSI0RDI_CLK 168 178#define CAMSS_CSI0PIX_CLK 169 179#define CAMSS_CSI1_CLK 170 180#define CAMSS_CSI1_AHB_CLK 171 181#define CAMSS_CSI1PHY_CLK 172 182#define CAMSS_CSI1RDI_CLK 173 183#define CAMSS_CSI1PIX_CLK 174 184#define CAMSS_CSI2_CLK 175 185#define CAMSS_CSI2_AHB_CLK 176 186#define CAMSS_CSI2PHY_CLK 177 187#define CAMSS_CSI2RDI_CLK 178 188#define CAMSS_CSI2PIX_CLK 179 189#define CAMSS_CSI3_CLK 180 190#define CAMSS_CSI3_AHB_CLK 181 191#define CAMSS_CSI3PHY_CLK 182 192#define CAMSS_CSI3RDI_CLK 183 193#define CAMSS_CSI3PIX_CLK 184 194#define CAMSS_ISPIF_AHB_CLK 185 195#define FD_CORE_CLK 186 196#define FD_CORE_UAR_CLK 187 197#define FD_AHB_CLK 188 198#define MMSS_SPDM_CSI0_CLK 189 199#define MMSS_SPDM_JPEG_DMA_CLK 190 200#define MMSS_SPDM_CPP_CLK 191 201#define MMSS_SPDM_PCLK0_CLK 192 202#define MMSS_SPDM_AHB_CLK 193 203#define MMSS_SPDM_GFX3D_CLK 194 204#define MMSS_SPDM_PCLK1_CLK 195 205#define MMSS_SPDM_JPEG2_CLK 196 206#define MMSS_SPDM_DEBUG_CLK 197 207#define MMSS_SPDM_VFE1_CLK 198 208#define MMSS_SPDM_VFE0_CLK 199 209#define MMSS_SPDM_VIDEO_CORE_CLK 200 210#define MMSS_SPDM_AXI_CLK 201 211#define MMSS_SPDM_MDP_CLK 202 212#define MMSS_SPDM_JPEG0_CLK 203 213#define MMSS_SPDM_RM_AXI_CLK 204 214#define MMSS_SPDM_RM_MAXI_CLK 205 215 216#define MMAGICAHB_BCR 0 217#define MMAGIC_CFG_BCR 1 218#define MISC_BCR 2 219#define BTO_BCR 3 220#define MMAGICAXI_BCR 4 221#define MMAGICMAXI_BCR 5 222#define DSA_BCR 6 223#define MMAGIC_CAMSS_BCR 7 224#define THROTTLE_CAMSS_BCR 8 225#define SMMU_VFE_BCR 9 226#define SMMU_CPP_BCR 10 227#define SMMU_JPEG_BCR 11 228#define MMAGIC_MDSS_BCR 12 229#define THROTTLE_MDSS_BCR 13 230#define SMMU_ROT_BCR 14 231#define SMMU_MDP_BCR 15 232#define MMAGIC_VIDEO_BCR 16 233#define THROTTLE_VIDEO_BCR 17 234#define SMMU_VIDEO_BCR 18 235#define MMAGIC_BIMC_BCR 19 236#define GPU_GX_BCR 20 237#define GPU_BCR 21 238#define GPU_AON_BCR 22 239#define VMEM_BCR 23 240#define MMSS_RBCPR_BCR 24 241#define VIDEO_BCR 25 242#define MDSS_BCR 26 243#define CAMSS_TOP_BCR 27 244#define CAMSS_AHB_BCR 28 245#define CAMSS_MICRO_BCR 29 246#define CAMSS_CCI_BCR 30 247#define CAMSS_PHY0_BCR 31 248#define CAMSS_PHY1_BCR 32 249#define CAMSS_PHY2_BCR 33 250#define CAMSS_CSIPHY0_3P_BCR 34 251#define CAMSS_CSIPHY1_3P_BCR 35 252#define CAMSS_CSIPHY2_3P_BCR 36 253#define CAMSS_JPEG_BCR 37 254#define CAMSS_VFE_BCR 38 255#define CAMSS_VFE0_BCR 39 256#define CAMSS_VFE1_BCR 40 257#define CAMSS_CSI_VFE0_BCR 41 258#define CAMSS_CSI_VFE1_BCR 42 259#define CAMSS_CPP_TOP_BCR 43 260#define CAMSS_CPP_BCR 44 261#define CAMSS_CSI0_BCR 45 262#define CAMSS_CSI0RDI_BCR 46 263#define CAMSS_CSI0PIX_BCR 47 264#define CAMSS_CSI1_BCR 48 265#define CAMSS_CSI1RDI_BCR 49 266#define CAMSS_CSI1PIX_BCR 50 267#define CAMSS_CSI2_BCR 51 268#define CAMSS_CSI2RDI_BCR 52 269#define CAMSS_CSI2PIX_BCR 53 270#define CAMSS_CSI3_BCR 54 271#define CAMSS_CSI3RDI_BCR 55 272#define CAMSS_CSI3PIX_BCR 56 273#define CAMSS_ISPIF_BCR 57 274#define FD_BCR 58 275#define MMSS_SPDM_RM_BCR 59 276 277/* Indexes for GDSCs */ 278#define MMAGIC_VIDEO_GDSC 0 279#define MMAGIC_MDSS_GDSC 1 280#define MMAGIC_CAMSS_GDSC 2 281#define GPU_GDSC 3 282#define VENUS_GDSC 4 283#define VENUS_CORE0_GDSC 5 284#define VENUS_CORE1_GDSC 6 285#define CAMSS_GDSC 7 286#define VFE0_GDSC 8 287#define VFE1_GDSC 9 288#define JPEG_GDSC 10 289#define CPP_GDSC 11 290#define FD_GDSC 12 291#define MDSS_GDSC 13 292#define GPU_GX_GDSC 14 293#define MMAGIC_BIMC_GDSC 15 294 295#endif 296