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13#ifndef __LINUX_MTD_RAWNAND_H
14#define __LINUX_MTD_RAWNAND_H
15
16#include <linux/mtd/mtd.h>
17#include <linux/mtd/flashchip.h>
18#include <linux/mtd/bbm.h>
19#include <linux/mtd/jedec.h>
20#include <linux/mtd/nand.h>
21#include <linux/mtd/onfi.h>
22#include <linux/mutex.h>
23#include <linux/of.h>
24#include <linux/types.h>
25
26struct nand_chip;
27
28
29#define NAND_MAX_CHIPS 8
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37
38#define NAND_NCE 0x01
39
40#define NAND_CLE 0x02
41
42#define NAND_ALE 0x04
43
44#define NAND_CTRL_CLE (NAND_NCE | NAND_CLE)
45#define NAND_CTRL_ALE (NAND_NCE | NAND_ALE)
46#define NAND_CTRL_CHANGE 0x80
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50
51#define NAND_CMD_READ0 0
52#define NAND_CMD_READ1 1
53#define NAND_CMD_RNDOUT 5
54#define NAND_CMD_PAGEPROG 0x10
55#define NAND_CMD_READOOB 0x50
56#define NAND_CMD_ERASE1 0x60
57#define NAND_CMD_STATUS 0x70
58#define NAND_CMD_SEQIN 0x80
59#define NAND_CMD_RNDIN 0x85
60#define NAND_CMD_READID 0x90
61#define NAND_CMD_ERASE2 0xd0
62#define NAND_CMD_PARAM 0xec
63#define NAND_CMD_GET_FEATURES 0xee
64#define NAND_CMD_SET_FEATURES 0xef
65#define NAND_CMD_RESET 0xff
66
67
68#define NAND_CMD_READSTART 0x30
69#define NAND_CMD_RNDOUTSTART 0xE0
70#define NAND_CMD_CACHEDPROG 0x15
71
72#define NAND_CMD_NONE -1
73
74
75#define NAND_STATUS_FAIL 0x01
76#define NAND_STATUS_FAIL_N1 0x02
77#define NAND_STATUS_TRUE_READY 0x20
78#define NAND_STATUS_READY 0x40
79#define NAND_STATUS_WP 0x80
80
81#define NAND_DATA_IFACE_CHECK_ONLY -1
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85
86enum nand_ecc_mode {
87 NAND_ECC_INVALID,
88 NAND_ECC_NONE,
89 NAND_ECC_SOFT,
90 NAND_ECC_HW,
91 NAND_ECC_HW_SYNDROME,
92 NAND_ECC_ON_DIE,
93};
94
95enum nand_ecc_algo {
96 NAND_ECC_UNKNOWN,
97 NAND_ECC_HAMMING,
98 NAND_ECC_BCH,
99 NAND_ECC_RS,
100};
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106#define NAND_ECC_READ 0
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108#define NAND_ECC_WRITE 1
109
110#define NAND_ECC_READSYN 2
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118#define NAND_ECC_GENERIC_ERASED_CHECK BIT(0)
119#define NAND_ECC_MAXIMIZE BIT(1)
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127#define NAND_BUSWIDTH_16 BIT(1)
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133#define NAND_ECC_SOFT_HAMMING_SM_ORDER BIT(2)
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136#define NAND_CACHEPRG BIT(3)
137
138#define NAND_SAMSUNG_LP_OPTIONS NAND_CACHEPRG
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145#define NAND_NEED_READRDY BIT(8)
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148#define NAND_NO_SUBPAGE_WRITE BIT(9)
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151#define NAND_BROKEN_XD BIT(10)
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154#define NAND_ROM BIT(11)
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157#define NAND_SUBPAGE_READ BIT(12)
158
159#define NAND_HAS_SUBPAGE_READ(chip) ((chip->options & NAND_SUBPAGE_READ))
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164
165#define NAND_NEED_SCRAMBLING BIT(13)
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167
168#define NAND_ROW_ADDR_3 BIT(14)
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172#define NAND_SKIP_BBTSCAN BIT(16)
173
174#define NAND_SCAN_SILENT_NODEV BIT(18)
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182#define NAND_BUSWIDTH_AUTO BIT(19)
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188#define NAND_USES_DMA BIT(20)
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198#define NAND_WAIT_TCCS BIT(21)
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204#define NAND_IS_BOOT_MEDIUM BIT(22)
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211#define NAND_KEEP_TIMINGS BIT(23)
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220#define NAND_BBM_FIRSTPAGE BIT(24)
221#define NAND_BBM_SECONDPAGE BIT(25)
222#define NAND_BBM_LASTPAGE BIT(26)
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230#define NAND_NO_BBM_QUIRK BIT(27)
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233#define NAND_CI_CHIPNR_MSK 0x03
234#define NAND_CI_CELLTYPE_MSK 0x0C
235#define NAND_CI_CELLTYPE_SHIFT 2
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238#define NAND_BBM_POS_SMALL 5
239#define NAND_BBM_POS_LARGE 0
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248
249struct nand_parameters {
250
251 const char *model;
252 bool supports_set_get_features;
253 DECLARE_BITMAP(set_feature_list, ONFI_FEATURE_NUMBER);
254 DECLARE_BITMAP(get_feature_list, ONFI_FEATURE_NUMBER);
255
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257 struct onfi_params *onfi;
258};
259
260
261#define NAND_MAX_ID_LEN 8
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268struct nand_id {
269 u8 data[NAND_MAX_ID_LEN];
270 int len;
271};
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279struct nand_ecc_step_info {
280 int stepsize;
281 const int *strengths;
282 int nstrengths;
283};
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291struct nand_ecc_caps {
292 const struct nand_ecc_step_info *stepinfos;
293 int nstepinfos;
294 int (*calc_ecc_bytes)(int step_size, int strength);
295};
296
297
298#define NAND_ECC_CAPS_SINGLE(__name, __calc, __step, ...) \
299static const int __name##_strengths[] = { __VA_ARGS__ }; \
300static const struct nand_ecc_step_info __name##_stepinfo = { \
301 .stepsize = __step, \
302 .strengths = __name##_strengths, \
303 .nstrengths = ARRAY_SIZE(__name##_strengths), \
304}; \
305static const struct nand_ecc_caps __name = { \
306 .stepinfos = &__name##_stepinfo, \
307 .nstepinfos = 1, \
308 .calc_ecc_bytes = __calc, \
309}
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364struct nand_ecc_ctrl {
365 enum nand_ecc_mode mode;
366 enum nand_ecc_algo algo;
367 int steps;
368 int size;
369 int bytes;
370 int total;
371 int strength;
372 int prepad;
373 int postpad;
374 unsigned int options;
375 void *priv;
376 u8 *calc_buf;
377 u8 *code_buf;
378 void (*hwctl)(struct nand_chip *chip, int mode);
379 int (*calculate)(struct nand_chip *chip, const uint8_t *dat,
380 uint8_t *ecc_code);
381 int (*correct)(struct nand_chip *chip, uint8_t *dat, uint8_t *read_ecc,
382 uint8_t *calc_ecc);
383 int (*read_page_raw)(struct nand_chip *chip, uint8_t *buf,
384 int oob_required, int page);
385 int (*write_page_raw)(struct nand_chip *chip, const uint8_t *buf,
386 int oob_required, int page);
387 int (*read_page)(struct nand_chip *chip, uint8_t *buf,
388 int oob_required, int page);
389 int (*read_subpage)(struct nand_chip *chip, uint32_t offs,
390 uint32_t len, uint8_t *buf, int page);
391 int (*write_subpage)(struct nand_chip *chip, uint32_t offset,
392 uint32_t data_len, const uint8_t *data_buf,
393 int oob_required, int page);
394 int (*write_page)(struct nand_chip *chip, const uint8_t *buf,
395 int oob_required, int page);
396 int (*write_oob_raw)(struct nand_chip *chip, int page);
397 int (*read_oob_raw)(struct nand_chip *chip, int page);
398 int (*read_oob)(struct nand_chip *chip, int page);
399 int (*write_oob)(struct nand_chip *chip, int page);
400};
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453struct nand_sdr_timings {
454 u64 tBERS_max;
455 u32 tCCS_min;
456 u64 tPROG_max;
457 u64 tR_max;
458 u32 tALH_min;
459 u32 tADL_min;
460 u32 tALS_min;
461 u32 tAR_min;
462 u32 tCEA_max;
463 u32 tCEH_min;
464 u32 tCH_min;
465 u32 tCHZ_max;
466 u32 tCLH_min;
467 u32 tCLR_min;
468 u32 tCLS_min;
469 u32 tCOH_min;
470 u32 tCS_min;
471 u32 tDH_min;
472 u32 tDS_min;
473 u32 tFEAT_max;
474 u32 tIR_min;
475 u32 tITC_max;
476 u32 tRC_min;
477 u32 tREA_max;
478 u32 tREH_min;
479 u32 tRHOH_min;
480 u32 tRHW_min;
481 u32 tRHZ_max;
482 u32 tRLOH_min;
483 u32 tRP_min;
484 u32 tRR_min;
485 u64 tRST_max;
486 u32 tWB_max;
487 u32 tWC_min;
488 u32 tWH_min;
489 u32 tWHR_min;
490 u32 tWP_min;
491 u32 tWW_min;
492};
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498enum nand_interface_type {
499 NAND_SDR_IFACE,
500};
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509struct nand_interface_config {
510 enum nand_interface_type type;
511 struct nand_timings {
512 unsigned int mode;
513 union {
514 struct nand_sdr_timings sdr;
515 };
516 } timings;
517};
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523static inline const struct nand_sdr_timings *
524nand_get_sdr_timings(const struct nand_interface_config *conf)
525{
526 if (conf->type != NAND_SDR_IFACE)
527 return ERR_PTR(-EINVAL);
528
529 return &conf->timings.sdr;
530}
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536struct nand_op_cmd_instr {
537 u8 opcode;
538};
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545struct nand_op_addr_instr {
546 unsigned int naddrs;
547 const u8 *addrs;
548};
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562struct nand_op_data_instr {
563 unsigned int len;
564 union {
565 void *in;
566 const void *out;
567 } buf;
568 bool force_8bit;
569};
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575struct nand_op_waitrdy_instr {
576 unsigned int timeout_ms;
577};
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587enum nand_op_instr_type {
588 NAND_OP_CMD_INSTR,
589 NAND_OP_ADDR_INSTR,
590 NAND_OP_DATA_IN_INSTR,
591 NAND_OP_DATA_OUT_INSTR,
592 NAND_OP_WAITRDY_INSTR,
593};
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610struct nand_op_instr {
611 enum nand_op_instr_type type;
612 union {
613 struct nand_op_cmd_instr cmd;
614 struct nand_op_addr_instr addr;
615 struct nand_op_data_instr data;
616 struct nand_op_waitrdy_instr waitrdy;
617 } ctx;
618 unsigned int delay_ns;
619};
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634#define __DIVIDE(dividend, divisor) ({ \
635 (__typeof__(dividend))(sizeof(dividend) <= sizeof(unsigned long) ? \
636 DIV_ROUND_UP(dividend, divisor) : \
637 DIV_ROUND_UP_ULL(dividend, divisor)); \
638 })
639#define PSEC_TO_NSEC(x) __DIVIDE(x, 1000)
640#define PSEC_TO_MSEC(x) __DIVIDE(x, 1000000000)
641
642#define NAND_OP_CMD(id, ns) \
643 { \
644 .type = NAND_OP_CMD_INSTR, \
645 .ctx.cmd.opcode = id, \
646 .delay_ns = ns, \
647 }
648
649#define NAND_OP_ADDR(ncycles, cycles, ns) \
650 { \
651 .type = NAND_OP_ADDR_INSTR, \
652 .ctx.addr = { \
653 .naddrs = ncycles, \
654 .addrs = cycles, \
655 }, \
656 .delay_ns = ns, \
657 }
658
659#define NAND_OP_DATA_IN(l, b, ns) \
660 { \
661 .type = NAND_OP_DATA_IN_INSTR, \
662 .ctx.data = { \
663 .len = l, \
664 .buf.in = b, \
665 .force_8bit = false, \
666 }, \
667 .delay_ns = ns, \
668 }
669
670#define NAND_OP_DATA_OUT(l, b, ns) \
671 { \
672 .type = NAND_OP_DATA_OUT_INSTR, \
673 .ctx.data = { \
674 .len = l, \
675 .buf.out = b, \
676 .force_8bit = false, \
677 }, \
678 .delay_ns = ns, \
679 }
680
681#define NAND_OP_8BIT_DATA_IN(l, b, ns) \
682 { \
683 .type = NAND_OP_DATA_IN_INSTR, \
684 .ctx.data = { \
685 .len = l, \
686 .buf.in = b, \
687 .force_8bit = true, \
688 }, \
689 .delay_ns = ns, \
690 }
691
692#define NAND_OP_8BIT_DATA_OUT(l, b, ns) \
693 { \
694 .type = NAND_OP_DATA_OUT_INSTR, \
695 .ctx.data = { \
696 .len = l, \
697 .buf.out = b, \
698 .force_8bit = true, \
699 }, \
700 .delay_ns = ns, \
701 }
702
703#define NAND_OP_WAIT_RDY(tout_ms, ns) \
704 { \
705 .type = NAND_OP_WAITRDY_INSTR, \
706 .ctx.waitrdy.timeout_ms = tout_ms, \
707 .delay_ns = ns, \
708 }
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727struct nand_subop {
728 unsigned int cs;
729 const struct nand_op_instr *instrs;
730 unsigned int ninstrs;
731 unsigned int first_instr_start_off;
732 unsigned int last_instr_end_off;
733};
734
735unsigned int nand_subop_get_addr_start_off(const struct nand_subop *subop,
736 unsigned int op_id);
737unsigned int nand_subop_get_num_addr_cyc(const struct nand_subop *subop,
738 unsigned int op_id);
739unsigned int nand_subop_get_data_start_off(const struct nand_subop *subop,
740 unsigned int op_id);
741unsigned int nand_subop_get_data_len(const struct nand_subop *subop,
742 unsigned int op_id);
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749struct nand_op_parser_addr_constraints {
750 unsigned int maxcycles;
751};
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757struct nand_op_parser_data_constraints {
758 unsigned int maxlen;
759};
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769struct nand_op_parser_pattern_elem {
770 enum nand_op_instr_type type;
771 bool optional;
772 union {
773 struct nand_op_parser_addr_constraints addr;
774 struct nand_op_parser_data_constraints data;
775 } ctx;
776};
777
778#define NAND_OP_PARSER_PAT_CMD_ELEM(_opt) \
779 { \
780 .type = NAND_OP_CMD_INSTR, \
781 .optional = _opt, \
782 }
783
784#define NAND_OP_PARSER_PAT_ADDR_ELEM(_opt, _maxcycles) \
785 { \
786 .type = NAND_OP_ADDR_INSTR, \
787 .optional = _opt, \
788 .ctx.addr.maxcycles = _maxcycles, \
789 }
790
791#define NAND_OP_PARSER_PAT_DATA_IN_ELEM(_opt, _maxlen) \
792 { \
793 .type = NAND_OP_DATA_IN_INSTR, \
794 .optional = _opt, \
795 .ctx.data.maxlen = _maxlen, \
796 }
797
798#define NAND_OP_PARSER_PAT_DATA_OUT_ELEM(_opt, _maxlen) \
799 { \
800 .type = NAND_OP_DATA_OUT_INSTR, \
801 .optional = _opt, \
802 .ctx.data.maxlen = _maxlen, \
803 }
804
805#define NAND_OP_PARSER_PAT_WAITRDY_ELEM(_opt) \
806 { \
807 .type = NAND_OP_WAITRDY_INSTR, \
808 .optional = _opt, \
809 }
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829struct nand_op_parser_pattern {
830 const struct nand_op_parser_pattern_elem *elems;
831 unsigned int nelems;
832 int (*exec)(struct nand_chip *chip, const struct nand_subop *subop);
833};
834
835#define NAND_OP_PARSER_PATTERN(_exec, ...) \
836 { \
837 .exec = _exec, \
838 .elems = (const struct nand_op_parser_pattern_elem[]) { __VA_ARGS__ }, \
839 .nelems = sizeof((struct nand_op_parser_pattern_elem[]) { __VA_ARGS__ }) / \
840 sizeof(struct nand_op_parser_pattern_elem), \
841 }
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857struct nand_op_parser {
858 const struct nand_op_parser_pattern *patterns;
859 unsigned int npatterns;
860};
861
862#define NAND_OP_PARSER(...) \
863 { \
864 .patterns = (const struct nand_op_parser_pattern[]) { __VA_ARGS__ }, \
865 .npatterns = sizeof((struct nand_op_parser_pattern[]) { __VA_ARGS__ }) / \
866 sizeof(struct nand_op_parser_pattern), \
867 }
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877struct nand_operation {
878 unsigned int cs;
879 const struct nand_op_instr *instrs;
880 unsigned int ninstrs;
881};
882
883#define NAND_OPERATION(_cs, _instrs) \
884 { \
885 .cs = _cs, \
886 .instrs = _instrs, \
887 .ninstrs = ARRAY_SIZE(_instrs), \
888 }
889
890int nand_op_parser_exec_op(struct nand_chip *chip,
891 const struct nand_op_parser *parser,
892 const struct nand_operation *op, bool check_only);
893
894static inline void nand_op_trace(const char *prefix,
895 const struct nand_op_instr *instr)
896{
897#if IS_ENABLED(CONFIG_DYNAMIC_DEBUG) || defined(DEBUG)
898 switch (instr->type) {
899 case NAND_OP_CMD_INSTR:
900 pr_debug("%sCMD [0x%02x]\n", prefix,
901 instr->ctx.cmd.opcode);
902 break;
903 case NAND_OP_ADDR_INSTR:
904 pr_debug("%sADDR [%d cyc: %*ph]\n", prefix,
905 instr->ctx.addr.naddrs,
906 instr->ctx.addr.naddrs < 64 ?
907 instr->ctx.addr.naddrs : 64,
908 instr->ctx.addr.addrs);
909 break;
910 case NAND_OP_DATA_IN_INSTR:
911 pr_debug("%sDATA_IN [%d B%s]\n", prefix,
912 instr->ctx.data.len,
913 instr->ctx.data.force_8bit ?
914 ", force 8-bit" : "");
915 break;
916 case NAND_OP_DATA_OUT_INSTR:
917 pr_debug("%sDATA_OUT [%d B%s]\n", prefix,
918 instr->ctx.data.len,
919 instr->ctx.data.force_8bit ?
920 ", force 8-bit" : "");
921 break;
922 case NAND_OP_WAITRDY_INSTR:
923 pr_debug("%sWAITRDY [max %d ms]\n", prefix,
924 instr->ctx.waitrdy.timeout_ms);
925 break;
926 }
927#endif
928}
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952struct nand_controller_ops {
953 int (*attach_chip)(struct nand_chip *chip);
954 void (*detach_chip)(struct nand_chip *chip);
955 int (*exec_op)(struct nand_chip *chip,
956 const struct nand_operation *op,
957 bool check_only);
958 int (*setup_interface)(struct nand_chip *chip, int chipnr,
959 const struct nand_interface_config *conf);
960};
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968struct nand_controller {
969 struct mutex lock;
970 const struct nand_controller_ops *ops;
971};
972
973static inline void nand_controller_init(struct nand_controller *nfc)
974{
975 mutex_init(&nfc->lock);
976}
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1006struct nand_legacy {
1007 void __iomem *IO_ADDR_R;
1008 void __iomem *IO_ADDR_W;
1009 void (*select_chip)(struct nand_chip *chip, int cs);
1010 u8 (*read_byte)(struct nand_chip *chip);
1011 void (*write_byte)(struct nand_chip *chip, u8 byte);
1012 void (*write_buf)(struct nand_chip *chip, const u8 *buf, int len);
1013 void (*read_buf)(struct nand_chip *chip, u8 *buf, int len);
1014 void (*cmd_ctrl)(struct nand_chip *chip, int dat, unsigned int ctrl);
1015 void (*cmdfunc)(struct nand_chip *chip, unsigned command, int column,
1016 int page_addr);
1017 int (*dev_ready)(struct nand_chip *chip);
1018 int (*waitfunc)(struct nand_chip *chip);
1019 int (*block_bad)(struct nand_chip *chip, loff_t ofs);
1020 int (*block_markbad)(struct nand_chip *chip, loff_t ofs);
1021 int (*set_features)(struct nand_chip *chip, int feature_addr,
1022 u8 *subfeature_para);
1023 int (*get_features)(struct nand_chip *chip, int feature_addr,
1024 u8 *subfeature_para);
1025 int chip_delay;
1026 struct nand_controller dummy_controller;
1027};
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1038struct nand_chip_ops {
1039 int (*suspend)(struct nand_chip *chip);
1040 void (*resume)(struct nand_chip *chip);
1041 int (*lock_area)(struct nand_chip *chip, loff_t ofs, uint64_t len);
1042 int (*unlock_area)(struct nand_chip *chip, loff_t ofs, uint64_t len);
1043 int (*setup_read_retry)(struct nand_chip *chip, int retry_mode);
1044 int (*choose_interface_config)(struct nand_chip *chip,
1045 struct nand_interface_config *iface);
1046};
1047
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1052
1053struct nand_manufacturer {
1054 const struct nand_manufacturer_desc *desc;
1055 void *priv;
1056};
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1113struct nand_chip {
1114 struct nand_device base;
1115 struct nand_id id;
1116 struct nand_parameters parameters;
1117 struct nand_manufacturer manufacturer;
1118 struct nand_chip_ops ops;
1119 struct nand_legacy legacy;
1120 unsigned int options;
1121
1122
1123 const struct nand_interface_config *current_interface_config;
1124 struct nand_interface_config *best_interface_config;
1125
1126
1127 unsigned int bbt_erase_shift;
1128 unsigned int bbt_options;
1129 unsigned int badblockpos;
1130 unsigned int badblockbits;
1131 struct nand_bbt_descr *bbt_td;
1132 struct nand_bbt_descr *bbt_md;
1133 struct nand_bbt_descr *badblock_pattern;
1134 u8 *bbt;
1135
1136
1137 unsigned int page_shift;
1138 unsigned int phys_erase_shift;
1139 unsigned int chip_shift;
1140 unsigned int pagemask;
1141 unsigned int subpagesize;
1142
1143
1144 u8 *data_buf;
1145 u8 *oob_poi;
1146 struct {
1147 unsigned int bitflips;
1148 int page;
1149 } pagecache;
1150 unsigned long buf_align;
1151
1152
1153 struct mutex lock;
1154 unsigned int suspended : 1;
1155 int cur_cs;
1156 int read_retries;
1157
1158
1159 struct nand_controller *controller;
1160 struct nand_ecc_ctrl ecc;
1161 void *priv;
1162};
1163
1164extern const struct mtd_ooblayout_ops nand_ooblayout_sp_ops;
1165extern const struct mtd_ooblayout_ops nand_ooblayout_lp_ops;
1166
1167static inline struct nand_chip *mtd_to_nand(struct mtd_info *mtd)
1168{
1169 return container_of(mtd, struct nand_chip, base.mtd);
1170}
1171
1172static inline struct mtd_info *nand_to_mtd(struct nand_chip *chip)
1173{
1174 return &chip->base.mtd;
1175}
1176
1177static inline void *nand_get_controller_data(struct nand_chip *chip)
1178{
1179 return chip->priv;
1180}
1181
1182static inline void nand_set_controller_data(struct nand_chip *chip, void *priv)
1183{
1184 chip->priv = priv;
1185}
1186
1187static inline void nand_set_manufacturer_data(struct nand_chip *chip,
1188 void *priv)
1189{
1190 chip->manufacturer.priv = priv;
1191}
1192
1193static inline void *nand_get_manufacturer_data(struct nand_chip *chip)
1194{
1195 return chip->manufacturer.priv;
1196}
1197
1198static inline void nand_set_flash_node(struct nand_chip *chip,
1199 struct device_node *np)
1200{
1201 mtd_set_of_node(nand_to_mtd(chip), np);
1202}
1203
1204static inline struct device_node *nand_get_flash_node(struct nand_chip *chip)
1205{
1206 return mtd_get_of_node(nand_to_mtd(chip));
1207}
1208
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1213
1214static inline const struct nand_interface_config *
1215nand_get_interface_config(struct nand_chip *chip)
1216{
1217 return chip->current_interface_config;
1218}
1219
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1224
1225#define LEGACY_ID_NAND(nm, devid, chipsz, erasesz, opts) \
1226 { .name = (nm), {{ .dev_id = (devid) }}, .pagesize = 512, \
1227 .chipsize = (chipsz), .erasesize = (erasesz), .options = (opts) }
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1239#define EXTENDED_ID_NAND(nm, devid, chipsz, opts) \
1240 { .name = (nm), {{ .dev_id = (devid) }}, .chipsize = (chipsz), \
1241 .options = (opts) }
1242
1243#define NAND_ECC_INFO(_strength, _step) \
1244 { .strength_ds = (_strength), .step_ds = (_step) }
1245#define NAND_ECC_STRENGTH(type) ((type)->ecc.strength_ds)
1246#define NAND_ECC_STEP(type) ((type)->ecc.step_ds)
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1273struct nand_flash_dev {
1274 char *name;
1275 union {
1276 struct {
1277 uint8_t mfr_id;
1278 uint8_t dev_id;
1279 };
1280 uint8_t id[NAND_MAX_ID_LEN];
1281 };
1282 unsigned int pagesize;
1283 unsigned int chipsize;
1284 unsigned int erasesize;
1285 unsigned int options;
1286 uint16_t id_len;
1287 uint16_t oobsize;
1288 struct {
1289 uint16_t strength_ds;
1290 uint16_t step_ds;
1291 } ecc;
1292};
1293
1294int nand_create_bbt(struct nand_chip *chip);
1295
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1300
1301static inline bool nand_is_slc(struct nand_chip *chip)
1302{
1303 WARN(nanddev_bits_per_cell(&chip->base) == 0,
1304 "chip->bits_per_cell is used uninitialized\n");
1305 return nanddev_bits_per_cell(&chip->base) == 1;
1306}
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1310
1311
1312static inline int nand_opcode_8bits(unsigned int command)
1313{
1314 switch (command) {
1315 case NAND_CMD_READID:
1316 case NAND_CMD_PARAM:
1317 case NAND_CMD_GET_FEATURES:
1318 case NAND_CMD_SET_FEATURES:
1319 return 1;
1320 default:
1321 break;
1322 }
1323 return 0;
1324}
1325
1326int nand_check_erased_ecc_chunk(void *data, int datalen,
1327 void *ecc, int ecclen,
1328 void *extraoob, int extraooblen,
1329 int threshold);
1330
1331int nand_ecc_choose_conf(struct nand_chip *chip,
1332 const struct nand_ecc_caps *caps, int oobavail);
1333
1334
1335int nand_write_oob_std(struct nand_chip *chip, int page);
1336
1337
1338int nand_read_oob_std(struct nand_chip *chip, int page);
1339
1340
1341int nand_get_set_features_notsupp(struct nand_chip *chip, int addr,
1342 u8 *subfeature_param);
1343
1344
1345int nand_read_page_raw(struct nand_chip *chip, uint8_t *buf, int oob_required,
1346 int page);
1347int nand_monolithic_read_page_raw(struct nand_chip *chip, uint8_t *buf,
1348 int oob_required, int page);
1349
1350
1351int nand_write_page_raw(struct nand_chip *chip, const uint8_t *buf,
1352 int oob_required, int page);
1353int nand_monolithic_write_page_raw(struct nand_chip *chip, const uint8_t *buf,
1354 int oob_required, int page);
1355
1356
1357int nand_reset(struct nand_chip *chip, int chipnr);
1358
1359
1360int nand_reset_op(struct nand_chip *chip);
1361int nand_readid_op(struct nand_chip *chip, u8 addr, void *buf,
1362 unsigned int len);
1363int nand_status_op(struct nand_chip *chip, u8 *status);
1364int nand_erase_op(struct nand_chip *chip, unsigned int eraseblock);
1365int nand_read_page_op(struct nand_chip *chip, unsigned int page,
1366 unsigned int offset_in_page, void *buf, unsigned int len);
1367int nand_change_read_column_op(struct nand_chip *chip,
1368 unsigned int offset_in_page, void *buf,
1369 unsigned int len, bool force_8bit);
1370int nand_read_oob_op(struct nand_chip *chip, unsigned int page,
1371 unsigned int offset_in_page, void *buf, unsigned int len);
1372int nand_prog_page_begin_op(struct nand_chip *chip, unsigned int page,
1373 unsigned int offset_in_page, const void *buf,
1374 unsigned int len);
1375int nand_prog_page_end_op(struct nand_chip *chip);
1376int nand_prog_page_op(struct nand_chip *chip, unsigned int page,
1377 unsigned int offset_in_page, const void *buf,
1378 unsigned int len);
1379int nand_change_write_column_op(struct nand_chip *chip,
1380 unsigned int offset_in_page, const void *buf,
1381 unsigned int len, bool force_8bit);
1382int nand_read_data_op(struct nand_chip *chip, void *buf, unsigned int len,
1383 bool force_8bit, bool check_only);
1384int nand_write_data_op(struct nand_chip *chip, const void *buf,
1385 unsigned int len, bool force_8bit);
1386
1387
1388int nand_scan_with_ids(struct nand_chip *chip, unsigned int max_chips,
1389 struct nand_flash_dev *ids);
1390
1391static inline int nand_scan(struct nand_chip *chip, unsigned int max_chips)
1392{
1393 return nand_scan_with_ids(chip, max_chips, NULL);
1394}
1395
1396
1397void nand_wait_ready(struct nand_chip *chip);
1398
1399
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1402
1403void nand_cleanup(struct nand_chip *chip);
1404
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1408
1409int nand_soft_waitrdy(struct nand_chip *chip, unsigned long timeout_ms);
1410struct gpio_desc;
1411int nand_gpio_waitrdy(struct nand_chip *chip, struct gpio_desc *gpiod,
1412 unsigned long timeout_ms);
1413
1414
1415void nand_select_target(struct nand_chip *chip, unsigned int cs);
1416void nand_deselect_target(struct nand_chip *chip);
1417
1418
1419void nand_extract_bits(u8 *dst, unsigned int dst_off, const u8 *src,
1420 unsigned int src_off, unsigned int nbits);
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1436static inline void *nand_get_data_buf(struct nand_chip *chip)
1437{
1438 chip->pagecache.page = -1;
1439
1440 return chip->data_buf;
1441}
1442
1443#endif
1444