1
2
3
4#ifndef __SDW_REGISTERS_H
5#define __SDW_REGISTERS_H
6
7
8
9
10
11
12#define SDW_REG_SHIFT(n) (ffs(n) - 1)
13
14
15
16
17#define SDW_REGADDR GENMASK(14, 0)
18#define SDW_SCP_ADDRPAGE2_MASK GENMASK(22, 15)
19#define SDW_SCP_ADDRPAGE1_MASK GENMASK(30, 23)
20
21#define SDW_REG_NO_PAGE 0x00008000
22#define SDW_REG_OPTIONAL_PAGE 0x00010000
23#define SDW_REG_MAX 0x80000000
24
25#define SDW_DPN_SIZE 0x100
26#define SDW_BANK1_OFFSET 0x10
27
28
29
30
31
32
33
34
35
36#define SDW_DP0_INT 0x0
37#define SDW_DP0_INTMASK 0x1
38#define SDW_DP0_PORTCTRL 0x2
39#define SDW_DP0_BLOCKCTRL1 0x3
40#define SDW_DP0_PREPARESTATUS 0x4
41#define SDW_DP0_PREPARECTRL 0x5
42
43#define SDW_DP0_INT_TEST_FAIL BIT(0)
44#define SDW_DP0_INT_PORT_READY BIT(1)
45#define SDW_DP0_INT_BRA_FAILURE BIT(2)
46#define SDW_DP0_SDCA_CASCADE BIT(3)
47
48#define SDW_DP0_INT_IMPDEF1 BIT(5)
49#define SDW_DP0_INT_IMPDEF2 BIT(6)
50#define SDW_DP0_INT_IMPDEF3 BIT(7)
51
52#define SDW_DP0_PORTCTRL_DATAMODE GENMASK(3, 2)
53#define SDW_DP0_PORTCTRL_NXTINVBANK BIT(4)
54#define SDW_DP0_PORTCTRL_BPT_PAYLD GENMASK(7, 6)
55
56#define SDW_DP0_CHANNELEN 0x20
57#define SDW_DP0_SAMPLECTRL1 0x22
58#define SDW_DP0_SAMPLECTRL2 0x23
59#define SDW_DP0_OFFSETCTRL1 0x24
60#define SDW_DP0_OFFSETCTRL2 0x25
61#define SDW_DP0_HCTRL 0x26
62#define SDW_DP0_LANECTRL 0x28
63
64
65#define SDW_SCP_INT1 0x40
66#define SDW_SCP_INTMASK1 0x41
67
68#define SDW_SCP_INT1_PARITY BIT(0)
69#define SDW_SCP_INT1_BUS_CLASH BIT(1)
70#define SDW_SCP_INT1_IMPL_DEF BIT(2)
71#define SDW_SCP_INT1_SCP2_CASCADE BIT(7)
72#define SDW_SCP_INT1_PORT0_3 GENMASK(6, 3)
73
74#define SDW_SCP_INTSTAT2 0x42
75#define SDW_SCP_INTSTAT2_SCP3_CASCADE BIT(7)
76#define SDW_SCP_INTSTAT2_PORT4_10 GENMASK(6, 0)
77
78#define SDW_SCP_INTSTAT3 0x43
79#define SDW_SCP_INTSTAT3_PORT11_14 GENMASK(3, 0)
80
81
82#define SDW_NUM_INT_STAT_REGISTERS 3
83
84
85#define SDW_NUM_INT_CLEAR_REGISTERS 1
86
87#define SDW_SCP_CTRL 0x44
88#define SDW_SCP_CTRL_CLK_STP_NOW BIT(1)
89#define SDW_SCP_CTRL_FORCE_RESET BIT(7)
90
91#define SDW_SCP_STAT 0x44
92#define SDW_SCP_STAT_CLK_STP_NF BIT(0)
93#define SDW_SCP_STAT_HPHY_NOK BIT(5)
94#define SDW_SCP_STAT_CURR_BANK BIT(6)
95
96#define SDW_SCP_SYSTEMCTRL 0x45
97#define SDW_SCP_SYSTEMCTRL_CLK_STP_PREP BIT(0)
98#define SDW_SCP_SYSTEMCTRL_CLK_STP_MODE BIT(2)
99#define SDW_SCP_SYSTEMCTRL_WAKE_UP_EN BIT(3)
100#define SDW_SCP_SYSTEMCTRL_HIGH_PHY BIT(4)
101
102#define SDW_SCP_SYSTEMCTRL_CLK_STP_MODE0 0
103#define SDW_SCP_SYSTEMCTRL_CLK_STP_MODE1 BIT(2)
104
105#define SDW_SCP_DEVNUMBER 0x46
106#define SDW_SCP_HIGH_PHY_CHECK 0x47
107#define SDW_SCP_ADDRPAGE1 0x48
108#define SDW_SCP_ADDRPAGE2 0x49
109#define SDW_SCP_KEEPEREN 0x4A
110#define SDW_SCP_BANKDELAY 0x4B
111#define SDW_SCP_COMMIT 0x4C
112
113#define SDW_SCP_BUS_CLOCK_BASE 0x4D
114#define SDW_SCP_BASE_CLOCK_FREQ GENMASK(2, 0)
115#define SDW_SCP_BASE_CLOCK_UNKNOWN 0x0
116#define SDW_SCP_BASE_CLOCK_19200000_HZ 0x1
117#define SDW_SCP_BASE_CLOCK_24000000_HZ 0x2
118#define SDW_SCP_BASE_CLOCK_24576000_HZ 0x3
119#define SDW_SCP_BASE_CLOCK_22579200_HZ 0x4
120#define SDW_SCP_BASE_CLOCK_32000000_HZ 0x5
121#define SDW_SCP_BASE_CLOCK_RESERVED 0x6
122#define SDW_SCP_BASE_CLOCK_IMP_DEF 0x7
123
124
125#define SDW_SCP_TESTMODE 0x4F
126#define SDW_SCP_DEVID_0 0x50
127#define SDW_SCP_DEVID_1 0x51
128#define SDW_SCP_DEVID_2 0x52
129#define SDW_SCP_DEVID_3 0x53
130#define SDW_SCP_DEVID_4 0x54
131#define SDW_SCP_DEVID_5 0x55
132
133
134#define SDW_SCP_SDCA_INT1 0x58
135#define SDW_SCP_SDCA_INT_SDCA_0 BIT(0)
136#define SDW_SCP_SDCA_INT_SDCA_1 BIT(1)
137#define SDW_SCP_SDCA_INT_SDCA_2 BIT(2)
138#define SDW_SCP_SDCA_INT_SDCA_3 BIT(3)
139#define SDW_SCP_SDCA_INT_SDCA_4 BIT(4)
140#define SDW_SCP_SDCA_INT_SDCA_5 BIT(5)
141#define SDW_SCP_SDCA_INT_SDCA_6 BIT(6)
142#define SDW_SCP_SDCA_INT_SDCA_7 BIT(7)
143
144#define SDW_SCP_SDCA_INT2 0x59
145#define SDW_SCP_SDCA_INT_SDCA_8 BIT(0)
146#define SDW_SCP_SDCA_INT_SDCA_9 BIT(1)
147#define SDW_SCP_SDCA_INT_SDCA_10 BIT(2)
148#define SDW_SCP_SDCA_INT_SDCA_11 BIT(3)
149#define SDW_SCP_SDCA_INT_SDCA_12 BIT(4)
150#define SDW_SCP_SDCA_INT_SDCA_13 BIT(5)
151#define SDW_SCP_SDCA_INT_SDCA_14 BIT(6)
152#define SDW_SCP_SDCA_INT_SDCA_15 BIT(7)
153
154#define SDW_SCP_SDCA_INT3 0x5A
155#define SDW_SCP_SDCA_INT_SDCA_16 BIT(0)
156#define SDW_SCP_SDCA_INT_SDCA_17 BIT(1)
157#define SDW_SCP_SDCA_INT_SDCA_18 BIT(2)
158#define SDW_SCP_SDCA_INT_SDCA_19 BIT(3)
159#define SDW_SCP_SDCA_INT_SDCA_20 BIT(4)
160#define SDW_SCP_SDCA_INT_SDCA_21 BIT(5)
161#define SDW_SCP_SDCA_INT_SDCA_22 BIT(6)
162#define SDW_SCP_SDCA_INT_SDCA_23 BIT(7)
163
164#define SDW_SCP_SDCA_INT4 0x5B
165#define SDW_SCP_SDCA_INT_SDCA_24 BIT(0)
166#define SDW_SCP_SDCA_INT_SDCA_25 BIT(1)
167#define SDW_SCP_SDCA_INT_SDCA_26 BIT(2)
168#define SDW_SCP_SDCA_INT_SDCA_27 BIT(3)
169#define SDW_SCP_SDCA_INT_SDCA_28 BIT(4)
170#define SDW_SCP_SDCA_INT_SDCA_29 BIT(5)
171#define SDW_SCP_SDCA_INT_SDCA_30 BIT(6)
172
173
174#define SDW_SCP_SDCA_INTMASK1 0x5C
175#define SDW_SCP_SDCA_INTMASK_SDCA_0 BIT(0)
176#define SDW_SCP_SDCA_INTMASK_SDCA_1 BIT(1)
177#define SDW_SCP_SDCA_INTMASK_SDCA_2 BIT(2)
178#define SDW_SCP_SDCA_INTMASK_SDCA_3 BIT(3)
179#define SDW_SCP_SDCA_INTMASK_SDCA_4 BIT(4)
180#define SDW_SCP_SDCA_INTMASK_SDCA_5 BIT(5)
181#define SDW_SCP_SDCA_INTMASK_SDCA_6 BIT(6)
182#define SDW_SCP_SDCA_INTMASK_SDCA_7 BIT(7)
183
184#define SDW_SCP_SDCA_INTMASK2 0x5D
185#define SDW_SCP_SDCA_INTMASK_SDCA_8 BIT(0)
186#define SDW_SCP_SDCA_INTMASK_SDCA_9 BIT(1)
187#define SDW_SCP_SDCA_INTMASK_SDCA_10 BIT(2)
188#define SDW_SCP_SDCA_INTMASK_SDCA_11 BIT(3)
189#define SDW_SCP_SDCA_INTMASK_SDCA_12 BIT(4)
190#define SDW_SCP_SDCA_INTMASK_SDCA_13 BIT(5)
191#define SDW_SCP_SDCA_INTMASK_SDCA_14 BIT(6)
192#define SDW_SCP_SDCA_INTMASK_SDCA_15 BIT(7)
193
194#define SDW_SCP_SDCA_INTMASK3 0x5E
195#define SDW_SCP_SDCA_INTMASK_SDCA_16 BIT(0)
196#define SDW_SCP_SDCA_INTMASK_SDCA_17 BIT(1)
197#define SDW_SCP_SDCA_INTMASK_SDCA_18 BIT(2)
198#define SDW_SCP_SDCA_INTMASK_SDCA_19 BIT(3)
199#define SDW_SCP_SDCA_INTMASK_SDCA_20 BIT(4)
200#define SDW_SCP_SDCA_INTMASK_SDCA_21 BIT(5)
201#define SDW_SCP_SDCA_INTMASK_SDCA_22 BIT(6)
202#define SDW_SCP_SDCA_INTMASK_SDCA_23 BIT(7)
203
204#define SDW_SCP_SDCA_INTMASK4 0x5F
205#define SDW_SCP_SDCA_INTMASK_SDCA_24 BIT(0)
206#define SDW_SCP_SDCA_INTMASK_SDCA_25 BIT(1)
207#define SDW_SCP_SDCA_INTMASK_SDCA_26 BIT(2)
208#define SDW_SCP_SDCA_INTMASK_SDCA_27 BIT(3)
209#define SDW_SCP_SDCA_INTMASK_SDCA_28 BIT(4)
210#define SDW_SCP_SDCA_INTMASK_SDCA_29 BIT(5)
211#define SDW_SCP_SDCA_INTMASK_SDCA_30 BIT(6)
212
213
214
215#define SDW_SCP_FRAMECTRL_B0 0x60
216#define SDW_SCP_FRAMECTRL_B1 (0x60 + SDW_BANK1_OFFSET)
217#define SDW_SCP_NEXTFRAME_B0 0x61
218#define SDW_SCP_NEXTFRAME_B1 (0x61 + SDW_BANK1_OFFSET)
219
220#define SDW_SCP_BUSCLOCK_SCALE_B0 0x62
221#define SDW_SCP_BUSCLOCK_SCALE_B1 (0x62 + SDW_BANK1_OFFSET)
222#define SDW_SCP_CLOCK_SCALE GENMASK(3, 0)
223
224
225#define SDW_SCP_PHY_OUT_CTRL_0 0x80
226#define SDW_SCP_PHY_OUT_CTRL_1 0x81
227#define SDW_SCP_PHY_OUT_CTRL_2 0x82
228#define SDW_SCP_PHY_OUT_CTRL_3 0x83
229#define SDW_SCP_PHY_OUT_CTRL_4 0x84
230#define SDW_SCP_PHY_OUT_CTRL_5 0x85
231#define SDW_SCP_PHY_OUT_CTRL_6 0x86
232#define SDW_SCP_PHY_OUT_CTRL_7 0x87
233
234#define SDW_SCP_CAP_LOAD_CTRL GENMASK(2, 0)
235#define SDW_SCP_DRIVE_STRENGTH_CTRL GENMASK(5, 3)
236#define SDW_SCP_SLEW_TIME_CTRL GENMASK(7, 6)
237
238
239#define SDW_DPN_INT(n) (0x0 + SDW_DPN_SIZE * (n))
240#define SDW_DPN_INTMASK(n) (0x1 + SDW_DPN_SIZE * (n))
241#define SDW_DPN_PORTCTRL(n) (0x2 + SDW_DPN_SIZE * (n))
242#define SDW_DPN_BLOCKCTRL1(n) (0x3 + SDW_DPN_SIZE * (n))
243#define SDW_DPN_PREPARESTATUS(n) (0x4 + SDW_DPN_SIZE * (n))
244#define SDW_DPN_PREPARECTRL(n) (0x5 + SDW_DPN_SIZE * (n))
245
246#define SDW_DPN_INT_TEST_FAIL BIT(0)
247#define SDW_DPN_INT_PORT_READY BIT(1)
248#define SDW_DPN_INT_IMPDEF1 BIT(5)
249#define SDW_DPN_INT_IMPDEF2 BIT(6)
250#define SDW_DPN_INT_IMPDEF3 BIT(7)
251
252#define SDW_DPN_PORTCTRL_FLOWMODE GENMASK(1, 0)
253#define SDW_DPN_PORTCTRL_DATAMODE GENMASK(3, 2)
254#define SDW_DPN_PORTCTRL_NXTINVBANK BIT(4)
255
256#define SDW_DPN_BLOCKCTRL1_WDLEN GENMASK(5, 0)
257
258#define SDW_DPN_PREPARECTRL_CH_PREP GENMASK(7, 0)
259
260#define SDW_DPN_CHANNELEN_B0(n) (0x20 + SDW_DPN_SIZE * (n))
261#define SDW_DPN_CHANNELEN_B1(n) (0x30 + SDW_DPN_SIZE * (n))
262
263#define SDW_DPN_BLOCKCTRL2_B0(n) (0x21 + SDW_DPN_SIZE * (n))
264#define SDW_DPN_BLOCKCTRL2_B1(n) (0x31 + SDW_DPN_SIZE * (n))
265
266#define SDW_DPN_SAMPLECTRL1_B0(n) (0x22 + SDW_DPN_SIZE * (n))
267#define SDW_DPN_SAMPLECTRL1_B1(n) (0x32 + SDW_DPN_SIZE * (n))
268
269#define SDW_DPN_SAMPLECTRL2_B0(n) (0x23 + SDW_DPN_SIZE * (n))
270#define SDW_DPN_SAMPLECTRL2_B1(n) (0x33 + SDW_DPN_SIZE * (n))
271
272#define SDW_DPN_OFFSETCTRL1_B0(n) (0x24 + SDW_DPN_SIZE * (n))
273#define SDW_DPN_OFFSETCTRL1_B1(n) (0x34 + SDW_DPN_SIZE * (n))
274
275#define SDW_DPN_OFFSETCTRL2_B0(n) (0x25 + SDW_DPN_SIZE * (n))
276#define SDW_DPN_OFFSETCTRL2_B1(n) (0x35 + SDW_DPN_SIZE * (n))
277
278#define SDW_DPN_HCTRL_B0(n) (0x26 + SDW_DPN_SIZE * (n))
279#define SDW_DPN_HCTRL_B1(n) (0x36 + SDW_DPN_SIZE * (n))
280
281#define SDW_DPN_BLOCKCTRL3_B0(n) (0x27 + SDW_DPN_SIZE * (n))
282#define SDW_DPN_BLOCKCTRL3_B1(n) (0x37 + SDW_DPN_SIZE * (n))
283
284#define SDW_DPN_LANECTRL_B0(n) (0x28 + SDW_DPN_SIZE * (n))
285#define SDW_DPN_LANECTRL_B1(n) (0x38 + SDW_DPN_SIZE * (n))
286
287#define SDW_DPN_SAMPLECTRL_LOW GENMASK(7, 0)
288#define SDW_DPN_SAMPLECTRL_HIGH GENMASK(15, 8)
289
290#define SDW_DPN_HCTRL_HSTART GENMASK(7, 4)
291#define SDW_DPN_HCTRL_HSTOP GENMASK(3, 0)
292
293#define SDW_NUM_CASC_PORT_INTSTAT1 4
294#define SDW_CASC_PORT_START_INTSTAT1 0
295#define SDW_CASC_PORT_MASK_INTSTAT1 0x8
296#define SDW_CASC_PORT_REG_OFFSET_INTSTAT1 0x0
297
298#define SDW_NUM_CASC_PORT_INTSTAT2 7
299#define SDW_CASC_PORT_START_INTSTAT2 4
300#define SDW_CASC_PORT_MASK_INTSTAT2 1
301#define SDW_CASC_PORT_REG_OFFSET_INTSTAT2 1
302
303#define SDW_NUM_CASC_PORT_INTSTAT3 4
304#define SDW_CASC_PORT_START_INTSTAT3 11
305#define SDW_CASC_PORT_MASK_INTSTAT3 1
306#define SDW_CASC_PORT_REG_OFFSET_INTSTAT3 2
307
308#endif
309