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24#ifndef _UAPI__SOUND_ASOUND_H
25#define _UAPI__SOUND_ASOUND_H
26
27#if defined(__KERNEL__) || defined(__linux__)
28#include <linux/types.h>
29#include <asm/byteorder.h>
30#else
31#include <endian.h>
32#include <sys/ioctl.h>
33#endif
34
35#ifndef __KERNEL__
36#include <stdlib.h>
37#include <time.h>
38#endif
39
40
41
42
43
44#define SNDRV_PROTOCOL_VERSION(major, minor, subminor) (((major)<<16)|((minor)<<8)|(subminor))
45#define SNDRV_PROTOCOL_MAJOR(version) (((version)>>16)&0xffff)
46#define SNDRV_PROTOCOL_MINOR(version) (((version)>>8)&0xff)
47#define SNDRV_PROTOCOL_MICRO(version) ((version)&0xff)
48#define SNDRV_PROTOCOL_INCOMPATIBLE(kversion, uversion) \
49 (SNDRV_PROTOCOL_MAJOR(kversion) != SNDRV_PROTOCOL_MAJOR(uversion) || \
50 (SNDRV_PROTOCOL_MAJOR(kversion) == SNDRV_PROTOCOL_MAJOR(uversion) && \
51 SNDRV_PROTOCOL_MINOR(kversion) != SNDRV_PROTOCOL_MINOR(uversion)))
52
53
54
55
56
57
58
59struct snd_aes_iec958 {
60 unsigned char status[24];
61 unsigned char subcode[147];
62 unsigned char pad;
63 unsigned char dig_subframe[4];
64};
65
66
67
68
69
70
71
72struct snd_cea_861_aud_if {
73 unsigned char db1_ct_cc;
74 unsigned char db2_sf_ss;
75 unsigned char db3;
76 unsigned char db4_ca;
77 unsigned char db5_dminh_lsv;
78};
79
80
81
82
83
84
85
86#define SNDRV_HWDEP_VERSION SNDRV_PROTOCOL_VERSION(1, 0, 1)
87
88enum {
89 SNDRV_HWDEP_IFACE_OPL2 = 0,
90 SNDRV_HWDEP_IFACE_OPL3,
91 SNDRV_HWDEP_IFACE_OPL4,
92 SNDRV_HWDEP_IFACE_SB16CSP,
93 SNDRV_HWDEP_IFACE_EMU10K1,
94 SNDRV_HWDEP_IFACE_YSS225,
95 SNDRV_HWDEP_IFACE_ICS2115,
96 SNDRV_HWDEP_IFACE_SSCAPE,
97 SNDRV_HWDEP_IFACE_VX,
98 SNDRV_HWDEP_IFACE_MIXART,
99 SNDRV_HWDEP_IFACE_USX2Y,
100 SNDRV_HWDEP_IFACE_EMUX_WAVETABLE,
101 SNDRV_HWDEP_IFACE_BLUETOOTH,
102 SNDRV_HWDEP_IFACE_USX2Y_PCM,
103 SNDRV_HWDEP_IFACE_PCXHR,
104 SNDRV_HWDEP_IFACE_SB_RC,
105 SNDRV_HWDEP_IFACE_HDA,
106 SNDRV_HWDEP_IFACE_USB_STREAM,
107 SNDRV_HWDEP_IFACE_FW_DICE,
108 SNDRV_HWDEP_IFACE_FW_FIREWORKS,
109 SNDRV_HWDEP_IFACE_FW_BEBOB,
110 SNDRV_HWDEP_IFACE_FW_OXFW,
111 SNDRV_HWDEP_IFACE_FW_DIGI00X,
112 SNDRV_HWDEP_IFACE_FW_TASCAM,
113 SNDRV_HWDEP_IFACE_LINE6,
114 SNDRV_HWDEP_IFACE_FW_MOTU,
115 SNDRV_HWDEP_IFACE_FW_FIREFACE,
116
117
118 SNDRV_HWDEP_IFACE_LAST = SNDRV_HWDEP_IFACE_FW_FIREFACE
119};
120
121struct snd_hwdep_info {
122 unsigned int device;
123 int card;
124 unsigned char id[64];
125 unsigned char name[80];
126 int iface;
127 unsigned char reserved[64];
128};
129
130
131struct snd_hwdep_dsp_status {
132 unsigned int version;
133 unsigned char id[32];
134 unsigned int num_dsps;
135 unsigned int dsp_loaded;
136 unsigned int chip_ready;
137 unsigned char reserved[16];
138};
139
140struct snd_hwdep_dsp_image {
141 unsigned int index;
142 unsigned char name[64];
143 unsigned char __user *image;
144 size_t length;
145 unsigned long driver_data;
146};
147
148#define SNDRV_HWDEP_IOCTL_PVERSION _IOR ('H', 0x00, int)
149#define SNDRV_HWDEP_IOCTL_INFO _IOR ('H', 0x01, struct snd_hwdep_info)
150#define SNDRV_HWDEP_IOCTL_DSP_STATUS _IOR('H', 0x02, struct snd_hwdep_dsp_status)
151#define SNDRV_HWDEP_IOCTL_DSP_LOAD _IOW('H', 0x03, struct snd_hwdep_dsp_image)
152
153
154
155
156
157
158
159#define SNDRV_PCM_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 15)
160
161typedef unsigned long snd_pcm_uframes_t;
162typedef signed long snd_pcm_sframes_t;
163
164enum {
165 SNDRV_PCM_CLASS_GENERIC = 0,
166 SNDRV_PCM_CLASS_MULTI,
167 SNDRV_PCM_CLASS_MODEM,
168 SNDRV_PCM_CLASS_DIGITIZER,
169
170 SNDRV_PCM_CLASS_LAST = SNDRV_PCM_CLASS_DIGITIZER,
171};
172
173enum {
174 SNDRV_PCM_SUBCLASS_GENERIC_MIX = 0,
175 SNDRV_PCM_SUBCLASS_MULTI_MIX,
176
177 SNDRV_PCM_SUBCLASS_LAST = SNDRV_PCM_SUBCLASS_MULTI_MIX,
178};
179
180enum {
181 SNDRV_PCM_STREAM_PLAYBACK = 0,
182 SNDRV_PCM_STREAM_CAPTURE,
183 SNDRV_PCM_STREAM_LAST = SNDRV_PCM_STREAM_CAPTURE,
184};
185
186typedef int __bitwise snd_pcm_access_t;
187#define SNDRV_PCM_ACCESS_MMAP_INTERLEAVED ((__force snd_pcm_access_t) 0)
188#define SNDRV_PCM_ACCESS_MMAP_NONINTERLEAVED ((__force snd_pcm_access_t) 1)
189#define SNDRV_PCM_ACCESS_MMAP_COMPLEX ((__force snd_pcm_access_t) 2)
190#define SNDRV_PCM_ACCESS_RW_INTERLEAVED ((__force snd_pcm_access_t) 3)
191#define SNDRV_PCM_ACCESS_RW_NONINTERLEAVED ((__force snd_pcm_access_t) 4)
192#define SNDRV_PCM_ACCESS_LAST SNDRV_PCM_ACCESS_RW_NONINTERLEAVED
193
194typedef int __bitwise snd_pcm_format_t;
195#define SNDRV_PCM_FORMAT_S8 ((__force snd_pcm_format_t) 0)
196#define SNDRV_PCM_FORMAT_U8 ((__force snd_pcm_format_t) 1)
197#define SNDRV_PCM_FORMAT_S16_LE ((__force snd_pcm_format_t) 2)
198#define SNDRV_PCM_FORMAT_S16_BE ((__force snd_pcm_format_t) 3)
199#define SNDRV_PCM_FORMAT_U16_LE ((__force snd_pcm_format_t) 4)
200#define SNDRV_PCM_FORMAT_U16_BE ((__force snd_pcm_format_t) 5)
201#define SNDRV_PCM_FORMAT_S24_LE ((__force snd_pcm_format_t) 6)
202#define SNDRV_PCM_FORMAT_S24_BE ((__force snd_pcm_format_t) 7)
203#define SNDRV_PCM_FORMAT_U24_LE ((__force snd_pcm_format_t) 8)
204#define SNDRV_PCM_FORMAT_U24_BE ((__force snd_pcm_format_t) 9)
205#define SNDRV_PCM_FORMAT_S32_LE ((__force snd_pcm_format_t) 10)
206#define SNDRV_PCM_FORMAT_S32_BE ((__force snd_pcm_format_t) 11)
207#define SNDRV_PCM_FORMAT_U32_LE ((__force snd_pcm_format_t) 12)
208#define SNDRV_PCM_FORMAT_U32_BE ((__force snd_pcm_format_t) 13)
209#define SNDRV_PCM_FORMAT_FLOAT_LE ((__force snd_pcm_format_t) 14)
210#define SNDRV_PCM_FORMAT_FLOAT_BE ((__force snd_pcm_format_t) 15)
211#define SNDRV_PCM_FORMAT_FLOAT64_LE ((__force snd_pcm_format_t) 16)
212#define SNDRV_PCM_FORMAT_FLOAT64_BE ((__force snd_pcm_format_t) 17)
213#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE ((__force snd_pcm_format_t) 18)
214#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE ((__force snd_pcm_format_t) 19)
215#define SNDRV_PCM_FORMAT_MU_LAW ((__force snd_pcm_format_t) 20)
216#define SNDRV_PCM_FORMAT_A_LAW ((__force snd_pcm_format_t) 21)
217#define SNDRV_PCM_FORMAT_IMA_ADPCM ((__force snd_pcm_format_t) 22)
218#define SNDRV_PCM_FORMAT_MPEG ((__force snd_pcm_format_t) 23)
219#define SNDRV_PCM_FORMAT_GSM ((__force snd_pcm_format_t) 24)
220#define SNDRV_PCM_FORMAT_S20_LE ((__force snd_pcm_format_t) 25)
221#define SNDRV_PCM_FORMAT_S20_BE ((__force snd_pcm_format_t) 26)
222#define SNDRV_PCM_FORMAT_U20_LE ((__force snd_pcm_format_t) 27)
223#define SNDRV_PCM_FORMAT_U20_BE ((__force snd_pcm_format_t) 28)
224
225#define SNDRV_PCM_FORMAT_SPECIAL ((__force snd_pcm_format_t) 31)
226#define SNDRV_PCM_FORMAT_S24_3LE ((__force snd_pcm_format_t) 32)
227#define SNDRV_PCM_FORMAT_S24_3BE ((__force snd_pcm_format_t) 33)
228#define SNDRV_PCM_FORMAT_U24_3LE ((__force snd_pcm_format_t) 34)
229#define SNDRV_PCM_FORMAT_U24_3BE ((__force snd_pcm_format_t) 35)
230#define SNDRV_PCM_FORMAT_S20_3LE ((__force snd_pcm_format_t) 36)
231#define SNDRV_PCM_FORMAT_S20_3BE ((__force snd_pcm_format_t) 37)
232#define SNDRV_PCM_FORMAT_U20_3LE ((__force snd_pcm_format_t) 38)
233#define SNDRV_PCM_FORMAT_U20_3BE ((__force snd_pcm_format_t) 39)
234#define SNDRV_PCM_FORMAT_S18_3LE ((__force snd_pcm_format_t) 40)
235#define SNDRV_PCM_FORMAT_S18_3BE ((__force snd_pcm_format_t) 41)
236#define SNDRV_PCM_FORMAT_U18_3LE ((__force snd_pcm_format_t) 42)
237#define SNDRV_PCM_FORMAT_U18_3BE ((__force snd_pcm_format_t) 43)
238#define SNDRV_PCM_FORMAT_G723_24 ((__force snd_pcm_format_t) 44)
239#define SNDRV_PCM_FORMAT_G723_24_1B ((__force snd_pcm_format_t) 45)
240#define SNDRV_PCM_FORMAT_G723_40 ((__force snd_pcm_format_t) 46)
241#define SNDRV_PCM_FORMAT_G723_40_1B ((__force snd_pcm_format_t) 47)
242#define SNDRV_PCM_FORMAT_DSD_U8 ((__force snd_pcm_format_t) 48)
243#define SNDRV_PCM_FORMAT_DSD_U16_LE ((__force snd_pcm_format_t) 49)
244#define SNDRV_PCM_FORMAT_DSD_U32_LE ((__force snd_pcm_format_t) 50)
245#define SNDRV_PCM_FORMAT_DSD_U16_BE ((__force snd_pcm_format_t) 51)
246#define SNDRV_PCM_FORMAT_DSD_U32_BE ((__force snd_pcm_format_t) 52)
247#define SNDRV_PCM_FORMAT_LAST SNDRV_PCM_FORMAT_DSD_U32_BE
248#define SNDRV_PCM_FORMAT_FIRST SNDRV_PCM_FORMAT_S8
249
250#ifdef SNDRV_LITTLE_ENDIAN
251#define SNDRV_PCM_FORMAT_S16 SNDRV_PCM_FORMAT_S16_LE
252#define SNDRV_PCM_FORMAT_U16 SNDRV_PCM_FORMAT_U16_LE
253#define SNDRV_PCM_FORMAT_S24 SNDRV_PCM_FORMAT_S24_LE
254#define SNDRV_PCM_FORMAT_U24 SNDRV_PCM_FORMAT_U24_LE
255#define SNDRV_PCM_FORMAT_S32 SNDRV_PCM_FORMAT_S32_LE
256#define SNDRV_PCM_FORMAT_U32 SNDRV_PCM_FORMAT_U32_LE
257#define SNDRV_PCM_FORMAT_FLOAT SNDRV_PCM_FORMAT_FLOAT_LE
258#define SNDRV_PCM_FORMAT_FLOAT64 SNDRV_PCM_FORMAT_FLOAT64_LE
259#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE
260#define SNDRV_PCM_FORMAT_S20 SNDRV_PCM_FORMAT_S20_LE
261#define SNDRV_PCM_FORMAT_U20 SNDRV_PCM_FORMAT_U20_LE
262#endif
263#ifdef SNDRV_BIG_ENDIAN
264#define SNDRV_PCM_FORMAT_S16 SNDRV_PCM_FORMAT_S16_BE
265#define SNDRV_PCM_FORMAT_U16 SNDRV_PCM_FORMAT_U16_BE
266#define SNDRV_PCM_FORMAT_S24 SNDRV_PCM_FORMAT_S24_BE
267#define SNDRV_PCM_FORMAT_U24 SNDRV_PCM_FORMAT_U24_BE
268#define SNDRV_PCM_FORMAT_S32 SNDRV_PCM_FORMAT_S32_BE
269#define SNDRV_PCM_FORMAT_U32 SNDRV_PCM_FORMAT_U32_BE
270#define SNDRV_PCM_FORMAT_FLOAT SNDRV_PCM_FORMAT_FLOAT_BE
271#define SNDRV_PCM_FORMAT_FLOAT64 SNDRV_PCM_FORMAT_FLOAT64_BE
272#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE
273#define SNDRV_PCM_FORMAT_S20 SNDRV_PCM_FORMAT_S20_BE
274#define SNDRV_PCM_FORMAT_U20 SNDRV_PCM_FORMAT_U20_BE
275#endif
276
277typedef int __bitwise snd_pcm_subformat_t;
278#define SNDRV_PCM_SUBFORMAT_STD ((__force snd_pcm_subformat_t) 0)
279#define SNDRV_PCM_SUBFORMAT_LAST SNDRV_PCM_SUBFORMAT_STD
280
281#define SNDRV_PCM_INFO_MMAP 0x00000001
282#define SNDRV_PCM_INFO_MMAP_VALID 0x00000002
283#define SNDRV_PCM_INFO_DOUBLE 0x00000004
284#define SNDRV_PCM_INFO_BATCH 0x00000010
285#define SNDRV_PCM_INFO_SYNC_APPLPTR 0x00000020
286#define SNDRV_PCM_INFO_INTERLEAVED 0x00000100
287#define SNDRV_PCM_INFO_NONINTERLEAVED 0x00000200
288#define SNDRV_PCM_INFO_COMPLEX 0x00000400
289#define SNDRV_PCM_INFO_BLOCK_TRANSFER 0x00010000
290#define SNDRV_PCM_INFO_OVERRANGE 0x00020000
291#define SNDRV_PCM_INFO_RESUME 0x00040000
292#define SNDRV_PCM_INFO_PAUSE 0x00080000
293#define SNDRV_PCM_INFO_HALF_DUPLEX 0x00100000
294#define SNDRV_PCM_INFO_JOINT_DUPLEX 0x00200000
295#define SNDRV_PCM_INFO_SYNC_START 0x00400000
296#define SNDRV_PCM_INFO_NO_PERIOD_WAKEUP 0x00800000
297#define SNDRV_PCM_INFO_HAS_WALL_CLOCK 0x01000000
298#define SNDRV_PCM_INFO_HAS_LINK_ATIME 0x01000000
299#define SNDRV_PCM_INFO_HAS_LINK_ABSOLUTE_ATIME 0x02000000
300#define SNDRV_PCM_INFO_HAS_LINK_ESTIMATED_ATIME 0x04000000
301#define SNDRV_PCM_INFO_HAS_LINK_SYNCHRONIZED_ATIME 0x08000000
302
303#define SNDRV_PCM_INFO_DRAIN_TRIGGER 0x40000000
304#define SNDRV_PCM_INFO_FIFO_IN_FRAMES 0x80000000
305
306#if (__BITS_PER_LONG == 32 && defined(__USE_TIME_BITS64)) || defined __KERNEL__
307#define __SND_STRUCT_TIME64
308#endif
309
310typedef int __bitwise snd_pcm_state_t;
311#define SNDRV_PCM_STATE_OPEN ((__force snd_pcm_state_t) 0)
312#define SNDRV_PCM_STATE_SETUP ((__force snd_pcm_state_t) 1)
313#define SNDRV_PCM_STATE_PREPARED ((__force snd_pcm_state_t) 2)
314#define SNDRV_PCM_STATE_RUNNING ((__force snd_pcm_state_t) 3)
315#define SNDRV_PCM_STATE_XRUN ((__force snd_pcm_state_t) 4)
316#define SNDRV_PCM_STATE_DRAINING ((__force snd_pcm_state_t) 5)
317#define SNDRV_PCM_STATE_PAUSED ((__force snd_pcm_state_t) 6)
318#define SNDRV_PCM_STATE_SUSPENDED ((__force snd_pcm_state_t) 7)
319#define SNDRV_PCM_STATE_DISCONNECTED ((__force snd_pcm_state_t) 8)
320#define SNDRV_PCM_STATE_LAST SNDRV_PCM_STATE_DISCONNECTED
321
322enum {
323 SNDRV_PCM_MMAP_OFFSET_DATA = 0x00000000,
324 SNDRV_PCM_MMAP_OFFSET_STATUS_OLD = 0x80000000,
325 SNDRV_PCM_MMAP_OFFSET_CONTROL_OLD = 0x81000000,
326 SNDRV_PCM_MMAP_OFFSET_STATUS_NEW = 0x82000000,
327 SNDRV_PCM_MMAP_OFFSET_CONTROL_NEW = 0x83000000,
328#ifdef __SND_STRUCT_TIME64
329 SNDRV_PCM_MMAP_OFFSET_STATUS = SNDRV_PCM_MMAP_OFFSET_STATUS_NEW,
330 SNDRV_PCM_MMAP_OFFSET_CONTROL = SNDRV_PCM_MMAP_OFFSET_CONTROL_NEW,
331#else
332 SNDRV_PCM_MMAP_OFFSET_STATUS = SNDRV_PCM_MMAP_OFFSET_STATUS_OLD,
333 SNDRV_PCM_MMAP_OFFSET_CONTROL = SNDRV_PCM_MMAP_OFFSET_CONTROL_OLD,
334#endif
335};
336
337union snd_pcm_sync_id {
338 unsigned char id[16];
339 unsigned short id16[8];
340 unsigned int id32[4];
341};
342
343struct snd_pcm_info {
344 unsigned int device;
345 unsigned int subdevice;
346 int stream;
347 int card;
348 unsigned char id[64];
349 unsigned char name[80];
350 unsigned char subname[32];
351 int dev_class;
352 int dev_subclass;
353 unsigned int subdevices_count;
354 unsigned int subdevices_avail;
355 union snd_pcm_sync_id sync;
356 unsigned char reserved[64];
357};
358
359typedef int snd_pcm_hw_param_t;
360#define SNDRV_PCM_HW_PARAM_ACCESS 0
361#define SNDRV_PCM_HW_PARAM_FORMAT 1
362#define SNDRV_PCM_HW_PARAM_SUBFORMAT 2
363#define SNDRV_PCM_HW_PARAM_FIRST_MASK SNDRV_PCM_HW_PARAM_ACCESS
364#define SNDRV_PCM_HW_PARAM_LAST_MASK SNDRV_PCM_HW_PARAM_SUBFORMAT
365
366#define SNDRV_PCM_HW_PARAM_SAMPLE_BITS 8
367#define SNDRV_PCM_HW_PARAM_FRAME_BITS 9
368#define SNDRV_PCM_HW_PARAM_CHANNELS 10
369#define SNDRV_PCM_HW_PARAM_RATE 11
370#define SNDRV_PCM_HW_PARAM_PERIOD_TIME 12
371
372
373#define SNDRV_PCM_HW_PARAM_PERIOD_SIZE 13
374
375
376#define SNDRV_PCM_HW_PARAM_PERIOD_BYTES 14
377
378
379#define SNDRV_PCM_HW_PARAM_PERIODS 15
380
381
382#define SNDRV_PCM_HW_PARAM_BUFFER_TIME 16
383
384
385#define SNDRV_PCM_HW_PARAM_BUFFER_SIZE 17
386#define SNDRV_PCM_HW_PARAM_BUFFER_BYTES 18
387#define SNDRV_PCM_HW_PARAM_TICK_TIME 19
388#define SNDRV_PCM_HW_PARAM_FIRST_INTERVAL SNDRV_PCM_HW_PARAM_SAMPLE_BITS
389#define SNDRV_PCM_HW_PARAM_LAST_INTERVAL SNDRV_PCM_HW_PARAM_TICK_TIME
390
391#define SNDRV_PCM_HW_PARAMS_NORESAMPLE (1<<0)
392#define SNDRV_PCM_HW_PARAMS_EXPORT_BUFFER (1<<1)
393#define SNDRV_PCM_HW_PARAMS_NO_PERIOD_WAKEUP (1<<2)
394
395struct snd_interval {
396 unsigned int min, max;
397 unsigned int openmin:1,
398 openmax:1,
399 integer:1,
400 empty:1;
401};
402
403#define SNDRV_MASK_MAX 256
404
405struct snd_mask {
406 __u32 bits[(SNDRV_MASK_MAX+31)/32];
407};
408
409struct snd_pcm_hw_params {
410 unsigned int flags;
411 struct snd_mask masks[SNDRV_PCM_HW_PARAM_LAST_MASK -
412 SNDRV_PCM_HW_PARAM_FIRST_MASK + 1];
413 struct snd_mask mres[5];
414 struct snd_interval intervals[SNDRV_PCM_HW_PARAM_LAST_INTERVAL -
415 SNDRV_PCM_HW_PARAM_FIRST_INTERVAL + 1];
416 struct snd_interval ires[9];
417 unsigned int rmask;
418 unsigned int cmask;
419 unsigned int info;
420 unsigned int msbits;
421 unsigned int rate_num;
422 unsigned int rate_den;
423 snd_pcm_uframes_t fifo_size;
424 unsigned char reserved[64];
425};
426
427enum {
428 SNDRV_PCM_TSTAMP_NONE = 0,
429 SNDRV_PCM_TSTAMP_ENABLE,
430 SNDRV_PCM_TSTAMP_LAST = SNDRV_PCM_TSTAMP_ENABLE,
431};
432
433struct snd_pcm_sw_params {
434 int tstamp_mode;
435 unsigned int period_step;
436 unsigned int sleep_min;
437 snd_pcm_uframes_t avail_min;
438 snd_pcm_uframes_t xfer_align;
439 snd_pcm_uframes_t start_threshold;
440 snd_pcm_uframes_t stop_threshold;
441 snd_pcm_uframes_t silence_threshold;
442 snd_pcm_uframes_t silence_size;
443 snd_pcm_uframes_t boundary;
444 unsigned int proto;
445 unsigned int tstamp_type;
446 unsigned char reserved[56];
447};
448
449struct snd_pcm_channel_info {
450 unsigned int channel;
451 __kernel_off_t offset;
452 unsigned int first;
453 unsigned int step;
454};
455
456enum {
457
458
459
460
461 SNDRV_PCM_AUDIO_TSTAMP_TYPE_COMPAT = 0,
462
463
464 SNDRV_PCM_AUDIO_TSTAMP_TYPE_DEFAULT = 1,
465 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK = 2,
466 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_ABSOLUTE = 3,
467 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_ESTIMATED = 4,
468 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_SYNCHRONIZED = 5,
469 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LAST = SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_SYNCHRONIZED
470};
471
472#ifndef __KERNEL__
473
474typedef struct { unsigned char pad[sizeof(time_t) - sizeof(int)]; } __time_pad;
475
476struct snd_pcm_status {
477 snd_pcm_state_t state;
478 __time_pad pad1;
479 struct timespec trigger_tstamp;
480 struct timespec tstamp;
481 snd_pcm_uframes_t appl_ptr;
482 snd_pcm_uframes_t hw_ptr;
483 snd_pcm_sframes_t delay;
484 snd_pcm_uframes_t avail;
485 snd_pcm_uframes_t avail_max;
486 snd_pcm_uframes_t overrange;
487 snd_pcm_state_t suspended_state;
488 __u32 audio_tstamp_data;
489 struct timespec audio_tstamp;
490 struct timespec driver_tstamp;
491 __u32 audio_tstamp_accuracy;
492 unsigned char reserved[52-2*sizeof(struct timespec)];
493};
494#endif
495
496
497
498
499
500
501#ifdef __SND_STRUCT_TIME64
502#define __snd_pcm_mmap_status64 snd_pcm_mmap_status
503#define __snd_pcm_mmap_control64 snd_pcm_mmap_control
504#define __snd_pcm_sync_ptr64 snd_pcm_sync_ptr
505#ifdef __KERNEL__
506#define __snd_timespec64 __kernel_timespec
507#else
508#define __snd_timespec64 timespec
509#endif
510struct __snd_timespec {
511 __s32 tv_sec;
512 __s32 tv_nsec;
513};
514#else
515#define __snd_pcm_mmap_status snd_pcm_mmap_status
516#define __snd_pcm_mmap_control snd_pcm_mmap_control
517#define __snd_pcm_sync_ptr snd_pcm_sync_ptr
518#define __snd_timespec timespec
519struct __snd_timespec64 {
520 __s64 tv_sec;
521 __s64 tv_nsec;
522};
523
524#endif
525
526struct __snd_pcm_mmap_status {
527 snd_pcm_state_t state;
528 int pad1;
529 snd_pcm_uframes_t hw_ptr;
530 struct __snd_timespec tstamp;
531 snd_pcm_state_t suspended_state;
532 struct __snd_timespec audio_tstamp;
533};
534
535struct __snd_pcm_mmap_control {
536 snd_pcm_uframes_t appl_ptr;
537 snd_pcm_uframes_t avail_min;
538};
539
540#define SNDRV_PCM_SYNC_PTR_HWSYNC (1<<0)
541#define SNDRV_PCM_SYNC_PTR_APPL (1<<1)
542#define SNDRV_PCM_SYNC_PTR_AVAIL_MIN (1<<2)
543
544struct __snd_pcm_sync_ptr {
545 unsigned int flags;
546 union {
547 struct __snd_pcm_mmap_status status;
548 unsigned char reserved[64];
549 } s;
550 union {
551 struct __snd_pcm_mmap_control control;
552 unsigned char reserved[64];
553 } c;
554};
555
556#if defined(__BYTE_ORDER) ? __BYTE_ORDER == __BIG_ENDIAN : defined(__BIG_ENDIAN)
557typedef char __pad_before_uframe[sizeof(__u64) - sizeof(snd_pcm_uframes_t)];
558typedef char __pad_after_uframe[0];
559#endif
560
561#if defined(__BYTE_ORDER) ? __BYTE_ORDER == __LITTLE_ENDIAN : defined(__LITTLE_ENDIAN)
562typedef char __pad_before_uframe[0];
563typedef char __pad_after_uframe[sizeof(__u64) - sizeof(snd_pcm_uframes_t)];
564#endif
565
566struct __snd_pcm_mmap_status64 {
567 snd_pcm_state_t state;
568 __u32 pad1;
569 __pad_before_uframe __pad1;
570 snd_pcm_uframes_t hw_ptr;
571 __pad_after_uframe __pad2;
572 struct __snd_timespec64 tstamp;
573 snd_pcm_state_t suspended_state;
574 __u32 pad3;
575 struct __snd_timespec64 audio_tstamp;
576};
577
578struct __snd_pcm_mmap_control64 {
579 __pad_before_uframe __pad1;
580 snd_pcm_uframes_t appl_ptr;
581 __pad_before_uframe __pad2;
582
583 __pad_before_uframe __pad3;
584 snd_pcm_uframes_t avail_min;
585 __pad_after_uframe __pad4;
586};
587
588struct __snd_pcm_sync_ptr64 {
589 __u32 flags;
590 __u32 pad1;
591 union {
592 struct __snd_pcm_mmap_status64 status;
593 unsigned char reserved[64];
594 } s;
595 union {
596 struct __snd_pcm_mmap_control64 control;
597 unsigned char reserved[64];
598 } c;
599};
600
601struct snd_xferi {
602 snd_pcm_sframes_t result;
603 void __user *buf;
604 snd_pcm_uframes_t frames;
605};
606
607struct snd_xfern {
608 snd_pcm_sframes_t result;
609 void __user * __user *bufs;
610 snd_pcm_uframes_t frames;
611};
612
613enum {
614 SNDRV_PCM_TSTAMP_TYPE_GETTIMEOFDAY = 0,
615 SNDRV_PCM_TSTAMP_TYPE_MONOTONIC,
616 SNDRV_PCM_TSTAMP_TYPE_MONOTONIC_RAW,
617 SNDRV_PCM_TSTAMP_TYPE_LAST = SNDRV_PCM_TSTAMP_TYPE_MONOTONIC_RAW,
618};
619
620
621enum {
622 SNDRV_CHMAP_UNKNOWN = 0,
623 SNDRV_CHMAP_NA,
624 SNDRV_CHMAP_MONO,
625
626 SNDRV_CHMAP_FL,
627 SNDRV_CHMAP_FR,
628 SNDRV_CHMAP_RL,
629 SNDRV_CHMAP_RR,
630 SNDRV_CHMAP_FC,
631 SNDRV_CHMAP_LFE,
632 SNDRV_CHMAP_SL,
633 SNDRV_CHMAP_SR,
634 SNDRV_CHMAP_RC,
635
636 SNDRV_CHMAP_FLC,
637 SNDRV_CHMAP_FRC,
638 SNDRV_CHMAP_RLC,
639 SNDRV_CHMAP_RRC,
640 SNDRV_CHMAP_FLW,
641 SNDRV_CHMAP_FRW,
642 SNDRV_CHMAP_FLH,
643 SNDRV_CHMAP_FCH,
644 SNDRV_CHMAP_FRH,
645 SNDRV_CHMAP_TC,
646 SNDRV_CHMAP_TFL,
647 SNDRV_CHMAP_TFR,
648 SNDRV_CHMAP_TFC,
649 SNDRV_CHMAP_TRL,
650 SNDRV_CHMAP_TRR,
651 SNDRV_CHMAP_TRC,
652
653 SNDRV_CHMAP_TFLC,
654 SNDRV_CHMAP_TFRC,
655 SNDRV_CHMAP_TSL,
656 SNDRV_CHMAP_TSR,
657 SNDRV_CHMAP_LLFE,
658 SNDRV_CHMAP_RLFE,
659 SNDRV_CHMAP_BC,
660 SNDRV_CHMAP_BLC,
661 SNDRV_CHMAP_BRC,
662 SNDRV_CHMAP_LAST = SNDRV_CHMAP_BRC,
663};
664
665#define SNDRV_CHMAP_POSITION_MASK 0xffff
666#define SNDRV_CHMAP_PHASE_INVERSE (0x01 << 16)
667#define SNDRV_CHMAP_DRIVER_SPEC (0x02 << 16)
668
669#define SNDRV_PCM_IOCTL_PVERSION _IOR('A', 0x00, int)
670#define SNDRV_PCM_IOCTL_INFO _IOR('A', 0x01, struct snd_pcm_info)
671#define SNDRV_PCM_IOCTL_TSTAMP _IOW('A', 0x02, int)
672#define SNDRV_PCM_IOCTL_TTSTAMP _IOW('A', 0x03, int)
673#define SNDRV_PCM_IOCTL_USER_PVERSION _IOW('A', 0x04, int)
674#define SNDRV_PCM_IOCTL_HW_REFINE _IOWR('A', 0x10, struct snd_pcm_hw_params)
675#define SNDRV_PCM_IOCTL_HW_PARAMS _IOWR('A', 0x11, struct snd_pcm_hw_params)
676#define SNDRV_PCM_IOCTL_HW_FREE _IO('A', 0x12)
677#define SNDRV_PCM_IOCTL_SW_PARAMS _IOWR('A', 0x13, struct snd_pcm_sw_params)
678#define SNDRV_PCM_IOCTL_STATUS _IOR('A', 0x20, struct snd_pcm_status)
679#define SNDRV_PCM_IOCTL_DELAY _IOR('A', 0x21, snd_pcm_sframes_t)
680#define SNDRV_PCM_IOCTL_HWSYNC _IO('A', 0x22)
681#define __SNDRV_PCM_IOCTL_SYNC_PTR _IOWR('A', 0x23, struct __snd_pcm_sync_ptr)
682#define __SNDRV_PCM_IOCTL_SYNC_PTR64 _IOWR('A', 0x23, struct __snd_pcm_sync_ptr64)
683#define SNDRV_PCM_IOCTL_SYNC_PTR _IOWR('A', 0x23, struct snd_pcm_sync_ptr)
684#define SNDRV_PCM_IOCTL_STATUS_EXT _IOWR('A', 0x24, struct snd_pcm_status)
685#define SNDRV_PCM_IOCTL_CHANNEL_INFO _IOR('A', 0x32, struct snd_pcm_channel_info)
686#define SNDRV_PCM_IOCTL_PREPARE _IO('A', 0x40)
687#define SNDRV_PCM_IOCTL_RESET _IO('A', 0x41)
688#define SNDRV_PCM_IOCTL_START _IO('A', 0x42)
689#define SNDRV_PCM_IOCTL_DROP _IO('A', 0x43)
690#define SNDRV_PCM_IOCTL_DRAIN _IO('A', 0x44)
691#define SNDRV_PCM_IOCTL_PAUSE _IOW('A', 0x45, int)
692#define SNDRV_PCM_IOCTL_REWIND _IOW('A', 0x46, snd_pcm_uframes_t)
693#define SNDRV_PCM_IOCTL_RESUME _IO('A', 0x47)
694#define SNDRV_PCM_IOCTL_XRUN _IO('A', 0x48)
695#define SNDRV_PCM_IOCTL_FORWARD _IOW('A', 0x49, snd_pcm_uframes_t)
696#define SNDRV_PCM_IOCTL_WRITEI_FRAMES _IOW('A', 0x50, struct snd_xferi)
697#define SNDRV_PCM_IOCTL_READI_FRAMES _IOR('A', 0x51, struct snd_xferi)
698#define SNDRV_PCM_IOCTL_WRITEN_FRAMES _IOW('A', 0x52, struct snd_xfern)
699#define SNDRV_PCM_IOCTL_READN_FRAMES _IOR('A', 0x53, struct snd_xfern)
700#define SNDRV_PCM_IOCTL_LINK _IOW('A', 0x60, int)
701#define SNDRV_PCM_IOCTL_UNLINK _IO('A', 0x61)
702
703
704
705
706
707
708
709
710
711
712
713#define SNDRV_RAWMIDI_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 1)
714
715enum {
716 SNDRV_RAWMIDI_STREAM_OUTPUT = 0,
717 SNDRV_RAWMIDI_STREAM_INPUT,
718 SNDRV_RAWMIDI_STREAM_LAST = SNDRV_RAWMIDI_STREAM_INPUT,
719};
720
721#define SNDRV_RAWMIDI_INFO_OUTPUT 0x00000001
722#define SNDRV_RAWMIDI_INFO_INPUT 0x00000002
723#define SNDRV_RAWMIDI_INFO_DUPLEX 0x00000004
724
725struct snd_rawmidi_info {
726 unsigned int device;
727 unsigned int subdevice;
728 int stream;
729 int card;
730 unsigned int flags;
731 unsigned char id[64];
732 unsigned char name[80];
733 unsigned char subname[32];
734 unsigned int subdevices_count;
735 unsigned int subdevices_avail;
736 unsigned char reserved[64];
737};
738
739struct snd_rawmidi_params {
740 int stream;
741 size_t buffer_size;
742 size_t avail_min;
743 unsigned int no_active_sensing: 1;
744 unsigned char reserved[16];
745};
746
747#ifndef __KERNEL__
748struct snd_rawmidi_status {
749 int stream;
750 __time_pad pad1;
751 struct timespec tstamp;
752 size_t avail;
753 size_t xruns;
754 unsigned char reserved[16];
755};
756#endif
757
758#define SNDRV_RAWMIDI_IOCTL_PVERSION _IOR('W', 0x00, int)
759#define SNDRV_RAWMIDI_IOCTL_INFO _IOR('W', 0x01, struct snd_rawmidi_info)
760#define SNDRV_RAWMIDI_IOCTL_PARAMS _IOWR('W', 0x10, struct snd_rawmidi_params)
761#define SNDRV_RAWMIDI_IOCTL_STATUS _IOWR('W', 0x20, struct snd_rawmidi_status)
762#define SNDRV_RAWMIDI_IOCTL_DROP _IOW('W', 0x30, int)
763#define SNDRV_RAWMIDI_IOCTL_DRAIN _IOW('W', 0x31, int)
764
765
766
767
768
769#define SNDRV_TIMER_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 7)
770
771enum {
772 SNDRV_TIMER_CLASS_NONE = -1,
773 SNDRV_TIMER_CLASS_SLAVE = 0,
774 SNDRV_TIMER_CLASS_GLOBAL,
775 SNDRV_TIMER_CLASS_CARD,
776 SNDRV_TIMER_CLASS_PCM,
777 SNDRV_TIMER_CLASS_LAST = SNDRV_TIMER_CLASS_PCM,
778};
779
780
781enum {
782 SNDRV_TIMER_SCLASS_NONE = 0,
783 SNDRV_TIMER_SCLASS_APPLICATION,
784 SNDRV_TIMER_SCLASS_SEQUENCER,
785 SNDRV_TIMER_SCLASS_OSS_SEQUENCER,
786 SNDRV_TIMER_SCLASS_LAST = SNDRV_TIMER_SCLASS_OSS_SEQUENCER,
787};
788
789
790#define SNDRV_TIMER_GLOBAL_SYSTEM 0
791#define SNDRV_TIMER_GLOBAL_RTC 1
792#define SNDRV_TIMER_GLOBAL_HPET 2
793#define SNDRV_TIMER_GLOBAL_HRTIMER 3
794
795
796#define SNDRV_TIMER_FLG_SLAVE (1<<0)
797
798struct snd_timer_id {
799 int dev_class;
800 int dev_sclass;
801 int card;
802 int device;
803 int subdevice;
804};
805
806struct snd_timer_ginfo {
807 struct snd_timer_id tid;
808 unsigned int flags;
809 int card;
810 unsigned char id[64];
811 unsigned char name[80];
812 unsigned long reserved0;
813 unsigned long resolution;
814 unsigned long resolution_min;
815 unsigned long resolution_max;
816 unsigned int clients;
817 unsigned char reserved[32];
818};
819
820struct snd_timer_gparams {
821 struct snd_timer_id tid;
822 unsigned long period_num;
823 unsigned long period_den;
824 unsigned char reserved[32];
825};
826
827struct snd_timer_gstatus {
828 struct snd_timer_id tid;
829 unsigned long resolution;
830 unsigned long resolution_num;
831 unsigned long resolution_den;
832 unsigned char reserved[32];
833};
834
835struct snd_timer_select {
836 struct snd_timer_id id;
837 unsigned char reserved[32];
838};
839
840struct snd_timer_info {
841 unsigned int flags;
842 int card;
843 unsigned char id[64];
844 unsigned char name[80];
845 unsigned long reserved0;
846 unsigned long resolution;
847 unsigned char reserved[64];
848};
849
850#define SNDRV_TIMER_PSFLG_AUTO (1<<0)
851#define SNDRV_TIMER_PSFLG_EXCLUSIVE (1<<1)
852#define SNDRV_TIMER_PSFLG_EARLY_EVENT (1<<2)
853
854struct snd_timer_params {
855 unsigned int flags;
856 unsigned int ticks;
857 unsigned int queue_size;
858 unsigned int reserved0;
859 unsigned int filter;
860 unsigned char reserved[60];
861};
862
863#ifndef __KERNEL__
864struct snd_timer_status {
865 struct timespec tstamp;
866 unsigned int resolution;
867 unsigned int lost;
868 unsigned int overrun;
869 unsigned int queue;
870 unsigned char reserved[64];
871};
872#endif
873
874#define SNDRV_TIMER_IOCTL_PVERSION _IOR('T', 0x00, int)
875#define SNDRV_TIMER_IOCTL_NEXT_DEVICE _IOWR('T', 0x01, struct snd_timer_id)
876#define SNDRV_TIMER_IOCTL_TREAD_OLD _IOW('T', 0x02, int)
877#define SNDRV_TIMER_IOCTL_GINFO _IOWR('T', 0x03, struct snd_timer_ginfo)
878#define SNDRV_TIMER_IOCTL_GPARAMS _IOW('T', 0x04, struct snd_timer_gparams)
879#define SNDRV_TIMER_IOCTL_GSTATUS _IOWR('T', 0x05, struct snd_timer_gstatus)
880#define SNDRV_TIMER_IOCTL_SELECT _IOW('T', 0x10, struct snd_timer_select)
881#define SNDRV_TIMER_IOCTL_INFO _IOR('T', 0x11, struct snd_timer_info)
882#define SNDRV_TIMER_IOCTL_PARAMS _IOW('T', 0x12, struct snd_timer_params)
883#define SNDRV_TIMER_IOCTL_STATUS _IOR('T', 0x14, struct snd_timer_status)
884
885#define SNDRV_TIMER_IOCTL_START _IO('T', 0xa0)
886#define SNDRV_TIMER_IOCTL_STOP _IO('T', 0xa1)
887#define SNDRV_TIMER_IOCTL_CONTINUE _IO('T', 0xa2)
888#define SNDRV_TIMER_IOCTL_PAUSE _IO('T', 0xa3)
889#define SNDRV_TIMER_IOCTL_TREAD64 _IOW('T', 0xa4, int)
890
891#if __BITS_PER_LONG == 64
892#define SNDRV_TIMER_IOCTL_TREAD SNDRV_TIMER_IOCTL_TREAD_OLD
893#else
894#define SNDRV_TIMER_IOCTL_TREAD ((sizeof(__kernel_long_t) >= sizeof(time_t)) ? \
895 SNDRV_TIMER_IOCTL_TREAD_OLD : \
896 SNDRV_TIMER_IOCTL_TREAD64)
897#endif
898
899struct snd_timer_read {
900 unsigned int resolution;
901 unsigned int ticks;
902};
903
904enum {
905 SNDRV_TIMER_EVENT_RESOLUTION = 0,
906 SNDRV_TIMER_EVENT_TICK,
907 SNDRV_TIMER_EVENT_START,
908 SNDRV_TIMER_EVENT_STOP,
909 SNDRV_TIMER_EVENT_CONTINUE,
910 SNDRV_TIMER_EVENT_PAUSE,
911 SNDRV_TIMER_EVENT_EARLY,
912 SNDRV_TIMER_EVENT_SUSPEND,
913 SNDRV_TIMER_EVENT_RESUME,
914
915 SNDRV_TIMER_EVENT_MSTART = SNDRV_TIMER_EVENT_START + 10,
916 SNDRV_TIMER_EVENT_MSTOP = SNDRV_TIMER_EVENT_STOP + 10,
917 SNDRV_TIMER_EVENT_MCONTINUE = SNDRV_TIMER_EVENT_CONTINUE + 10,
918 SNDRV_TIMER_EVENT_MPAUSE = SNDRV_TIMER_EVENT_PAUSE + 10,
919 SNDRV_TIMER_EVENT_MSUSPEND = SNDRV_TIMER_EVENT_SUSPEND + 10,
920 SNDRV_TIMER_EVENT_MRESUME = SNDRV_TIMER_EVENT_RESUME + 10,
921};
922
923#ifndef __KERNEL__
924struct snd_timer_tread {
925 int event;
926 __time_pad pad1;
927 struct timespec tstamp;
928 unsigned int val;
929 __time_pad pad2;
930};
931#endif
932
933
934
935
936
937
938
939#define SNDRV_CTL_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 8)
940
941struct snd_ctl_card_info {
942 int card;
943 int pad;
944 unsigned char id[16];
945 unsigned char driver[16];
946 unsigned char name[32];
947 unsigned char longname[80];
948 unsigned char reserved_[16];
949 unsigned char mixername[80];
950 unsigned char components[128];
951};
952
953typedef int __bitwise snd_ctl_elem_type_t;
954#define SNDRV_CTL_ELEM_TYPE_NONE ((__force snd_ctl_elem_type_t) 0)
955#define SNDRV_CTL_ELEM_TYPE_BOOLEAN ((__force snd_ctl_elem_type_t) 1)
956#define SNDRV_CTL_ELEM_TYPE_INTEGER ((__force snd_ctl_elem_type_t) 2)
957#define SNDRV_CTL_ELEM_TYPE_ENUMERATED ((__force snd_ctl_elem_type_t) 3)
958#define SNDRV_CTL_ELEM_TYPE_BYTES ((__force snd_ctl_elem_type_t) 4)
959#define SNDRV_CTL_ELEM_TYPE_IEC958 ((__force snd_ctl_elem_type_t) 5)
960#define SNDRV_CTL_ELEM_TYPE_INTEGER64 ((__force snd_ctl_elem_type_t) 6)
961#define SNDRV_CTL_ELEM_TYPE_LAST SNDRV_CTL_ELEM_TYPE_INTEGER64
962
963typedef int __bitwise snd_ctl_elem_iface_t;
964#define SNDRV_CTL_ELEM_IFACE_CARD ((__force snd_ctl_elem_iface_t) 0)
965#define SNDRV_CTL_ELEM_IFACE_HWDEP ((__force snd_ctl_elem_iface_t) 1)
966#define SNDRV_CTL_ELEM_IFACE_MIXER ((__force snd_ctl_elem_iface_t) 2)
967#define SNDRV_CTL_ELEM_IFACE_PCM ((__force snd_ctl_elem_iface_t) 3)
968#define SNDRV_CTL_ELEM_IFACE_RAWMIDI ((__force snd_ctl_elem_iface_t) 4)
969#define SNDRV_CTL_ELEM_IFACE_TIMER ((__force snd_ctl_elem_iface_t) 5)
970#define SNDRV_CTL_ELEM_IFACE_SEQUENCER ((__force snd_ctl_elem_iface_t) 6)
971#define SNDRV_CTL_ELEM_IFACE_LAST SNDRV_CTL_ELEM_IFACE_SEQUENCER
972
973#define SNDRV_CTL_ELEM_ACCESS_READ (1<<0)
974#define SNDRV_CTL_ELEM_ACCESS_WRITE (1<<1)
975#define SNDRV_CTL_ELEM_ACCESS_READWRITE (SNDRV_CTL_ELEM_ACCESS_READ|SNDRV_CTL_ELEM_ACCESS_WRITE)
976#define SNDRV_CTL_ELEM_ACCESS_VOLATILE (1<<2)
977
978#define SNDRV_CTL_ELEM_ACCESS_TLV_READ (1<<4)
979#define SNDRV_CTL_ELEM_ACCESS_TLV_WRITE (1<<5)
980#define SNDRV_CTL_ELEM_ACCESS_TLV_READWRITE (SNDRV_CTL_ELEM_ACCESS_TLV_READ|SNDRV_CTL_ELEM_ACCESS_TLV_WRITE)
981#define SNDRV_CTL_ELEM_ACCESS_TLV_COMMAND (1<<6)
982#define SNDRV_CTL_ELEM_ACCESS_INACTIVE (1<<8)
983#define SNDRV_CTL_ELEM_ACCESS_LOCK (1<<9)
984#define SNDRV_CTL_ELEM_ACCESS_OWNER (1<<10)
985#define SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK (1<<28)
986#define SNDRV_CTL_ELEM_ACCESS_USER (1<<29)
987
988
989
990#define SNDRV_CTL_POWER_D0 0x0000
991#define SNDRV_CTL_POWER_D1 0x0100
992#define SNDRV_CTL_POWER_D2 0x0200
993#define SNDRV_CTL_POWER_D3 0x0300
994#define SNDRV_CTL_POWER_D3hot (SNDRV_CTL_POWER_D3|0x0000)
995#define SNDRV_CTL_POWER_D3cold (SNDRV_CTL_POWER_D3|0x0001)
996
997#define SNDRV_CTL_ELEM_ID_NAME_MAXLEN 44
998
999struct snd_ctl_elem_id {
1000 unsigned int numid;
1001 snd_ctl_elem_iface_t iface;
1002 unsigned int device;
1003 unsigned int subdevice;
1004 unsigned char name[SNDRV_CTL_ELEM_ID_NAME_MAXLEN];
1005 unsigned int index;
1006};
1007
1008struct snd_ctl_elem_list {
1009 unsigned int offset;
1010 unsigned int space;
1011 unsigned int used;
1012 unsigned int count;
1013 struct snd_ctl_elem_id __user *pids;
1014 unsigned char reserved[50];
1015};
1016
1017struct snd_ctl_elem_info {
1018 struct snd_ctl_elem_id id;
1019 snd_ctl_elem_type_t type;
1020 unsigned int access;
1021 unsigned int count;
1022 __kernel_pid_t owner;
1023 union {
1024 struct {
1025 long min;
1026 long max;
1027 long step;
1028 } integer;
1029 struct {
1030 long long min;
1031 long long max;
1032 long long step;
1033 } integer64;
1034 struct {
1035 unsigned int items;
1036 unsigned int item;
1037 char name[64];
1038 __u64 names_ptr;
1039 unsigned int names_length;
1040 } enumerated;
1041 unsigned char reserved[128];
1042 } value;
1043 unsigned char reserved[64];
1044};
1045
1046struct snd_ctl_elem_value {
1047 struct snd_ctl_elem_id id;
1048 unsigned int indirect: 1;
1049 union {
1050 union {
1051 long value[128];
1052 long *value_ptr;
1053 } integer;
1054 union {
1055 long long value[64];
1056 long long *value_ptr;
1057 } integer64;
1058 union {
1059 unsigned int item[128];
1060 unsigned int *item_ptr;
1061 } enumerated;
1062 union {
1063 unsigned char data[512];
1064 unsigned char *data_ptr;
1065 } bytes;
1066 struct snd_aes_iec958 iec958;
1067 } value;
1068 unsigned char reserved[128];
1069};
1070
1071struct snd_ctl_tlv {
1072 unsigned int numid;
1073 unsigned int length;
1074 unsigned int tlv[0];
1075};
1076
1077#define SNDRV_CTL_IOCTL_PVERSION _IOR('U', 0x00, int)
1078#define SNDRV_CTL_IOCTL_CARD_INFO _IOR('U', 0x01, struct snd_ctl_card_info)
1079#define SNDRV_CTL_IOCTL_ELEM_LIST _IOWR('U', 0x10, struct snd_ctl_elem_list)
1080#define SNDRV_CTL_IOCTL_ELEM_INFO _IOWR('U', 0x11, struct snd_ctl_elem_info)
1081#define SNDRV_CTL_IOCTL_ELEM_READ _IOWR('U', 0x12, struct snd_ctl_elem_value)
1082#define SNDRV_CTL_IOCTL_ELEM_WRITE _IOWR('U', 0x13, struct snd_ctl_elem_value)
1083#define SNDRV_CTL_IOCTL_ELEM_LOCK _IOW('U', 0x14, struct snd_ctl_elem_id)
1084#define SNDRV_CTL_IOCTL_ELEM_UNLOCK _IOW('U', 0x15, struct snd_ctl_elem_id)
1085#define SNDRV_CTL_IOCTL_SUBSCRIBE_EVENTS _IOWR('U', 0x16, int)
1086#define SNDRV_CTL_IOCTL_ELEM_ADD _IOWR('U', 0x17, struct snd_ctl_elem_info)
1087#define SNDRV_CTL_IOCTL_ELEM_REPLACE _IOWR('U', 0x18, struct snd_ctl_elem_info)
1088#define SNDRV_CTL_IOCTL_ELEM_REMOVE _IOWR('U', 0x19, struct snd_ctl_elem_id)
1089#define SNDRV_CTL_IOCTL_TLV_READ _IOWR('U', 0x1a, struct snd_ctl_tlv)
1090#define SNDRV_CTL_IOCTL_TLV_WRITE _IOWR('U', 0x1b, struct snd_ctl_tlv)
1091#define SNDRV_CTL_IOCTL_TLV_COMMAND _IOWR('U', 0x1c, struct snd_ctl_tlv)
1092#define SNDRV_CTL_IOCTL_HWDEP_NEXT_DEVICE _IOWR('U', 0x20, int)
1093#define SNDRV_CTL_IOCTL_HWDEP_INFO _IOR('U', 0x21, struct snd_hwdep_info)
1094#define SNDRV_CTL_IOCTL_PCM_NEXT_DEVICE _IOR('U', 0x30, int)
1095#define SNDRV_CTL_IOCTL_PCM_INFO _IOWR('U', 0x31, struct snd_pcm_info)
1096#define SNDRV_CTL_IOCTL_PCM_PREFER_SUBDEVICE _IOW('U', 0x32, int)
1097#define SNDRV_CTL_IOCTL_RAWMIDI_NEXT_DEVICE _IOWR('U', 0x40, int)
1098#define SNDRV_CTL_IOCTL_RAWMIDI_INFO _IOWR('U', 0x41, struct snd_rawmidi_info)
1099#define SNDRV_CTL_IOCTL_RAWMIDI_PREFER_SUBDEVICE _IOW('U', 0x42, int)
1100#define SNDRV_CTL_IOCTL_POWER _IOWR('U', 0xd0, int)
1101#define SNDRV_CTL_IOCTL_POWER_STATE _IOR('U', 0xd1, int)
1102
1103
1104
1105
1106
1107enum sndrv_ctl_event_type {
1108 SNDRV_CTL_EVENT_ELEM = 0,
1109 SNDRV_CTL_EVENT_LAST = SNDRV_CTL_EVENT_ELEM,
1110};
1111
1112#define SNDRV_CTL_EVENT_MASK_VALUE (1<<0)
1113#define SNDRV_CTL_EVENT_MASK_INFO (1<<1)
1114#define SNDRV_CTL_EVENT_MASK_ADD (1<<2)
1115#define SNDRV_CTL_EVENT_MASK_TLV (1<<3)
1116#define SNDRV_CTL_EVENT_MASK_REMOVE (~0U)
1117
1118struct snd_ctl_event {
1119 int type;
1120 union {
1121 struct {
1122 unsigned int mask;
1123 struct snd_ctl_elem_id id;
1124 } elem;
1125 unsigned char data8[60];
1126 } data;
1127};
1128
1129
1130
1131
1132
1133#define SNDRV_CTL_NAME_NONE ""
1134#define SNDRV_CTL_NAME_PLAYBACK "Playback "
1135#define SNDRV_CTL_NAME_CAPTURE "Capture "
1136
1137#define SNDRV_CTL_NAME_IEC958_NONE ""
1138#define SNDRV_CTL_NAME_IEC958_SWITCH "Switch"
1139#define SNDRV_CTL_NAME_IEC958_VOLUME "Volume"
1140#define SNDRV_CTL_NAME_IEC958_DEFAULT "Default"
1141#define SNDRV_CTL_NAME_IEC958_MASK "Mask"
1142#define SNDRV_CTL_NAME_IEC958_CON_MASK "Con Mask"
1143#define SNDRV_CTL_NAME_IEC958_PRO_MASK "Pro Mask"
1144#define SNDRV_CTL_NAME_IEC958_PCM_STREAM "PCM Stream"
1145#define SNDRV_CTL_NAME_IEC958(expl,direction,what) "IEC958 " expl SNDRV_CTL_NAME_##direction SNDRV_CTL_NAME_IEC958_##what
1146
1147#endif
1148