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12#include <linux/module.h>
13#include <linux/init.h>
14#include <linux/dmaengine.h>
15#include <linux/slab.h>
16#include <sound/pcm.h>
17#include <sound/pcm_params.h>
18#include <sound/soc.h>
19
20#include <sound/dmaengine_pcm.h>
21
22struct dmaengine_pcm_runtime_data {
23 struct dma_chan *dma_chan;
24 dma_cookie_t cookie;
25
26 unsigned int pos;
27};
28
29static inline struct dmaengine_pcm_runtime_data *substream_to_prtd(
30 const struct snd_pcm_substream *substream)
31{
32 return substream->runtime->private_data;
33}
34
35struct dma_chan *snd_dmaengine_pcm_get_chan(struct snd_pcm_substream *substream)
36{
37 struct dmaengine_pcm_runtime_data *prtd = substream_to_prtd(substream);
38
39 return prtd->dma_chan;
40}
41EXPORT_SYMBOL_GPL(snd_dmaengine_pcm_get_chan);
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51
52int snd_hwparams_to_dma_slave_config(const struct snd_pcm_substream *substream,
53 const struct snd_pcm_hw_params *params,
54 struct dma_slave_config *slave_config)
55{
56 enum dma_slave_buswidth buswidth;
57 int bits;
58
59 bits = params_physical_width(params);
60 if (bits < 8 || bits > 64)
61 return -EINVAL;
62 else if (bits == 8)
63 buswidth = DMA_SLAVE_BUSWIDTH_1_BYTE;
64 else if (bits == 16)
65 buswidth = DMA_SLAVE_BUSWIDTH_2_BYTES;
66 else if (bits == 24)
67 buswidth = DMA_SLAVE_BUSWIDTH_3_BYTES;
68 else if (bits <= 32)
69 buswidth = DMA_SLAVE_BUSWIDTH_4_BYTES;
70 else
71 buswidth = DMA_SLAVE_BUSWIDTH_8_BYTES;
72
73 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
74 slave_config->direction = DMA_MEM_TO_DEV;
75 slave_config->dst_addr_width = buswidth;
76 } else {
77 slave_config->direction = DMA_DEV_TO_MEM;
78 slave_config->src_addr_width = buswidth;
79 }
80
81 slave_config->device_fc = false;
82
83 return 0;
84}
85EXPORT_SYMBOL_GPL(snd_hwparams_to_dma_slave_config);
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104void snd_dmaengine_pcm_set_config_from_dai_data(
105 const struct snd_pcm_substream *substream,
106 const struct snd_dmaengine_dai_dma_data *dma_data,
107 struct dma_slave_config *slave_config)
108{
109 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
110 slave_config->dst_addr = dma_data->addr;
111 slave_config->dst_maxburst = dma_data->maxburst;
112 if (dma_data->flags & SND_DMAENGINE_PCM_DAI_FLAG_PACK)
113 slave_config->dst_addr_width =
114 DMA_SLAVE_BUSWIDTH_UNDEFINED;
115 if (dma_data->addr_width != DMA_SLAVE_BUSWIDTH_UNDEFINED)
116 slave_config->dst_addr_width = dma_data->addr_width;
117 } else {
118 slave_config->src_addr = dma_data->addr;
119 slave_config->src_maxburst = dma_data->maxburst;
120 if (dma_data->flags & SND_DMAENGINE_PCM_DAI_FLAG_PACK)
121 slave_config->src_addr_width =
122 DMA_SLAVE_BUSWIDTH_UNDEFINED;
123 if (dma_data->addr_width != DMA_SLAVE_BUSWIDTH_UNDEFINED)
124 slave_config->src_addr_width = dma_data->addr_width;
125 }
126
127 slave_config->slave_id = dma_data->slave_id;
128}
129EXPORT_SYMBOL_GPL(snd_dmaengine_pcm_set_config_from_dai_data);
130
131static void dmaengine_pcm_dma_complete(void *arg)
132{
133 struct snd_pcm_substream *substream = arg;
134 struct dmaengine_pcm_runtime_data *prtd = substream_to_prtd(substream);
135
136 prtd->pos += snd_pcm_lib_period_bytes(substream);
137 if (prtd->pos >= snd_pcm_lib_buffer_bytes(substream))
138 prtd->pos = 0;
139
140 snd_pcm_period_elapsed(substream);
141}
142
143static int dmaengine_pcm_prepare_and_submit(struct snd_pcm_substream *substream)
144{
145 struct dmaengine_pcm_runtime_data *prtd = substream_to_prtd(substream);
146 struct dma_chan *chan = prtd->dma_chan;
147 struct dma_async_tx_descriptor *desc;
148 enum dma_transfer_direction direction;
149 unsigned long flags = DMA_CTRL_ACK;
150
151 direction = snd_pcm_substream_to_dma_direction(substream);
152
153 if (!substream->runtime->no_period_wakeup)
154 flags |= DMA_PREP_INTERRUPT;
155
156 prtd->pos = 0;
157 desc = dmaengine_prep_dma_cyclic(chan,
158 substream->runtime->dma_addr,
159 snd_pcm_lib_buffer_bytes(substream),
160 snd_pcm_lib_period_bytes(substream), direction, flags);
161
162 if (!desc)
163 return -ENOMEM;
164
165 desc->callback = dmaengine_pcm_dma_complete;
166 desc->callback_param = substream;
167 prtd->cookie = dmaengine_submit(desc);
168
169 return 0;
170}
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182int snd_dmaengine_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
183{
184 struct dmaengine_pcm_runtime_data *prtd = substream_to_prtd(substream);
185 struct snd_pcm_runtime *runtime = substream->runtime;
186 int ret;
187
188 switch (cmd) {
189 case SNDRV_PCM_TRIGGER_START:
190 ret = dmaengine_pcm_prepare_and_submit(substream);
191 if (ret)
192 return ret;
193 dma_async_issue_pending(prtd->dma_chan);
194 break;
195 case SNDRV_PCM_TRIGGER_RESUME:
196 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
197 dmaengine_resume(prtd->dma_chan);
198 break;
199 case SNDRV_PCM_TRIGGER_SUSPEND:
200 if (runtime->info & SNDRV_PCM_INFO_PAUSE)
201 dmaengine_pause(prtd->dma_chan);
202 else
203 dmaengine_terminate_async(prtd->dma_chan);
204 break;
205 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
206 dmaengine_pause(prtd->dma_chan);
207 break;
208 case SNDRV_PCM_TRIGGER_STOP:
209 dmaengine_terminate_async(prtd->dma_chan);
210 break;
211 default:
212 return -EINVAL;
213 }
214
215 return 0;
216}
217EXPORT_SYMBOL_GPL(snd_dmaengine_pcm_trigger);
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226snd_pcm_uframes_t snd_dmaengine_pcm_pointer_no_residue(struct snd_pcm_substream *substream)
227{
228 struct dmaengine_pcm_runtime_data *prtd = substream_to_prtd(substream);
229 return bytes_to_frames(substream->runtime, prtd->pos);
230}
231EXPORT_SYMBOL_GPL(snd_dmaengine_pcm_pointer_no_residue);
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240snd_pcm_uframes_t snd_dmaengine_pcm_pointer(struct snd_pcm_substream *substream)
241{
242 struct dmaengine_pcm_runtime_data *prtd = substream_to_prtd(substream);
243 struct snd_pcm_runtime *runtime = substream->runtime;
244 struct dma_tx_state state;
245 enum dma_status status;
246 unsigned int buf_size;
247 unsigned int pos = 0;
248
249 status = dmaengine_tx_status(prtd->dma_chan, prtd->cookie, &state);
250 if (status == DMA_IN_PROGRESS || status == DMA_PAUSED) {
251 buf_size = snd_pcm_lib_buffer_bytes(substream);
252 if (state.residue > 0 && state.residue <= buf_size)
253 pos = buf_size - state.residue;
254
255 runtime->delay = bytes_to_frames(runtime,
256 state.in_flight_bytes);
257 }
258
259 return bytes_to_frames(runtime, pos);
260}
261EXPORT_SYMBOL_GPL(snd_dmaengine_pcm_pointer);
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272struct dma_chan *snd_dmaengine_pcm_request_channel(dma_filter_fn filter_fn,
273 void *filter_data)
274{
275 dma_cap_mask_t mask;
276
277 dma_cap_zero(mask);
278 dma_cap_set(DMA_SLAVE, mask);
279 dma_cap_set(DMA_CYCLIC, mask);
280
281 return dma_request_channel(mask, filter_fn, filter_data);
282}
283EXPORT_SYMBOL_GPL(snd_dmaengine_pcm_request_channel);
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296int snd_dmaengine_pcm_open(struct snd_pcm_substream *substream,
297 struct dma_chan *chan)
298{
299 struct dmaengine_pcm_runtime_data *prtd;
300 int ret;
301
302 if (!chan)
303 return -ENXIO;
304
305 ret = snd_pcm_hw_constraint_integer(substream->runtime,
306 SNDRV_PCM_HW_PARAM_PERIODS);
307 if (ret < 0)
308 return ret;
309
310 prtd = kzalloc(sizeof(*prtd), GFP_KERNEL);
311 if (!prtd)
312 return -ENOMEM;
313
314 prtd->dma_chan = chan;
315
316 substream->runtime->private_data = prtd;
317
318 return 0;
319}
320EXPORT_SYMBOL_GPL(snd_dmaengine_pcm_open);
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335int snd_dmaengine_pcm_open_request_chan(struct snd_pcm_substream *substream,
336 dma_filter_fn filter_fn, void *filter_data)
337{
338 return snd_dmaengine_pcm_open(substream,
339 snd_dmaengine_pcm_request_channel(filter_fn, filter_data));
340}
341EXPORT_SYMBOL_GPL(snd_dmaengine_pcm_open_request_chan);
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347int snd_dmaengine_pcm_close(struct snd_pcm_substream *substream)
348{
349 struct dmaengine_pcm_runtime_data *prtd = substream_to_prtd(substream);
350
351 dmaengine_synchronize(prtd->dma_chan);
352 kfree(prtd);
353
354 return 0;
355}
356EXPORT_SYMBOL_GPL(snd_dmaengine_pcm_close);
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364int snd_dmaengine_pcm_close_release_chan(struct snd_pcm_substream *substream)
365{
366 struct dmaengine_pcm_runtime_data *prtd = substream_to_prtd(substream);
367
368 dmaengine_synchronize(prtd->dma_chan);
369 dma_release_channel(prtd->dma_chan);
370 kfree(prtd);
371
372 return 0;
373}
374EXPORT_SYMBOL_GPL(snd_dmaengine_pcm_close_release_chan);
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388int snd_dmaengine_pcm_refine_runtime_hwparams(
389 struct snd_pcm_substream *substream,
390 struct snd_dmaengine_dai_dma_data *dma_data,
391 struct snd_pcm_hardware *hw,
392 struct dma_chan *chan)
393{
394 struct dma_slave_caps dma_caps;
395 u32 addr_widths = BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) |
396 BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |
397 BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);
398 snd_pcm_format_t i;
399 int ret = 0;
400
401 if (!hw || !chan || !dma_data)
402 return -EINVAL;
403
404 ret = dma_get_slave_caps(chan, &dma_caps);
405 if (ret == 0) {
406 if (dma_caps.cmd_pause && dma_caps.cmd_resume)
407 hw->info |= SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME;
408 if (dma_caps.residue_granularity <= DMA_RESIDUE_GRANULARITY_SEGMENT)
409 hw->info |= SNDRV_PCM_INFO_BATCH;
410
411 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
412 addr_widths = dma_caps.dst_addr_widths;
413 else
414 addr_widths = dma_caps.src_addr_widths;
415 }
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423 if (!(dma_data->flags & SND_DMAENGINE_PCM_DAI_FLAG_PACK))
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433 pcm_for_each_format(i) {
434 int bits = snd_pcm_format_physical_width(i);
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440 switch (bits) {
441 case 8:
442 case 16:
443 case 24:
444 case 32:
445 case 64:
446 if (addr_widths & (1 << (bits / 8)))
447 hw->formats |= pcm_format_to_bits(i);
448 break;
449 default:
450
451 break;
452 }
453 }
454
455 return ret;
456}
457EXPORT_SYMBOL_GPL(snd_dmaengine_pcm_refine_runtime_hwparams);
458
459MODULE_LICENSE("GPL");
460