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13#ifndef __RT1015_H__
14#define __RT1015_H__
15
16#define RT1015_DEVICE_ID_VAL 0x1011
17#define RT1015_DEVICE_ID_VAL2 0x1015
18
19#define RT1015_RESET 0x0000
20#define RT1015_CLK2 0x0004
21#define RT1015_CLK3 0x0006
22#define RT1015_PLL1 0x000a
23#define RT1015_PLL2 0x000c
24#define RT1015_DUM_RW1 0x000e
25#define RT1015_DUM_RW2 0x0010
26#define RT1015_DUM_RW3 0x0012
27#define RT1015_DUM_RW4 0x0014
28#define RT1015_DUM_RW5 0x0016
29#define RT1015_DUM_RW6 0x0018
30#define RT1015_CLK_DET 0x0020
31#define RT1015_SIL_DET 0x0022
32#define RT1015_CUSTOMER_ID 0x0076
33#define RT1015_PCODE_FWVER 0x0078
34#define RT1015_VER_ID 0x007a
35#define RT1015_VENDOR_ID 0x007c
36#define RT1015_DEVICE_ID 0x007d
37#define RT1015_PAD_DRV1 0x00f0
38#define RT1015_PAD_DRV2 0x00f2
39#define RT1015_GAT_BOOST 0x00f3
40#define RT1015_PRO_ALT 0x00f4
41#define RT1015_OSCK_STA 0x00f6
42#define RT1015_MAN_I2C 0x0100
43#define RT1015_DAC1 0x0102
44#define RT1015_DAC2 0x0104
45#define RT1015_DAC3 0x0106
46#define RT1015_ADC1 0x010c
47#define RT1015_ADC2 0x010e
48#define RT1015_TDM_MASTER 0x0111
49#define RT1015_TDM_TCON 0x0112
50#define RT1015_TDM1_1 0x0114
51#define RT1015_TDM1_2 0x0116
52#define RT1015_TDM1_3 0x0118
53#define RT1015_TDM1_4 0x011a
54#define RT1015_TDM1_5 0x011c
55#define RT1015_MIXER1 0x0300
56#define RT1015_MIXER2 0x0302
57#define RT1015_ANA_PROTECT1 0x0311
58#define RT1015_ANA_CTRL_SEQ1 0x0313
59#define RT1015_ANA_CTRL_SEQ2 0x0314
60#define RT1015_VBAT_DET_DEB 0x031a
61#define RT1015_VBAT_VOLT_DET1 0x031c
62#define RT1015_VBAT_VOLT_DET2 0x031d
63#define RT1015_VBAT_TEST_OUT1 0x031e
64#define RT1015_VBAT_TEST_OUT2 0x031f
65#define RT1015_VBAT_PROT_ATT 0x0320
66#define RT1015_VBAT_DET_CODE 0x0321
67#define RT1015_PWR1 0x0322
68#define RT1015_PWR4 0x0328
69#define RT1015_PWR5 0x0329
70#define RT1015_PWR6 0x032a
71#define RT1015_PWR7 0x032b
72#define RT1015_PWR8 0x032c
73#define RT1015_PWR9 0x032d
74#define RT1015_CLASSD_SEQ 0x032e
75#define RT1015_SMART_BST_CTRL1 0x0330
76#define RT1015_SMART_BST_CTRL2 0x0332
77#define RT1015_ANA_CTRL1 0x0334
78#define RT1015_ANA_CTRL2 0x0336
79#define RT1015_PWR_STATE_CTRL 0x0338
80#define RT1015_MONO_DYNA_CTRL 0x04fa
81#define RT1015_MONO_DYNA_CTRL1 0x04fc
82#define RT1015_MONO_DYNA_CTRL2 0x04fe
83#define RT1015_MONO_DYNA_CTRL3 0x0500
84#define RT1015_MONO_DYNA_CTRL4 0x0502
85#define RT1015_MONO_DYNA_CTRL5 0x0504
86#define RT1015_SPK_VOL 0x0506
87#define RT1015_SHORT_DETTOP1 0x0508
88#define RT1015_SHORT_DETTOP2 0x050a
89#define RT1015_SPK_DC_DETECT1 0x0519
90#define RT1015_SPK_DC_DETECT2 0x051a
91#define RT1015_SPK_DC_DETECT3 0x051b
92#define RT1015_SPK_DC_DETECT4 0x051d
93#define RT1015_SPK_DC_DETECT5 0x051f
94#define RT1015_BAT_RPO_STEP1 0x0536
95#define RT1015_BAT_RPO_STEP2 0x0538
96#define RT1015_BAT_RPO_STEP3 0x053a
97#define RT1015_BAT_RPO_STEP4 0x053c
98#define RT1015_BAT_RPO_STEP5 0x053d
99#define RT1015_BAT_RPO_STEP6 0x053e
100#define RT1015_BAT_RPO_STEP7 0x053f
101#define RT1015_BAT_RPO_STEP8 0x0540
102#define RT1015_BAT_RPO_STEP9 0x0541
103#define RT1015_BAT_RPO_STEP10 0x0542
104#define RT1015_BAT_RPO_STEP11 0x0543
105#define RT1015_BAT_RPO_STEP12 0x0544
106#define RT1015_SPREAD_SPEC1 0x0568
107#define RT1015_SPREAD_SPEC2 0x056a
108#define RT1015_PAD_STATUS 0x1000
109#define RT1015_PADS_PULLING_CTRL1 0x1002
110#define RT1015_PADS_DRIVING 0x1006
111#define RT1015_SYS_RST1 0x1007
112#define RT1015_SYS_RST2 0x1009
113#define RT1015_SYS_GATING1 0x100a
114#define RT1015_TEST_MODE1 0x100c
115#define RT1015_TEST_MODE2 0x100d
116#define RT1015_TIMING_CTRL1 0x100e
117#define RT1015_PLL_INT 0x1010
118#define RT1015_TEST_OUT1 0x1020
119#define RT1015_DC_CALIB_CLSD1 0x1200
120#define RT1015_DC_CALIB_CLSD2 0x1202
121#define RT1015_DC_CALIB_CLSD3 0x1204
122#define RT1015_DC_CALIB_CLSD4 0x1206
123#define RT1015_DC_CALIB_CLSD5 0x1208
124#define RT1015_DC_CALIB_CLSD6 0x120a
125#define RT1015_DC_CALIB_CLSD7 0x120c
126#define RT1015_DC_CALIB_CLSD8 0x120e
127#define RT1015_DC_CALIB_CLSD9 0x1210
128#define RT1015_DC_CALIB_CLSD10 0x1212
129#define RT1015_CLSD_INTERNAL1 0x1300
130#define RT1015_CLSD_INTERNAL2 0x1302
131#define RT1015_CLSD_INTERNAL3 0x1304
132#define RT1015_CLSD_INTERNAL4 0x1305
133#define RT1015_CLSD_INTERNAL5 0x1306
134#define RT1015_CLSD_INTERNAL6 0x1308
135#define RT1015_CLSD_INTERNAL7 0x130a
136#define RT1015_CLSD_INTERNAL8 0x130c
137#define RT1015_CLSD_INTERNAL9 0x130e
138#define RT1015_CLSD_OCP_CTRL 0x130f
139#define RT1015_VREF_LV 0x1310
140#define RT1015_MBIAS1 0x1312
141#define RT1015_MBIAS2 0x1314
142#define RT1015_MBIAS3 0x1316
143#define RT1015_MBIAS4 0x1318
144#define RT1015_VREF_LV1 0x131a
145#define RT1015_S_BST_TIMING_INTER1 0x1322
146#define RT1015_S_BST_TIMING_INTER2 0x1323
147#define RT1015_S_BST_TIMING_INTER3 0x1324
148#define RT1015_S_BST_TIMING_INTER4 0x1325
149#define RT1015_S_BST_TIMING_INTER5 0x1326
150#define RT1015_S_BST_TIMING_INTER6 0x1327
151#define RT1015_S_BST_TIMING_INTER7 0x1328
152#define RT1015_S_BST_TIMING_INTER8 0x1329
153#define RT1015_S_BST_TIMING_INTER9 0x132a
154#define RT1015_S_BST_TIMING_INTER10 0x132b
155#define RT1015_S_BST_TIMING_INTER11 0x1330
156#define RT1015_S_BST_TIMING_INTER12 0x1331
157#define RT1015_S_BST_TIMING_INTER13 0x1332
158#define RT1015_S_BST_TIMING_INTER14 0x1333
159#define RT1015_S_BST_TIMING_INTER15 0x1334
160#define RT1015_S_BST_TIMING_INTER16 0x1335
161#define RT1015_S_BST_TIMING_INTER17 0x1336
162#define RT1015_S_BST_TIMING_INTER18 0x1337
163#define RT1015_S_BST_TIMING_INTER19 0x1338
164#define RT1015_S_BST_TIMING_INTER20 0x1339
165#define RT1015_S_BST_TIMING_INTER21 0x133a
166#define RT1015_S_BST_TIMING_INTER22 0x133b
167#define RT1015_S_BST_TIMING_INTER23 0x133c
168#define RT1015_S_BST_TIMING_INTER24 0x133d
169#define RT1015_S_BST_TIMING_INTER25 0x133e
170#define RT1015_S_BST_TIMING_INTER26 0x133f
171#define RT1015_S_BST_TIMING_INTER27 0x1340
172#define RT1015_S_BST_TIMING_INTER28 0x1341
173#define RT1015_S_BST_TIMING_INTER29 0x1342
174#define RT1015_S_BST_TIMING_INTER30 0x1343
175#define RT1015_S_BST_TIMING_INTER31 0x1344
176#define RT1015_S_BST_TIMING_INTER32 0x1345
177#define RT1015_S_BST_TIMING_INTER33 0x1346
178#define RT1015_S_BST_TIMING_INTER34 0x1347
179#define RT1015_S_BST_TIMING_INTER35 0x1348
180#define RT1015_S_BST_TIMING_INTER36 0x1349
181
182
183#define RT1015_CLK_SYS_PRE_SEL_MASK (0x3 << 14)
184#define RT1015_CLK_SYS_PRE_SEL_SFT 14
185#define RT1015_CLK_SYS_PRE_SEL_MCLK (0x0 << 14)
186#define RT1015_CLK_SYS_PRE_SEL_PLL (0x2 << 14)
187#define RT1015_PLL_SEL_MASK (0x1 << 13)
188#define RT1015_PLL_SEL_SFT 13
189#define RT1015_PLL_SEL_PLL_SRC2 (0x0 << 13)
190#define RT1015_PLL_SEL_BCLK (0x1 << 13)
191#define RT1015_FS_PD_MASK (0x7 << 4)
192#define RT1015_FS_PD_SFT 4
193
194
195#define RT1015_PLL_M_MAX 0xf
196#define RT1015_PLL_M_MASK (RT1015_PLL_M_MAX << 12)
197#define RT1015_PLL_M_SFT 12
198#define RT1015_PLL_M_BP (0x1 << 11)
199#define RT1015_PLL_M_BP_SFT 11
200#define RT1015_PLL_N_MAX 0x1ff
201#define RT1015_PLL_N_MASK (RT1015_PLL_N_MAX << 0)
202#define RT1015_PLL_N_SFT 0
203
204
205#define RT1015_PLL_BPK_MASK (0x1 << 5)
206#define RT1015_PLL_BPK (0x0 << 5)
207#define RT1015_PLL_K_MAX 0x1f
208#define RT1015_PLL_K_MASK (RT1015_PLL_K_MAX)
209#define RT1015_PLL_K_SFT 0
210
211
212#define RT1015_ID_MASK 0xff
213#define RT1015_ID_VERA 0x0
214#define RT1015_ID_VERB 0x1
215
216
217#define RT1015_DAC_VOL_MASK (0x7f << 9)
218#define RT1015_DAC_VOL_SFT 9
219
220
221#define RT1015_DAC_CLK (0x1 << 13)
222#define RT1015_DAC_CLK_BIT 13
223
224
225#define RT1015_DAC_MUTE_MASK (0x1 << 15)
226#define RT1015_DA_MUTE_SFT 15
227#define RT1015_DVOL_MUTE_FLAG_SFT 12
228
229
230#define RT1015_TCON_TDM_MS_MASK (0x1 << 14)
231#define RT1015_TCON_TDM_MS_SFT 14
232#define RT1015_TCON_TDM_MS_S (0x0 << 14)
233#define RT1015_TCON_TDM_MS_M (0x1 << 14)
234#define RT1015_I2S_DL_MASK (0x7 << 8)
235#define RT1015_I2S_DL_SFT 8
236#define RT1015_I2S_DL_16 (0x0 << 8)
237#define RT1015_I2S_DL_20 (0x1 << 8)
238#define RT1015_I2S_DL_24 (0x2 << 8)
239#define RT1015_I2S_DL_8 (0x3 << 8)
240#define RT1015_I2S_M_DF_MASK (0x7 << 0)
241#define RT1015_I2S_M_DF_SFT 0
242#define RT1015_I2S_M_DF_I2S (0x0)
243#define RT1015_I2S_M_DF_LEFT (0x1)
244#define RT1015_I2S_M_DF_PCM_A (0x2)
245#define RT1015_I2S_M_DF_PCM_B (0x3)
246#define RT1015_I2S_M_DF_PCM_A_N (0x6)
247#define RT1015_I2S_M_DF_PCM_B_N (0x7)
248
249
250#define RT1015_I2S_TCON_DF_MASK (0x7 << 13)
251#define RT1015_I2S_TCON_DF_SFT 13
252#define RT1015_I2S_TCON_DF_I2S (0x0 << 13)
253#define RT1015_I2S_TCON_DF_LEFT (0x1 << 13)
254#define RT1015_I2S_TCON_DF_PCM_A (0x2 << 13)
255#define RT1015_I2S_TCON_DF_PCM_B (0x3 << 13)
256#define RT1015_I2S_TCON_DF_PCM_A_N (0x6 << 13)
257#define RT1015_I2S_TCON_DF_PCM_B_N (0x7 << 13)
258#define RT1015_TCON_BCLK_SEL_MASK (0x3 << 10)
259#define RT1015_TCON_BCLK_SEL_SFT 10
260#define RT1015_TCON_BCLK_SEL_32FS (0x0 << 10)
261#define RT1015_TCON_BCLK_SEL_64FS (0x1 << 10)
262#define RT1015_TCON_BCLK_SEL_128FS (0x2 << 10)
263#define RT1015_TCON_BCLK_SEL_256FS (0x3 << 10)
264#define RT1015_TCON_CH_LEN_MASK (0x3 << 5)
265#define RT1015_TCON_CH_LEN_SFT 5
266#define RT1015_TCON_CH_LEN_16B (0x0 << 5)
267#define RT1015_TCON_CH_LEN_20B (0x1 << 5)
268#define RT1015_TCON_CH_LEN_24B (0x2 << 5)
269#define RT1015_TCON_CH_LEN_32B (0x3 << 5)
270#define RT1015_TCON_BCLK_MST_MASK (0x1 << 4)
271#define RT1015_TCON_BCLK_MST_SFT 4
272#define RT1015_TCON_BCLK_MST_INV (0x1 << 4)
273
274
275#define RT1015_TDM_INV_BCLK_MASK (0x1 << 15)
276#define RT1015_TDM_INV_BCLK_SFT 15
277#define RT1015_TDM_INV_BCLK (0x1 << 15)
278
279
280#define RT1015_ABST_AUTO_EN_MASK (0x1 << 13)
281#define RT1015_ABST_AUTO_MODE (0x1 << 13)
282#define RT1015_ABST_REG_MODE (0x0 << 13)
283#define RT1015_ABST_FIX_TGT_MASK (0x1 << 12)
284#define RT1015_ABST_FIX_TGT_EN (0x1 << 12)
285#define RT1015_ABST_FIX_TGT_DIS (0x0 << 12)
286#define RT1015_BYPASS_SWR_REG_MASK (0x1 << 7)
287#define RT1015_BYPASS_SWRREG_BYPASS (0x1 << 7)
288#define RT1015_BYPASS_SWRREG_PASS (0x0 << 7)
289
290
291#define RT1015_PWR_LDO2 (0x1 << 15)
292#define RT1015_PWR_LDO2_BIT 15
293#define RT1015_PWR_DAC (0x1 << 14)
294#define RT1015_PWR_DAC_BIT 14
295#define RT1015_PWR_INTCLK (0x1 << 13)
296#define RT1015_PWR_INTCLK_BIT 13
297#define RT1015_PWR_ISENSE (0x1 << 12)
298#define RT1015_PWR_ISENSE_BIT 12
299#define RT1015_PWR_VSENSE (0x1 << 10)
300#define RT1015_PWR_VSENSE_BIT 10
301#define RT1015_PWR_PLL (0x1 << 9)
302#define RT1015_PWR_PLL_BIT 9
303#define RT1015_PWR_BG_1_2 (0x1 << 8)
304#define RT1015_PWR_BG_1_2_BIT 8
305#define RT1015_PWR_MBIAS_BG (0x1 << 7)
306#define RT1015_PWR_MBIAS_BG_BIT 7
307#define RT1015_PWR_VBAT (0x1 << 6)
308#define RT1015_PWR_VBAT_BIT 6
309#define RT1015_PWR_MBIAS (0x1 << 4)
310#define RT1015_PWR_MBIAS_BIT 4
311#define RT1015_PWR_ADCV (0x1 << 3)
312#define RT1015_PWR_ADCV_BIT 3
313#define RT1015_PWR_MIXERV (0x1 << 2)
314#define RT1015_PWR_MIXERV_BIT 2
315#define RT1015_PWR_SUMV (0x1 << 1)
316#define RT1015_PWR_SUMV_BIT 1
317#define RT1015_PWR_VREFLV (0x1 << 0)
318#define RT1015_PWR_VREFLV_BIT 0
319
320
321#define RT1015_PWR_BASIC (0x1 << 15)
322#define RT1015_PWR_BASIC_BIT 15
323#define RT1015_PWR_SD (0x1 << 14)
324#define RT1015_PWR_SD_BIT 14
325#define RT1015_PWR_IBIAS (0x1 << 13)
326#define RT1015_PWR_IBIAS_BIT 13
327#define RT1015_PWR_VCM (0x1 << 11)
328#define RT1015_PWR_VCM_BIT 11
329
330
331#define RT1015_PWR_SWR (0x1 << 12)
332#define RT1015_PWR_SWR_BIT 12
333
334
335#define RT1015_PWR_CLSD (0x1 << 12)
336#define RT1015_PWR_CLSD_BIT 12
337
338
339#define RT1015_ID_MASK 0xff
340#define RT1015_ID_VERA 0x0
341#define RT1015_ID_VERB 0x1
342
343
344enum {
345 RT1015_SCLK_S_MCLK,
346 RT1015_SCLK_S_PLL,
347};
348
349
350enum {
351 RT1015_PLL_S_MCLK,
352 RT1015_PLL_S_BCLK,
353};
354
355enum {
356 RT1015_AIF1,
357 RT1015_AIFS,
358};
359
360enum {
361 RT1015_VERA,
362 RT1015_VERB,
363};
364
365enum {
366 BYPASS,
367 ADAPTIVE,
368 FIXED_ADAPTIVE,
369};
370
371enum {
372 RT1015_Enable_Boost = 0,
373 RT1015_Bypass_Boost,
374};
375
376struct rt1015_priv {
377 struct snd_soc_component *component;
378 struct regmap *regmap;
379 int sysclk;
380 int sysclk_src;
381 int lrck;
382 int bclk;
383 int bclk_ratio;
384 int id;
385 int pll_src;
386 int pll_in;
387 int pll_out;
388 int boost_mode;
389 int bypass_boost;
390 int amp_ver;
391 int dac_is_used;
392};
393
394#endif
395