LXR linux/sound/soc/codecs/rt5645.c

   1// SPDX-License-Identifier: GPL-2.0-only
   2/*
   3 * rt5645.c  --  RT5645 ALSA SoC audio codec driver
   4 *
   5 * Copyright 2013 Realtek Semiconductor Corp.
   6 * Author: Bard Liao <bardliao@realtek.com>
   7 */
   8
   9#include <linux/module.h>
  10#include <linux/moduleparam.h>
  11#include <linux/init.h>
  12#include <linux/delay.h>
  13#include <linux/pm.h>
  14#include <linux/i2c.h>
  15#include <linux/platform_device.h>
  16#include <linux/spi/spi.h>
  17#include <linux/gpio.h>
  18#include <linux/gpio/consumer.h>
  19#include <linux/acpi.h>
  20#include <linux/dmi.h>
  21#include <linux/regulator/consumer.h>
  22#include <sound/core.h>
  23#include <sound/pcm.h>
  24#include <sound/pcm_params.h>
  25#include <sound/jack.h>
  26#include <sound/soc.h>
  27#include <sound/soc-dapm.h>
  28#include <sound/initval.h>
  29#include <sound/tlv.h>
  30
  31#include "rl6231.h"
  32#include "rt5645.h"
  33
  34#define QUIRK_INV_JD1_1(q)      ((q) & 1)
  35#define QUIRK_LEVEL_IRQ(q)      (((q) >> 1) & 1)
  36#define QUIRK_IN2_DIFF(q)       (((q) >> 2) & 1)
  37#define QUIRK_JD_MODE(q)        (((q) >> 4) & 7)
  38#define QUIRK_DMIC1_DATA_PIN(q) (((q) >> 8) & 3)
  39#define QUIRK_DMIC2_DATA_PIN(q) (((q) >> 12) & 3)
  40
  41static unsigned int quirk = -1;
  42module_param(quirk, uint, 0444);
  43MODULE_PARM_DESC(quirk, "RT5645 pdata quirk override");
  44
  45#define RT5645_DEVICE_ID 0x6308
  46#define RT5650_DEVICE_ID 0x6419
  47
  48#define RT5645_PR_RANGE_BASE (0xff + 1)
  49#define RT5645_PR_SPACING 0x100
  50
  51#define RT5645_PR_BASE (RT5645_PR_RANGE_BASE + (0 * RT5645_PR_SPACING))
  52
  53#define RT5645_HWEQ_NUM 57
  54
  55#define TIME_TO_POWER_MS 400
  56
  57static const struct regmap_range_cfg rt5645_ranges[] = {
  58        {
  59                .name = "PR",
  60                .range_min = RT5645_PR_BASE,
  61                .range_max = RT5645_PR_BASE + 0xf8,
  62                .selector_reg = RT5645_PRIV_INDEX,
  63                .selector_mask = 0xff,
  64                .selector_shift = 0x0,
  65                .window_start = RT5645_PRIV_DATA,
  66                .window_len = 0x1,
  67        },
  68};
  69
  70static const struct reg_sequence init_list[] = {
  71        {RT5645_PR_BASE + 0x3d, 0x3600},
  72        {RT5645_PR_BASE + 0x1c, 0xfd70},
  73        {RT5645_PR_BASE + 0x20, 0x611f},
  74        {RT5645_PR_BASE + 0x21, 0x4040},
  75        {RT5645_PR_BASE + 0x23, 0x0004},
  76        {RT5645_ASRC_4, 0x0120},
  77};
  78
  79static const struct reg_sequence rt5650_init_list[] = {
  80        {0xf6,  0x0100},
  81};
  82
  83static const struct reg_default rt5645_reg[] = {
  84        { 0x00, 0x0000 },
  85        { 0x01, 0xc8c8 },
  86        { 0x02, 0xc8c8 },
  87        { 0x03, 0xc8c8 },
  88        { 0x0a, 0x0002 },
  89        { 0x0b, 0x2827 },
  90        { 0x0c, 0xe000 },
  91        { 0x0d, 0x0000 },
  92        { 0x0e, 0x0000 },
  93        { 0x0f, 0x0808 },
  94        { 0x14, 0x3333 },
  95        { 0x16, 0x4b00 },
  96        { 0x18, 0x018b },
  97        { 0x19, 0xafaf },
  98        { 0x1a, 0xafaf },
  99        { 0x1b, 0x0001 },
 100        { 0x1c, 0x2f2f },
 101        { 0x1d, 0x2f2f },
 102        { 0x1e, 0x0000 },
 103        { 0x20, 0x0000 },
 104        { 0x27, 0x7060 },
 105        { 0x28, 0x7070 },
 106        { 0x29, 0x8080 },
 107        { 0x2a, 0x5656 },
 108        { 0x2b, 0x5454 },
 109        { 0x2c, 0xaaa0 },
 110        { 0x2d, 0x0000 },
 111        { 0x2f, 0x1002 },
 112        { 0x31, 0x5000 },
 113        { 0x32, 0x0000 },
 114        { 0x33, 0x0000 },
 115        { 0x34, 0x0000 },
 116        { 0x35, 0x0000 },
 117        { 0x3b, 0x0000 },
 118        { 0x3c, 0x007f },
 119        { 0x3d, 0x0000 },
 120        { 0x3e, 0x007f },
 121        { 0x3f, 0x0000 },
 122        { 0x40, 0x001f },
 123        { 0x41, 0x0000 },
 124        { 0x42, 0x001f },
 125        { 0x45, 0x6000 },
 126        { 0x46, 0x003e },
 127        { 0x47, 0x003e },
 128        { 0x48, 0xf807 },
 129        { 0x4a, 0x0004 },
 130        { 0x4d, 0x0000 },
 131        { 0x4e, 0x0000 },
 132        { 0x4f, 0x01ff },
 133        { 0x50, 0x0000 },
 134        { 0x51, 0x0000 },
 135        { 0x52, 0x01ff },
 136        { 0x53, 0xf000 },
 137        { 0x56, 0x0111 },
 138        { 0x57, 0x0064 },
 139        { 0x58, 0xef0e },
 140        { 0x59, 0xf0f0 },
 141        { 0x5a, 0xef0e },
 142        { 0x5b, 0xf0f0 },
 143        { 0x5c, 0xef0e },
 144        { 0x5d, 0xf0f0 },
 145        { 0x5e, 0xf000 },
 146        { 0x5f, 0x0000 },
 147        { 0x61, 0x0300 },
 148        { 0x62, 0x0000 },
 149        { 0x63, 0x00c2 },
 150        { 0x64, 0x0000 },
 151        { 0x65, 0x0000 },
 152        { 0x66, 0x0000 },
 153        { 0x6a, 0x0000 },
 154        { 0x6c, 0x0aaa },
 155        { 0x70, 0x8000 },
 156        { 0x71, 0x8000 },
 157        { 0x72, 0x8000 },
 158        { 0x73, 0x7770 },
 159        { 0x74, 0x3e00 },
 160        { 0x75, 0x2409 },
 161        { 0x76, 0x000a },
 162        { 0x77, 0x0c00 },
 163        { 0x78, 0x0000 },
 164        { 0x79, 0x0123 },
 165        { 0x80, 0x0000 },
 166        { 0x81, 0x0000 },
 167        { 0x82, 0x0000 },
 168        { 0x83, 0x0000 },
 169        { 0x84, 0x0000 },
 170        { 0x85, 0x0000 },
 171        { 0x8a, 0x0120 },
 172        { 0x8e, 0x0004 },
 173        { 0x8f, 0x1100 },
 174        { 0x90, 0x0646 },
 175        { 0x91, 0x0c06 },
 176        { 0x93, 0x0000 },
 177        { 0x94, 0x0200 },
 178        { 0x95, 0x0000 },
 179        { 0x9a, 0x2184 },
 180        { 0x9b, 0x010a },
 181        { 0x9c, 0x0aea },
 182        { 0x9d, 0x000c },
 183        { 0x9e, 0x0400 },
 184        { 0xa0, 0xa0a8 },
 185        { 0xa1, 0x0059 },
 186        { 0xa2, 0x0001 },
 187        { 0xae, 0x6000 },
 188        { 0xaf, 0x0000 },
 189        { 0xb0, 0x6000 },
 190        { 0xb1, 0x0000 },
 191        { 0xb2, 0x0000 },
 192        { 0xb3, 0x001f },
 193        { 0xb4, 0x020c },
 194        { 0xb5, 0x1f00 },
 195        { 0xb6, 0x0000 },
 196        { 0xbb, 0x0000 },
 197        { 0xbc, 0x0000 },
 198        { 0xbd, 0x0000 },
 199        { 0xbe, 0x0000 },
 200        { 0xbf, 0x3100 },
 201        { 0xc0, 0x0000 },
 202        { 0xc1, 0x0000 },
 203        { 0xc2, 0x0000 },
 204        { 0xc3, 0x2000 },
 205        { 0xcd, 0x0000 },
 206        { 0xce, 0x0000 },
 207        { 0xcf, 0x1813 },
 208        { 0xd0, 0x0690 },
 209        { 0xd1, 0x1c17 },
 210        { 0xd3, 0xb320 },
 211        { 0xd4, 0x0000 },
 212        { 0xd6, 0x0400 },
 213        { 0xd9, 0x0809 },
 214        { 0xda, 0x0000 },
 215        { 0xdb, 0x0003 },
 216        { 0xdc, 0x0049 },
 217        { 0xdd, 0x001b },
 218        { 0xdf, 0x0008 },
 219        { 0xe0, 0x4000 },
 220        { 0xe6, 0x8000 },
 221        { 0xe7, 0x0200 },
 222        { 0xec, 0xb300 },
 223        { 0xed, 0x0000 },
 224        { 0xf0, 0x001f },
 225        { 0xf1, 0x020c },
 226        { 0xf2, 0x1f00 },
 227        { 0xf3, 0x0000 },
 228        { 0xf4, 0x4000 },
 229        { 0xf8, 0x0000 },
 230        { 0xf9, 0x0000 },
 231        { 0xfa, 0x2060 },
 232        { 0xfb, 0x4040 },
 233        { 0xfc, 0x0000 },
 234        { 0xfd, 0x0002 },
 235        { 0xfe, 0x10ec },
 236        { 0xff, 0x6308 },
 237};
 238
 239static const struct reg_default rt5650_reg[] = {
 240        { 0x00, 0x0000 },
 241        { 0x01, 0xc8c8 },
 242        { 0x02, 0xc8c8 },
 243        { 0x03, 0xc8c8 },
 244        { 0x0a, 0x0002 },
 245        { 0x0b, 0x2827 },
 246        { 0x0c, 0xe000 },
 247        { 0x0d, 0x0000 },
 248        { 0x0e, 0x0000 },
 249        { 0x0f, 0x0808 },
 250        { 0x14, 0x3333 },
 251        { 0x16, 0x4b00 },
 252        { 0x18, 0x018b },
 253        { 0x19, 0xafaf },
 254        { 0x1a, 0xafaf },
 255        { 0x1b, 0x0001 },
 256        { 0x1c, 0x2f2f },
 257        { 0x1d, 0x2f2f },
 258        { 0x1e, 0x0000 },
 259        { 0x20, 0x0000 },
 260        { 0x27, 0x7060 },
 261        { 0x28, 0x7070 },
 262        { 0x29, 0x8080 },
 263        { 0x2a, 0x5656 },
 264        { 0x2b, 0x5454 },
 265        { 0x2c, 0xaaa0 },
 266        { 0x2d, 0x0000 },
 267        { 0x2f, 0x5002 },
 268        { 0x31, 0x5000 },
 269        { 0x32, 0x0000 },
 270        { 0x33, 0x0000 },
 271        { 0x34, 0x0000 },
 272        { 0x35, 0x0000 },
 273        { 0x3b, 0x0000 },
 274        { 0x3c, 0x007f },
 275        { 0x3d, 0x0000 },
 276        { 0x3e, 0x007f },
 277        { 0x3f, 0x0000 },
 278        { 0x40, 0x001f },
 279        { 0x41, 0x0000 },
 280        { 0x42, 0x001f },
 281        { 0x45, 0x6000 },
 282        { 0x46, 0x003e },
 283        { 0x47, 0x003e },
 284        { 0x48, 0xf807 },
 285        { 0x4a, 0x0004 },
 286        { 0x4d, 0x0000 },
 287        { 0x4e, 0x0000 },
 288        { 0x4f, 0x01ff },
 289        { 0x50, 0x0000 },
 290        { 0x51, 0x0000 },
 291        { 0x52, 0x01ff },
 292        { 0x53, 0xf000 },
 293        { 0x56, 0x0111 },
 294        { 0x57, 0x0064 },
 295        { 0x58, 0xef0e },
 296        { 0x59, 0xf0f0 },
 297        { 0x5a, 0xef0e },
 298        { 0x5b, 0xf0f0 },
 299        { 0x5c, 0xef0e },
 300        { 0x5d, 0xf0f0 },
 301        { 0x5e, 0xf000 },
 302        { 0x5f, 0x0000 },
 303        { 0x61, 0x0300 },
 304        { 0x62, 0x0000 },
 305        { 0x63, 0x00c2 },
 306        { 0x64, 0x0000 },
 307        { 0x65, 0x0000 },
 308        { 0x66, 0x0000 },
 309        { 0x6a, 0x0000 },
 310        { 0x6c, 0x0aaa },
 311        { 0x70, 0x8000 },
 312        { 0x71, 0x8000 },
 313        { 0x72, 0x8000 },
 314        { 0x73, 0x7770 },
 315        { 0x74, 0x3e00 },
 316        { 0x75, 0x2409 },
 317        { 0x76, 0x000a },
 318        { 0x77, 0x0c00 },
 319        { 0x78, 0x0000 },
 320        { 0x79, 0x0123 },
 321        { 0x7a, 0x0123 },
 322        { 0x80, 0x0000 },
 323        { 0x81, 0x0000 },
 324        { 0x82, 0x0000 },
 325        { 0x83, 0x0000 },
 326        { 0x84, 0x0000 },
 327        { 0x85, 0x0000 },
 328        { 0x8a, 0x0120 },
 329        { 0x8e, 0x0004 },
 330        { 0x8f, 0x1100 },
 331        { 0x90, 0x0646 },
 332        { 0x91, 0x0c06 },
 333        { 0x93, 0x0000 },
 334        { 0x94, 0x0200 },
 335        { 0x95, 0x0000 },
 336        { 0x9a, 0x2184 },
 337        { 0x9b, 0x010a },
 338        { 0x9c, 0x0aea },
 339        { 0x9d, 0x000c },
 340        { 0x9e, 0x0400 },
 341        { 0xa0, 0xa0a8 },
 342        { 0xa1, 0x0059 },
 343        { 0xa2, 0x0001 },
 344        { 0xae, 0x6000 },
 345        { 0xaf, 0x0000 },
 346        { 0xb0, 0x6000 },
 347        { 0xb1, 0x0000 },
 348        { 0xb2, 0x0000 },
 349        { 0xb3, 0x001f },
 350        { 0xb4, 0x020c },
 351        { 0xb5, 0x1f00 },
 352        { 0xb6, 0x0000 },
 353        { 0xbb, 0x0000 },
 354        { 0xbc, 0x0000 },
 355        { 0xbd, 0x0000 },
 356        { 0xbe, 0x0000 },
 357        { 0xbf, 0x3100 },
 358        { 0xc0, 0x0000 },
 359        { 0xc1, 0x0000 },
 360        { 0xc2, 0x0000 },
 361        { 0xc3, 0x2000 },
 362        { 0xcd, 0x0000 },
 363        { 0xce, 0x0000 },
 364        { 0xcf, 0x1813 },
 365        { 0xd0, 0x0690 },
 366        { 0xd1, 0x1c17 },
 367        { 0xd3, 0xb320 },
 368        { 0xd4, 0x0000 },
 369        { 0xd6, 0x0400 },
 370        { 0xd9, 0x0809 },
 371        { 0xda, 0x0000 },
 372        { 0xdb, 0x0003 },
 373        { 0xdc, 0x0049 },
 374        { 0xdd, 0x001b },
 375        { 0xdf, 0x0008 },
 376        { 0xe0, 0x4000 },
 377        { 0xe6, 0x8000 },
 378        { 0xe7, 0x0200 },
 379        { 0xec, 0xb300 },
 380        { 0xed, 0x0000 },
 381        { 0xf0, 0x001f },
 382        { 0xf1, 0x020c },
 383        { 0xf2, 0x1f00 },
 384        { 0xf3, 0x0000 },
 385        { 0xf4, 0x4000 },
 386        { 0xf8, 0x0000 },
 387        { 0xf9, 0x0000 },
 388        { 0xfa, 0x2060 },
 389        { 0xfb, 0x4040 },
 390        { 0xfc, 0x0000 },
 391        { 0xfd, 0x0002 },
 392        { 0xfe, 0x10ec },
 393        { 0xff, 0x6308 },
 394};
 395
 396struct rt5645_eq_param_s {
 397        unsigned short reg;
 398        unsigned short val;
 399};
 400
 401struct rt5645_eq_param_s_be16 {
 402        __be16 reg;
 403        __be16 val;
 404};
 405
 406static const char *const rt5645_supply_names[] = {
 407        "avdd",
 408        "cpvdd",
 409};
 410
 411struct rt5645_priv {
 412        struct snd_soc_component *component;
 413        struct rt5645_platform_data pdata;
 414        struct regmap *regmap;
 415        struct i2c_client *i2c;
 416        struct gpio_desc *gpiod_hp_det;
 417        struct snd_soc_jack *hp_jack;
 418        struct snd_soc_jack *mic_jack;
 419        struct snd_soc_jack *btn_jack;
 420        struct delayed_work jack_detect_work, rcclock_work;
 421        struct regulator_bulk_data supplies[ARRAY_SIZE(rt5645_supply_names)];
 422        struct rt5645_eq_param_s *eq_param;
 423        struct timer_list btn_check_timer;
 424
 425        int codec_type;
 426        int sysclk;
 427        int sysclk_src;
 428        int lrck[RT5645_AIFS];
 429        int bclk[RT5645_AIFS];
 430        int master[RT5645_AIFS];
 431
 432        int pll_src;
 433        int pll_in;
 434        int pll_out;
 435
 436        int jack_type;
 437        bool en_button_func;
 438        bool hp_on;
 439        int v_id;
 440};
 441
 442static int rt5645_reset(struct snd_soc_component *component)
 443{
 444        return snd_soc_component_write(component, RT5645_RESET, 0);
 445}
 446
 447static bool rt5645_volatile_register(struct device *dev, unsigned int reg)
 448{
 449        int i;
 450
 451        for (i = 0; i < ARRAY_SIZE(rt5645_ranges); i++) {
 452                if (reg >= rt5645_ranges[i].range_min &&
 453                        reg <= rt5645_ranges[i].range_max) {
 454                        return true;
 455                }
 456        }
 457
 458        switch (reg) {
 459        case RT5645_RESET:
 460        case RT5645_PRIV_INDEX:
 461        case RT5645_PRIV_DATA:
 462        case RT5645_IN1_CTRL1:
 463        case RT5645_IN1_CTRL2:
 464        case RT5645_IN1_CTRL3:
 465        case RT5645_A_JD_CTRL1:
 466        case RT5645_ADC_EQ_CTRL1:
 467        case RT5645_EQ_CTRL1:
 468        case RT5645_ALC_CTRL_1:
 469        case RT5645_IRQ_CTRL2:
 470        case RT5645_IRQ_CTRL3:
 471        case RT5645_INT_IRQ_ST:
 472        case RT5645_IL_CMD:
 473        case RT5650_4BTN_IL_CMD1:
 474        case RT5645_VENDOR_ID:
 475        case RT5645_VENDOR_ID1:
 476        case RT5645_VENDOR_ID2:
 477                return true;
 478        default:
 479                return false;
 480        }
 481}
 482
 483static bool rt5645_readable_register(struct device *dev, unsigned int reg)
 484{
 485        int i;
 486
 487        for (i = 0; i < ARRAY_SIZE(rt5645_ranges); i++) {
 488                if (reg >= rt5645_ranges[i].range_min &&
 489                        reg <= rt5645_ranges[i].range_max) {
 490                        return true;
 491                }
 492        }
 493
 494        switch (reg) {
 495        case RT5645_RESET:
 496        case RT5645_SPK_VOL:
 497        case RT5645_HP_VOL:
 498        case RT5645_LOUT1:
 499        case RT5645_IN1_CTRL1:
 500        case RT5645_IN1_CTRL2:
 501        case RT5645_IN1_CTRL3:
 502        case RT5645_IN2_CTRL:
 503        case RT5645_INL1_INR1_VOL:
 504        case RT5645_SPK_FUNC_LIM:
 505        case RT5645_ADJ_HPF_CTRL:
 506        case RT5645_DAC1_DIG_VOL:
 507        case RT5645_DAC2_DIG_VOL:
 508        case RT5645_DAC_CTRL:
 509        case RT5645_STO1_ADC_DIG_VOL:
 510        case RT5645_MONO_ADC_DIG_VOL:
 511        case RT5645_ADC_BST_VOL1:
 512        case RT5645_ADC_BST_VOL2:
 513        case RT5645_STO1_ADC_MIXER:
 514        case RT5645_MONO_ADC_MIXER:
 515        case RT5645_AD_DA_MIXER:
 516        case RT5645_STO_DAC_MIXER:
 517        case RT5645_MONO_DAC_MIXER:
 518        case RT5645_DIG_MIXER:
 519        case RT5650_A_DAC_SOUR:
 520        case RT5645_DIG_INF1_DATA:
 521        case RT5645_PDM_OUT_CTRL:
 522        case RT5645_REC_L1_MIXER:
 523        case RT5645_REC_L2_MIXER:
 524        case RT5645_REC_R1_MIXER:
 525        case RT5645_REC_R2_MIXER:
 526        case RT5645_HPMIXL_CTRL:
 527        case RT5645_HPOMIXL_CTRL:
 528        case RT5645_HPMIXR_CTRL:
 529        case RT5645_HPOMIXR_CTRL:
 530        case RT5645_HPO_MIXER:
 531        case RT5645_SPK_L_MIXER:
 532        case RT5645_SPK_R_MIXER:
 533        case RT5645_SPO_MIXER:
 534        case RT5645_SPO_CLSD_RATIO:
 535        case RT5645_OUT_L1_MIXER:
 536        case RT5645_OUT_R1_MIXER:
 537        case RT5645_OUT_L_GAIN1:
 538        case RT5645_OUT_L_GAIN2:
 539        case RT5645_OUT_R_GAIN1:
 540        case RT5645_OUT_R_GAIN2:
 541        case RT5645_LOUT_MIXER:
 542        case RT5645_HAPTIC_CTRL1:
 543        case RT5645_HAPTIC_CTRL2:
 544        case RT5645_HAPTIC_CTRL3:
 545        case RT5645_HAPTIC_CTRL4:
 546        case RT5645_HAPTIC_CTRL5:
 547        case RT5645_HAPTIC_CTRL6:
 548        case RT5645_HAPTIC_CTRL7:
 549        case RT5645_HAPTIC_CTRL8:
 550        case RT5645_HAPTIC_CTRL9:
 551        case RT5645_HAPTIC_CTRL10:
 552        case RT5645_PWR_DIG1:
 553        case RT5645_PWR_DIG2:
 554        case RT5645_PWR_ANLG1:
 555        case RT5645_PWR_ANLG2:
 556        case RT5645_PWR_MIXER:
 557        case RT5645_PWR_VOL:
 558        case RT5645_PRIV_INDEX:
 559        case RT5645_PRIV_DATA:
 560        case RT5645_I2S1_SDP:
 561        case RT5645_I2S2_SDP:
 562        case RT5645_ADDA_CLK1:
 563        case RT5645_ADDA_CLK2:
 564        case RT5645_DMIC_CTRL1:
 565        case RT5645_DMIC_CTRL2:
 566        case RT5645_TDM_CTRL_1:
 567        case RT5645_TDM_CTRL_2:
 568        case RT5645_TDM_CTRL_3:
 569        case RT5650_TDM_CTRL_4:
 570        case RT5645_GLB_CLK:
 571        case RT5645_PLL_CTRL1:
 572        case RT5645_PLL_CTRL2:
 573        case RT5645_ASRC_1:
 574        case RT5645_ASRC_2:
 575        case RT5645_ASRC_3:
 576        case RT5645_ASRC_4:
 577        case RT5645_DEPOP_M1:
 578        case RT5645_DEPOP_M2:
 579        case RT5645_DEPOP_M3:
 580        case RT5645_CHARGE_PUMP:
 581        case RT5645_MICBIAS:
 582        case RT5645_A_JD_CTRL1:
 583        case RT5645_VAD_CTRL4:
 584        case RT5645_CLSD_OUT_CTRL:
 585        case RT5645_ADC_EQ_CTRL1:
 586        case RT5645_ADC_EQ_CTRL2:
 587        case RT5645_EQ_CTRL1:
 588        case RT5645_EQ_CTRL2:
 589        case RT5645_ALC_CTRL_1:
 590        case RT5645_ALC_CTRL_2:
 591        case RT5645_ALC_CTRL_3:
 592        case RT5645_ALC_CTRL_4:
 593        case RT5645_ALC_CTRL_5:
 594        case RT5645_JD_CTRL:
 595        case RT5645_IRQ_CTRL1:
 596        case RT5645_IRQ_CTRL2:
 597        case RT5645_IRQ_CTRL3:
 598        case RT5645_INT_IRQ_ST:
 599        case RT5645_GPIO_CTRL1:
 600        case RT5645_GPIO_CTRL2:
 601        case RT5645_GPIO_CTRL3:
 602        case RT5645_BASS_BACK:
 603        case RT5645_MP3_PLUS1:
 604        case RT5645_MP3_PLUS2:
 605        case RT5645_ADJ_HPF1:
 606        case RT5645_ADJ_HPF2:
 607        case RT5645_HP_CALIB_AMP_DET:
 608        case RT5645_SV_ZCD1:
 609        case RT5645_SV_ZCD2:
 610        case RT5645_IL_CMD:
 611        case RT5645_IL_CMD2:
 612        case RT5645_IL_CMD3:
 613        case RT5650_4BTN_IL_CMD1:
 614        case RT5650_4BTN_IL_CMD2:
 615        case RT5645_DRC1_HL_CTRL1:
 616        case RT5645_DRC2_HL_CTRL1:
 617        case RT5645_ADC_MONO_HP_CTRL1:
 618        case RT5645_ADC_MONO_HP_CTRL2:
 619        case RT5645_DRC2_CTRL1:
 620        case RT5645_DRC2_CTRL2:
 621        case RT5645_DRC2_CTRL3:
 622        case RT5645_DRC2_CTRL4:
 623        case RT5645_DRC2_CTRL5:
 624        case RT5645_JD_CTRL3:
 625        case RT5645_JD_CTRL4:
 626        case RT5645_GEN_CTRL1:
 627        case RT5645_GEN_CTRL2:
 628        case RT5645_GEN_CTRL3:
 629        case RT5645_VENDOR_ID:
 630        case RT5645_VENDOR_ID1:
 631        case RT5645_VENDOR_ID2:
 632                return true;
 633        default:
 634                return false;
 635        }
 636}
 637
 638static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
 639static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -6525, 75, 0);
 640static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
 641static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -1725, 75, 0);
 642static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
 643
 644/* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
 645static const DECLARE_TLV_DB_RANGE(bst_tlv,
 646        0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
 647        1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
 648        2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
 649        3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
 650        6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
 651        7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
 652        8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0)
 653);
 654
 655/* {-6, -4.5, -3, -1.5, 0, 0.82, 1.58, 2.28} dB */
 656static const DECLARE_TLV_DB_RANGE(spk_clsd_tlv,
 657        0, 4, TLV_DB_SCALE_ITEM(-600, 150, 0),
 658        5, 5, TLV_DB_SCALE_ITEM(82, 0, 0),
 659        6, 6, TLV_DB_SCALE_ITEM(158, 0, 0),
 660        7, 7, TLV_DB_SCALE_ITEM(228, 0, 0)
 661);
 662
 663static int rt5645_hweq_info(struct snd_kcontrol *kcontrol,
 664                         struct snd_ctl_elem_info *uinfo)
 665{
 666        uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
 667        uinfo->count = RT5645_HWEQ_NUM * sizeof(struct rt5645_eq_param_s);
 668
 669        return 0;
 670}
 671
 672static int rt5645_hweq_get(struct snd_kcontrol *kcontrol,
 673                        struct snd_ctl_elem_value *ucontrol)
 674{
 675        struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
 676        struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
 677        struct rt5645_eq_param_s_be16 *eq_param =
 678                (struct rt5645_eq_param_s_be16 *)ucontrol->value.bytes.data;
 679        int i;
 680
 681        for (i = 0; i < RT5645_HWEQ_NUM; i++) {
 682                eq_param[i].reg = cpu_to_be16(rt5645->eq_param[i].reg);
 683                eq_param[i].val = cpu_to_be16(rt5645->eq_param[i].val);
 684        }
 685
 686        return 0;
 687}
 688
 689static bool rt5645_validate_hweq(unsigned short reg)
 690{
 691        if ((reg >= 0x1a4 && reg <= 0x1cd) | (reg >= 0x1e5 && reg <= 0x1f8) |
 692                (reg == RT5645_EQ_CTRL2))
 693                return true;
 694
 695        return false;
 696}
 697
 698static int rt5645_hweq_put(struct snd_kcontrol *kcontrol,
 699                        struct snd_ctl_elem_value *ucontrol)
 700{
 701        struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
 702        struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
 703        struct rt5645_eq_param_s_be16 *eq_param =
 704                (struct rt5645_eq_param_s_be16 *)ucontrol->value.bytes.data;
 705        int i;
 706
 707        for (i = 0; i < RT5645_HWEQ_NUM; i++) {
 708                rt5645->eq_param[i].reg = be16_to_cpu(eq_param[i].reg);
 709                rt5645->eq_param[i].val = be16_to_cpu(eq_param[i].val);
 710        }
 711
 712        /* The final setting of the table should be RT5645_EQ_CTRL2 */
 713        for (i = RT5645_HWEQ_NUM - 1; i >= 0; i--) {
 714                if (rt5645->eq_param[i].reg == 0)
 715                        continue;
 716                else if (rt5645->eq_param[i].reg != RT5645_EQ_CTRL2)
 717                        return 0;
 718                else
 719                        break;
 720        }
 721
 722        for (i = 0; i < RT5645_HWEQ_NUM; i++) {
 723                if (!rt5645_validate_hweq(rt5645->eq_param[i].reg) &&
 724                    rt5645->eq_param[i].reg != 0)
 725                        return 0;
 726                else if (rt5645->eq_param[i].reg == 0)
 727                        break;
 728        }
 729
 730        return 0;
 731}
 732
 733#define RT5645_HWEQ(xname) \
 734{       .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
 735        .info = rt5645_hweq_info, \
 736        .get = rt5645_hweq_get, \
 737        .put = rt5645_hweq_put \
 738}
 739
 740static int rt5645_spk_put_volsw(struct snd_kcontrol *kcontrol,
 741                struct snd_ctl_elem_value *ucontrol)
 742{
 743        struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
 744        struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
 745        int ret;
 746
 747        regmap_update_bits(rt5645->regmap, RT5645_MICBIAS,
 748                RT5645_PWR_CLK25M_MASK, RT5645_PWR_CLK25M_PU);
 749
 750        ret = snd_soc_put_volsw(kcontrol, ucontrol);
 751
 752        mod_delayed_work(system_power_efficient_wq, &rt5645->rcclock_work,
 753                msecs_to_jiffies(200));
 754
 755        return ret;
 756}
 757
 758static const char * const rt5645_dac1_vol_ctrl_mode_text[] = {
 759        "immediately", "zero crossing", "soft ramp"
 760};
 761
 762static SOC_ENUM_SINGLE_DECL(
 763        rt5645_dac1_vol_ctrl_mode, RT5645_PR_BASE,
 764        RT5645_DA1_ZDET_SFT, rt5645_dac1_vol_ctrl_mode_text);
 765
 766static const struct snd_kcontrol_new rt5645_snd_controls[] = {
 767        /* Speaker Output Volume */
 768        SOC_DOUBLE("Speaker Channel Switch", RT5645_SPK_VOL,
 769                RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
 770        SOC_DOUBLE_EXT_TLV("Speaker Playback Volume", RT5645_SPK_VOL,
 771                RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, snd_soc_get_volsw,
 772                rt5645_spk_put_volsw, out_vol_tlv),
 773
 774        /* ClassD modulator Speaker Gain Ratio */
 775        SOC_SINGLE_TLV("Speaker ClassD Playback Volume", RT5645_SPO_CLSD_RATIO,
 776                RT5645_SPK_G_CLSD_SFT, 7, 0, spk_clsd_tlv),
 777
 778        /* Headphone Output Volume */
 779        SOC_DOUBLE("Headphone Channel Switch", RT5645_HP_VOL,
 780                RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
 781        SOC_DOUBLE_TLV("Headphone Playback Volume", RT5645_HP_VOL,
 782                RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
 783
 784        /* OUTPUT Control */
 785        SOC_DOUBLE("OUT Playback Switch", RT5645_LOUT1,
 786                RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
 787        SOC_DOUBLE("OUT Channel Switch", RT5645_LOUT1,
 788                RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
 789        SOC_DOUBLE_TLV("OUT Playback Volume", RT5645_LOUT1,
 790                RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
 791
 792        /* DAC Digital Volume */
 793        SOC_DOUBLE("DAC2 Playback Switch", RT5645_DAC_CTRL,
 794                RT5645_M_DAC_L2_VOL_SFT, RT5645_M_DAC_R2_VOL_SFT, 1, 1),
 795        SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5645_DAC1_DIG_VOL,
 796                RT5645_L_VOL_SFT + 1, RT5645_R_VOL_SFT + 1, 87, 0, dac_vol_tlv),
 797        SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5645_DAC2_DIG_VOL,
 798                RT5645_L_VOL_SFT + 1, RT5645_R_VOL_SFT + 1, 87, 0, dac_vol_tlv),
 799
 800        /* IN1/IN2 Control */
 801        SOC_SINGLE_TLV("IN1 Boost", RT5645_IN1_CTRL1,
 802                RT5645_BST_SFT1, 12, 0, bst_tlv),
 803        SOC_SINGLE_TLV("IN2 Boost", RT5645_IN2_CTRL,
 804                RT5645_BST_SFT2, 8, 0, bst_tlv),
 805
 806        /* INL/INR Volume Control */
 807        SOC_DOUBLE_TLV("IN Capture Volume", RT5645_INL1_INR1_VOL,
 808                RT5645_INL_VOL_SFT, RT5645_INR_VOL_SFT, 31, 1, in_vol_tlv),
 809
 810        /* ADC Digital Volume Control */
 811        SOC_DOUBLE("ADC Capture Switch", RT5645_STO1_ADC_DIG_VOL,
 812                RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
 813        SOC_DOUBLE_TLV("ADC Capture Volume", RT5645_STO1_ADC_DIG_VOL,
 814                RT5645_L_VOL_SFT + 1, RT5645_R_VOL_SFT + 1, 63, 0, adc_vol_tlv),
 815        SOC_DOUBLE("Mono ADC Capture Switch", RT5645_MONO_ADC_DIG_VOL,
 816                RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
 817        SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5645_MONO_ADC_DIG_VOL,
 818                RT5645_L_VOL_SFT + 1, RT5645_R_VOL_SFT + 1, 63, 0, adc_vol_tlv),
 819
 820        /* ADC Boost Volume Control */
 821        SOC_DOUBLE_TLV("ADC Boost Capture Volume", RT5645_ADC_BST_VOL1,
 822                RT5645_STO1_ADC_L_BST_SFT, RT5645_STO1_ADC_R_BST_SFT, 3, 0,
 823                adc_bst_tlv),
 824        SOC_DOUBLE_TLV("Mono ADC Boost Capture Volume", RT5645_ADC_BST_VOL2,
 825                RT5645_MONO_ADC_L_BST_SFT, RT5645_MONO_ADC_R_BST_SFT, 3, 0,
 826                adc_bst_tlv),
 827
 828        /* I2S2 function select */
 829        SOC_SINGLE("I2S2 Func Switch", RT5645_GPIO_CTRL1, RT5645_I2S2_SEL_SFT,
 830                1, 1),
 831        RT5645_HWEQ("Speaker HWEQ"),
 832
 833        /* Digital Soft Volume Control */
 834        SOC_ENUM("DAC1 Digital Volume Control Func", rt5645_dac1_vol_ctrl_mode),
 835};
 836
 837/**
 838 * set_dmic_clk - Set parameter of dmic.
 839 *
 840 * @w: DAPM widget.
 841 * @kcontrol: The kcontrol of this widget.
 842 * @event: Event id.
 843 *
 844 */
 845static int set_dmic_clk(struct snd_soc_dapm_widget *w,
 846        struct snd_kcontrol *kcontrol, int event)
 847{
 848        struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
 849        struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
 850        int idx, rate;
 851
 852        rate = rt5645->sysclk / rl6231_get_pre_div(rt5645->regmap,
 853                RT5645_ADDA_CLK1, RT5645_I2S_PD1_SFT);
 854        idx = rl6231_calc_dmic_clk(rate);
 855        if (idx < 0)
 856                dev_err(component->dev, "Failed to set DMIC clock\n");
 857        else
 858                snd_soc_component_update_bits(component, RT5645_DMIC_CTRL1,
 859                        RT5645_DMIC_CLK_MASK, idx << RT5645_DMIC_CLK_SFT);
 860        return idx;
 861}
 862
 863static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source,
 864                         struct snd_soc_dapm_widget *sink)
 865{
 866        struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm);
 867        unsigned int val;
 868
 869        val = snd_soc_component_read(component, RT5645_GLB_CLK);
 870        val &= RT5645_SCLK_SRC_MASK;
 871        if (val == RT5645_SCLK_SRC_PLL1)
 872                return 1;
 873        else
 874                return 0;
 875}
 876
 877static int is_using_asrc(struct snd_soc_dapm_widget *source,
 878                         struct snd_soc_dapm_widget *sink)
 879{
 880        struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm);
 881        unsigned int reg, shift, val;
 882
 883        switch (source->shift) {
 884        case 0:
 885                reg = RT5645_ASRC_3;
 886                shift = 0;
 887                break;
 888        case 1:
 889                reg = RT5645_ASRC_3;
 890                shift = 4;
 891                break;
 892        case 3:
 893                reg = RT5645_ASRC_2;
 894                shift = 0;
 895                break;
 896        case 8:
 897                reg = RT5645_ASRC_2;
 898                shift = 4;
 899                break;
 900        case 9:
 901                reg = RT5645_ASRC_2;
 902                shift = 8;
 903                break;
 904        case 10:
 905                reg = RT5645_ASRC_2;
 906                shift = 12;
 907                break;
 908        default:
 909                return 0;
 910        }
 911
 912        val = (snd_soc_component_read(component, reg) >> shift) & 0xf;
 913        switch (val) {
 914        case 1:
 915        case 2:
 916        case 3:
 917        case 4:
 918                return 1;
 919        default:
 920                return 0;
 921        }
 922
 923}
 924
 925static int rt5645_enable_hweq(struct snd_soc_component *component)
 926{
 927        struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
 928        int i;
 929
 930        for (i = 0; i < RT5645_HWEQ_NUM; i++) {
 931                if (rt5645_validate_hweq(rt5645->eq_param[i].reg))
 932                        regmap_write(rt5645->regmap, rt5645->eq_param[i].reg,
 933                                        rt5645->eq_param[i].val);
 934                else
 935                        break;
 936        }
 937
 938        return 0;
 939}
 940
 941/**
 942 * rt5645_sel_asrc_clk_src - select ASRC clock source for a set of filters
 943 * @component: SoC audio component device.
 944 * @filter_mask: mask of filters.
 945 * @clk_src: clock source
 946 *
 947 * The ASRC function is for asynchronous MCLK and LRCK. Also, since RT5645 can
 948 * only support standard 32fs or 64fs i2s format, ASRC should be enabled to
 949 * support special i2s clock format such as Intel's 100fs(100 * sampling rate).
 950 * ASRC function will track i2s clock and generate a corresponding system clock
 951 * for codec. This function provides an API to select the clock source for a
 952 * set of filters specified by the mask. And the codec driver will turn on ASRC
 953 * for these filters if ASRC is selected as their clock source.
 954 */
 955int rt5645_sel_asrc_clk_src(struct snd_soc_component *component,
 956                unsigned int filter_mask, unsigned int clk_src)
 957{
 958        unsigned int asrc2_mask = 0;
 959        unsigned int asrc2_value = 0;
 960        unsigned int asrc3_mask = 0;
 961        unsigned int asrc3_value = 0;
 962
 963        switch (clk_src) {
 964        case RT5645_CLK_SEL_SYS:
 965        case RT5645_CLK_SEL_I2S1_ASRC:
 966        case RT5645_CLK_SEL_I2S2_ASRC:
 967        case RT5645_CLK_SEL_SYS2:
 968                break;
 969
 970        default:
 971                return -EINVAL;
 972        }
 973
 974        if (filter_mask & RT5645_DA_STEREO_FILTER) {
 975                asrc2_mask |= RT5645_DA_STO_CLK_SEL_MASK;
 976                asrc2_value = (asrc2_value & ~RT5645_DA_STO_CLK_SEL_MASK)
 977                        | (clk_src << RT5645_DA_STO_CLK_SEL_SFT);
 978        }
 979
 980        if (filter_mask & RT5645_DA_MONO_L_FILTER) {
 981                asrc2_mask |= RT5645_DA_MONOL_CLK_SEL_MASK;
 982                asrc2_value = (asrc2_value & ~RT5645_DA_MONOL_CLK_SEL_MASK)
 983                        | (clk_src << RT5645_DA_MONOL_CLK_SEL_SFT);
 984        }
 985
 986        if (filter_mask & RT5645_DA_MONO_R_FILTER) {
 987                asrc2_mask |= RT5645_DA_MONOR_CLK_SEL_MASK;
 988                asrc2_value = (asrc2_value & ~RT5645_DA_MONOR_CLK_SEL_MASK)
 989                        | (clk_src << RT5645_DA_MONOR_CLK_SEL_SFT);
 990        }
 991
 992        if (filter_mask & RT5645_AD_STEREO_FILTER) {
 993                asrc2_mask |= RT5645_AD_STO1_CLK_SEL_MASK;
 994                asrc2_value = (asrc2_value & ~RT5645_AD_STO1_CLK_SEL_MASK)
 995                        | (clk_src << RT5645_AD_STO1_CLK_SEL_SFT);
 996        }
 997
 998        if (filter_mask & RT5645_AD_MONO_L_FILTER) {
 999                asrc3_mask |= RT5645_AD_MONOL_CLK_SEL_MASK;
1000                asrc3_value = (asrc3_value & ~RT5645_AD_MONOL_CLK_SEL_MASK)

1001                        | (clk_src << RT5645_AD_MONOL_CLK_SEL_SFT);
1002        }
1003
1004        if (filter_mask & RT5645_AD_MONO_R_FILTER)  {
1005                asrc3_mask |= RT5645_AD_MONOR_CLK_SEL_MASK;
1006                asrc3_value = (asrc3_value & ~RT5645_AD_MONOR_CLK_SEL_MASK)
1007                        | (clk_src << RT5645_AD_MONOR_CLK_SEL_SFT);
1008        }
1009
1010        if (asrc2_mask)
1011                snd_soc_component_update_bits(component, RT5645_ASRC_2,
1012                        asrc2_mask, asrc2_value);
1013
1014        if (asrc3_mask)
1015                snd_soc_component_update_bits(component, RT5645_ASRC_3,
1016                        asrc3_mask, asrc3_value);
1017
1018        return 0;
1019}
1020EXPORT_SYMBOL_GPL(rt5645_sel_asrc_clk_src);
1021
1022/* Digital Mixer */
1023static const struct snd_kcontrol_new rt5645_sto1_adc_l_mix[] = {
1024        SOC_DAPM_SINGLE("ADC1 Switch", RT5645_STO1_ADC_MIXER,
1025                        RT5645_M_ADC_L1_SFT, 1, 1),
1026        SOC_DAPM_SINGLE("ADC2 Switch", RT5645_STO1_ADC_MIXER,
1027                        RT5645_M_ADC_L2_SFT, 1, 1),
1028};
1029
1030static const struct snd_kcontrol_new rt5645_sto1_adc_r_mix[] = {
1031        SOC_DAPM_SINGLE("ADC1 Switch", RT5645_STO1_ADC_MIXER,
1032                        RT5645_M_ADC_R1_SFT, 1, 1),
1033        SOC_DAPM_SINGLE("ADC2 Switch", RT5645_STO1_ADC_MIXER,
1034                        RT5645_M_ADC_R2_SFT, 1, 1),
1035};
1036
1037static const struct snd_kcontrol_new rt5645_mono_adc_l_mix[] = {
1038        SOC_DAPM_SINGLE("ADC1 Switch", RT5645_MONO_ADC_MIXER,
1039                        RT5645_M_MONO_ADC_L1_SFT, 1, 1),
1040        SOC_DAPM_SINGLE("ADC2 Switch", RT5645_MONO_ADC_MIXER,
1041                        RT5645_M_MONO_ADC_L2_SFT, 1, 1),
1042};
1043
1044static const struct snd_kcontrol_new rt5645_mono_adc_r_mix[] = {
1045        SOC_DAPM_SINGLE("ADC1 Switch", RT5645_MONO_ADC_MIXER,
1046                        RT5645_M_MONO_ADC_R1_SFT, 1, 1),
1047        SOC_DAPM_SINGLE("ADC2 Switch", RT5645_MONO_ADC_MIXER,
1048                        RT5645_M_MONO_ADC_R2_SFT, 1, 1),
1049};
1050
1051static const struct snd_kcontrol_new rt5645_dac_l_mix[] = {
1052        SOC_DAPM_SINGLE("Stereo ADC Switch", RT5645_AD_DA_MIXER,
1053                        RT5645_M_ADCMIX_L_SFT, 1, 1),
1054        SOC_DAPM_SINGLE_AUTODISABLE("DAC1 Switch", RT5645_AD_DA_MIXER,
1055                        RT5645_M_DAC1_L_SFT, 1, 1),
1056};
1057
1058static const struct snd_kcontrol_new rt5645_dac_r_mix[] = {
1059        SOC_DAPM_SINGLE("Stereo ADC Switch", RT5645_AD_DA_MIXER,
1060                        RT5645_M_ADCMIX_R_SFT, 1, 1),
1061        SOC_DAPM_SINGLE_AUTODISABLE("DAC1 Switch", RT5645_AD_DA_MIXER,
1062                        RT5645_M_DAC1_R_SFT, 1, 1),
1063};
1064
1065static const struct snd_kcontrol_new rt5645_sto_dac_l_mix[] = {
1066        SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_STO_DAC_MIXER,
1067                        RT5645_M_DAC_L1_SFT, 1, 1),
1068        SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_STO_DAC_MIXER,
1069                        RT5645_M_DAC_L2_SFT, 1, 1),
1070        SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_STO_DAC_MIXER,
1071                        RT5645_M_DAC_R1_STO_L_SFT, 1, 1),
1072};
1073
1074static const struct snd_kcontrol_new rt5645_sto_dac_r_mix[] = {
1075        SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_STO_DAC_MIXER,
1076                        RT5645_M_DAC_R1_SFT, 1, 1),
1077        SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_STO_DAC_MIXER,
1078                        RT5645_M_DAC_R2_SFT, 1, 1),
1079        SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_STO_DAC_MIXER,
1080                        RT5645_M_DAC_L1_STO_R_SFT, 1, 1),
1081};
1082
1083static const struct snd_kcontrol_new rt5645_mono_dac_l_mix[] = {
1084        SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_MONO_DAC_MIXER,
1085                        RT5645_M_DAC_L1_MONO_L_SFT, 1, 1),
1086        SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_MONO_DAC_MIXER,
1087                        RT5645_M_DAC_L2_MONO_L_SFT, 1, 1),
1088        SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_MONO_DAC_MIXER,
1089                        RT5645_M_DAC_R2_MONO_L_SFT, 1, 1),
1090};
1091
1092static const struct snd_kcontrol_new rt5645_mono_dac_r_mix[] = {
1093        SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_MONO_DAC_MIXER,
1094                        RT5645_M_DAC_R1_MONO_R_SFT, 1, 1),
1095        SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_MONO_DAC_MIXER,
1096                        RT5645_M_DAC_R2_MONO_R_SFT, 1, 1),
1097        SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_MONO_DAC_MIXER,
1098                        RT5645_M_DAC_L2_MONO_R_SFT, 1, 1),
1099};
1100
1101static const struct snd_kcontrol_new rt5645_dig_l_mix[] = {
1102        SOC_DAPM_SINGLE("Sto DAC Mix L Switch", RT5645_DIG_MIXER,
1103                        RT5645_M_STO_L_DAC_L_SFT, 1, 1),
1104        SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_DIG_MIXER,
1105                        RT5645_M_DAC_L2_DAC_L_SFT, 1, 1),
1106        SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_DIG_MIXER,
1107                        RT5645_M_DAC_R2_DAC_L_SFT, 1, 1),
1108};
1109
1110static const struct snd_kcontrol_new rt5645_dig_r_mix[] = {
1111        SOC_DAPM_SINGLE("Sto DAC Mix R Switch", RT5645_DIG_MIXER,
1112                        RT5645_M_STO_R_DAC_R_SFT, 1, 1),
1113        SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_DIG_MIXER,
1114                        RT5645_M_DAC_R2_DAC_R_SFT, 1, 1),
1115        SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_DIG_MIXER,
1116                        RT5645_M_DAC_L2_DAC_R_SFT, 1, 1),
1117};
1118
1119/* Analog Input Mixer */
1120static const struct snd_kcontrol_new rt5645_rec_l_mix[] = {
1121        SOC_DAPM_SINGLE("HPOL Switch", RT5645_REC_L2_MIXER,
1122                        RT5645_M_HP_L_RM_L_SFT, 1, 1),
1123        SOC_DAPM_SINGLE("INL Switch", RT5645_REC_L2_MIXER,
1124                        RT5645_M_IN_L_RM_L_SFT, 1, 1),
1125        SOC_DAPM_SINGLE("BST2 Switch", RT5645_REC_L2_MIXER,
1126                        RT5645_M_BST2_RM_L_SFT, 1, 1),
1127        SOC_DAPM_SINGLE("BST1 Switch", RT5645_REC_L2_MIXER,
1128                        RT5645_M_BST1_RM_L_SFT, 1, 1),
1129        SOC_DAPM_SINGLE("OUT MIXL Switch", RT5645_REC_L2_MIXER,
1130                        RT5645_M_OM_L_RM_L_SFT, 1, 1),
1131};
1132
1133static const struct snd_kcontrol_new rt5645_rec_r_mix[] = {
1134        SOC_DAPM_SINGLE("HPOR Switch", RT5645_REC_R2_MIXER,
1135                        RT5645_M_HP_R_RM_R_SFT, 1, 1),
1136        SOC_DAPM_SINGLE("INR Switch", RT5645_REC_R2_MIXER,
1137                        RT5645_M_IN_R_RM_R_SFT, 1, 1),
1138        SOC_DAPM_SINGLE("BST2 Switch", RT5645_REC_R2_MIXER,
1139                        RT5645_M_BST2_RM_R_SFT, 1, 1),
1140        SOC_DAPM_SINGLE("BST1 Switch", RT5645_REC_R2_MIXER,
1141                        RT5645_M_BST1_RM_R_SFT, 1, 1),
1142        SOC_DAPM_SINGLE("OUT MIXR Switch", RT5645_REC_R2_MIXER,
1143                        RT5645_M_OM_R_RM_R_SFT, 1, 1),
1144};
1145
1146static const struct snd_kcontrol_new rt5645_spk_l_mix[] = {
1147        SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_SPK_L_MIXER,
1148                        RT5645_M_DAC_L1_SM_L_SFT, 1, 1),
1149        SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_SPK_L_MIXER,
1150                        RT5645_M_DAC_L2_SM_L_SFT, 1, 1),
1151        SOC_DAPM_SINGLE("INL Switch", RT5645_SPK_L_MIXER,
1152                        RT5645_M_IN_L_SM_L_SFT, 1, 1),
1153        SOC_DAPM_SINGLE("BST1 Switch", RT5645_SPK_L_MIXER,
1154                        RT5645_M_BST1_L_SM_L_SFT, 1, 1),
1155};
1156
1157static const struct snd_kcontrol_new rt5645_spk_r_mix[] = {
1158        SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPK_R_MIXER,
1159                        RT5645_M_DAC_R1_SM_R_SFT, 1, 1),
1160        SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_SPK_R_MIXER,
1161                        RT5645_M_DAC_R2_SM_R_SFT, 1, 1),
1162        SOC_DAPM_SINGLE("INR Switch", RT5645_SPK_R_MIXER,
1163                        RT5645_M_IN_R_SM_R_SFT, 1, 1),
1164        SOC_DAPM_SINGLE("BST2 Switch", RT5645_SPK_R_MIXER,
1165                        RT5645_M_BST2_R_SM_R_SFT, 1, 1),
1166};
1167
1168static const struct snd_kcontrol_new rt5645_out_l_mix[] = {
1169        SOC_DAPM_SINGLE("BST1 Switch", RT5645_OUT_L1_MIXER,
1170                        RT5645_M_BST1_OM_L_SFT, 1, 1),
1171        SOC_DAPM_SINGLE("INL Switch", RT5645_OUT_L1_MIXER,
1172                        RT5645_M_IN_L_OM_L_SFT, 1, 1),
1173        SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_OUT_L1_MIXER,
1174                        RT5645_M_DAC_L2_OM_L_SFT, 1, 1),
1175        SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_OUT_L1_MIXER,
1176                        RT5645_M_DAC_L1_OM_L_SFT, 1, 1),
1177};
1178
1179static const struct snd_kcontrol_new rt5645_out_r_mix[] = {
1180        SOC_DAPM_SINGLE("BST2 Switch", RT5645_OUT_R1_MIXER,
1181                        RT5645_M_BST2_OM_R_SFT, 1, 1),
1182        SOC_DAPM_SINGLE("INR Switch", RT5645_OUT_R1_MIXER,
1183                        RT5645_M_IN_R_OM_R_SFT, 1, 1),
1184        SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_OUT_R1_MIXER,
1185                        RT5645_M_DAC_R2_OM_R_SFT, 1, 1),
1186        SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_OUT_R1_MIXER,
1187                        RT5645_M_DAC_R1_OM_R_SFT, 1, 1),
1188};
1189
1190static const struct snd_kcontrol_new rt5645_spo_l_mix[] = {
1191        SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPO_MIXER,
1192                        RT5645_M_DAC_R1_SPM_L_SFT, 1, 1),
1193        SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_SPO_MIXER,
1194                        RT5645_M_DAC_L1_SPM_L_SFT, 1, 1),
1195        SOC_DAPM_SINGLE("SPKVOL R Switch", RT5645_SPO_MIXER,
1196                        RT5645_M_SV_R_SPM_L_SFT, 1, 1),
1197        SOC_DAPM_SINGLE("SPKVOL L Switch", RT5645_SPO_MIXER,
1198                        RT5645_M_SV_L_SPM_L_SFT, 1, 1),
1199};
1200
1201static const struct snd_kcontrol_new rt5645_spo_r_mix[] = {
1202        SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPO_MIXER,
1203                        RT5645_M_DAC_R1_SPM_R_SFT, 1, 1),
1204        SOC_DAPM_SINGLE("SPKVOL R Switch", RT5645_SPO_MIXER,
1205                        RT5645_M_SV_R_SPM_R_SFT, 1, 1),
1206};
1207
1208static const struct snd_kcontrol_new rt5645_hpo_mix[] = {
1209        SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPO_MIXER,
1210                        RT5645_M_DAC1_HM_SFT, 1, 1),
1211        SOC_DAPM_SINGLE("HPVOL Switch", RT5645_HPO_MIXER,
1212                        RT5645_M_HPVOL_HM_SFT, 1, 1),
1213};
1214
1215static const struct snd_kcontrol_new rt5645_hpvoll_mix[] = {
1216        SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPOMIXL_CTRL,
1217                        RT5645_M_DAC1_HV_SFT, 1, 1),
1218        SOC_DAPM_SINGLE("DAC2 Switch", RT5645_HPOMIXL_CTRL,
1219                        RT5645_M_DAC2_HV_SFT, 1, 1),
1220        SOC_DAPM_SINGLE("INL Switch", RT5645_HPOMIXL_CTRL,
1221                        RT5645_M_IN_HV_SFT, 1, 1),
1222        SOC_DAPM_SINGLE("BST1 Switch", RT5645_HPOMIXL_CTRL,
1223                        RT5645_M_BST1_HV_SFT, 1, 1),
1224};
1225
1226static const struct snd_kcontrol_new rt5645_hpvolr_mix[] = {
1227        SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPOMIXR_CTRL,
1228                        RT5645_M_DAC1_HV_SFT, 1, 1),
1229        SOC_DAPM_SINGLE("DAC2 Switch", RT5645_HPOMIXR_CTRL,
1230                        RT5645_M_DAC2_HV_SFT, 1, 1),
1231        SOC_DAPM_SINGLE("INR Switch", RT5645_HPOMIXR_CTRL,
1232                        RT5645_M_IN_HV_SFT, 1, 1),
1233        SOC_DAPM_SINGLE("BST2 Switch", RT5645_HPOMIXR_CTRL,
1234                        RT5645_M_BST2_HV_SFT, 1, 1),
1235};
1236
1237static const struct snd_kcontrol_new rt5645_lout_mix[] = {
1238        SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_LOUT_MIXER,
1239                        RT5645_M_DAC_L1_LM_SFT, 1, 1),
1240        SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_LOUT_MIXER,
1241                        RT5645_M_DAC_R1_LM_SFT, 1, 1),
1242        SOC_DAPM_SINGLE("OUTMIX L Switch", RT5645_LOUT_MIXER,
1243                        RT5645_M_OV_L_LM_SFT, 1, 1),
1244        SOC_DAPM_SINGLE("OUTMIX R Switch", RT5645_LOUT_MIXER,
1245                        RT5645_M_OV_R_LM_SFT, 1, 1),
1246};
1247
1248/*DAC1 L/R source*/ /* MX-29 [9:8] [11:10] */
1249static const char * const rt5645_dac1_src[] = {
1250        "IF1 DAC", "IF2 DAC", "IF3 DAC"
1251};
1252
1253static SOC_ENUM_SINGLE_DECL(
1254        rt5645_dac1l_enum, RT5645_AD_DA_MIXER,
1255        RT5645_DAC1_L_SEL_SFT, rt5645_dac1_src);
1256
1257static const struct snd_kcontrol_new rt5645_dac1l_mux =
1258        SOC_DAPM_ENUM("DAC1 L source", rt5645_dac1l_enum);
1259
1260static SOC_ENUM_SINGLE_DECL(
1261        rt5645_dac1r_enum, RT5645_AD_DA_MIXER,
1262        RT5645_DAC1_R_SEL_SFT, rt5645_dac1_src);
1263
1264static const struct snd_kcontrol_new rt5645_dac1r_mux =
1265        SOC_DAPM_ENUM("DAC1 R source", rt5645_dac1r_enum);
1266
1267/*DAC2 L/R source*/ /* MX-1B [6:4] [2:0] */
1268static const char * const rt5645_dac12_src[] = {
1269        "IF1 DAC", "IF2 DAC", "IF3 DAC", "Mono ADC", "VAD_ADC"
1270};
1271
1272static SOC_ENUM_SINGLE_DECL(
1273        rt5645_dac2l_enum, RT5645_DAC_CTRL,
1274        RT5645_DAC2_L_SEL_SFT, rt5645_dac12_src);
1275
1276static const struct snd_kcontrol_new rt5645_dac_l2_mux =
1277        SOC_DAPM_ENUM("DAC2 L source", rt5645_dac2l_enum);
1278
1279static const char * const rt5645_dacr2_src[] = {
1280        "IF1 DAC", "IF2 DAC", "IF3 DAC", "Mono ADC", "Haptic"
1281};
1282
1283static SOC_ENUM_SINGLE_DECL(
1284        rt5645_dac2r_enum, RT5645_DAC_CTRL,
1285        RT5645_DAC2_R_SEL_SFT, rt5645_dacr2_src);
1286
1287static const struct snd_kcontrol_new rt5645_dac_r2_mux =
1288        SOC_DAPM_ENUM("DAC2 R source", rt5645_dac2r_enum);
1289
1290/* Stereo1 ADC source */
1291/* MX-27 [12] */
1292static const char * const rt5645_stereo_adc1_src[] = {
1293        "DAC MIX", "ADC"
1294};
1295
1296static SOC_ENUM_SINGLE_DECL(
1297        rt5645_stereo1_adc1_enum, RT5645_STO1_ADC_MIXER,
1298        RT5645_ADC_1_SRC_SFT, rt5645_stereo_adc1_src);
1299
1300static const struct snd_kcontrol_new rt5645_sto_adc1_mux =
1301        SOC_DAPM_ENUM("Stereo1 ADC1 Mux", rt5645_stereo1_adc1_enum);
1302
1303/* MX-27 [11] */
1304static const char * const rt5645_stereo_adc2_src[] = {
1305        "DAC MIX", "DMIC"
1306};
1307
1308static SOC_ENUM_SINGLE_DECL(
1309        rt5645_stereo1_adc2_enum, RT5645_STO1_ADC_MIXER,
1310        RT5645_ADC_2_SRC_SFT, rt5645_stereo_adc2_src);
1311
1312static const struct snd_kcontrol_new rt5645_sto_adc2_mux =
1313        SOC_DAPM_ENUM("Stereo1 ADC2 Mux", rt5645_stereo1_adc2_enum);
1314
1315/* MX-27 [8] */
1316static const char * const rt5645_stereo_dmic_src[] = {
1317        "DMIC1", "DMIC2"
1318};
1319
1320static SOC_ENUM_SINGLE_DECL(
1321        rt5645_stereo1_dmic_enum, RT5645_STO1_ADC_MIXER,
1322        RT5645_DMIC_SRC_SFT, rt5645_stereo_dmic_src);
1323
1324static const struct snd_kcontrol_new rt5645_sto1_dmic_mux =
1325        SOC_DAPM_ENUM("Stereo1 DMIC source", rt5645_stereo1_dmic_enum);
1326
1327/* Mono ADC source */
1328/* MX-28 [12] */
1329static const char * const rt5645_mono_adc_l1_src[] = {
1330        "Mono DAC MIXL", "ADC"
1331};
1332
1333static SOC_ENUM_SINGLE_DECL(
1334        rt5645_mono_adc_l1_enum, RT5645_MONO_ADC_MIXER,
1335        RT5645_MONO_ADC_L1_SRC_SFT, rt5645_mono_adc_l1_src);
1336
1337static const struct snd_kcontrol_new rt5645_mono_adc_l1_mux =
1338        SOC_DAPM_ENUM("Mono ADC1 left source", rt5645_mono_adc_l1_enum);
1339/* MX-28 [11] */
1340static const char * const rt5645_mono_adc_l2_src[] = {
1341        "Mono DAC MIXL", "DMIC"
1342};
1343
1344static SOC_ENUM_SINGLE_DECL(
1345        rt5645_mono_adc_l2_enum, RT5645_MONO_ADC_MIXER,
1346        RT5645_MONO_ADC_L2_SRC_SFT, rt5645_mono_adc_l2_src);
1347
1348static const struct snd_kcontrol_new rt5645_mono_adc_l2_mux =
1349        SOC_DAPM_ENUM("Mono ADC2 left source", rt5645_mono_adc_l2_enum);
1350
1351/* MX-28 [8] */
1352static const char * const rt5645_mono_dmic_src[] = {
1353        "DMIC1", "DMIC2"
1354};
1355
1356static SOC_ENUM_SINGLE_DECL(
1357        rt5645_mono_dmic_l_enum, RT5645_MONO_ADC_MIXER,
1358        RT5645_MONO_DMIC_L_SRC_SFT, rt5645_mono_dmic_src);
1359
1360static const struct snd_kcontrol_new rt5645_mono_dmic_l_mux =
1361        SOC_DAPM_ENUM("Mono DMIC left source", rt5645_mono_dmic_l_enum);
1362/* MX-28 [1:0] */
1363static SOC_ENUM_SINGLE_DECL(
1364        rt5645_mono_dmic_r_enum, RT5645_MONO_ADC_MIXER,
1365        RT5645_MONO_DMIC_R_SRC_SFT, rt5645_mono_dmic_src);
1366
1367static const struct snd_kcontrol_new rt5645_mono_dmic_r_mux =
1368        SOC_DAPM_ENUM("Mono DMIC Right source", rt5645_mono_dmic_r_enum);
1369/* MX-28 [4] */
1370static const char * const rt5645_mono_adc_r1_src[] = {
1371        "Mono DAC MIXR", "ADC"
1372};
1373
1374static SOC_ENUM_SINGLE_DECL(
1375        rt5645_mono_adc_r1_enum, RT5645_MONO_ADC_MIXER,
1376        RT5645_MONO_ADC_R1_SRC_SFT, rt5645_mono_adc_r1_src);
1377
1378static const struct snd_kcontrol_new rt5645_mono_adc_r1_mux =
1379        SOC_DAPM_ENUM("Mono ADC1 right source", rt5645_mono_adc_r1_enum);
1380/* MX-28 [3] */
1381static const char * const rt5645_mono_adc_r2_src[] = {
1382        "Mono DAC MIXR", "DMIC"
1383};
1384
1385static SOC_ENUM_SINGLE_DECL(
1386        rt5645_mono_adc_r2_enum, RT5645_MONO_ADC_MIXER,
1387        RT5645_MONO_ADC_R2_SRC_SFT, rt5645_mono_adc_r2_src);
1388
1389static const struct snd_kcontrol_new rt5645_mono_adc_r2_mux =
1390        SOC_DAPM_ENUM("Mono ADC2 right source", rt5645_mono_adc_r2_enum);
1391
1392/* MX-77 [9:8] */
1393static const char * const rt5645_if1_adc_in_src[] = {
1394        "IF_ADC1/IF_ADC2/VAD_ADC", "IF_ADC2/IF_ADC1/VAD_ADC",
1395        "VAD_ADC/IF_ADC1/IF_ADC2", "VAD_ADC/IF_ADC2/IF_ADC1"
1396};
1397
1398static SOC_ENUM_SINGLE_DECL(
1399        rt5645_if1_adc_in_enum, RT5645_TDM_CTRL_1,
1400        RT5645_IF1_ADC_IN_SFT, rt5645_if1_adc_in_src);
1401
1402static const struct snd_kcontrol_new rt5645_if1_adc_in_mux =
1403        SOC_DAPM_ENUM("IF1 ADC IN source", rt5645_if1_adc_in_enum);
1404
1405/* MX-78 [4:0] */
1406static const char * const rt5650_if1_adc_in_src[] = {
1407        "IF_ADC1/IF_ADC2/DAC_REF/Null",
1408        "IF_ADC1/IF_ADC2/Null/DAC_REF",
1409        "IF_ADC1/DAC_REF/IF_ADC2/Null",
1410        "IF_ADC1/DAC_REF/Null/IF_ADC2",
1411        "IF_ADC1/Null/DAC_REF/IF_ADC2",
1412        "IF_ADC1/Null/IF_ADC2/DAC_REF",
1413
1414        "IF_ADC2/IF_ADC1/DAC_REF/Null",
1415        "IF_ADC2/IF_ADC1/Null/DAC_REF",
1416        "IF_ADC2/DAC_REF/IF_ADC1/Null",
1417        "IF_ADC2/DAC_REF/Null/IF_ADC1",
1418        "IF_ADC2/Null/DAC_REF/IF_ADC1",
1419        "IF_ADC2/Null/IF_ADC1/DAC_REF",
1420
1421        "DAC_REF/IF_ADC1/IF_ADC2/Null",
1422        "DAC_REF/IF_ADC1/Null/IF_ADC2",
1423        "DAC_REF/IF_ADC2/IF_ADC1/Null",
1424        "DAC_REF/IF_ADC2/Null/IF_ADC1",
1425        "DAC_REF/Null/IF_ADC1/IF_ADC2",
1426        "DAC_REF/Null/IF_ADC2/IF_ADC1",
1427
1428        "Null/IF_ADC1/IF_ADC2/DAC_REF",
1429        "Null/IF_ADC1/DAC_REF/IF_ADC2",
1430        "Null/IF_ADC2/IF_ADC1/DAC_REF",
1431        "Null/IF_ADC2/DAC_REF/IF_ADC1",
1432        "Null/DAC_REF/IF_ADC1/IF_ADC2",
1433        "Null/DAC_REF/IF_ADC2/IF_ADC1",
1434};
1435
1436static SOC_ENUM_SINGLE_DECL(
1437        rt5650_if1_adc_in_enum, RT5645_TDM_CTRL_2,
1438        0, rt5650_if1_adc_in_src);
1439
1440static const struct snd_kcontrol_new rt5650_if1_adc_in_mux =
1441        SOC_DAPM_ENUM("IF1 ADC IN source", rt5650_if1_adc_in_enum);
1442
1443/* MX-78 [15:14][13:12][11:10] */
1444static const char * const rt5645_tdm_adc_swap_select[] = {
1445        "L/R", "R/L", "L/L", "R/R"
1446};
1447
1448static SOC_ENUM_SINGLE_DECL(rt5650_tdm_adc_slot0_1_enum,
1449        RT5645_TDM_CTRL_2, 14, rt5645_tdm_adc_swap_select);
1450
1451static const struct snd_kcontrol_new rt5650_if1_adc1_in_mux =
1452        SOC_DAPM_ENUM("IF1 ADC1 IN source", rt5650_tdm_adc_slot0_1_enum);
1453
1454static SOC_ENUM_SINGLE_DECL(rt5650_tdm_adc_slot2_3_enum,
1455        RT5645_TDM_CTRL_2, 12, rt5645_tdm_adc_swap_select);
1456
1457static const struct snd_kcontrol_new rt5650_if1_adc2_in_mux =
1458        SOC_DAPM_ENUM("IF1 ADC2 IN source", rt5650_tdm_adc_slot2_3_enum);
1459
1460static SOC_ENUM_SINGLE_DECL(rt5650_tdm_adc_slot4_5_enum,
1461        RT5645_TDM_CTRL_2, 10, rt5645_tdm_adc_swap_select);
1462
1463static const struct snd_kcontrol_new rt5650_if1_adc3_in_mux =
1464        SOC_DAPM_ENUM("IF1 ADC3 IN source", rt5650_tdm_adc_slot4_5_enum);
1465
1466/* MX-77 [7:6][5:4][3:2] */
1467static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot0_1_enum,
1468        RT5645_TDM_CTRL_1, 6, rt5645_tdm_adc_swap_select);
1469
1470static const struct snd_kcontrol_new rt5645_if1_adc1_in_mux =
1471        SOC_DAPM_ENUM("IF1 ADC1 IN source", rt5645_tdm_adc_slot0_1_enum);
1472
1473static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot2_3_enum,
1474        RT5645_TDM_CTRL_1, 4, rt5645_tdm_adc_swap_select);
1475
1476static const struct snd_kcontrol_new rt5645_if1_adc2_in_mux =
1477        SOC_DAPM_ENUM("IF1 ADC2 IN source", rt5645_tdm_adc_slot2_3_enum);
1478
1479static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot4_5_enum,
1480        RT5645_TDM_CTRL_1, 2, rt5645_tdm_adc_swap_select);
1481
1482static const struct snd_kcontrol_new rt5645_if1_adc3_in_mux =
1483        SOC_DAPM_ENUM("IF1 ADC3 IN source", rt5645_tdm_adc_slot4_5_enum);
1484
1485/* MX-79 [14:12][10:8][6:4][2:0] */
1486static const char * const rt5645_tdm_dac_swap_select[] = {
1487        "Slot0", "Slot1", "Slot2", "Slot3"
1488};
1489
1490static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac0_enum,
1491        RT5645_TDM_CTRL_3, 12, rt5645_tdm_dac_swap_select);
1492
1493static const struct snd_kcontrol_new rt5645_if1_dac0_tdm_sel_mux =
1494        SOC_DAPM_ENUM("IF1 DAC0 source", rt5645_tdm_dac0_enum);
1495
1496static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac1_enum,
1497        RT5645_TDM_CTRL_3, 8, rt5645_tdm_dac_swap_select);
1498
1499static const struct snd_kcontrol_new rt5645_if1_dac1_tdm_sel_mux =
1500        SOC_DAPM_ENUM("IF1 DAC1 source", rt5645_tdm_dac1_enum);
1501
1502static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac2_enum,
1503        RT5645_TDM_CTRL_3, 4, rt5645_tdm_dac_swap_select);
1504
1505static const struct snd_kcontrol_new rt5645_if1_dac2_tdm_sel_mux =
1506        SOC_DAPM_ENUM("IF1 DAC2 source", rt5645_tdm_dac2_enum);
1507
1508static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac3_enum,
1509        RT5645_TDM_CTRL_3, 0, rt5645_tdm_dac_swap_select);
1510
1511static const struct snd_kcontrol_new rt5645_if1_dac3_tdm_sel_mux =
1512        SOC_DAPM_ENUM("IF1 DAC3 source", rt5645_tdm_dac3_enum);
1513
1514/* MX-7a [14:12][10:8][6:4][2:0] */
1515static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac0_enum,
1516        RT5650_TDM_CTRL_4, 12, rt5645_tdm_dac_swap_select);
1517
1518static const struct snd_kcontrol_new rt5650_if1_dac0_tdm_sel_mux =
1519        SOC_DAPM_ENUM("IF1 DAC0 source", rt5650_tdm_dac0_enum);
1520
1521static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac1_enum,
1522        RT5650_TDM_CTRL_4, 8, rt5645_tdm_dac_swap_select);
1523
1524static const struct snd_kcontrol_new rt5650_if1_dac1_tdm_sel_mux =
1525        SOC_DAPM_ENUM("IF1 DAC1 source", rt5650_tdm_dac1_enum);
1526
1527static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac2_enum,
1528        RT5650_TDM_CTRL_4, 4, rt5645_tdm_dac_swap_select);
1529
1530static const struct snd_kcontrol_new rt5650_if1_dac2_tdm_sel_mux =
1531        SOC_DAPM_ENUM("IF1 DAC2 source", rt5650_tdm_dac2_enum);
1532
1533static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac3_enum,
1534        RT5650_TDM_CTRL_4, 0, rt5645_tdm_dac_swap_select);
1535
1536static const struct snd_kcontrol_new rt5650_if1_dac3_tdm_sel_mux =
1537        SOC_DAPM_ENUM("IF1 DAC3 source", rt5650_tdm_dac3_enum);
1538
1539/* MX-2d [3] [2] */
1540static const char * const rt5650_a_dac1_src[] = {
1541        "DAC1", "Stereo DAC Mixer"
1542};
1543
1544static SOC_ENUM_SINGLE_DECL(
1545        rt5650_a_dac1_l_enum, RT5650_A_DAC_SOUR,
1546        RT5650_A_DAC1_L_IN_SFT, rt5650_a_dac1_src);
1547
1548static const struct snd_kcontrol_new rt5650_a_dac1_l_mux =
1549        SOC_DAPM_ENUM("A DAC1 L source", rt5650_a_dac1_l_enum);
1550
1551static SOC_ENUM_SINGLE_DECL(
1552        rt5650_a_dac1_r_enum, RT5650_A_DAC_SOUR,
1553        RT5650_A_DAC1_R_IN_SFT, rt5650_a_dac1_src);
1554
1555static const struct snd_kcontrol_new rt5650_a_dac1_r_mux =
1556        SOC_DAPM_ENUM("A DAC1 R source", rt5650_a_dac1_r_enum);
1557
1558/* MX-2d [1] [0] */
1559static const char * const rt5650_a_dac2_src[] = {
1560        "Stereo DAC Mixer", "Mono DAC Mixer"
1561};
1562
1563static SOC_ENUM_SINGLE_DECL(
1564        rt5650_a_dac2_l_enum, RT5650_A_DAC_SOUR,
1565        RT5650_A_DAC2_L_IN_SFT, rt5650_a_dac2_src);
1566
1567static const struct snd_kcontrol_new rt5650_a_dac2_l_mux =
1568        SOC_DAPM_ENUM("A DAC2 L source", rt5650_a_dac2_l_enum);
1569
1570static SOC_ENUM_SINGLE_DECL(
1571        rt5650_a_dac2_r_enum, RT5650_A_DAC_SOUR,
1572        RT5650_A_DAC2_R_IN_SFT, rt5650_a_dac2_src);
1573
1574static const struct snd_kcontrol_new rt5650_a_dac2_r_mux =
1575        SOC_DAPM_ENUM("A DAC2 R source", rt5650_a_dac2_r_enum);
1576
1577/* MX-2F [13:12] */
1578static const char * const rt5645_if2_adc_in_src[] = {
1579        "IF_ADC1", "IF_ADC2", "VAD_ADC"
1580};
1581
1582static SOC_ENUM_SINGLE_DECL(
1583        rt5645_if2_adc_in_enum, RT5645_DIG_INF1_DATA,
1584        RT5645_IF2_ADC_IN_SFT, rt5645_if2_adc_in_src);
1585
1586static const struct snd_kcontrol_new rt5645_if2_adc_in_mux =
1587        SOC_DAPM_ENUM("IF2 ADC IN source", rt5645_if2_adc_in_enum);
1588
1589/* MX-31 [15] [13] [11] [9] */
1590static const char * const rt5645_pdm_src[] = {
1591        "Mono DAC", "Stereo DAC"
1592};
1593
1594static SOC_ENUM_SINGLE_DECL(
1595        rt5645_pdm1_l_enum, RT5645_PDM_OUT_CTRL,
1596        RT5645_PDM1_L_SFT, rt5645_pdm_src);
1597
1598static const struct snd_kcontrol_new rt5645_pdm1_l_mux =
1599        SOC_DAPM_ENUM("PDM1 L source", rt5645_pdm1_l_enum);
1600
1601static SOC_ENUM_SINGLE_DECL(
1602        rt5645_pdm1_r_enum, RT5645_PDM_OUT_CTRL,
1603        RT5645_PDM1_R_SFT, rt5645_pdm_src);
1604
1605static const struct snd_kcontrol_new rt5645_pdm1_r_mux =
1606        SOC_DAPM_ENUM("PDM1 R source", rt5645_pdm1_r_enum);
1607
1608/* MX-9D [9:8] */
1609static const char * const rt5645_vad_adc_src[] = {
1610        "Sto1 ADC L", "Mono ADC L", "Mono ADC R"
1611};
1612
1613static SOC_ENUM_SINGLE_DECL(
1614        rt5645_vad_adc_enum, RT5645_VAD_CTRL4,
1615        RT5645_VAD_SEL_SFT, rt5645_vad_adc_src);
1616
1617static const struct snd_kcontrol_new rt5645_vad_adc_mux =
1618        SOC_DAPM_ENUM("VAD ADC source", rt5645_vad_adc_enum);
1619
1620static const struct snd_kcontrol_new spk_l_vol_control =
1621        SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_SPK_VOL,
1622                RT5645_L_MUTE_SFT, 1, 1);
1623
1624static const struct snd_kcontrol_new spk_r_vol_control =
1625        SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_SPK_VOL,
1626                RT5645_R_MUTE_SFT, 1, 1);
1627
1628static const struct snd_kcontrol_new hp_l_vol_control =
1629        SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_HP_VOL,
1630                RT5645_L_MUTE_SFT, 1, 1);
1631
1632static const struct snd_kcontrol_new hp_r_vol_control =
1633        SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_HP_VOL,
1634                RT5645_R_MUTE_SFT, 1, 1);
1635
1636static const struct snd_kcontrol_new pdm1_l_vol_control =
1637        SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_PDM_OUT_CTRL,
1638                RT5645_M_PDM1_L, 1, 1);
1639
1640static const struct snd_kcontrol_new pdm1_r_vol_control =
1641        SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_PDM_OUT_CTRL,
1642                RT5645_M_PDM1_R, 1, 1);
1643
1644static void hp_amp_power(struct snd_soc_component *component, int on)
1645{
1646        static int hp_amp_power_count;
1647        struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
1648
1649        if (on) {
1650                if (hp_amp_power_count <= 0) {
1651                        if (rt5645->codec_type == CODEC_TYPE_RT5650) {
1652                                snd_soc_component_write(component, RT5645_DEPOP_M2, 0x3100);
1653                                snd_soc_component_write(component, RT5645_CHARGE_PUMP,
1654                                        0x0e06);
1655                                snd_soc_component_write(component, RT5645_DEPOP_M1, 0x000d);
1656                                regmap_write(rt5645->regmap, RT5645_PR_BASE +
1657                                        RT5645_HP_DCC_INT1, 0x9f01);
1658                                msleep(20);
1659                                snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1660                                        RT5645_HP_CO_MASK, RT5645_HP_CO_EN);
1661                                regmap_write(rt5645->regmap, RT5645_PR_BASE +
1662                                        0x3e, 0x7400);
1663                                snd_soc_component_write(component, RT5645_DEPOP_M3, 0x0737);
1664                                regmap_write(rt5645->regmap, RT5645_PR_BASE +
1665                                        RT5645_MAMP_INT_REG2, 0xfc00);
1666                                snd_soc_component_write(component, RT5645_DEPOP_M2, 0x1140);
1667                                msleep(90);
1668                                rt5645->hp_on = true;
1669                        } else {
1670                                /* depop parameters */
1671                                snd_soc_component_update_bits(component, RT5645_DEPOP_M2,
1672                                        RT5645_DEPOP_MASK, RT5645_DEPOP_MAN);
1673                                snd_soc_component_write(component, RT5645_DEPOP_M1, 0x000d);
1674                                regmap_write(rt5645->regmap, RT5645_PR_BASE +
1675                                        RT5645_HP_DCC_INT1, 0x9f01);
1676                                mdelay(150);
1677                                /* headphone amp power on */
1678                                snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
1679                                        RT5645_PWR_FV1 | RT5645_PWR_FV2, 0);
1680                                snd_soc_component_update_bits(component, RT5645_PWR_VOL,
1681                                        RT5645_PWR_HV_L | RT5645_PWR_HV_R,
1682                                        RT5645_PWR_HV_L | RT5645_PWR_HV_R);
1683                                snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
1684                                        RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1685                                        RT5645_PWR_HA,
1686                                        RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1687                                        RT5645_PWR_HA);
1688                                mdelay(5);
1689                                snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
1690                                        RT5645_PWR_FV1 | RT5645_PWR_FV2,
1691                                        RT5645_PWR_FV1 | RT5645_PWR_FV2);
1692
1693                                snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1694                                        RT5645_HP_CO_MASK | RT5645_HP_SG_MASK,
1695                                        RT5645_HP_CO_EN | RT5645_HP_SG_EN);
1696                                regmap_write(rt5645->regmap, RT5645_PR_BASE +
1697                                        0x14, 0x1aaa);
1698                                regmap_write(rt5645->regmap, RT5645_PR_BASE +
1699                                        0x24, 0x0430);
1700                        }
1701                }
1702                hp_amp_power_count++;
1703        } else {
1704                hp_amp_power_count--;
1705                if (hp_amp_power_count <= 0) {
1706                        if (rt5645->codec_type == CODEC_TYPE_RT5650) {
1707                                regmap_write(rt5645->regmap, RT5645_PR_BASE +
1708                                        0x3e, 0x7400);
1709                                snd_soc_component_write(component, RT5645_DEPOP_M3, 0x0737);
1710                                regmap_write(rt5645->regmap, RT5645_PR_BASE +
1711                                        RT5645_MAMP_INT_REG2, 0xfc00);
1712                                snd_soc_component_write(component, RT5645_DEPOP_M2, 0x1140);
1713                                msleep(100);
1714                                snd_soc_component_write(component, RT5645_DEPOP_M1, 0x0001);
1715
1716                        } else {
1717                                snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1718                                        RT5645_HP_SG_MASK |
1719                                        RT5645_HP_L_SMT_MASK |
1720                                        RT5645_HP_R_SMT_MASK,
1721                                        RT5645_HP_SG_DIS |
1722                                        RT5645_HP_L_SMT_DIS |
1723                                        RT5645_HP_R_SMT_DIS);
1724                                /* headphone amp power down */
1725                                snd_soc_component_write(component, RT5645_DEPOP_M1, 0x0000);
1726                                snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
1727                                        RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1728                                        RT5645_PWR_HA, 0);
1729                                snd_soc_component_update_bits(component, RT5645_DEPOP_M2,
1730                                        RT5645_DEPOP_MASK, 0);
1731                        }
1732                }
1733        }
1734}
1735
1736static int rt5645_hp_event(struct snd_soc_dapm_widget *w,
1737        struct snd_kcontrol *kcontrol, int event)
1738{
1739        struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1740        struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
1741
1742        switch (event) {
1743        case SND_SOC_DAPM_POST_PMU:
1744                hp_amp_power(component, 1);
1745                /* headphone unmute sequence */
1746                if (rt5645->codec_type == CODEC_TYPE_RT5645) {
1747                        snd_soc_component_update_bits(component, RT5645_DEPOP_M3,
1748                                RT5645_CP_FQ1_MASK | RT5645_CP_FQ2_MASK |
1749                                RT5645_CP_FQ3_MASK,
1750                                (RT5645_CP_FQ_192_KHZ << RT5645_CP_FQ1_SFT) |
1751                                (RT5645_CP_FQ_12_KHZ << RT5645_CP_FQ2_SFT) |
1752                                (RT5645_CP_FQ_192_KHZ << RT5645_CP_FQ3_SFT));
1753                        regmap_write(rt5645->regmap, RT5645_PR_BASE +
1754                                RT5645_MAMP_INT_REG2, 0xfc00);
1755                        snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1756                                RT5645_SMT_TRIG_MASK, RT5645_SMT_TRIG_EN);
1757                        snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1758                                RT5645_RSTN_MASK, RT5645_RSTN_EN);
1759                        snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1760                                RT5645_RSTN_MASK | RT5645_HP_L_SMT_MASK |
1761                                RT5645_HP_R_SMT_MASK, RT5645_RSTN_DIS |
1762                                RT5645_HP_L_SMT_EN | RT5645_HP_R_SMT_EN);
1763                        msleep(40);
1764                        snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1765                                RT5645_HP_SG_MASK | RT5645_HP_L_SMT_MASK |
1766                                RT5645_HP_R_SMT_MASK, RT5645_HP_SG_DIS |
1767                                RT5645_HP_L_SMT_DIS | RT5645_HP_R_SMT_DIS);
1768                }
1769                break;
1770
1771        case SND_SOC_DAPM_PRE_PMD:
1772                /* headphone mute sequence */
1773                if (rt5645->codec_type == CODEC_TYPE_RT5645) {
1774                        snd_soc_component_update_bits(component, RT5645_DEPOP_M3,
1775                                RT5645_CP_FQ1_MASK | RT5645_CP_FQ2_MASK |
1776                                RT5645_CP_FQ3_MASK,
1777                                (RT5645_CP_FQ_96_KHZ << RT5645_CP_FQ1_SFT) |
1778                                (RT5645_CP_FQ_12_KHZ << RT5645_CP_FQ2_SFT) |
1779                                (RT5645_CP_FQ_96_KHZ << RT5645_CP_FQ3_SFT));
1780                        regmap_write(rt5645->regmap, RT5645_PR_BASE +
1781                                RT5645_MAMP_INT_REG2, 0xfc00);
1782                        snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1783                                RT5645_HP_SG_MASK, RT5645_HP_SG_EN);
1784                        snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1785                                RT5645_RSTP_MASK, RT5645_RSTP_EN);
1786                        snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1787                                RT5645_RSTP_MASK | RT5645_HP_L_SMT_MASK |
1788                                RT5645_HP_R_SMT_MASK, RT5645_RSTP_DIS |
1789                                RT5645_HP_L_SMT_EN | RT5645_HP_R_SMT_EN);
1790                        msleep(30);
1791                }
1792                hp_amp_power(component, 0);
1793                break;
1794
1795        default:
1796                return 0;
1797        }
1798
1799        return 0;
1800}
1801
1802static int rt5645_spk_event(struct snd_soc_dapm_widget *w,
1803        struct snd_kcontrol *kcontrol, int event)
1804{
1805        struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1806
1807        switch (event) {
1808        case SND_SOC_DAPM_POST_PMU:
1809                rt5645_enable_hweq(component);
1810                snd_soc_component_update_bits(component, RT5645_PWR_DIG1,
1811                        RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1812                        RT5645_PWR_CLS_D_L,
1813                        RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1814                        RT5645_PWR_CLS_D_L);
1815                snd_soc_component_update_bits(component, RT5645_GEN_CTRL3,
1816                        RT5645_DET_CLK_MASK, RT5645_DET_CLK_MODE1);
1817                break;
1818
1819        case SND_SOC_DAPM_PRE_PMD:
1820                snd_soc_component_update_bits(component, RT5645_GEN_CTRL3,
1821                        RT5645_DET_CLK_MASK, RT5645_DET_CLK_DIS);
1822                snd_soc_component_write(component, RT5645_EQ_CTRL2, 0);
1823                snd_soc_component_update_bits(component, RT5645_PWR_DIG1,
1824                        RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1825                        RT5645_PWR_CLS_D_L, 0);
1826                break;
1827
1828        default:
1829                return 0;
1830        }
1831
1832        return 0;
1833}
1834
1835static int rt5645_lout_event(struct snd_soc_dapm_widget *w,
1836        struct snd_kcontrol *kcontrol, int event)
1837{
1838        struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1839
1840        switch (event) {
1841        case SND_SOC_DAPM_POST_PMU:
1842                hp_amp_power(component, 1);
1843                snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
1844                        RT5645_PWR_LM, RT5645_PWR_LM);
1845                snd_soc_component_update_bits(component, RT5645_LOUT1,
1846                        RT5645_L_MUTE | RT5645_R_MUTE, 0);
1847                break;
1848
1849        case SND_SOC_DAPM_PRE_PMD:
1850                snd_soc_component_update_bits(component, RT5645_LOUT1,
1851                        RT5645_L_MUTE | RT5645_R_MUTE,
1852                        RT5645_L_MUTE | RT5645_R_MUTE);
1853                snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
1854                        RT5645_PWR_LM, 0);
1855                hp_amp_power(component, 0);
1856                break;
1857
1858        default:
1859                return 0;
1860        }
1861
1862        return 0;
1863}
1864
1865static int rt5645_bst2_event(struct snd_soc_dapm_widget *w,
1866        struct snd_kcontrol *kcontrol, int event)
1867{
1868        struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1869
1870        switch (event) {
1871        case SND_SOC_DAPM_POST_PMU:
1872                snd_soc_component_update_bits(component, RT5645_PWR_ANLG2,
1873                        RT5645_PWR_BST2_P, RT5645_PWR_BST2_P);
1874                break;
1875
1876        case SND_SOC_DAPM_PRE_PMD:
1877                snd_soc_component_update_bits(component, RT5645_PWR_ANLG2,
1878                        RT5645_PWR_BST2_P, 0);
1879                break;
1880
1881        default:
1882                return 0;
1883        }
1884
1885        return 0;
1886}
1887
1888static int rt5650_hp_event(struct snd_soc_dapm_widget *w,
1889                struct snd_kcontrol *k, int  event)
1890{
1891        struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1892        struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
1893
1894        switch (event) {
1895        case SND_SOC_DAPM_POST_PMU:
1896                if (rt5645->hp_on) {
1897                        msleep(100);
1898                        rt5645->hp_on = false;
1899                }
1900                break;
1901
1902        default:
1903                return 0;
1904        }
1905
1906        return 0;
1907}
1908
1909static int rt5645_set_micbias1_event(struct snd_soc_dapm_widget *w,
1910                struct snd_kcontrol *k, int  event)
1911{
1912        struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1913
1914        switch (event) {
1915        case SND_SOC_DAPM_PRE_PMU:
1916                snd_soc_component_update_bits(component, RT5645_GEN_CTRL2,
1917                        RT5645_MICBIAS1_POW_CTRL_SEL_MASK,
1918                        RT5645_MICBIAS1_POW_CTRL_SEL_M);
1919                break;
1920
1921        case SND_SOC_DAPM_POST_PMD:
1922                snd_soc_component_update_bits(component, RT5645_GEN_CTRL2,
1923                        RT5645_MICBIAS1_POW_CTRL_SEL_MASK,
1924                        RT5645_MICBIAS1_POW_CTRL_SEL_A);
1925                break;
1926
1927        default:
1928                return 0;
1929        }
1930
1931        return 0;
1932}
1933
1934static int rt5645_set_micbias2_event(struct snd_soc_dapm_widget *w,
1935                struct snd_kcontrol *k, int  event)
1936{
1937        struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1938
1939        switch (event) {
1940        case SND_SOC_DAPM_PRE_PMU:
1941                snd_soc_component_update_bits(component, RT5645_GEN_CTRL2,
1942                        RT5645_MICBIAS2_POW_CTRL_SEL_MASK,
1943                        RT5645_MICBIAS2_POW_CTRL_SEL_M);
1944                break;
1945
1946        case SND_SOC_DAPM_POST_PMD:
1947                snd_soc_component_update_bits(component, RT5645_GEN_CTRL2,
1948                        RT5645_MICBIAS2_POW_CTRL_SEL_MASK,
1949                        RT5645_MICBIAS2_POW_CTRL_SEL_A);
1950                break;
1951
1952        default:
1953                return 0;
1954        }
1955
1956        return 0;
1957}
1958
1959static const struct snd_soc_dapm_widget rt5645_dapm_widgets[] = {
1960        SND_SOC_DAPM_SUPPLY("LDO2", RT5645_PWR_MIXER,
1961                RT5645_PWR_LDO2_BIT, 0, NULL, 0),
1962        SND_SOC_DAPM_SUPPLY("PLL1", RT5645_PWR_ANLG2,
1963                RT5645_PWR_PLL_BIT, 0, NULL, 0),
1964
1965        SND_SOC_DAPM_SUPPLY("JD Power", RT5645_PWR_ANLG2,
1966                RT5645_PWR_JD1_BIT, 0, NULL, 0),
1967        SND_SOC_DAPM_SUPPLY("Mic Det Power", RT5645_PWR_VOL,
1968                RT5645_PWR_MIC_DET_BIT, 0, NULL, 0),
1969
1970        /* ASRC */
1971        SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5645_ASRC_1,
1972                              11, 0, NULL, 0),
1973        SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5645_ASRC_1,
1974                              12, 0, NULL, 0),
1975        SND_SOC_DAPM_SUPPLY_S("DAC STO ASRC", 1, RT5645_ASRC_1,
1976                              10, 0, NULL, 0),
1977        SND_SOC_DAPM_SUPPLY_S("DAC MONO L ASRC", 1, RT5645_ASRC_1,
1978                              9, 0, NULL, 0),
1979        SND_SOC_DAPM_SUPPLY_S("DAC MONO R ASRC", 1, RT5645_ASRC_1,
1980                              8, 0, NULL, 0),
1981        SND_SOC_DAPM_SUPPLY_S("DMIC STO1 ASRC", 1, RT5645_ASRC_1,
1982                              7, 0, NULL, 0),
1983        SND_SOC_DAPM_SUPPLY_S("DMIC MONO L ASRC", 1, RT5645_ASRC_1,
1984                              5, 0, NULL, 0),
1985        SND_SOC_DAPM_SUPPLY_S("DMIC MONO R ASRC", 1, RT5645_ASRC_1,
1986                              4, 0, NULL, 0),
1987        SND_SOC_DAPM_SUPPLY_S("ADC STO1 ASRC", 1, RT5645_ASRC_1,
1988                              3, 0, NULL, 0),
1989        SND_SOC_DAPM_SUPPLY_S("ADC MONO L ASRC", 1, RT5645_ASRC_1,
1990                              1, 0, NULL, 0),
1991        SND_SOC_DAPM_SUPPLY_S("ADC MONO R ASRC", 1, RT5645_ASRC_1,
1992                              0, 0, NULL, 0),
1993
1994        /* Input Side */
1995        /* micbias */
1996        SND_SOC_DAPM_SUPPLY("micbias1", RT5645_PWR_ANLG2,
1997                        RT5645_PWR_MB1_BIT, 0, rt5645_set_micbias1_event,
1998                        SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
1999        SND_SOC_DAPM_SUPPLY("micbias2", RT5645_PWR_ANLG2,
2000                        RT5645_PWR_MB2_BIT, 0, rt5645_set_micbias2_event,

2001                        SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
2002        /* Input Lines */
2003        SND_SOC_DAPM_INPUT("DMIC L1"),
2004        SND_SOC_DAPM_INPUT("DMIC R1"),
2005        SND_SOC_DAPM_INPUT("DMIC L2"),
2006        SND_SOC_DAPM_INPUT("DMIC R2"),
2007
2008        SND_SOC_DAPM_INPUT("IN1P"),
2009        SND_SOC_DAPM_INPUT("IN1N"),
2010        SND_SOC_DAPM_INPUT("IN2P"),
2011        SND_SOC_DAPM_INPUT("IN2N"),
2012
2013        SND_SOC_DAPM_INPUT("Haptic Generator"),
2014
2015        SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2016        SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2017        SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
2018                set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
2019        SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5645_DMIC_CTRL1,
2020                RT5645_DMIC_1_EN_SFT, 0, NULL, 0),
2021        SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5645_DMIC_CTRL1,
2022                RT5645_DMIC_2_EN_SFT, 0, NULL, 0),
2023        /* Boost */
2024        SND_SOC_DAPM_PGA("BST1", RT5645_PWR_ANLG2,
2025                RT5645_PWR_BST1_BIT, 0, NULL, 0),
2026        SND_SOC_DAPM_PGA_E("BST2", RT5645_PWR_ANLG2,
2027                RT5645_PWR_BST2_BIT, 0, NULL, 0, rt5645_bst2_event,
2028                SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
2029        /* Input Volume */
2030        SND_SOC_DAPM_PGA("INL VOL", RT5645_PWR_VOL,
2031                RT5645_PWR_IN_L_BIT, 0, NULL, 0),
2032        SND_SOC_DAPM_PGA("INR VOL", RT5645_PWR_VOL,
2033                RT5645_PWR_IN_R_BIT, 0, NULL, 0),
2034        /* REC Mixer */
2035        SND_SOC_DAPM_MIXER("RECMIXL", RT5645_PWR_MIXER, RT5645_PWR_RM_L_BIT,
2036                        0, rt5645_rec_l_mix, ARRAY_SIZE(rt5645_rec_l_mix)),
2037        SND_SOC_DAPM_MIXER("RECMIXR", RT5645_PWR_MIXER, RT5645_PWR_RM_R_BIT,
2038                        0, rt5645_rec_r_mix, ARRAY_SIZE(rt5645_rec_r_mix)),
2039        /* ADCs */
2040        SND_SOC_DAPM_ADC("ADC L", NULL, SND_SOC_NOPM, 0, 0),
2041        SND_SOC_DAPM_ADC("ADC R", NULL, SND_SOC_NOPM, 0, 0),
2042
2043        SND_SOC_DAPM_SUPPLY("ADC L power", RT5645_PWR_DIG1,
2044                RT5645_PWR_ADC_L_BIT, 0, NULL, 0),
2045        SND_SOC_DAPM_SUPPLY("ADC R power", RT5645_PWR_DIG1,
2046                RT5645_PWR_ADC_R_BIT, 0, NULL, 0),
2047
2048        /* ADC Mux */
2049        SND_SOC_DAPM_MUX("Stereo1 DMIC Mux", SND_SOC_NOPM, 0, 0,
2050                &rt5645_sto1_dmic_mux),
2051        SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
2052                &rt5645_sto_adc2_mux),
2053        SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
2054                &rt5645_sto_adc2_mux),
2055        SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
2056                &rt5645_sto_adc1_mux),
2057        SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
2058                &rt5645_sto_adc1_mux),
2059        SND_SOC_DAPM_MUX("Mono DMIC L Mux", SND_SOC_NOPM, 0, 0,
2060                &rt5645_mono_dmic_l_mux),
2061        SND_SOC_DAPM_MUX("Mono DMIC R Mux", SND_SOC_NOPM, 0, 0,
2062                &rt5645_mono_dmic_r_mux),
2063        SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
2064                &rt5645_mono_adc_l2_mux),
2065        SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
2066                &rt5645_mono_adc_l1_mux),
2067        SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
2068                &rt5645_mono_adc_r1_mux),
2069        SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
2070                &rt5645_mono_adc_r2_mux),
2071        /* ADC Mixer */
2072
2073        SND_SOC_DAPM_SUPPLY_S("adc stereo1 filter", 1, RT5645_PWR_DIG2,
2074                RT5645_PWR_ADC_S1F_BIT, 0, NULL, 0),
2075        SND_SOC_DAPM_MIXER_E("Sto1 ADC MIXL", SND_SOC_NOPM, 0, 0,
2076                rt5645_sto1_adc_l_mix, ARRAY_SIZE(rt5645_sto1_adc_l_mix),
2077                NULL, 0),
2078        SND_SOC_DAPM_MIXER_E("Sto1 ADC MIXR", SND_SOC_NOPM, 0, 0,
2079                rt5645_sto1_adc_r_mix, ARRAY_SIZE(rt5645_sto1_adc_r_mix),
2080                NULL, 0),
2081        SND_SOC_DAPM_SUPPLY_S("adc mono left filter", 1, RT5645_PWR_DIG2,
2082                RT5645_PWR_ADC_MF_L_BIT, 0, NULL, 0),
2083        SND_SOC_DAPM_MIXER_E("Mono ADC MIXL", SND_SOC_NOPM, 0, 0,
2084                rt5645_mono_adc_l_mix, ARRAY_SIZE(rt5645_mono_adc_l_mix),
2085                NULL, 0),
2086        SND_SOC_DAPM_SUPPLY_S("adc mono right filter", 1, RT5645_PWR_DIG2,
2087                RT5645_PWR_ADC_MF_R_BIT, 0, NULL, 0),
2088        SND_SOC_DAPM_MIXER_E("Mono ADC MIXR", SND_SOC_NOPM, 0, 0,
2089                rt5645_mono_adc_r_mix, ARRAY_SIZE(rt5645_mono_adc_r_mix),
2090                NULL, 0),
2091
2092        /* ADC PGA */
2093        SND_SOC_DAPM_PGA("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0),
2094        SND_SOC_DAPM_PGA("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0),
2095        SND_SOC_DAPM_PGA("Sto2 ADC LR MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
2096        SND_SOC_DAPM_PGA("VAD_ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
2097        SND_SOC_DAPM_PGA("IF_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2098        SND_SOC_DAPM_PGA("IF_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2099        SND_SOC_DAPM_PGA("IF1_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2100        SND_SOC_DAPM_PGA("IF1_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2101        SND_SOC_DAPM_PGA("IF1_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
2102        SND_SOC_DAPM_PGA("IF1_ADC4", SND_SOC_NOPM, 0, 0, NULL, 0),
2103
2104        /* IF1 2 Mux */
2105        SND_SOC_DAPM_MUX("IF2 ADC Mux", SND_SOC_NOPM,
2106                0, 0, &rt5645_if2_adc_in_mux),
2107
2108        /* Digital Interface */
2109        SND_SOC_DAPM_SUPPLY("I2S1", RT5645_PWR_DIG1,
2110                RT5645_PWR_I2S1_BIT, 0, NULL, 0),
2111        SND_SOC_DAPM_PGA("IF1 DAC0", SND_SOC_NOPM, 0, 0, NULL, 0),
2112        SND_SOC_DAPM_PGA("IF1 DAC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2113        SND_SOC_DAPM_PGA("IF1 DAC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2114        SND_SOC_DAPM_PGA("IF1 DAC3", SND_SOC_NOPM, 0, 0, NULL, 0),
2115        SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
2116        SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
2117        SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
2118        SND_SOC_DAPM_SUPPLY("I2S2", RT5645_PWR_DIG1,
2119                RT5645_PWR_I2S2_BIT, 0, NULL, 0),
2120        SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
2121        SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
2122        SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
2123        SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
2124
2125        /* Digital Interface Select */
2126        SND_SOC_DAPM_MUX("VAD ADC Mux", SND_SOC_NOPM,
2127                0, 0, &rt5645_vad_adc_mux),
2128
2129        /* Audio Interface */
2130        SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
2131        SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
2132        SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
2133        SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
2134
2135        /* Output Side */
2136        /* DAC mixer before sound effect  */
2137        SND_SOC_DAPM_MIXER("DAC1 MIXL", SND_SOC_NOPM, 0, 0,
2138                rt5645_dac_l_mix, ARRAY_SIZE(rt5645_dac_l_mix)),
2139        SND_SOC_DAPM_MIXER("DAC1 MIXR", SND_SOC_NOPM, 0, 0,
2140                rt5645_dac_r_mix, ARRAY_SIZE(rt5645_dac_r_mix)),
2141
2142        /* DAC2 channel Mux */
2143        SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac_l2_mux),
2144        SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac_r2_mux),
2145        SND_SOC_DAPM_PGA("DAC L2 Volume", RT5645_PWR_DIG1,
2146                RT5645_PWR_DAC_L2_BIT, 0, NULL, 0),
2147        SND_SOC_DAPM_PGA("DAC R2 Volume", RT5645_PWR_DIG1,
2148                RT5645_PWR_DAC_R2_BIT, 0, NULL, 0),
2149
2150        SND_SOC_DAPM_MUX("DAC1 L Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac1l_mux),
2151        SND_SOC_DAPM_MUX("DAC1 R Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac1r_mux),
2152
2153        /* DAC Mixer */
2154        SND_SOC_DAPM_SUPPLY_S("dac stereo1 filter", 1, RT5645_PWR_DIG2,
2155                RT5645_PWR_DAC_S1F_BIT, 0, NULL, 0),
2156        SND_SOC_DAPM_SUPPLY_S("dac mono left filter", 1, RT5645_PWR_DIG2,
2157                RT5645_PWR_DAC_MF_L_BIT, 0, NULL, 0),
2158        SND_SOC_DAPM_SUPPLY_S("dac mono right filter", 1, RT5645_PWR_DIG2,
2159                RT5645_PWR_DAC_MF_R_BIT, 0, NULL, 0),
2160        SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
2161                rt5645_sto_dac_l_mix, ARRAY_SIZE(rt5645_sto_dac_l_mix)),
2162        SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
2163                rt5645_sto_dac_r_mix, ARRAY_SIZE(rt5645_sto_dac_r_mix)),
2164        SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
2165                rt5645_mono_dac_l_mix, ARRAY_SIZE(rt5645_mono_dac_l_mix)),
2166        SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
2167                rt5645_mono_dac_r_mix, ARRAY_SIZE(rt5645_mono_dac_r_mix)),
2168        SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
2169                rt5645_dig_l_mix, ARRAY_SIZE(rt5645_dig_l_mix)),
2170        SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
2171                rt5645_dig_r_mix, ARRAY_SIZE(rt5645_dig_r_mix)),
2172
2173        /* DACs */
2174        SND_SOC_DAPM_DAC("DAC L1", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_L1_BIT,
2175                0),
2176        SND_SOC_DAPM_DAC("DAC L2", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_L2_BIT,
2177                0),
2178        SND_SOC_DAPM_DAC("DAC R1", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_R1_BIT,
2179                0),
2180        SND_SOC_DAPM_DAC("DAC R2", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_R2_BIT,
2181                0),
2182        /* OUT Mixer */
2183        SND_SOC_DAPM_MIXER("SPK MIXL", RT5645_PWR_MIXER, RT5645_PWR_SM_L_BIT,
2184                0, rt5645_spk_l_mix, ARRAY_SIZE(rt5645_spk_l_mix)),
2185        SND_SOC_DAPM_MIXER("SPK MIXR", RT5645_PWR_MIXER, RT5645_PWR_SM_R_BIT,
2186                0, rt5645_spk_r_mix, ARRAY_SIZE(rt5645_spk_r_mix)),
2187        SND_SOC_DAPM_MIXER("OUT MIXL", RT5645_PWR_MIXER, RT5645_PWR_OM_L_BIT,
2188                0, rt5645_out_l_mix, ARRAY_SIZE(rt5645_out_l_mix)),
2189        SND_SOC_DAPM_MIXER("OUT MIXR", RT5645_PWR_MIXER, RT5645_PWR_OM_R_BIT,
2190                0, rt5645_out_r_mix, ARRAY_SIZE(rt5645_out_r_mix)),
2191        /* Ouput Volume */
2192        SND_SOC_DAPM_SWITCH("SPKVOL L", RT5645_PWR_VOL, RT5645_PWR_SV_L_BIT, 0,
2193                &spk_l_vol_control),
2194        SND_SOC_DAPM_SWITCH("SPKVOL R", RT5645_PWR_VOL, RT5645_PWR_SV_R_BIT, 0,
2195                &spk_r_vol_control),
2196        SND_SOC_DAPM_MIXER("HPOVOL MIXL", RT5645_PWR_VOL, RT5645_PWR_HV_L_BIT,
2197                0, rt5645_hpvoll_mix, ARRAY_SIZE(rt5645_hpvoll_mix)),
2198        SND_SOC_DAPM_MIXER("HPOVOL MIXR", RT5645_PWR_VOL, RT5645_PWR_HV_R_BIT,
2199                0, rt5645_hpvolr_mix, ARRAY_SIZE(rt5645_hpvolr_mix)),
2200        SND_SOC_DAPM_SUPPLY("HPOVOL MIXL Power", RT5645_PWR_MIXER,
2201                RT5645_PWR_HM_L_BIT, 0, NULL, 0),
2202        SND_SOC_DAPM_SUPPLY("HPOVOL MIXR Power", RT5645_PWR_MIXER,
2203                RT5645_PWR_HM_R_BIT, 0, NULL, 0),
2204        SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM, 0, 0, NULL, 0),
2205        SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM, 0, 0, NULL, 0),
2206        SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM, 0, 0, NULL, 0),
2207        SND_SOC_DAPM_SWITCH("HPOVOL L", SND_SOC_NOPM, 0, 0, &hp_l_vol_control),
2208        SND_SOC_DAPM_SWITCH("HPOVOL R", SND_SOC_NOPM, 0, 0, &hp_r_vol_control),
2209
2210        /* HPO/LOUT/Mono Mixer */
2211        SND_SOC_DAPM_MIXER("SPOL MIX", SND_SOC_NOPM, 0, 0, rt5645_spo_l_mix,
2212                ARRAY_SIZE(rt5645_spo_l_mix)),
2213        SND_SOC_DAPM_MIXER("SPOR MIX", SND_SOC_NOPM, 0, 0, rt5645_spo_r_mix,
2214                ARRAY_SIZE(rt5645_spo_r_mix)),
2215        SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM, 0, 0, rt5645_hpo_mix,
2216                ARRAY_SIZE(rt5645_hpo_mix)),
2217        SND_SOC_DAPM_MIXER("LOUT MIX", SND_SOC_NOPM, 0, 0, rt5645_lout_mix,
2218                ARRAY_SIZE(rt5645_lout_mix)),
2219
2220        SND_SOC_DAPM_PGA_S("HP amp", 1, SND_SOC_NOPM, 0, 0, rt5645_hp_event,
2221                SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
2222        SND_SOC_DAPM_PGA_S("LOUT amp", 1, SND_SOC_NOPM, 0, 0, rt5645_lout_event,
2223                SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
2224        SND_SOC_DAPM_PGA_S("SPK amp", 2, SND_SOC_NOPM, 0, 0, rt5645_spk_event,
2225                SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
2226
2227        /* PDM */
2228        SND_SOC_DAPM_SUPPLY("PDM1 Power", RT5645_PWR_DIG2, RT5645_PWR_PDM1_BIT,
2229                0, NULL, 0),
2230        SND_SOC_DAPM_MUX("PDM1 L Mux", SND_SOC_NOPM, 0, 0, &rt5645_pdm1_l_mux),
2231        SND_SOC_DAPM_MUX("PDM1 R Mux", SND_SOC_NOPM, 0, 0, &rt5645_pdm1_r_mux),
2232
2233        SND_SOC_DAPM_SWITCH("PDM1 L", SND_SOC_NOPM, 0, 0, &pdm1_l_vol_control),
2234        SND_SOC_DAPM_SWITCH("PDM1 R", SND_SOC_NOPM, 0, 0, &pdm1_r_vol_control),
2235
2236        /* Output Lines */
2237        SND_SOC_DAPM_OUTPUT("HPOL"),
2238        SND_SOC_DAPM_OUTPUT("HPOR"),
2239        SND_SOC_DAPM_OUTPUT("LOUTL"),
2240        SND_SOC_DAPM_OUTPUT("LOUTR"),
2241        SND_SOC_DAPM_OUTPUT("PDM1L"),
2242        SND_SOC_DAPM_OUTPUT("PDM1R"),
2243        SND_SOC_DAPM_OUTPUT("SPOL"),
2244        SND_SOC_DAPM_OUTPUT("SPOR"),
2245        SND_SOC_DAPM_POST("DAPM_POST", rt5650_hp_event),
2246};
2247
2248static const struct snd_soc_dapm_widget rt5645_specific_dapm_widgets[] = {
2249        SND_SOC_DAPM_MUX("RT5645 IF1 DAC1 L Mux", SND_SOC_NOPM, 0, 0,
2250                &rt5645_if1_dac0_tdm_sel_mux),
2251        SND_SOC_DAPM_MUX("RT5645 IF1 DAC1 R Mux", SND_SOC_NOPM, 0, 0,
2252                &rt5645_if1_dac1_tdm_sel_mux),
2253        SND_SOC_DAPM_MUX("RT5645 IF1 DAC2 L Mux", SND_SOC_NOPM, 0, 0,
2254                &rt5645_if1_dac2_tdm_sel_mux),
2255        SND_SOC_DAPM_MUX("RT5645 IF1 DAC2 R Mux", SND_SOC_NOPM, 0, 0,
2256                &rt5645_if1_dac3_tdm_sel_mux),
2257        SND_SOC_DAPM_MUX("RT5645 IF1 ADC Mux", SND_SOC_NOPM,
2258                0, 0, &rt5645_if1_adc_in_mux),
2259        SND_SOC_DAPM_MUX("RT5645 IF1 ADC1 Swap Mux", SND_SOC_NOPM,
2260                0, 0, &rt5645_if1_adc1_in_mux),
2261        SND_SOC_DAPM_MUX("RT5645 IF1 ADC2 Swap Mux", SND_SOC_NOPM,
2262                0, 0, &rt5645_if1_adc2_in_mux),
2263        SND_SOC_DAPM_MUX("RT5645 IF1 ADC3 Swap Mux", SND_SOC_NOPM,
2264                0, 0, &rt5645_if1_adc3_in_mux),
2265};
2266
2267static const struct snd_soc_dapm_widget rt5650_specific_dapm_widgets[] = {
2268        SND_SOC_DAPM_MUX("A DAC1 L Mux", SND_SOC_NOPM,
2269                0, 0, &rt5650_a_dac1_l_mux),
2270        SND_SOC_DAPM_MUX("A DAC1 R Mux", SND_SOC_NOPM,
2271                0, 0, &rt5650_a_dac1_r_mux),
2272        SND_SOC_DAPM_MUX("A DAC2 L Mux", SND_SOC_NOPM,
2273                0, 0, &rt5650_a_dac2_l_mux),
2274        SND_SOC_DAPM_MUX("A DAC2 R Mux", SND_SOC_NOPM,
2275                0, 0, &rt5650_a_dac2_r_mux),
2276
2277        SND_SOC_DAPM_MUX("RT5650 IF1 ADC1 Swap Mux", SND_SOC_NOPM,
2278                0, 0, &rt5650_if1_adc1_in_mux),
2279        SND_SOC_DAPM_MUX("RT5650 IF1 ADC2 Swap Mux", SND_SOC_NOPM,
2280                0, 0, &rt5650_if1_adc2_in_mux),
2281        SND_SOC_DAPM_MUX("RT5650 IF1 ADC3 Swap Mux", SND_SOC_NOPM,
2282                0, 0, &rt5650_if1_adc3_in_mux),
2283        SND_SOC_DAPM_MUX("RT5650 IF1 ADC Mux", SND_SOC_NOPM,
2284                0, 0, &rt5650_if1_adc_in_mux),
2285
2286        SND_SOC_DAPM_MUX("RT5650 IF1 DAC1 L Mux", SND_SOC_NOPM, 0, 0,
2287                &rt5650_if1_dac0_tdm_sel_mux),
2288        SND_SOC_DAPM_MUX("RT5650 IF1 DAC1 R Mux", SND_SOC_NOPM, 0, 0,
2289                &rt5650_if1_dac1_tdm_sel_mux),
2290        SND_SOC_DAPM_MUX("RT5650 IF1 DAC2 L Mux", SND_SOC_NOPM, 0, 0,
2291                &rt5650_if1_dac2_tdm_sel_mux),
2292        SND_SOC_DAPM_MUX("RT5650 IF1 DAC2 R Mux", SND_SOC_NOPM, 0, 0,
2293                &rt5650_if1_dac3_tdm_sel_mux),
2294};
2295
2296static const struct snd_soc_dapm_route rt5645_dapm_routes[] = {
2297        { "adc stereo1 filter", NULL, "ADC STO1 ASRC", is_using_asrc },
2298        { "adc mono left filter", NULL, "ADC MONO L ASRC", is_using_asrc },
2299        { "adc mono right filter", NULL, "ADC MONO R ASRC", is_using_asrc },
2300        { "dac mono left filter", NULL, "DAC MONO L ASRC", is_using_asrc },
2301        { "dac mono right filter", NULL, "DAC MONO R ASRC", is_using_asrc },
2302        { "dac stereo1 filter", NULL, "DAC STO ASRC", is_using_asrc },
2303
2304        { "I2S1", NULL, "I2S1 ASRC" },
2305        { "I2S2", NULL, "I2S2 ASRC" },
2306
2307        { "IN1P", NULL, "LDO2" },
2308        { "IN2P", NULL, "LDO2" },
2309
2310        { "DMIC1", NULL, "DMIC L1" },
2311        { "DMIC1", NULL, "DMIC R1" },
2312        { "DMIC2", NULL, "DMIC L2" },
2313        { "DMIC2", NULL, "DMIC R2" },
2314
2315        { "BST1", NULL, "IN1P" },
2316        { "BST1", NULL, "IN1N" },
2317        { "BST1", NULL, "JD Power" },
2318        { "BST1", NULL, "Mic Det Power" },
2319        { "BST2", NULL, "IN2P" },
2320        { "BST2", NULL, "IN2N" },
2321
2322        { "INL VOL", NULL, "IN2P" },
2323        { "INR VOL", NULL, "IN2N" },
2324
2325        { "RECMIXL", "HPOL Switch", "HPOL" },
2326        { "RECMIXL", "INL Switch", "INL VOL" },
2327        { "RECMIXL", "BST2 Switch", "BST2" },
2328        { "RECMIXL", "BST1 Switch", "BST1" },
2329        { "RECMIXL", "OUT MIXL Switch", "OUT MIXL" },
2330
2331        { "RECMIXR", "HPOR Switch", "HPOR" },
2332        { "RECMIXR", "INR Switch", "INR VOL" },
2333        { "RECMIXR", "BST2 Switch", "BST2" },
2334        { "RECMIXR", "BST1 Switch", "BST1" },
2335        { "RECMIXR", "OUT MIXR Switch", "OUT MIXR" },
2336
2337        { "ADC L", NULL, "RECMIXL" },
2338        { "ADC L", NULL, "ADC L power" },
2339        { "ADC R", NULL, "RECMIXR" },
2340        { "ADC R", NULL, "ADC R power" },
2341
2342        {"DMIC L1", NULL, "DMIC CLK"},
2343        {"DMIC L1", NULL, "DMIC1 Power"},
2344        {"DMIC R1", NULL, "DMIC CLK"},
2345        {"DMIC R1", NULL, "DMIC1 Power"},
2346        {"DMIC L2", NULL, "DMIC CLK"},
2347        {"DMIC L2", NULL, "DMIC2 Power"},
2348        {"DMIC R2", NULL, "DMIC CLK"},
2349        {"DMIC R2", NULL, "DMIC2 Power"},
2350
2351        { "Stereo1 DMIC Mux", "DMIC1", "DMIC1" },
2352        { "Stereo1 DMIC Mux", "DMIC2", "DMIC2" },
2353        { "Stereo1 DMIC Mux", NULL, "DMIC STO1 ASRC" },
2354
2355        { "Mono DMIC L Mux", "DMIC1", "DMIC L1" },
2356        { "Mono DMIC L Mux", "DMIC2", "DMIC L2" },
2357        { "Mono DMIC L Mux", NULL, "DMIC MONO L ASRC" },
2358
2359        { "Mono DMIC R Mux", "DMIC1", "DMIC R1" },
2360        { "Mono DMIC R Mux", "DMIC2", "DMIC R2" },
2361        { "Mono DMIC R Mux", NULL, "DMIC MONO R ASRC" },
2362
2363        { "Stereo1 ADC L2 Mux", "DMIC", "Stereo1 DMIC Mux" },
2364        { "Stereo1 ADC L2 Mux", "DAC MIX", "DAC MIXL" },
2365        { "Stereo1 ADC L1 Mux", "ADC", "ADC L" },
2366        { "Stereo1 ADC L1 Mux", "DAC MIX", "DAC MIXL" },
2367
2368        { "Stereo1 ADC R1 Mux", "ADC", "ADC R" },
2369        { "Stereo1 ADC R1 Mux", "DAC MIX", "DAC MIXR" },
2370        { "Stereo1 ADC R2 Mux", "DMIC", "Stereo1 DMIC Mux" },
2371        { "Stereo1 ADC R2 Mux", "DAC MIX", "DAC MIXR" },
2372
2373        { "Mono ADC L2 Mux", "DMIC", "Mono DMIC L Mux" },
2374        { "Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
2375        { "Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
2376        { "Mono ADC L1 Mux", "ADC", "ADC L" },
2377
2378        { "Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
2379        { "Mono ADC R1 Mux", "ADC", "ADC R" },
2380        { "Mono ADC R2 Mux", "DMIC", "Mono DMIC R Mux" },
2381        { "Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
2382
2383        { "Sto1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux" },
2384        { "Sto1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux" },
2385        { "Sto1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux" },
2386        { "Sto1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux" },
2387
2388        { "Stereo1 ADC MIXL", NULL, "Sto1 ADC MIXL" },
2389        { "Stereo1 ADC MIXL", NULL, "adc stereo1 filter" },
2390        { "adc stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll },
2391
2392        { "Stereo1 ADC MIXR", NULL, "Sto1 ADC MIXR" },
2393        { "Stereo1 ADC MIXR", NULL, "adc stereo1 filter" },
2394        { "adc stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll },
2395
2396        { "Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux" },
2397        { "Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux" },
2398        { "Mono ADC MIXL", NULL, "adc mono left filter" },
2399        { "adc mono left filter", NULL, "PLL1", is_sys_clk_from_pll },
2400
2401        { "Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux" },
2402        { "Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux" },
2403        { "Mono ADC MIXR", NULL, "adc mono right filter" },
2404        { "adc mono right filter", NULL, "PLL1", is_sys_clk_from_pll },
2405
2406        { "VAD ADC Mux", "Sto1 ADC L", "Stereo1 ADC MIXL" },
2407        { "VAD ADC Mux", "Mono ADC L", "Mono ADC MIXL" },
2408        { "VAD ADC Mux", "Mono ADC R", "Mono ADC MIXR" },
2409
2410        { "IF_ADC1", NULL, "Stereo1 ADC MIXL" },
2411        { "IF_ADC1", NULL, "Stereo1 ADC MIXR" },
2412        { "IF_ADC2", NULL, "Mono ADC MIXL" },
2413        { "IF_ADC2", NULL, "Mono ADC MIXR" },
2414        { "VAD_ADC", NULL, "VAD ADC Mux" },
2415
2416        { "IF2 ADC Mux", "IF_ADC1", "IF_ADC1" },
2417        { "IF2 ADC Mux", "IF_ADC2", "IF_ADC2" },
2418        { "IF2 ADC Mux", "VAD_ADC", "VAD_ADC" },
2419
2420        { "IF1 ADC", NULL, "I2S1" },
2421        { "IF2 ADC", NULL, "I2S2" },
2422        { "IF2 ADC", NULL, "IF2 ADC Mux" },
2423
2424        { "AIF2TX", NULL, "IF2 ADC" },
2425
2426        { "IF1 DAC0", NULL, "AIF1RX" },
2427        { "IF1 DAC1", NULL, "AIF1RX" },
2428        { "IF1 DAC2", NULL, "AIF1RX" },
2429        { "IF1 DAC3", NULL, "AIF1RX" },
2430        { "IF2 DAC", NULL, "AIF2RX" },
2431
2432        { "IF1 DAC0", NULL, "I2S1" },
2433        { "IF1 DAC1", NULL, "I2S1" },
2434        { "IF1 DAC2", NULL, "I2S1" },
2435        { "IF1 DAC3", NULL, "I2S1" },
2436        { "IF2 DAC", NULL, "I2S2" },
2437
2438        { "IF2 DAC L", NULL, "IF2 DAC" },
2439        { "IF2 DAC R", NULL, "IF2 DAC" },
2440
2441        { "DAC1 L Mux", "IF2 DAC", "IF2 DAC L" },
2442        { "DAC1 R Mux", "IF2 DAC", "IF2 DAC R" },
2443
2444        { "DAC1 MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL" },
2445        { "DAC1 MIXL", "DAC1 Switch", "DAC1 L Mux" },
2446        { "DAC1 MIXL", NULL, "dac stereo1 filter" },
2447        { "DAC1 MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR" },
2448        { "DAC1 MIXR", "DAC1 Switch", "DAC1 R Mux" },
2449        { "DAC1 MIXR", NULL, "dac stereo1 filter" },
2450
2451        { "DAC L2 Mux", "IF2 DAC", "IF2 DAC L" },
2452        { "DAC L2 Mux", "Mono ADC", "Mono ADC MIXL" },
2453        { "DAC L2 Mux", "VAD_ADC", "VAD_ADC" },
2454        { "DAC L2 Volume", NULL, "DAC L2 Mux" },
2455        { "DAC L2 Volume", NULL, "dac mono left filter" },
2456
2457        { "DAC R2 Mux", "IF2 DAC", "IF2 DAC R" },
2458        { "DAC R2 Mux", "Mono ADC", "Mono ADC MIXR" },
2459        { "DAC R2 Mux", "Haptic", "Haptic Generator" },
2460        { "DAC R2 Volume", NULL, "DAC R2 Mux" },
2461        { "DAC R2 Volume", NULL, "dac mono right filter" },
2462
2463        { "Stereo DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
2464        { "Stereo DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" },
2465        { "Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2466        { "Stereo DAC MIXL", NULL, "dac stereo1 filter" },
2467        { "Stereo DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
2468        { "Stereo DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" },
2469        { "Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2470        { "Stereo DAC MIXR", NULL, "dac stereo1 filter" },
2471
2472        { "Mono DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
2473        { "Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2474        { "Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
2475        { "Mono DAC MIXL", NULL, "dac mono left filter" },
2476        { "Mono DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
2477        { "Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2478        { "Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
2479        { "Mono DAC MIXR", NULL, "dac mono right filter" },
2480
2481        { "DAC MIXL", "Sto DAC Mix L Switch", "Stereo DAC MIXL" },
2482        { "DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2483        { "DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
2484        { "DAC MIXR", "Sto DAC Mix R Switch", "Stereo DAC MIXR" },
2485        { "DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2486        { "DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
2487
2488        { "DAC L1", NULL, "PLL1", is_sys_clk_from_pll },
2489        { "DAC R1", NULL, "PLL1", is_sys_clk_from_pll },
2490        { "DAC L2", NULL, "PLL1", is_sys_clk_from_pll },
2491        { "DAC R2", NULL, "PLL1", is_sys_clk_from_pll },
2492
2493        { "SPK MIXL", "BST1 Switch", "BST1" },
2494        { "SPK MIXL", "INL Switch", "INL VOL" },
2495        { "SPK MIXL", "DAC L1 Switch", "DAC L1" },
2496        { "SPK MIXL", "DAC L2 Switch", "DAC L2" },
2497        { "SPK MIXR", "BST2 Switch", "BST2" },
2498        { "SPK MIXR", "INR Switch", "INR VOL" },
2499        { "SPK MIXR", "DAC R1 Switch", "DAC R1" },
2500        { "SPK MIXR", "DAC R2 Switch", "DAC R2" },
2501
2502        { "OUT MIXL", "BST1 Switch", "BST1" },
2503        { "OUT MIXL", "INL Switch", "INL VOL" },
2504        { "OUT MIXL", "DAC L2 Switch", "DAC L2" },
2505        { "OUT MIXL", "DAC L1 Switch", "DAC L1" },
2506
2507        { "OUT MIXR", "BST2 Switch", "BST2" },
2508        { "OUT MIXR", "INR Switch", "INR VOL" },
2509        { "OUT MIXR", "DAC R2 Switch", "DAC R2" },
2510        { "OUT MIXR", "DAC R1 Switch", "DAC R1" },
2511
2512        { "HPOVOL MIXL", "DAC1 Switch", "DAC L1" },
2513        { "HPOVOL MIXL", "DAC2 Switch", "DAC L2" },
2514        { "HPOVOL MIXL", "INL Switch", "INL VOL" },
2515        { "HPOVOL MIXL", "BST1 Switch", "BST1" },
2516        { "HPOVOL MIXL", NULL, "HPOVOL MIXL Power" },
2517        { "HPOVOL MIXR", "DAC1 Switch", "DAC R1" },
2518        { "HPOVOL MIXR", "DAC2 Switch", "DAC R2" },
2519        { "HPOVOL MIXR", "INR Switch", "INR VOL" },
2520        { "HPOVOL MIXR", "BST2 Switch", "BST2" },
2521        { "HPOVOL MIXR", NULL, "HPOVOL MIXR Power" },
2522
2523        { "DAC 2", NULL, "DAC L2" },
2524        { "DAC 2", NULL, "DAC R2" },
2525        { "DAC 1", NULL, "DAC L1" },
2526        { "DAC 1", NULL, "DAC R1" },
2527        { "HPOVOL L", "Switch", "HPOVOL MIXL" },
2528        { "HPOVOL R", "Switch", "HPOVOL MIXR" },
2529        { "HPOVOL", NULL, "HPOVOL L" },
2530        { "HPOVOL", NULL, "HPOVOL R" },
2531        { "HPO MIX", "DAC1 Switch", "DAC 1" },
2532        { "HPO MIX", "HPVOL Switch", "HPOVOL" },
2533
2534        { "SPKVOL L", "Switch", "SPK MIXL" },
2535        { "SPKVOL R", "Switch", "SPK MIXR" },
2536
2537        { "SPOL MIX", "DAC L1 Switch", "DAC L1" },
2538        { "SPOL MIX", "SPKVOL L Switch", "SPKVOL L" },
2539        { "SPOR MIX", "DAC R1 Switch", "DAC R1" },
2540        { "SPOR MIX", "SPKVOL R Switch", "SPKVOL R" },
2541
2542        { "LOUT MIX", "DAC L1 Switch", "DAC L1" },
2543        { "LOUT MIX", "DAC R1 Switch", "DAC R1" },
2544        { "LOUT MIX", "OUTMIX L Switch", "OUT MIXL" },
2545        { "LOUT MIX", "OUTMIX R Switch", "OUT MIXR" },
2546
2547        { "PDM1 L Mux", "Stereo DAC", "Stereo DAC MIXL" },
2548        { "PDM1 L Mux", "Mono DAC", "Mono DAC MIXL" },
2549        { "PDM1 L Mux", NULL, "PDM1 Power" },
2550        { "PDM1 R Mux", "Stereo DAC", "Stereo DAC MIXR" },
2551        { "PDM1 R Mux", "Mono DAC", "Mono DAC MIXR" },
2552        { "PDM1 R Mux", NULL, "PDM1 Power" },
2553
2554        { "HP amp", NULL, "HPO MIX" },
2555        { "HP amp", NULL, "JD Power" },
2556        { "HP amp", NULL, "Mic Det Power" },
2557        { "HP amp", NULL, "LDO2" },
2558        { "HPOL", NULL, "HP amp" },
2559        { "HPOR", NULL, "HP amp" },
2560
2561        { "LOUT amp", NULL, "LOUT MIX" },
2562        { "LOUTL", NULL, "LOUT amp" },
2563        { "LOUTR", NULL, "LOUT amp" },
2564
2565        { "PDM1 L", "Switch", "PDM1 L Mux" },
2566        { "PDM1 R", "Switch", "PDM1 R Mux" },
2567
2568        { "PDM1L", NULL, "PDM1 L" },
2569        { "PDM1R", NULL, "PDM1 R" },
2570
2571        { "SPK amp", NULL, "SPOL MIX" },
2572        { "SPK amp", NULL, "SPOR MIX" },
2573        { "SPOL", NULL, "SPK amp" },
2574        { "SPOR", NULL, "SPK amp" },
2575};
2576
2577static const struct snd_soc_dapm_route rt5650_specific_dapm_routes[] = {
2578        { "A DAC1 L Mux", "DAC1",  "DAC1 MIXL"},
2579        { "A DAC1 L Mux", "Stereo DAC Mixer", "Stereo DAC MIXL"},
2580        { "A DAC1 R Mux", "DAC1",  "DAC1 MIXR"},
2581        { "A DAC1 R Mux", "Stereo DAC Mixer", "Stereo DAC MIXR"},
2582
2583        { "A DAC2 L Mux", "Stereo DAC Mixer", "Stereo DAC MIXL"},
2584        { "A DAC2 L Mux", "Mono DAC Mixer", "Mono DAC MIXL"},
2585        { "A DAC2 R Mux", "Stereo DAC Mixer", "Stereo DAC MIXR"},
2586        { "A DAC2 R Mux", "Mono DAC Mixer", "Mono DAC MIXR"},
2587
2588        { "DAC L1", NULL, "A DAC1 L Mux" },
2589        { "DAC R1", NULL, "A DAC1 R Mux" },
2590        { "DAC L2", NULL, "A DAC2 L Mux" },
2591        { "DAC R2", NULL, "A DAC2 R Mux" },
2592
2593        { "RT5650 IF1 ADC1 Swap Mux", "L/R", "IF_ADC1" },
2594        { "RT5650 IF1 ADC1 Swap Mux", "R/L", "IF_ADC1" },
2595        { "RT5650 IF1 ADC1 Swap Mux", "L/L", "IF_ADC1" },
2596        { "RT5650 IF1 ADC1 Swap Mux", "R/R", "IF_ADC1" },
2597
2598        { "RT5650 IF1 ADC2 Swap Mux", "L/R", "IF_ADC2" },
2599        { "RT5650 IF1 ADC2 Swap Mux", "R/L", "IF_ADC2" },
2600        { "RT5650 IF1 ADC2 Swap Mux", "L/L", "IF_ADC2" },
2601        { "RT5650 IF1 ADC2 Swap Mux", "R/R", "IF_ADC2" },
2602
2603        { "RT5650 IF1 ADC3 Swap Mux", "L/R", "VAD_ADC" },
2604        { "RT5650 IF1 ADC3 Swap Mux", "R/L", "VAD_ADC" },
2605        { "RT5650 IF1 ADC3 Swap Mux", "L/L", "VAD_ADC" },
2606        { "RT5650 IF1 ADC3 Swap Mux", "R/R", "VAD_ADC" },
2607
2608        { "IF1 ADC", NULL, "RT5650 IF1 ADC1 Swap Mux" },
2609        { "IF1 ADC", NULL, "RT5650 IF1 ADC2 Swap Mux" },
2610        { "IF1 ADC", NULL, "RT5650 IF1 ADC3 Swap Mux" },
2611
2612        { "RT5650 IF1 ADC Mux", "IF_ADC1/IF_ADC2/DAC_REF/Null", "IF1 ADC" },
2613        { "RT5650 IF1 ADC Mux", "IF_ADC1/IF_ADC2/Null/DAC_REF", "IF1 ADC" },
2614        { "RT5650 IF1 ADC Mux", "IF_ADC1/DAC_REF/IF_ADC2/Null", "IF1 ADC" },
2615        { "RT5650 IF1 ADC Mux", "IF_ADC1/DAC_REF/Null/IF_ADC2", "IF1 ADC" },
2616        { "RT5650 IF1 ADC Mux", "IF_ADC1/Null/DAC_REF/IF_ADC2", "IF1 ADC" },
2617        { "RT5650 IF1 ADC Mux", "IF_ADC1/Null/IF_ADC2/DAC_REF", "IF1 ADC" },
2618
2619        { "RT5650 IF1 ADC Mux", "IF_ADC2/IF_ADC1/DAC_REF/Null", "IF1 ADC" },
2620        { "RT5650 IF1 ADC Mux", "IF_ADC2/IF_ADC1/Null/DAC_REF", "IF1 ADC" },
2621        { "RT5650 IF1 ADC Mux", "IF_ADC2/DAC_REF/IF_ADC1/Null", "IF1 ADC" },
2622        { "RT5650 IF1 ADC Mux", "IF_ADC2/DAC_REF/Null/IF_ADC1", "IF1 ADC" },
2623        { "RT5650 IF1 ADC Mux", "IF_ADC2/Null/DAC_REF/IF_ADC1", "IF1 ADC" },
2624        { "RT5650 IF1 ADC Mux", "IF_ADC2/Null/IF_ADC1/DAC_REF", "IF1 ADC" },
2625
2626        { "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC1/IF_ADC2/Null", "IF1 ADC" },
2627        { "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC1/Null/IF_ADC2", "IF1 ADC" },
2628        { "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC2/IF_ADC1/Null", "IF1 ADC" },
2629        { "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC2/Null/IF_ADC1", "IF1 ADC" },
2630        { "RT5650 IF1 ADC Mux", "DAC_REF/Null/IF_ADC1/IF_ADC2", "IF1 ADC" },
2631        { "RT5650 IF1 ADC Mux", "DAC_REF/Null/IF_ADC2/IF_ADC1", "IF1 ADC" },
2632
2633        { "RT5650 IF1 ADC Mux", "Null/IF_ADC1/IF_ADC2/DAC_REF", "IF1 ADC" },
2634        { "RT5650 IF1 ADC Mux", "Null/IF_ADC1/DAC_REF/IF_ADC2", "IF1 ADC" },
2635        { "RT5650 IF1 ADC Mux", "Null/IF_ADC2/IF_ADC1/DAC_REF", "IF1 ADC" },
2636        { "RT5650 IF1 ADC Mux", "Null/IF_ADC2/DAC_REF/IF_ADC1", "IF1 ADC" },
2637        { "RT5650 IF1 ADC Mux", "Null/DAC_REF/IF_ADC1/IF_ADC2", "IF1 ADC" },
2638        { "RT5650 IF1 ADC Mux", "Null/DAC_REF/IF_ADC2/IF_ADC1", "IF1 ADC" },
2639        { "AIF1TX", NULL, "RT5650 IF1 ADC Mux" },
2640
2641        { "RT5650 IF1 DAC1 L Mux", "Slot0", "IF1 DAC0" },
2642        { "RT5650 IF1 DAC1 L Mux", "Slot1", "IF1 DAC1" },
2643        { "RT5650 IF1 DAC1 L Mux", "Slot2", "IF1 DAC2" },
2644        { "RT5650 IF1 DAC1 L Mux", "Slot3", "IF1 DAC3" },
2645
2646        { "RT5650 IF1 DAC1 R Mux", "Slot0", "IF1 DAC0" },
2647        { "RT5650 IF1 DAC1 R Mux", "Slot1", "IF1 DAC1" },
2648        { "RT5650 IF1 DAC1 R Mux", "Slot2", "IF1 DAC2" },
2649        { "RT5650 IF1 DAC1 R Mux", "Slot3", "IF1 DAC3" },
2650
2651        { "RT5650 IF1 DAC2 L Mux", "Slot0", "IF1 DAC0" },
2652        { "RT5650 IF1 DAC2 L Mux", "Slot1", "IF1 DAC1" },
2653        { "RT5650 IF1 DAC2 L Mux", "Slot2", "IF1 DAC2" },
2654        { "RT5650 IF1 DAC2 L Mux", "Slot3", "IF1 DAC3" },
2655
2656        { "RT5650 IF1 DAC2 R Mux", "Slot0", "IF1 DAC0" },
2657        { "RT5650 IF1 DAC2 R Mux", "Slot1", "IF1 DAC1" },
2658        { "RT5650 IF1 DAC2 R Mux", "Slot2", "IF1 DAC2" },
2659        { "RT5650 IF1 DAC2 R Mux", "Slot3", "IF1 DAC3" },
2660
2661        { "DAC1 L Mux", "IF1 DAC", "RT5650 IF1 DAC1 L Mux" },
2662        { "DAC1 R Mux", "IF1 DAC", "RT5650 IF1 DAC1 R Mux" },
2663
2664        { "DAC L2 Mux", "IF1 DAC", "RT5650 IF1 DAC2 L Mux" },
2665        { "DAC R2 Mux", "IF1 DAC", "RT5650 IF1 DAC2 R Mux" },
2666};
2667
2668static const struct snd_soc_dapm_route rt5645_specific_dapm_routes[] = {
2669        { "DAC L1", NULL, "Stereo DAC MIXL" },
2670        { "DAC R1", NULL, "Stereo DAC MIXR" },
2671        { "DAC L2", NULL, "Mono DAC MIXL" },
2672        { "DAC R2", NULL, "Mono DAC MIXR" },
2673
2674        { "RT5645 IF1 ADC1 Swap Mux", "L/R", "IF_ADC1" },
2675        { "RT5645 IF1 ADC1 Swap Mux", "R/L", "IF_ADC1" },
2676        { "RT5645 IF1 ADC1 Swap Mux", "L/L", "IF_ADC1" },
2677        { "RT5645 IF1 ADC1 Swap Mux", "R/R", "IF_ADC1" },
2678
2679        { "RT5645 IF1 ADC2 Swap Mux", "L/R", "IF_ADC2" },
2680        { "RT5645 IF1 ADC2 Swap Mux", "R/L", "IF_ADC2" },
2681        { "RT5645 IF1 ADC2 Swap Mux", "L/L", "IF_ADC2" },
2682        { "RT5645 IF1 ADC2 Swap Mux", "R/R", "IF_ADC2" },
2683
2684        { "RT5645 IF1 ADC3 Swap Mux", "L/R", "VAD_ADC" },
2685        { "RT5645 IF1 ADC3 Swap Mux", "R/L", "VAD_ADC" },
2686        { "RT5645 IF1 ADC3 Swap Mux", "L/L", "VAD_ADC" },
2687        { "RT5645 IF1 ADC3 Swap Mux", "R/R", "VAD_ADC" },
2688
2689        { "IF1 ADC", NULL, "RT5645 IF1 ADC1 Swap Mux" },
2690        { "IF1 ADC", NULL, "RT5645 IF1 ADC2 Swap Mux" },
2691        { "IF1 ADC", NULL, "RT5645 IF1 ADC3 Swap Mux" },
2692
2693        { "RT5645 IF1 ADC Mux", "IF_ADC1/IF_ADC2/VAD_ADC", "IF1 ADC" },
2694        { "RT5645 IF1 ADC Mux", "IF_ADC2/IF_ADC1/VAD_ADC", "IF1 ADC" },
2695        { "RT5645 IF1 ADC Mux", "VAD_ADC/IF_ADC1/IF_ADC2", "IF1 ADC" },
2696        { "RT5645 IF1 ADC Mux", "VAD_ADC/IF_ADC2/IF_ADC1", "IF1 ADC" },
2697        { "AIF1TX", NULL, "RT5645 IF1 ADC Mux" },
2698
2699        { "RT5645 IF1 DAC1 L Mux", "Slot0", "IF1 DAC0" },
2700        { "RT5645 IF1 DAC1 L Mux", "Slot1", "IF1 DAC1" },
2701        { "RT5645 IF1 DAC1 L Mux", "Slot2", "IF1 DAC2" },
2702        { "RT5645 IF1 DAC1 L Mux", "Slot3", "IF1 DAC3" },
2703
2704        { "RT5645 IF1 DAC1 R Mux", "Slot0", "IF1 DAC0" },
2705        { "RT5645 IF1 DAC1 R Mux", "Slot1", "IF1 DAC1" },
2706        { "RT5645 IF1 DAC1 R Mux", "Slot2", "IF1 DAC2" },
2707        { "RT5645 IF1 DAC1 R Mux", "Slot3", "IF1 DAC3" },
2708
2709        { "RT5645 IF1 DAC2 L Mux", "Slot0", "IF1 DAC0" },
2710        { "RT5645 IF1 DAC2 L Mux", "Slot1", "IF1 DAC1" },
2711        { "RT5645 IF1 DAC2 L Mux", "Slot2", "IF1 DAC2" },
2712        { "RT5645 IF1 DAC2 L Mux", "Slot3", "IF1 DAC3" },
2713
2714        { "RT5645 IF1 DAC2 R Mux", "Slot0", "IF1 DAC0" },
2715        { "RT5645 IF1 DAC2 R Mux", "Slot1", "IF1 DAC1" },
2716        { "RT5645 IF1 DAC2 R Mux", "Slot2", "IF1 DAC2" },
2717        { "RT5645 IF1 DAC2 R Mux", "Slot3", "IF1 DAC3" },
2718
2719        { "DAC1 L Mux", "IF1 DAC", "RT5645 IF1 DAC1 L Mux" },
2720        { "DAC1 R Mux", "IF1 DAC", "RT5645 IF1 DAC1 R Mux" },
2721
2722        { "DAC L2 Mux", "IF1 DAC", "RT5645 IF1 DAC2 L Mux" },
2723        { "DAC R2 Mux", "IF1 DAC", "RT5645 IF1 DAC2 R Mux" },
2724};
2725
2726static const struct snd_soc_dapm_route rt5645_old_dapm_routes[] = {
2727        { "SPOL MIX", "DAC R1 Switch", "DAC R1" },
2728        { "SPOL MIX", "SPKVOL R Switch", "SPKVOL R" },
2729};
2730
2731static int rt5645_hw_params(struct snd_pcm_substream *substream,
2732        struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
2733{
2734        struct snd_soc_component *component = dai->component;
2735        struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
2736        unsigned int val_len = 0, val_clk, mask_clk, dl_sft;
2737        int pre_div, bclk_ms, frame_size;
2738
2739        rt5645->lrck[dai->id] = params_rate(params);
2740        pre_div = rl6231_get_clk_info(rt5645->sysclk, rt5645->lrck[dai->id]);
2741        if (pre_div < 0) {
2742                dev_err(component->dev, "Unsupported clock setting\n");
2743                return -EINVAL;
2744        }
2745        frame_size = snd_soc_params_to_frame_size(params);
2746        if (frame_size < 0) {
2747                dev_err(component->dev, "Unsupported frame size: %d\n", frame_size);
2748                return -EINVAL;
2749        }
2750
2751        switch (rt5645->codec_type) {
2752        case CODEC_TYPE_RT5650:
2753                dl_sft = 4;
2754                break;
2755        default:
2756                dl_sft = 2;
2757                break;
2758        }
2759
2760        bclk_ms = frame_size > 32;
2761        rt5645->bclk[dai->id] = rt5645->lrck[dai->id] * (32 << bclk_ms);
2762
2763        dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
2764                rt5645->bclk[dai->id], rt5645->lrck[dai->id]);
2765        dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
2766                                bclk_ms, pre_div, dai->id);
2767
2768        switch (params_width(params)) {
2769        case 16:
2770                break;
2771        case 20:
2772                val_len = 0x1;
2773                break;
2774        case 24:
2775                val_len = 0x2;
2776                break;
2777        case 8:
2778                val_len = 0x3;
2779                break;
2780        default:
2781                return -EINVAL;
2782        }
2783
2784        switch (dai->id) {
2785        case RT5645_AIF1:
2786                mask_clk = RT5645_I2S_PD1_MASK;
2787                val_clk = pre_div << RT5645_I2S_PD1_SFT;
2788                snd_soc_component_update_bits(component, RT5645_I2S1_SDP,
2789                        (0x3 << dl_sft), (val_len << dl_sft));
2790                snd_soc_component_update_bits(component, RT5645_ADDA_CLK1, mask_clk, val_clk);
2791                break;
2792        case  RT5645_AIF2:
2793                mask_clk = RT5645_I2S_BCLK_MS2_MASK | RT5645_I2S_PD2_MASK;
2794                val_clk = bclk_ms << RT5645_I2S_BCLK_MS2_SFT |
2795                        pre_div << RT5645_I2S_PD2_SFT;
2796                snd_soc_component_update_bits(component, RT5645_I2S2_SDP,
2797                        (0x3 << dl_sft), (val_len << dl_sft));
2798                snd_soc_component_update_bits(component, RT5645_ADDA_CLK1, mask_clk, val_clk);
2799                break;
2800        default:
2801                dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
2802                return -EINVAL;
2803        }
2804
2805        return 0;
2806}
2807
2808static int rt5645_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
2809{
2810        struct snd_soc_component *component = dai->component;
2811        struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
2812        unsigned int reg_val = 0, pol_sft;
2813
2814        switch (rt5645->codec_type) {
2815        case CODEC_TYPE_RT5650:
2816                pol_sft = 8;
2817                break;
2818        default:
2819                pol_sft = 7;
2820                break;
2821        }
2822
2823        switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
2824        case SND_SOC_DAIFMT_CBM_CFM:
2825                rt5645->master[dai->id] = 1;
2826                break;
2827        case SND_SOC_DAIFMT_CBS_CFS:
2828                reg_val |= RT5645_I2S_MS_S;
2829                rt5645->master[dai->id] = 0;
2830                break;
2831        default:
2832                return -EINVAL;
2833        }
2834
2835        switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
2836        case SND_SOC_DAIFMT_NB_NF:
2837                break;
2838        case SND_SOC_DAIFMT_IB_NF:
2839                reg_val |= (1 << pol_sft);
2840                break;
2841        default:
2842                return -EINVAL;
2843        }
2844
2845        switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
2846        case SND_SOC_DAIFMT_I2S:
2847                break;
2848        case SND_SOC_DAIFMT_LEFT_J:
2849                reg_val |= RT5645_I2S_DF_LEFT;
2850                break;
2851        case SND_SOC_DAIFMT_DSP_A:
2852                reg_val |= RT5645_I2S_DF_PCM_A;
2853                break;
2854        case SND_SOC_DAIFMT_DSP_B:
2855                reg_val |= RT5645_I2S_DF_PCM_B;
2856                break;
2857        default:
2858                return -EINVAL;
2859        }
2860        switch (dai->id) {
2861        case RT5645_AIF1:
2862                snd_soc_component_update_bits(component, RT5645_I2S1_SDP,
2863                        RT5645_I2S_MS_MASK | (1 << pol_sft) |
2864                        RT5645_I2S_DF_MASK, reg_val);
2865                break;
2866        case RT5645_AIF2:
2867                snd_soc_component_update_bits(component, RT5645_I2S2_SDP,
2868                        RT5645_I2S_MS_MASK | (1 << pol_sft) |
2869                        RT5645_I2S_DF_MASK, reg_val);
2870                break;
2871        default:
2872                dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
2873                return -EINVAL;
2874        }
2875        return 0;
2876}
2877
2878static int rt5645_set_dai_sysclk(struct snd_soc_dai *dai,
2879                int clk_id, unsigned int freq, int dir)
2880{
2881        struct snd_soc_component *component = dai->component;
2882        struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
2883        unsigned int reg_val = 0;
2884
2885        if (freq == rt5645->sysclk && clk_id == rt5645->sysclk_src)
2886                return 0;
2887
2888        switch (clk_id) {
2889        case RT5645_SCLK_S_MCLK:
2890                reg_val |= RT5645_SCLK_SRC_MCLK;
2891                break;
2892        case RT5645_SCLK_S_PLL1:
2893                reg_val |= RT5645_SCLK_SRC_PLL1;
2894                break;
2895        case RT5645_SCLK_S_RCCLK:
2896                reg_val |= RT5645_SCLK_SRC_RCCLK;
2897                break;
2898        default:
2899                dev_err(component->dev, "Invalid clock id (%d)\n", clk_id);
2900                return -EINVAL;
2901        }
2902        snd_soc_component_update_bits(component, RT5645_GLB_CLK,
2903                RT5645_SCLK_SRC_MASK, reg_val);
2904        rt5645->sysclk = freq;
2905        rt5645->sysclk_src = clk_id;
2906
2907        dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
2908
2909        return 0;
2910}
2911
2912static int rt5645_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
2913                        unsigned int freq_in, unsigned int freq_out)
2914{
2915        struct snd_soc_component *component = dai->component;
2916        struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
2917        struct rl6231_pll_code pll_code;
2918        int ret;
2919
2920        if (source == rt5645->pll_src && freq_in == rt5645->pll_in &&
2921            freq_out == rt5645->pll_out)
2922                return 0;
2923
2924        if (!freq_in || !freq_out) {
2925                dev_dbg(component->dev, "PLL disabled\n");
2926
2927                rt5645->pll_in = 0;
2928                rt5645->pll_out = 0;
2929                snd_soc_component_update_bits(component, RT5645_GLB_CLK,
2930                        RT5645_SCLK_SRC_MASK, RT5645_SCLK_SRC_MCLK);
2931                return 0;
2932        }
2933
2934        switch (source) {
2935        case RT5645_PLL1_S_MCLK:
2936                snd_soc_component_update_bits(component, RT5645_GLB_CLK,
2937                        RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_MCLK);
2938                break;
2939        case RT5645_PLL1_S_BCLK1:
2940        case RT5645_PLL1_S_BCLK2:
2941                switch (dai->id) {
2942                case RT5645_AIF1:
2943                        snd_soc_component_update_bits(component, RT5645_GLB_CLK,
2944                                RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_BCLK1);
2945                        break;
2946                case  RT5645_AIF2:
2947                        snd_soc_component_update_bits(component, RT5645_GLB_CLK,
2948                                RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_BCLK2);
2949                        break;
2950                default:
2951                        dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
2952                        return -EINVAL;
2953                }
2954                break;
2955        default:
2956                dev_err(component->dev, "Unknown PLL source %d\n", source);
2957                return -EINVAL;
2958        }
2959
2960        ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
2961        if (ret < 0) {
2962                dev_err(component->dev, "Unsupport input clock %d\n", freq_in);
2963                return ret;
2964        }
2965
2966        dev_dbg(component->dev, "bypass=%d m=%d n=%d k=%d\n",
2967                pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
2968                pll_code.n_code, pll_code.k_code);
2969
2970        snd_soc_component_write(component, RT5645_PLL_CTRL1,
2971                pll_code.n_code << RT5645_PLL_N_SFT | pll_code.k_code);
2972        snd_soc_component_write(component, RT5645_PLL_CTRL2,
2973                (pll_code.m_bp ? 0 : pll_code.m_code) << RT5645_PLL_M_SFT |
2974                pll_code.m_bp << RT5645_PLL_M_BP_SFT);
2975
2976        rt5645->pll_in = freq_in;
2977        rt5645->pll_out = freq_out;
2978        rt5645->pll_src = source;
2979
2980        return 0;
2981}
2982
2983static int rt5645_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
2984                        unsigned int rx_mask, int slots, int slot_width)
2985{
2986        struct snd_soc_component *component = dai->component;
2987        struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
2988        unsigned int i_slot_sft, o_slot_sft, i_width_sht, o_width_sht, en_sft;
2989        unsigned int mask, val = 0;
2990
2991        switch (rt5645->codec_type) {
2992        case CODEC_TYPE_RT5650:
2993                en_sft = 15;
2994                i_slot_sft = 10;
2995                o_slot_sft = 8;
2996                i_width_sht = 6;
2997                o_width_sht = 4;
2998                mask = 0x8ff0;
2999                break;
3000        default:

3001                en_sft = 14;
3002                i_slot_sft = o_slot_sft = 12;
3003                i_width_sht = o_width_sht = 10;
3004                mask = 0x7c00;
3005                break;
3006        }
3007        if (rx_mask || tx_mask) {
3008                val |= (1 << en_sft);
3009                if (rt5645->codec_type == CODEC_TYPE_RT5645)
3010                        snd_soc_component_update_bits(component, RT5645_BASS_BACK,
3011                                RT5645_G_BB_BST_MASK, RT5645_G_BB_BST_25DB);
3012        }
3013
3014        switch (slots) {
3015        case 4:
3016                val |= (1 << i_slot_sft) | (1 << o_slot_sft);
3017                break;
3018        case 6:
3019                val |= (2 << i_slot_sft) | (2 << o_slot_sft);
3020                break;
3021        case 8:
3022                val |= (3 << i_slot_sft) | (3 << o_slot_sft);
3023                break;
3024        case 2:
3025        default:
3026                break;
3027        }
3028
3029        switch (slot_width) {
3030        case 20:
3031                val |= (1 << i_width_sht) | (1 << o_width_sht);
3032                break;
3033        case 24:
3034                val |= (2 << i_width_sht) | (2 << o_width_sht);
3035                break;
3036        case 32:
3037                val |= (3 << i_width_sht) | (3 << o_width_sht);
3038                break;
3039        case 16:
3040        default:
3041                break;
3042        }
3043
3044        snd_soc_component_update_bits(component, RT5645_TDM_CTRL_1, mask, val);
3045
3046        return 0;
3047}
3048
3049static int rt5645_set_bias_level(struct snd_soc_component *component,
3050                        enum snd_soc_bias_level level)
3051{
3052        struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
3053
3054        switch (level) {
3055        case SND_SOC_BIAS_PREPARE:
3056                if (SND_SOC_BIAS_STANDBY == snd_soc_component_get_bias_level(component)) {
3057                        snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
3058                                RT5645_PWR_VREF1 | RT5645_PWR_MB |
3059                                RT5645_PWR_BG | RT5645_PWR_VREF2,
3060                                RT5645_PWR_VREF1 | RT5645_PWR_MB |
3061                                RT5645_PWR_BG | RT5645_PWR_VREF2);
3062                        mdelay(10);
3063                        snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
3064                                RT5645_PWR_FV1 | RT5645_PWR_FV2,
3065                                RT5645_PWR_FV1 | RT5645_PWR_FV2);
3066                        snd_soc_component_update_bits(component, RT5645_GEN_CTRL1,
3067                                RT5645_DIG_GATE_CTRL, RT5645_DIG_GATE_CTRL);
3068                }
3069                break;
3070
3071        case SND_SOC_BIAS_STANDBY:
3072                snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
3073                        RT5645_PWR_VREF1 | RT5645_PWR_MB |
3074                        RT5645_PWR_BG | RT5645_PWR_VREF2,
3075                        RT5645_PWR_VREF1 | RT5645_PWR_MB |
3076                        RT5645_PWR_BG | RT5645_PWR_VREF2);
3077                mdelay(10);
3078                snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
3079                        RT5645_PWR_FV1 | RT5645_PWR_FV2,
3080                        RT5645_PWR_FV1 | RT5645_PWR_FV2);
3081                if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
3082                        snd_soc_component_write(component, RT5645_DEPOP_M2, 0x1140);
3083                        msleep(40);
3084                        if (rt5645->en_button_func)
3085                                queue_delayed_work(system_power_efficient_wq,
3086                                        &rt5645->jack_detect_work,
3087                                        msecs_to_jiffies(0));
3088                }
3089                break;
3090
3091        case SND_SOC_BIAS_OFF:
3092                snd_soc_component_write(component, RT5645_DEPOP_M2, 0x1100);
3093                if (!rt5645->en_button_func)
3094                        snd_soc_component_update_bits(component, RT5645_GEN_CTRL1,
3095                                        RT5645_DIG_GATE_CTRL, 0);
3096                snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
3097                                RT5645_PWR_VREF1 | RT5645_PWR_MB |
3098                                RT5645_PWR_BG | RT5645_PWR_VREF2 |
3099                                RT5645_PWR_FV1 | RT5645_PWR_FV2, 0x0);
3100                break;
3101
3102        default:
3103                break;
3104        }
3105
3106        return 0;
3107}
3108
3109static void rt5645_enable_push_button_irq(struct snd_soc_component *component,
3110        bool enable)
3111{
3112        struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
3113
3114        if (enable) {
3115                snd_soc_dapm_force_enable_pin(dapm, "ADC L power");
3116                snd_soc_dapm_force_enable_pin(dapm, "ADC R power");
3117                snd_soc_dapm_sync(dapm);
3118
3119                snd_soc_component_update_bits(component, RT5650_4BTN_IL_CMD1, 0x3, 0x3);
3120                snd_soc_component_update_bits(component,
3121                                        RT5645_INT_IRQ_ST, 0x8, 0x8);
3122                snd_soc_component_update_bits(component,
3123                                        RT5650_4BTN_IL_CMD2, 0x8000, 0x8000);
3124                snd_soc_component_read(component, RT5650_4BTN_IL_CMD1);
3125                pr_debug("%s read %x = %x\n", __func__, RT5650_4BTN_IL_CMD1,
3126                        snd_soc_component_read(component, RT5650_4BTN_IL_CMD1));
3127        } else {
3128                snd_soc_component_update_bits(component, RT5650_4BTN_IL_CMD2, 0x8000, 0x0);
3129                snd_soc_component_update_bits(component, RT5645_INT_IRQ_ST, 0x8, 0x0);
3130
3131                snd_soc_dapm_disable_pin(dapm, "ADC L power");
3132                snd_soc_dapm_disable_pin(dapm, "ADC R power");
3133                snd_soc_dapm_sync(dapm);
3134        }
3135}
3136
3137static int rt5645_jack_detect(struct snd_soc_component *component, int jack_insert)
3138{
3139        struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
3140        struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
3141        unsigned int val;
3142
3143        if (jack_insert) {
3144                regmap_write(rt5645->regmap, RT5645_CHARGE_PUMP, 0x0e06);
3145
3146                /* for jack type detect */
3147                snd_soc_dapm_force_enable_pin(dapm, "LDO2");
3148                snd_soc_dapm_force_enable_pin(dapm, "Mic Det Power");
3149                snd_soc_dapm_sync(dapm);
3150                if (!dapm->card->instantiated) {
3151                        /* Power up necessary bits for JD if dapm is
3152                           not ready yet */
3153                        regmap_update_bits(rt5645->regmap, RT5645_PWR_ANLG1,
3154                                RT5645_PWR_MB | RT5645_PWR_VREF2,
3155                                RT5645_PWR_MB | RT5645_PWR_VREF2);
3156                        regmap_update_bits(rt5645->regmap, RT5645_PWR_MIXER,
3157                                RT5645_PWR_LDO2, RT5645_PWR_LDO2);
3158                        regmap_update_bits(rt5645->regmap, RT5645_PWR_VOL,
3159                                RT5645_PWR_MIC_DET, RT5645_PWR_MIC_DET);
3160                }
3161
3162                regmap_write(rt5645->regmap, RT5645_JD_CTRL3, 0x00f0);
3163                regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL2,
3164                        RT5645_CBJ_MN_JD, RT5645_CBJ_MN_JD);
3165                regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL1,
3166                        RT5645_CBJ_BST1_EN, RT5645_CBJ_BST1_EN);
3167                msleep(100);
3168                regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL2,
3169                        RT5645_CBJ_MN_JD, 0);
3170
3171                msleep(600);
3172                regmap_read(rt5645->regmap, RT5645_IN1_CTRL3, &val);
3173                val &= 0x7;
3174                dev_dbg(component->dev, "val = %d\n", val);
3175
3176                if (val == 1 || val == 2) {
3177                        rt5645->jack_type = SND_JACK_HEADSET;
3178                        if (rt5645->en_button_func) {
3179                                rt5645_enable_push_button_irq(component, true);
3180                        }
3181                } else {
3182                        snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
3183                        snd_soc_dapm_sync(dapm);
3184                        rt5645->jack_type = SND_JACK_HEADPHONE;
3185                }
3186                if (rt5645->pdata.level_trigger_irq)
3187                        regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2,
3188                                RT5645_JD_1_1_MASK, RT5645_JD_1_1_NOR);
3189        } else { /* jack out */
3190                rt5645->jack_type = 0;
3191
3192                regmap_update_bits(rt5645->regmap, RT5645_HP_VOL,
3193                        RT5645_L_MUTE | RT5645_R_MUTE,
3194                        RT5645_L_MUTE | RT5645_R_MUTE);
3195                regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL2,
3196                        RT5645_CBJ_MN_JD, RT5645_CBJ_MN_JD);
3197                regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL1,
3198                        RT5645_CBJ_BST1_EN, 0);
3199
3200                if (rt5645->en_button_func)
3201                        rt5645_enable_push_button_irq(component, false);
3202
3203                if (rt5645->pdata.jd_mode == 0)
3204                        snd_soc_dapm_disable_pin(dapm, "LDO2");
3205                snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
3206                snd_soc_dapm_sync(dapm);
3207                if (rt5645->pdata.level_trigger_irq)
3208                        regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2,
3209                                RT5645_JD_1_1_MASK, RT5645_JD_1_1_INV);
3210        }
3211
3212        return rt5645->jack_type;
3213}
3214
3215static int rt5645_button_detect(struct snd_soc_component *component)
3216{
3217        int btn_type, val;
3218
3219        val = snd_soc_component_read(component, RT5650_4BTN_IL_CMD1);
3220        pr_debug("val=0x%x\n", val);
3221        btn_type = val & 0xfff0;
3222        snd_soc_component_write(component, RT5650_4BTN_IL_CMD1, val);
3223
3224        return btn_type;
3225}
3226
3227static irqreturn_t rt5645_irq(int irq, void *data);
3228
3229int rt5645_set_jack_detect(struct snd_soc_component *component,
3230        struct snd_soc_jack *hp_jack, struct snd_soc_jack *mic_jack,
3231        struct snd_soc_jack *btn_jack)
3232{
3233        struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
3234
3235        rt5645->hp_jack = hp_jack;
3236        rt5645->mic_jack = mic_jack;
3237        rt5645->btn_jack = btn_jack;
3238        if (rt5645->btn_jack && rt5645->codec_type == CODEC_TYPE_RT5650) {
3239                rt5645->en_button_func = true;
3240                regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3241                                RT5645_GP1_PIN_IRQ, RT5645_GP1_PIN_IRQ);
3242                regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL1,
3243                                RT5645_DIG_GATE_CTRL, RT5645_DIG_GATE_CTRL);
3244        }
3245        rt5645_irq(0, rt5645);
3246
3247        return 0;
3248}
3249EXPORT_SYMBOL_GPL(rt5645_set_jack_detect);
3250
3251static void rt5645_jack_detect_work(struct work_struct *work)
3252{
3253        struct rt5645_priv *rt5645 =
3254                container_of(work, struct rt5645_priv, jack_detect_work.work);
3255        int val, btn_type, gpio_state = 0, report = 0;
3256
3257        if (!rt5645->component)
3258                return;
3259
3260        switch (rt5645->pdata.jd_mode) {
3261        case 0: /* Not using rt5645 JD */
3262                if (rt5645->gpiod_hp_det) {
3263                        gpio_state = gpiod_get_value(rt5645->gpiod_hp_det);
3264                        dev_dbg(rt5645->component->dev, "gpio_state = %d\n",
3265                                gpio_state);
3266                        report = rt5645_jack_detect(rt5645->component, gpio_state);
3267                }
3268                snd_soc_jack_report(rt5645->hp_jack,
3269                                    report, SND_JACK_HEADPHONE);
3270                snd_soc_jack_report(rt5645->mic_jack,
3271                                    report, SND_JACK_MICROPHONE);
3272                return;
3273        case 4:
3274                val = snd_soc_component_read(rt5645->component, RT5645_A_JD_CTRL1) & 0x0020;
3275                break;
3276        default: /* read rt5645 jd1_1 status */
3277                val = snd_soc_component_read(rt5645->component, RT5645_INT_IRQ_ST) & 0x1000;
3278                break;
3279
3280        }
3281
3282        if (!val && (rt5645->jack_type == 0)) { /* jack in */
3283                report = rt5645_jack_detect(rt5645->component, 1);
3284        } else if (!val && rt5645->jack_type != 0) {
3285                /* for push button and jack out */
3286                btn_type = 0;
3287                if (snd_soc_component_read(rt5645->component, RT5645_INT_IRQ_ST) & 0x4) {
3288                        /* button pressed */
3289                        report = SND_JACK_HEADSET;
3290                        btn_type = rt5645_button_detect(rt5645->component);
3291                        /* rt5650 can report three kinds of button behavior,
3292                           one click, double click and hold. However,
3293                           currently we will report button pressed/released
3294                           event. So all the three button behaviors are
3295                           treated as button pressed. */
3296                        switch (btn_type) {
3297                        case 0x8000:
3298                        case 0x4000:
3299                        case 0x2000:
3300                                report |= SND_JACK_BTN_0;
3301                                break;
3302                        case 0x1000:
3303                        case 0x0800:
3304                        case 0x0400:
3305                                report |= SND_JACK_BTN_1;
3306                                break;
3307                        case 0x0200:
3308                        case 0x0100:
3309                        case 0x0080:
3310                                report |= SND_JACK_BTN_2;
3311                                break;
3312                        case 0x0040:
3313                        case 0x0020:
3314                        case 0x0010:
3315                                report |= SND_JACK_BTN_3;
3316                                break;
3317                        case 0x0000: /* unpressed */
3318                                break;
3319                        default:
3320                                dev_err(rt5645->component->dev,
3321                                        "Unexpected button code 0x%04x\n",
3322                                        btn_type);
3323                                break;
3324                        }
3325                }
3326                if (btn_type == 0)/* button release */
3327                        report =  rt5645->jack_type;
3328                else {
3329                        mod_timer(&rt5645->btn_check_timer,
3330                                msecs_to_jiffies(100));
3331                }
3332        } else {
3333                /* jack out */
3334                report = 0;
3335                snd_soc_component_update_bits(rt5645->component,
3336                                    RT5645_INT_IRQ_ST, 0x1, 0x0);
3337                rt5645_jack_detect(rt5645->component, 0);
3338        }
3339
3340        snd_soc_jack_report(rt5645->hp_jack, report, SND_JACK_HEADPHONE);
3341        snd_soc_jack_report(rt5645->mic_jack, report, SND_JACK_MICROPHONE);
3342        if (rt5645->en_button_func)
3343                snd_soc_jack_report(rt5645->btn_jack,
3344                        report, SND_JACK_BTN_0 | SND_JACK_BTN_1 |
3345                                SND_JACK_BTN_2 | SND_JACK_BTN_3);
3346}
3347
3348static void rt5645_rcclock_work(struct work_struct *work)
3349{
3350        struct rt5645_priv *rt5645 =
3351                container_of(work, struct rt5645_priv, rcclock_work.work);
3352
3353        regmap_update_bits(rt5645->regmap, RT5645_MICBIAS,
3354                RT5645_PWR_CLK25M_MASK, RT5645_PWR_CLK25M_PD);
3355}
3356
3357static irqreturn_t rt5645_irq(int irq, void *data)
3358{
3359        struct rt5645_priv *rt5645 = data;
3360
3361        queue_delayed_work(system_power_efficient_wq,
3362                           &rt5645->jack_detect_work, msecs_to_jiffies(250));
3363
3364        return IRQ_HANDLED;
3365}
3366
3367static void rt5645_btn_check_callback(struct timer_list *t)
3368{
3369        struct rt5645_priv *rt5645 = from_timer(rt5645, t, btn_check_timer);
3370
3371        queue_delayed_work(system_power_efficient_wq,
3372                   &rt5645->jack_detect_work, msecs_to_jiffies(5));
3373}
3374
3375static int rt5645_probe(struct snd_soc_component *component)
3376{
3377        struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
3378        struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
3379
3380        rt5645->component = component;
3381
3382        switch (rt5645->codec_type) {
3383        case CODEC_TYPE_RT5645:
3384                snd_soc_dapm_new_controls(dapm,
3385                        rt5645_specific_dapm_widgets,
3386                        ARRAY_SIZE(rt5645_specific_dapm_widgets));
3387                snd_soc_dapm_add_routes(dapm,
3388                        rt5645_specific_dapm_routes,
3389                        ARRAY_SIZE(rt5645_specific_dapm_routes));
3390                if (rt5645->v_id < 3) {
3391                        snd_soc_dapm_add_routes(dapm,
3392                                rt5645_old_dapm_routes,
3393                                ARRAY_SIZE(rt5645_old_dapm_routes));
3394                }
3395                break;
3396        case CODEC_TYPE_RT5650:
3397                snd_soc_dapm_new_controls(dapm,
3398                        rt5650_specific_dapm_widgets,
3399                        ARRAY_SIZE(rt5650_specific_dapm_widgets));
3400                snd_soc_dapm_add_routes(dapm,
3401                        rt5650_specific_dapm_routes,
3402                        ARRAY_SIZE(rt5650_specific_dapm_routes));
3403                break;
3404        }
3405
3406        snd_soc_component_force_bias_level(component, SND_SOC_BIAS_OFF);
3407
3408        /* for JD function */
3409        if (rt5645->pdata.jd_mode) {
3410                snd_soc_dapm_force_enable_pin(dapm, "JD Power");
3411                snd_soc_dapm_force_enable_pin(dapm, "LDO2");
3412                snd_soc_dapm_sync(dapm);
3413        }
3414
3415        if (rt5645->pdata.long_name)
3416                component->card->long_name = rt5645->pdata.long_name;
3417
3418        rt5645->eq_param = devm_kcalloc(component->dev,
3419                RT5645_HWEQ_NUM, sizeof(struct rt5645_eq_param_s),
3420                GFP_KERNEL);
3421
3422        if (!rt5645->eq_param)
3423                return -ENOMEM;
3424
3425        return 0;
3426}
3427
3428static void rt5645_remove(struct snd_soc_component *component)
3429{
3430        rt5645_reset(component);
3431}
3432
3433#ifdef CONFIG_PM
3434static int rt5645_suspend(struct snd_soc_component *component)
3435{
3436        struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
3437
3438        regcache_cache_only(rt5645->regmap, true);
3439        regcache_mark_dirty(rt5645->regmap);
3440
3441        return 0;
3442}
3443
3444static int rt5645_resume(struct snd_soc_component *component)
3445{
3446        struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
3447
3448        regcache_cache_only(rt5645->regmap, false);
3449        regcache_sync(rt5645->regmap);
3450
3451        return 0;
3452}
3453#else
3454#define rt5645_suspend NULL
3455#define rt5645_resume NULL
3456#endif
3457
3458#define RT5645_STEREO_RATES SNDRV_PCM_RATE_8000_96000
3459#define RT5645_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
3460                        SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
3461
3462static const struct snd_soc_dai_ops rt5645_aif_dai_ops = {
3463        .hw_params = rt5645_hw_params,
3464        .set_fmt = rt5645_set_dai_fmt,
3465        .set_sysclk = rt5645_set_dai_sysclk,
3466        .set_tdm_slot = rt5645_set_tdm_slot,
3467        .set_pll = rt5645_set_dai_pll,
3468};
3469
3470static struct snd_soc_dai_driver rt5645_dai[] = {
3471        {
3472                .name = "rt5645-aif1",
3473                .id = RT5645_AIF1,
3474                .playback = {
3475                        .stream_name = "AIF1 Playback",
3476                        .channels_min = 1,
3477                        .channels_max = 2,
3478                        .rates = RT5645_STEREO_RATES,
3479                        .formats = RT5645_FORMATS,
3480                },
3481                .capture = {
3482                        .stream_name = "AIF1 Capture",
3483                        .channels_min = 1,
3484                        .channels_max = 4,
3485                        .rates = RT5645_STEREO_RATES,
3486                        .formats = RT5645_FORMATS,
3487                },
3488                .ops = &rt5645_aif_dai_ops,
3489        },
3490        {
3491                .name = "rt5645-aif2",
3492                .id = RT5645_AIF2,
3493                .playback = {
3494                        .stream_name = "AIF2 Playback",
3495                        .channels_min = 1,
3496                        .channels_max = 2,
3497                        .rates = RT5645_STEREO_RATES,
3498                        .formats = RT5645_FORMATS,
3499                },
3500                .capture = {
3501                        .stream_name = "AIF2 Capture",
3502                        .channels_min = 1,
3503                        .channels_max = 2,
3504                        .rates = RT5645_STEREO_RATES,
3505                        .formats = RT5645_FORMATS,
3506                },
3507                .ops = &rt5645_aif_dai_ops,
3508        },
3509};
3510
3511static const struct snd_soc_component_driver soc_component_dev_rt5645 = {
3512        .probe                  = rt5645_probe,
3513        .remove                 = rt5645_remove,
3514        .suspend                = rt5645_suspend,
3515        .resume                 = rt5645_resume,
3516        .set_bias_level         = rt5645_set_bias_level,
3517        .controls               = rt5645_snd_controls,
3518        .num_controls           = ARRAY_SIZE(rt5645_snd_controls),
3519        .dapm_widgets           = rt5645_dapm_widgets,
3520        .num_dapm_widgets       = ARRAY_SIZE(rt5645_dapm_widgets),
3521        .dapm_routes            = rt5645_dapm_routes,
3522        .num_dapm_routes        = ARRAY_SIZE(rt5645_dapm_routes),
3523        .use_pmdown_time        = 1,
3524        .endianness             = 1,
3525        .non_legacy_dai_naming  = 1,
3526};
3527
3528static const struct regmap_config rt5645_regmap = {
3529        .reg_bits = 8,
3530        .val_bits = 16,
3531        .use_single_read = true,
3532        .use_single_write = true,
3533        .max_register = RT5645_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5645_ranges) *
3534                                               RT5645_PR_SPACING),
3535        .volatile_reg = rt5645_volatile_register,
3536        .readable_reg = rt5645_readable_register,
3537
3538        .cache_type = REGCACHE_RBTREE,
3539        .reg_defaults = rt5645_reg,
3540        .num_reg_defaults = ARRAY_SIZE(rt5645_reg),
3541        .ranges = rt5645_ranges,
3542        .num_ranges = ARRAY_SIZE(rt5645_ranges),
3543};
3544
3545static const struct regmap_config rt5650_regmap = {
3546        .reg_bits = 8,
3547        .val_bits = 16,
3548        .use_single_read = true,
3549        .use_single_write = true,
3550        .max_register = RT5645_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5645_ranges) *
3551                                               RT5645_PR_SPACING),
3552        .volatile_reg = rt5645_volatile_register,
3553        .readable_reg = rt5645_readable_register,
3554
3555        .cache_type = REGCACHE_RBTREE,
3556        .reg_defaults = rt5650_reg,
3557        .num_reg_defaults = ARRAY_SIZE(rt5650_reg),
3558        .ranges = rt5645_ranges,
3559        .num_ranges = ARRAY_SIZE(rt5645_ranges),
3560};
3561
3562static const struct regmap_config temp_regmap = {
3563        .name="nocache",
3564        .reg_bits = 8,
3565        .val_bits = 16,
3566        .use_single_read = true,
3567        .use_single_write = true,
3568        .max_register = RT5645_VENDOR_ID2 + 1,
3569        .cache_type = REGCACHE_NONE,
3570};
3571
3572static const struct i2c_device_id rt5645_i2c_id[] = {
3573        { "rt5645", 0 },
3574        { "rt5650", 0 },
3575        { }
3576};
3577MODULE_DEVICE_TABLE(i2c, rt5645_i2c_id);
3578
3579#ifdef CONFIG_OF
3580static const struct of_device_id rt5645_of_match[] = {
3581        { .compatible = "realtek,rt5645", },
3582        { .compatible = "realtek,rt5650", },
3583        { }
3584};
3585MODULE_DEVICE_TABLE(of, rt5645_of_match);
3586#endif
3587
3588#ifdef CONFIG_ACPI
3589static const struct acpi_device_id rt5645_acpi_match[] = {
3590        { "10EC5645", 0 },
3591        { "10EC5648", 0 },
3592        { "10EC5650", 0 },
3593        { "10EC5640", 0 },
3594        { "10EC3270", 0 },
3595        {},
3596};
3597MODULE_DEVICE_TABLE(acpi, rt5645_acpi_match);
3598#endif
3599
3600static const struct rt5645_platform_data intel_braswell_platform_data = {
3601        .dmic1_data_pin = RT5645_DMIC1_DISABLE,
3602        .dmic2_data_pin = RT5645_DMIC_DATA_IN2P,
3603        .jd_mode = 3,
3604};
3605
3606static const struct rt5645_platform_data buddy_platform_data = {
3607        .dmic1_data_pin = RT5645_DMIC_DATA_GPIO5,
3608        .dmic2_data_pin = RT5645_DMIC_DATA_IN2P,
3609        .jd_mode = 4,
3610        .level_trigger_irq = true,
3611};
3612
3613static const struct rt5645_platform_data gpd_win_platform_data = {
3614        .jd_mode = 3,
3615        .inv_jd1_1 = true,
3616        .long_name = "gpd-win-pocket-rt5645",
3617        /* The GPD pocket has a diff. mic, for the win this does not matter. */
3618        .in2_diff = true,
3619};
3620
3621static const struct rt5645_platform_data asus_t100ha_platform_data = {
3622        .dmic1_data_pin = RT5645_DMIC_DATA_IN2N,
3623        .dmic2_data_pin = RT5645_DMIC2_DISABLE,
3624        .jd_mode = 3,
3625        .inv_jd1_1 = true,
3626};
3627
3628static const struct rt5645_platform_data asus_t101ha_platform_data = {
3629        .dmic1_data_pin = RT5645_DMIC_DATA_IN2N,
3630        .dmic2_data_pin = RT5645_DMIC2_DISABLE,
3631        .jd_mode = 3,
3632};
3633
3634static const struct rt5645_platform_data lenovo_ideapad_miix_310_pdata = {
3635        .jd_mode = 3,
3636        .in2_diff = true,
3637};
3638
3639static const struct rt5645_platform_data jd_mode3_platform_data = {
3640        .jd_mode = 3,
3641};
3642
3643static const struct rt5645_platform_data lattepanda_board_platform_data = {
3644        .jd_mode = 2,
3645        .inv_jd1_1 = true
3646};
3647
3648static const struct rt5645_platform_data kahlee_platform_data = {
3649        .dmic1_data_pin = RT5645_DMIC_DATA_GPIO5,
3650        .dmic2_data_pin = RT5645_DMIC_DATA_IN2P,
3651        .jd_mode = 3,
3652};
3653
3654static const struct dmi_system_id dmi_platform_data[] = {
3655        {
3656                .ident = "Chrome Buddy",
3657                .matches = {
3658                        DMI_MATCH(DMI_PRODUCT_NAME, "Buddy"),
3659                },
3660                .driver_data = (void *)&buddy_platform_data,
3661        },
3662        {
3663                .ident = "Intel Strago",
3664                .matches = {
3665                        DMI_MATCH(DMI_PRODUCT_NAME, "Strago"),
3666                },
3667                .driver_data = (void *)&intel_braswell_platform_data,
3668        },
3669        {
3670                .ident = "Google Chrome",
3671                .matches = {
3672                        DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"),
3673                },
3674                .driver_data = (void *)&intel_braswell_platform_data,
3675        },
3676        {
3677                .ident = "Google Setzer",
3678                .matches = {
3679                        DMI_MATCH(DMI_PRODUCT_NAME, "Setzer"),
3680                },
3681                .driver_data = (void *)&intel_braswell_platform_data,
3682        },
3683        {
3684                .ident = "Microsoft Surface 3",
3685                .matches = {
3686                        DMI_MATCH(DMI_PRODUCT_NAME, "Surface 3"),
3687                },
3688                .driver_data = (void *)&intel_braswell_platform_data,
3689        },
3690        {
3691                /*
3692                 * Match for the GPDwin which unfortunately uses somewhat
3693                 * generic dmi strings, which is why we test for 4 strings.
3694                 * Comparing against 23 other byt/cht boards, board_vendor
3695                 * and board_name are unique to the GPDwin, where as only one
3696                 * other board has the same board_serial and 3 others have
3697                 * the same default product_name. Also the GPDwin is the
3698                 * only device to have both board_ and product_name not set.
3699                 */
3700                .ident = "GPD Win / Pocket",
3701                .matches = {
3702                        DMI_MATCH(DMI_BOARD_VENDOR, "AMI Corporation"),
3703                        DMI_MATCH(DMI_BOARD_NAME, "Default string"),
3704                        DMI_MATCH(DMI_BOARD_SERIAL, "Default string"),
3705                        DMI_MATCH(DMI_PRODUCT_NAME, "Default string"),
3706                },
3707                .driver_data = (void *)&gpd_win_platform_data,
3708        },
3709        {
3710                .ident = "ASUS T100HAN",
3711                .matches = {
3712                        DMI_EXACT_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
3713                        DMI_MATCH(DMI_PRODUCT_NAME, "T100HAN"),
3714                },
3715                .driver_data = (void *)&asus_t100ha_platform_data,
3716        },
3717        {
3718                .ident = "ASUS T101HA",
3719                .matches = {
3720                        DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
3721                        DMI_MATCH(DMI_PRODUCT_NAME, "T101HA"),
3722                },
3723                .driver_data = (void *)&asus_t101ha_platform_data,
3724        },
3725        {
3726                .ident = "MINIX Z83-4",
3727                .matches = {
3728                        DMI_EXACT_MATCH(DMI_SYS_VENDOR, "MINIX"),
3729                        DMI_MATCH(DMI_PRODUCT_NAME, "Z83-4"),
3730                },
3731                .driver_data = (void *)&jd_mode3_platform_data,
3732        },
3733        {
3734                .ident = "Teclast X80 Pro",
3735                .matches = {
3736                        DMI_MATCH(DMI_SYS_VENDOR, "TECLAST"),
3737                        DMI_MATCH(DMI_PRODUCT_NAME, "X80 Pro"),
3738                },
3739                .driver_data = (void *)&jd_mode3_platform_data,
3740        },
3741        {
3742                .ident = "Lenovo Ideapad Miix 310",
3743                .matches = {
3744                  DMI_EXACT_MATCH(DMI_SYS_VENDOR, "LENOVO"),
3745                  DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "80SG"),
3746                  DMI_EXACT_MATCH(DMI_PRODUCT_VERSION, "MIIX 310-10ICR"),
3747                },
3748                .driver_data = (void *)&lenovo_ideapad_miix_310_pdata,
3749        },
3750        {
3751                .ident = "Lenovo Ideapad Miix 320",
3752                .matches = {
3753                  DMI_EXACT_MATCH(DMI_SYS_VENDOR, "LENOVO"),
3754                  DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "80XF"),
3755                  DMI_EXACT_MATCH(DMI_PRODUCT_VERSION, "Lenovo MIIX 320-10ICR"),
3756                },
3757                .driver_data = (void *)&intel_braswell_platform_data,
3758        },
3759        {
3760                .ident = "LattePanda board",
3761                .matches = {
3762                  DMI_EXACT_MATCH(DMI_BOARD_VENDOR, "AMI Corporation"),
3763                  DMI_EXACT_MATCH(DMI_BOARD_NAME, "Cherry Trail CR"),
3764                  DMI_EXACT_MATCH(DMI_BOARD_VERSION, "Default string"),
3765                },
3766                .driver_data = (void *)&lattepanda_board_platform_data,
3767        },
3768        {
3769                .ident = "Chrome Kahlee",
3770                .matches = {
3771                        DMI_MATCH(DMI_PRODUCT_NAME, "Kahlee"),
3772                },
3773                .driver_data = (void *)&kahlee_platform_data,
3774        },
3775        {
3776                .ident = "Medion E1239T",
3777                .matches = {
3778                        DMI_EXACT_MATCH(DMI_SYS_VENDOR, "MEDION"),
3779                        DMI_MATCH(DMI_PRODUCT_NAME, "E1239T MD60568"),
3780                },
3781                .driver_data = (void *)&intel_braswell_platform_data,
3782        },
3783        { }
3784};
3785
3786static bool rt5645_check_dp(struct device *dev)
3787{
3788        if (device_property_present(dev, "realtek,in2-differential") ||
3789            device_property_present(dev, "realtek,dmic1-data-pin") ||
3790            device_property_present(dev, "realtek,dmic2-data-pin") ||
3791            device_property_present(dev, "realtek,jd-mode"))
3792                return true;
3793
3794        return false;
3795}
3796
3797static int rt5645_parse_dt(struct rt5645_priv *rt5645, struct device *dev)
3798{
3799        rt5645->pdata.in2_diff = device_property_read_bool(dev,
3800                "realtek,in2-differential");
3801        device_property_read_u32(dev,
3802                "realtek,dmic1-data-pin", &rt5645->pdata.dmic1_data_pin);
3803        device_property_read_u32(dev,
3804                "realtek,dmic2-data-pin", &rt5645->pdata.dmic2_data_pin);
3805        device_property_read_u32(dev,
3806                "realtek,jd-mode", &rt5645->pdata.jd_mode);
3807
3808        return 0;
3809}
3810
3811static int rt5645_i2c_probe(struct i2c_client *i2c,
3812                    const struct i2c_device_id *id)
3813{
3814        struct rt5645_platform_data *pdata = dev_get_platdata(&i2c->dev);
3815        const struct dmi_system_id *dmi_data;
3816        struct rt5645_priv *rt5645;
3817        int ret, i;
3818        unsigned int val;
3819        struct regmap *regmap;
3820
3821        rt5645 = devm_kzalloc(&i2c->dev, sizeof(struct rt5645_priv),
3822                                GFP_KERNEL);
3823        if (rt5645 == NULL)
3824                return -ENOMEM;
3825
3826        rt5645->i2c = i2c;
3827        i2c_set_clientdata(i2c, rt5645);
3828
3829        dmi_data = dmi_first_match(dmi_platform_data);
3830        if (dmi_data) {
3831                dev_info(&i2c->dev, "Detected %s platform\n", dmi_data->ident);
3832                pdata = dmi_data->driver_data;
3833        }
3834
3835        if (pdata)
3836                rt5645->pdata = *pdata;
3837        else if (rt5645_check_dp(&i2c->dev))
3838                rt5645_parse_dt(rt5645, &i2c->dev);
3839        else
3840                rt5645->pdata = jd_mode3_platform_data;
3841
3842        if (quirk != -1) {
3843                rt5645->pdata.in2_diff = QUIRK_IN2_DIFF(quirk);
3844                rt5645->pdata.level_trigger_irq = QUIRK_LEVEL_IRQ(quirk);
3845                rt5645->pdata.inv_jd1_1 = QUIRK_INV_JD1_1(quirk);
3846                rt5645->pdata.jd_mode = QUIRK_JD_MODE(quirk);
3847                rt5645->pdata.dmic1_data_pin = QUIRK_DMIC1_DATA_PIN(quirk);
3848                rt5645->pdata.dmic2_data_pin = QUIRK_DMIC2_DATA_PIN(quirk);
3849        }
3850
3851        rt5645->gpiod_hp_det = devm_gpiod_get_optional(&i2c->dev, "hp-detect",
3852                                                       GPIOD_IN);
3853
3854        if (IS_ERR(rt5645->gpiod_hp_det)) {
3855                dev_info(&i2c->dev, "failed to initialize gpiod\n");
3856                ret = PTR_ERR(rt5645->gpiod_hp_det);
3857                /*
3858                 * Continue if optional gpiod is missing, bail for all other
3859                 * errors, including -EPROBE_DEFER
3860                 */
3861                if (ret != -ENOENT)
3862                        return ret;
3863        }
3864
3865        for (i = 0; i < ARRAY_SIZE(rt5645->supplies); i++)
3866                rt5645->supplies[i].supply = rt5645_supply_names[i];
3867
3868        ret = devm_regulator_bulk_get(&i2c->dev,
3869                                      ARRAY_SIZE(rt5645->supplies),
3870                                      rt5645->supplies);
3871        if (ret) {
3872                dev_err(&i2c->dev, "Failed to request supplies: %d\n", ret);
3873                return ret;
3874        }
3875
3876        ret = regulator_bulk_enable(ARRAY_SIZE(rt5645->supplies),
3877                                    rt5645->supplies);
3878        if (ret) {
3879                dev_err(&i2c->dev, "Failed to enable supplies: %d\n", ret);
3880                return ret;
3881        }
3882
3883        regmap = devm_regmap_init_i2c(i2c, &temp_regmap);
3884        if (IS_ERR(regmap)) {
3885                ret = PTR_ERR(regmap);
3886                dev_err(&i2c->dev, "Failed to allocate temp register map: %d\n",
3887                        ret);
3888                return ret;
3889        }
3890
3891        /*
3892         * Read after 400msec, as it is the interval required between
3893         * read and power On.
3894         */
3895        msleep(TIME_TO_POWER_MS);
3896        regmap_read(regmap, RT5645_VENDOR_ID2, &val);
3897
3898        switch (val) {
3899        case RT5645_DEVICE_ID:
3900                rt5645->regmap = devm_regmap_init_i2c(i2c, &rt5645_regmap);
3901                rt5645->codec_type = CODEC_TYPE_RT5645;
3902                break;
3903        case RT5650_DEVICE_ID:
3904                rt5645->regmap = devm_regmap_init_i2c(i2c, &rt5650_regmap);
3905                rt5645->codec_type = CODEC_TYPE_RT5650;
3906                break;
3907        default:
3908                dev_err(&i2c->dev,
3909                        "Device with ID register %#x is not rt5645 or rt5650\n",
3910                        val);
3911                ret = -ENODEV;
3912                goto err_enable;
3913        }
3914
3915        if (IS_ERR(rt5645->regmap)) {
3916                ret = PTR_ERR(rt5645->regmap);
3917                dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
3918                        ret);
3919                return ret;
3920        }
3921
3922        regmap_write(rt5645->regmap, RT5645_RESET, 0);
3923
3924        regmap_read(regmap, RT5645_VENDOR_ID, &val);
3925        rt5645->v_id = val & 0xff;
3926
3927        regmap_write(rt5645->regmap, RT5645_AD_DA_MIXER, 0x8080);
3928
3929        ret = regmap_register_patch(rt5645->regmap, init_list,
3930                                    ARRAY_SIZE(init_list));
3931        if (ret != 0)
3932                dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
3933
3934        if (rt5645->codec_type == CODEC_TYPE_RT5650) {
3935                ret = regmap_register_patch(rt5645->regmap, rt5650_init_list,
3936                                    ARRAY_SIZE(rt5650_init_list));
3937                if (ret != 0)
3938                        dev_warn(&i2c->dev, "Apply rt5650 patch failed: %d\n",
3939                                           ret);
3940        }
3941
3942        regmap_update_bits(rt5645->regmap, RT5645_CLSD_OUT_CTRL, 0xc0, 0xc0);
3943
3944        if (rt5645->pdata.in2_diff)
3945                regmap_update_bits(rt5645->regmap, RT5645_IN2_CTRL,
3946                                        RT5645_IN_DF2, RT5645_IN_DF2);
3947
3948        if (rt5645->pdata.dmic1_data_pin || rt5645->pdata.dmic2_data_pin) {
3949                regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3950                        RT5645_GP2_PIN_MASK, RT5645_GP2_PIN_DMIC1_SCL);
3951        }
3952        switch (rt5645->pdata.dmic1_data_pin) {
3953        case RT5645_DMIC_DATA_IN2N:
3954                regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3955                        RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_IN2N);
3956                break;
3957
3958        case RT5645_DMIC_DATA_GPIO5:
3959                regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3960                        RT5645_I2S2_DAC_PIN_MASK, RT5645_I2S2_DAC_PIN_GPIO);
3961                regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3962                        RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_GPIO5);
3963                regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3964                        RT5645_GP5_PIN_MASK, RT5645_GP5_PIN_DMIC1_SDA);
3965                break;
3966
3967        case RT5645_DMIC_DATA_GPIO11:
3968                regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3969                        RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_GPIO11);
3970                regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3971                        RT5645_GP11_PIN_MASK,
3972                        RT5645_GP11_PIN_DMIC1_SDA);
3973                break;
3974
3975        default:
3976                break;
3977        }
3978
3979        switch (rt5645->pdata.dmic2_data_pin) {
3980        case RT5645_DMIC_DATA_IN2P:
3981                regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3982                        RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_IN2P);
3983                break;
3984
3985        case RT5645_DMIC_DATA_GPIO6:
3986                regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3987                        RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO6);
3988                regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3989                        RT5645_GP6_PIN_MASK, RT5645_GP6_PIN_DMIC2_SDA);
3990                break;
3991
3992        case RT5645_DMIC_DATA_GPIO10:
3993                regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3994                        RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO10);
3995                regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3996                        RT5645_GP10_PIN_MASK,
3997                        RT5645_GP10_PIN_DMIC2_SDA);
3998                break;
3999
4000        case RT5645_DMIC_DATA_GPIO12:

4001                regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
4002                        RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO12);
4003                regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
4004                        RT5645_GP12_PIN_MASK,
4005                        RT5645_GP12_PIN_DMIC2_SDA);
4006                break;
4007
4008        default:
4009                break;
4010        }
4011
4012        if (rt5645->pdata.jd_mode) {
4013                regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL3,
4014                                   RT5645_IRQ_CLK_GATE_CTRL,
4015                                   RT5645_IRQ_CLK_GATE_CTRL);
4016                regmap_update_bits(rt5645->regmap, RT5645_MICBIAS,
4017                                   RT5645_IRQ_CLK_INT, RT5645_IRQ_CLK_INT);
4018                regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2,
4019                                   RT5645_IRQ_JD_1_1_EN, RT5645_IRQ_JD_1_1_EN);
4020                regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL3,
4021                                   RT5645_JD_PSV_MODE, RT5645_JD_PSV_MODE);
4022                regmap_update_bits(rt5645->regmap, RT5645_HPO_MIXER,
4023                                   RT5645_IRQ_PSV_MODE, RT5645_IRQ_PSV_MODE);
4024                regmap_update_bits(rt5645->regmap, RT5645_MICBIAS,
4025                                   RT5645_MIC2_OVCD_EN, RT5645_MIC2_OVCD_EN);
4026                regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
4027                                   RT5645_GP1_PIN_IRQ, RT5645_GP1_PIN_IRQ);
4028                switch (rt5645->pdata.jd_mode) {
4029                case 1:
4030                        regmap_update_bits(rt5645->regmap, RT5645_A_JD_CTRL1,
4031                                           RT5645_JD1_MODE_MASK,
4032                                           RT5645_JD1_MODE_0);
4033                        break;
4034                case 2:
4035                        regmap_update_bits(rt5645->regmap, RT5645_A_JD_CTRL1,
4036                                           RT5645_JD1_MODE_MASK,
4037                                           RT5645_JD1_MODE_1);
4038                        break;
4039                case 3:
4040                case 4:
4041                        regmap_update_bits(rt5645->regmap, RT5645_A_JD_CTRL1,
4042                                           RT5645_JD1_MODE_MASK,
4043                                           RT5645_JD1_MODE_2);
4044                        break;
4045                default:
4046                        break;
4047                }
4048                if (rt5645->pdata.inv_jd1_1) {
4049                        regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2,
4050                                RT5645_JD_1_1_MASK, RT5645_JD_1_1_INV);
4051                }
4052        }
4053
4054        regmap_update_bits(rt5645->regmap, RT5645_ADDA_CLK1,
4055                RT5645_I2S_PD1_MASK, RT5645_I2S_PD1_2);
4056
4057        if (rt5645->pdata.level_trigger_irq) {
4058                regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2,
4059                        RT5645_JD_1_1_MASK, RT5645_JD_1_1_INV);
4060        }
4061        timer_setup(&rt5645->btn_check_timer, rt5645_btn_check_callback, 0);
4062
4063        INIT_DELAYED_WORK(&rt5645->jack_detect_work, rt5645_jack_detect_work);
4064        INIT_DELAYED_WORK(&rt5645->rcclock_work, rt5645_rcclock_work);
4065
4066        if (rt5645->i2c->irq) {
4067                ret = request_threaded_irq(rt5645->i2c->irq, NULL, rt5645_irq,
4068                        IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING
4069                        | IRQF_ONESHOT, "rt5645", rt5645);
4070                if (ret) {
4071                        dev_err(&i2c->dev, "Failed to reguest IRQ: %d\n", ret);
4072                        goto err_enable;
4073                }
4074        }
4075
4076        ret = devm_snd_soc_register_component(&i2c->dev, &soc_component_dev_rt5645,
4077                                     rt5645_dai, ARRAY_SIZE(rt5645_dai));
4078        if (ret)
4079                goto err_irq;
4080
4081        return 0;
4082
4083err_irq:
4084        if (rt5645->i2c->irq)
4085                free_irq(rt5645->i2c->irq, rt5645);
4086err_enable:
4087        regulator_bulk_disable(ARRAY_SIZE(rt5645->supplies), rt5645->supplies);
4088        return ret;
4089}
4090
4091static int rt5645_i2c_remove(struct i2c_client *i2c)
4092{
4093        struct rt5645_priv *rt5645 = i2c_get_clientdata(i2c);
4094
4095        if (i2c->irq)
4096                free_irq(i2c->irq, rt5645);
4097
4098        cancel_delayed_work_sync(&rt5645->jack_detect_work);
4099        cancel_delayed_work_sync(&rt5645->rcclock_work);
4100        del_timer_sync(&rt5645->btn_check_timer);
4101
4102        regulator_bulk_disable(ARRAY_SIZE(rt5645->supplies), rt5645->supplies);
4103
4104        return 0;
4105}
4106
4107static void rt5645_i2c_shutdown(struct i2c_client *i2c)
4108{
4109        struct rt5645_priv *rt5645 = i2c_get_clientdata(i2c);
4110
4111        regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL3,
4112                RT5645_RING2_SLEEVE_GND, RT5645_RING2_SLEEVE_GND);
4113        regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL2, RT5645_CBJ_MN_JD,
4114                RT5645_CBJ_MN_JD);
4115        regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL1, RT5645_CBJ_BST1_EN,
4116                0);
4117        msleep(20);
4118        regmap_write(rt5645->regmap, RT5645_RESET, 0);
4119}
4120
4121static struct i2c_driver rt5645_i2c_driver = {
4122        .driver = {
4123                .name = "rt5645",
4124                .of_match_table = of_match_ptr(rt5645_of_match),
4125                .acpi_match_table = ACPI_PTR(rt5645_acpi_match),
4126        },
4127        .probe = rt5645_i2c_probe,
4128        .remove = rt5645_i2c_remove,
4129        .shutdown = rt5645_i2c_shutdown,
4130        .id_table = rt5645_i2c_id,
4131};
4132module_i2c_driver(rt5645_i2c_driver);
4133
4134MODULE_DESCRIPTION("ASoC RT5645 driver");
4135MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
4136MODULE_LICENSE("GPL v2");
4137