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9#include <linux/module.h>
10#include <linux/moduleparam.h>
11#include <linux/init.h>
12#include <linux/delay.h>
13#include <linux/pm.h>
14#include <linux/pm_runtime.h>
15#include <linux/i2c.h>
16#include <linux/platform_device.h>
17#include <linux/acpi.h>
18#include <linux/spi/spi.h>
19#include <linux/dmi.h>
20#include <sound/core.h>
21#include <sound/pcm.h>
22#include <sound/pcm_params.h>
23#include <sound/jack.h>
24#include <sound/soc.h>
25#include <sound/soc-dapm.h>
26#include <sound/initval.h>
27#include <sound/tlv.h>
28
29#include "rl6231.h"
30#include "rt5670.h"
31#include "rt5670-dsp.h"
32
33#define RT5670_GPIO1_IS_IRQ BIT(0)
34#define RT5670_IN2_DIFF BIT(1)
35#define RT5670_DMIC_EN BIT(2)
36#define RT5670_DMIC1_IN2P BIT(3)
37#define RT5670_DMIC1_GPIO6 BIT(4)
38#define RT5670_DMIC1_GPIO7 BIT(5)
39#define RT5670_DMIC2_INR BIT(6)
40#define RT5670_DMIC2_GPIO8 BIT(7)
41#define RT5670_DMIC3_GPIO5 BIT(8)
42#define RT5670_JD_MODE1 BIT(9)
43#define RT5670_JD_MODE2 BIT(10)
44#define RT5670_JD_MODE3 BIT(11)
45#define RT5670_GPIO1_IS_EXT_SPK_EN BIT(12)
46
47static unsigned long rt5670_quirk;
48static unsigned int quirk_override;
49module_param_named(quirk, quirk_override, uint, 0444);
50MODULE_PARM_DESC(quirk, "Board-specific quirk override");
51
52#define RT5670_DEVICE_ID 0x6271
53
54#define RT5670_PR_RANGE_BASE (0xff + 1)
55#define RT5670_PR_SPACING 0x100
56
57#define RT5670_PR_BASE (RT5670_PR_RANGE_BASE + (0 * RT5670_PR_SPACING))
58
59static const struct regmap_range_cfg rt5670_ranges[] = {
60 { .name = "PR", .range_min = RT5670_PR_BASE,
61 .range_max = RT5670_PR_BASE + 0xf8,
62 .selector_reg = RT5670_PRIV_INDEX,
63 .selector_mask = 0xff,
64 .selector_shift = 0x0,
65 .window_start = RT5670_PRIV_DATA,
66 .window_len = 0x1, },
67};
68
69static const struct reg_sequence init_list[] = {
70 { RT5670_PR_BASE + 0x14, 0x9a8a },
71 { RT5670_PR_BASE + 0x38, 0x1fe1 },
72 { RT5670_PR_BASE + 0x3d, 0x3640 },
73 { 0x8a, 0x0123 },
74};
75
76static const struct reg_default rt5670_reg[] = {
77 { 0x00, 0x0000 },
78 { 0x02, 0x8888 },
79 { 0x03, 0x8888 },
80 { 0x0a, 0x0001 },
81 { 0x0b, 0x0827 },
82 { 0x0c, 0x0000 },
83 { 0x0d, 0x0008 },
84 { 0x0e, 0x0000 },
85 { 0x0f, 0x0808 },
86 { 0x19, 0xafaf },
87 { 0x1a, 0xafaf },
88 { 0x1b, 0x0011 },
89 { 0x1c, 0x2f2f },
90 { 0x1d, 0x2f2f },
91 { 0x1e, 0x0000 },
92 { 0x1f, 0x2f2f },
93 { 0x20, 0x0000 },
94 { 0x26, 0x7860 },
95 { 0x27, 0x7860 },
96 { 0x28, 0x7871 },
97 { 0x29, 0x8080 },
98 { 0x2a, 0x5656 },
99 { 0x2b, 0x5454 },
100 { 0x2c, 0xaaa0 },
101 { 0x2d, 0x0000 },
102 { 0x2e, 0x2f2f },
103 { 0x2f, 0x1002 },
104 { 0x30, 0x0000 },
105 { 0x31, 0x5f00 },
106 { 0x32, 0x0000 },
107 { 0x33, 0x0000 },
108 { 0x34, 0x0000 },
109 { 0x35, 0x0000 },
110 { 0x36, 0x0000 },
111 { 0x37, 0x0000 },
112 { 0x38, 0x0000 },
113 { 0x3b, 0x0000 },
114 { 0x3c, 0x007f },
115 { 0x3d, 0x0000 },
116 { 0x3e, 0x007f },
117 { 0x45, 0xe00f },
118 { 0x4c, 0x5380 },
119 { 0x4f, 0x0073 },
120 { 0x52, 0x00d3 },
121 { 0x53, 0xf000 },
122 { 0x61, 0x0000 },
123 { 0x62, 0x0001 },
124 { 0x63, 0x00c3 },
125 { 0x64, 0x0000 },
126 { 0x65, 0x0001 },
127 { 0x66, 0x0000 },
128 { 0x6f, 0x8000 },
129 { 0x70, 0x8000 },
130 { 0x71, 0x8000 },
131 { 0x72, 0x8000 },
132 { 0x73, 0x7770 },
133 { 0x74, 0x0e00 },
134 { 0x75, 0x1505 },
135 { 0x76, 0x0015 },
136 { 0x77, 0x0c00 },
137 { 0x78, 0x4000 },
138 { 0x79, 0x0123 },
139 { 0x7f, 0x1100 },
140 { 0x80, 0x0000 },
141 { 0x81, 0x0000 },
142 { 0x82, 0x0000 },
143 { 0x83, 0x0000 },
144 { 0x84, 0x0000 },
145 { 0x85, 0x0000 },
146 { 0x86, 0x0004 },
147 { 0x87, 0x0000 },
148 { 0x88, 0x0000 },
149 { 0x89, 0x0000 },
150 { 0x8a, 0x0123 },
151 { 0x8b, 0x0000 },
152 { 0x8c, 0x0003 },
153 { 0x8d, 0x0000 },
154 { 0x8e, 0x0004 },
155 { 0x8f, 0x1100 },
156 { 0x90, 0x0646 },
157 { 0x91, 0x0c06 },
158 { 0x93, 0x0000 },
159 { 0x94, 0x1270 },
160 { 0x95, 0x1000 },
161 { 0x97, 0x0000 },
162 { 0x98, 0x0000 },
163 { 0x99, 0x0000 },
164 { 0x9a, 0x2184 },
165 { 0x9b, 0x010a },
166 { 0x9c, 0x0aea },
167 { 0x9d, 0x000c },
168 { 0x9e, 0x0400 },
169 { 0xae, 0x7000 },
170 { 0xaf, 0x0000 },
171 { 0xb0, 0x7000 },
172 { 0xb1, 0x0000 },
173 { 0xb2, 0x0000 },
174 { 0xb3, 0x001f },
175 { 0xb4, 0x220c },
176 { 0xb5, 0x1f00 },
177 { 0xb6, 0x0000 },
178 { 0xb7, 0x0000 },
179 { 0xbb, 0x0000 },
180 { 0xbc, 0x0000 },
181 { 0xbd, 0x0000 },
182 { 0xbe, 0x0000 },
183 { 0xbf, 0x0000 },
184 { 0xc0, 0x0000 },
185 { 0xc1, 0x0000 },
186 { 0xc2, 0x0000 },
187 { 0xcd, 0x0000 },
188 { 0xce, 0x0000 },
189 { 0xcf, 0x1813 },
190 { 0xd0, 0x0690 },
191 { 0xd1, 0x1c17 },
192 { 0xd3, 0xa220 },
193 { 0xd4, 0x0000 },
194 { 0xd6, 0x0400 },
195 { 0xd9, 0x0809 },
196 { 0xda, 0x0000 },
197 { 0xdb, 0x0001 },
198 { 0xdc, 0x0049 },
199 { 0xdd, 0x0024 },
200 { 0xe6, 0x8000 },
201 { 0xe7, 0x0000 },
202 { 0xec, 0xa200 },
203 { 0xed, 0x0000 },
204 { 0xee, 0xa200 },
205 { 0xef, 0x0000 },
206 { 0xf8, 0x0000 },
207 { 0xf9, 0x0000 },
208 { 0xfa, 0x8010 },
209 { 0xfb, 0x0033 },
210 { 0xfc, 0x0100 },
211};
212
213static bool rt5670_volatile_register(struct device *dev, unsigned int reg)
214{
215 int i;
216
217 for (i = 0; i < ARRAY_SIZE(rt5670_ranges); i++) {
218 if ((reg >= rt5670_ranges[i].window_start &&
219 reg <= rt5670_ranges[i].window_start +
220 rt5670_ranges[i].window_len) ||
221 (reg >= rt5670_ranges[i].range_min &&
222 reg <= rt5670_ranges[i].range_max)) {
223 return true;
224 }
225 }
226
227 switch (reg) {
228 case RT5670_RESET:
229 case RT5670_PDM_DATA_CTRL1:
230 case RT5670_PDM1_DATA_CTRL4:
231 case RT5670_PDM2_DATA_CTRL4:
232 case RT5670_PRIV_DATA:
233 case RT5670_ASRC_5:
234 case RT5670_CJ_CTRL1:
235 case RT5670_CJ_CTRL2:
236 case RT5670_CJ_CTRL3:
237 case RT5670_A_JD_CTRL1:
238 case RT5670_A_JD_CTRL2:
239 case RT5670_VAD_CTRL5:
240 case RT5670_ADC_EQ_CTRL1:
241 case RT5670_EQ_CTRL1:
242 case RT5670_ALC_CTRL_1:
243 case RT5670_IRQ_CTRL2:
244 case RT5670_INT_IRQ_ST:
245 case RT5670_IL_CMD:
246 case RT5670_DSP_CTRL1:
247 case RT5670_DSP_CTRL2:
248 case RT5670_DSP_CTRL3:
249 case RT5670_DSP_CTRL4:
250 case RT5670_DSP_CTRL5:
251 case RT5670_VENDOR_ID:
252 case RT5670_VENDOR_ID1:
253 case RT5670_VENDOR_ID2:
254 return true;
255 default:
256 return false;
257 }
258}
259
260static bool rt5670_readable_register(struct device *dev, unsigned int reg)
261{
262 int i;
263
264 for (i = 0; i < ARRAY_SIZE(rt5670_ranges); i++) {
265 if ((reg >= rt5670_ranges[i].window_start &&
266 reg <= rt5670_ranges[i].window_start +
267 rt5670_ranges[i].window_len) ||
268 (reg >= rt5670_ranges[i].range_min &&
269 reg <= rt5670_ranges[i].range_max)) {
270 return true;
271 }
272 }
273
274 switch (reg) {
275 case RT5670_RESET:
276 case RT5670_HP_VOL:
277 case RT5670_LOUT1:
278 case RT5670_CJ_CTRL1:
279 case RT5670_CJ_CTRL2:
280 case RT5670_CJ_CTRL3:
281 case RT5670_IN2:
282 case RT5670_INL1_INR1_VOL:
283 case RT5670_DAC1_DIG_VOL:
284 case RT5670_DAC2_DIG_VOL:
285 case RT5670_DAC_CTRL:
286 case RT5670_STO1_ADC_DIG_VOL:
287 case RT5670_MONO_ADC_DIG_VOL:
288 case RT5670_STO2_ADC_DIG_VOL:
289 case RT5670_ADC_BST_VOL1:
290 case RT5670_ADC_BST_VOL2:
291 case RT5670_STO2_ADC_MIXER:
292 case RT5670_STO1_ADC_MIXER:
293 case RT5670_MONO_ADC_MIXER:
294 case RT5670_AD_DA_MIXER:
295 case RT5670_STO_DAC_MIXER:
296 case RT5670_DD_MIXER:
297 case RT5670_DIG_MIXER:
298 case RT5670_DSP_PATH1:
299 case RT5670_DSP_PATH2:
300 case RT5670_DIG_INF1_DATA:
301 case RT5670_DIG_INF2_DATA:
302 case RT5670_PDM_OUT_CTRL:
303 case RT5670_PDM_DATA_CTRL1:
304 case RT5670_PDM1_DATA_CTRL2:
305 case RT5670_PDM1_DATA_CTRL3:
306 case RT5670_PDM1_DATA_CTRL4:
307 case RT5670_PDM2_DATA_CTRL2:
308 case RT5670_PDM2_DATA_CTRL3:
309 case RT5670_PDM2_DATA_CTRL4:
310 case RT5670_REC_L1_MIXER:
311 case RT5670_REC_L2_MIXER:
312 case RT5670_REC_R1_MIXER:
313 case RT5670_REC_R2_MIXER:
314 case RT5670_HPO_MIXER:
315 case RT5670_MONO_MIXER:
316 case RT5670_OUT_L1_MIXER:
317 case RT5670_OUT_R1_MIXER:
318 case RT5670_LOUT_MIXER:
319 case RT5670_PWR_DIG1:
320 case RT5670_PWR_DIG2:
321 case RT5670_PWR_ANLG1:
322 case RT5670_PWR_ANLG2:
323 case RT5670_PWR_MIXER:
324 case RT5670_PWR_VOL:
325 case RT5670_PRIV_INDEX:
326 case RT5670_PRIV_DATA:
327 case RT5670_I2S4_SDP:
328 case RT5670_I2S1_SDP:
329 case RT5670_I2S2_SDP:
330 case RT5670_I2S3_SDP:
331 case RT5670_ADDA_CLK1:
332 case RT5670_ADDA_CLK2:
333 case RT5670_DMIC_CTRL1:
334 case RT5670_DMIC_CTRL2:
335 case RT5670_TDM_CTRL_1:
336 case RT5670_TDM_CTRL_2:
337 case RT5670_TDM_CTRL_3:
338 case RT5670_DSP_CLK:
339 case RT5670_GLB_CLK:
340 case RT5670_PLL_CTRL1:
341 case RT5670_PLL_CTRL2:
342 case RT5670_ASRC_1:
343 case RT5670_ASRC_2:
344 case RT5670_ASRC_3:
345 case RT5670_ASRC_4:
346 case RT5670_ASRC_5:
347 case RT5670_ASRC_7:
348 case RT5670_ASRC_8:
349 case RT5670_ASRC_9:
350 case RT5670_ASRC_10:
351 case RT5670_ASRC_11:
352 case RT5670_ASRC_12:
353 case RT5670_ASRC_13:
354 case RT5670_ASRC_14:
355 case RT5670_DEPOP_M1:
356 case RT5670_DEPOP_M2:
357 case RT5670_DEPOP_M3:
358 case RT5670_CHARGE_PUMP:
359 case RT5670_MICBIAS:
360 case RT5670_A_JD_CTRL1:
361 case RT5670_A_JD_CTRL2:
362 case RT5670_VAD_CTRL1:
363 case RT5670_VAD_CTRL2:
364 case RT5670_VAD_CTRL3:
365 case RT5670_VAD_CTRL4:
366 case RT5670_VAD_CTRL5:
367 case RT5670_ADC_EQ_CTRL1:
368 case RT5670_ADC_EQ_CTRL2:
369 case RT5670_EQ_CTRL1:
370 case RT5670_EQ_CTRL2:
371 case RT5670_ALC_DRC_CTRL1:
372 case RT5670_ALC_DRC_CTRL2:
373 case RT5670_ALC_CTRL_1:
374 case RT5670_ALC_CTRL_2:
375 case RT5670_ALC_CTRL_3:
376 case RT5670_JD_CTRL:
377 case RT5670_IRQ_CTRL1:
378 case RT5670_IRQ_CTRL2:
379 case RT5670_INT_IRQ_ST:
380 case RT5670_GPIO_CTRL1:
381 case RT5670_GPIO_CTRL2:
382 case RT5670_GPIO_CTRL3:
383 case RT5670_SCRABBLE_FUN:
384 case RT5670_SCRABBLE_CTRL:
385 case RT5670_BASE_BACK:
386 case RT5670_MP3_PLUS1:
387 case RT5670_MP3_PLUS2:
388 case RT5670_ADJ_HPF1:
389 case RT5670_ADJ_HPF2:
390 case RT5670_HP_CALIB_AMP_DET:
391 case RT5670_SV_ZCD1:
392 case RT5670_SV_ZCD2:
393 case RT5670_IL_CMD:
394 case RT5670_IL_CMD2:
395 case RT5670_IL_CMD3:
396 case RT5670_DRC_HL_CTRL1:
397 case RT5670_DRC_HL_CTRL2:
398 case RT5670_ADC_MONO_HP_CTRL1:
399 case RT5670_ADC_MONO_HP_CTRL2:
400 case RT5670_ADC_STO2_HP_CTRL1:
401 case RT5670_ADC_STO2_HP_CTRL2:
402 case RT5670_JD_CTRL3:
403 case RT5670_JD_CTRL4:
404 case RT5670_DIG_MISC:
405 case RT5670_DSP_CTRL1:
406 case RT5670_DSP_CTRL2:
407 case RT5670_DSP_CTRL3:
408 case RT5670_DSP_CTRL4:
409 case RT5670_DSP_CTRL5:
410 case RT5670_GEN_CTRL2:
411 case RT5670_GEN_CTRL3:
412 case RT5670_VENDOR_ID:
413 case RT5670_VENDOR_ID1:
414 case RT5670_VENDOR_ID2:
415 return true;
416 default:
417 return false;
418 }
419}
420
421
422
423
424
425
426
427
428
429
430
431static int rt5670_headset_detect(struct snd_soc_component *component, int jack_insert)
432{
433 int val;
434 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
435 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
436
437 if (jack_insert) {
438 snd_soc_dapm_force_enable_pin(dapm, "Mic Det Power");
439 snd_soc_dapm_sync(dapm);
440 snd_soc_component_update_bits(component, RT5670_GEN_CTRL3, 0x4, 0x0);
441 snd_soc_component_update_bits(component, RT5670_CJ_CTRL2,
442 RT5670_CBJ_DET_MODE | RT5670_CBJ_MN_JD,
443 RT5670_CBJ_MN_JD);
444 snd_soc_component_write(component, RT5670_GPIO_CTRL2, 0x0004);
445 snd_soc_component_update_bits(component, RT5670_GPIO_CTRL1,
446 RT5670_GP1_PIN_MASK, RT5670_GP1_PIN_IRQ);
447 snd_soc_component_update_bits(component, RT5670_CJ_CTRL1,
448 RT5670_CBJ_BST1_EN, RT5670_CBJ_BST1_EN);
449 snd_soc_component_write(component, RT5670_JD_CTRL3, 0x00f0);
450 snd_soc_component_update_bits(component, RT5670_CJ_CTRL2,
451 RT5670_CBJ_MN_JD, RT5670_CBJ_MN_JD);
452 snd_soc_component_update_bits(component, RT5670_CJ_CTRL2,
453 RT5670_CBJ_MN_JD, 0);
454 msleep(300);
455 val = snd_soc_component_read(component, RT5670_CJ_CTRL3) & 0x7;
456 if (val == 0x1 || val == 0x2) {
457 rt5670->jack_type = SND_JACK_HEADSET;
458
459 snd_soc_component_update_bits(component, RT5670_INT_IRQ_ST, 0x8, 0x8);
460 snd_soc_component_update_bits(component, RT5670_IL_CMD, 0x40, 0x40);
461 snd_soc_component_read(component, RT5670_IL_CMD);
462 } else {
463 snd_soc_component_update_bits(component, RT5670_GEN_CTRL3, 0x4, 0x4);
464 rt5670->jack_type = SND_JACK_HEADPHONE;
465 snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
466 snd_soc_dapm_sync(dapm);
467 }
468 } else {
469 snd_soc_component_update_bits(component, RT5670_INT_IRQ_ST, 0x8, 0x0);
470 snd_soc_component_update_bits(component, RT5670_GEN_CTRL3, 0x4, 0x4);
471 rt5670->jack_type = 0;
472 snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
473 snd_soc_dapm_sync(dapm);
474 }
475
476 return rt5670->jack_type;
477}
478
479void rt5670_jack_suspend(struct snd_soc_component *component)
480{
481 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
482
483 rt5670->jack_type_saved = rt5670->jack_type;
484 rt5670_headset_detect(component, 0);
485}
486EXPORT_SYMBOL_GPL(rt5670_jack_suspend);
487
488void rt5670_jack_resume(struct snd_soc_component *component)
489{
490 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
491
492 if (rt5670->jack_type_saved)
493 rt5670_headset_detect(component, 1);
494}
495EXPORT_SYMBOL_GPL(rt5670_jack_resume);
496
497static int rt5670_button_detect(struct snd_soc_component *component)
498{
499 int btn_type, val;
500
501 val = snd_soc_component_read(component, RT5670_IL_CMD);
502 btn_type = val & 0xff80;
503 snd_soc_component_write(component, RT5670_IL_CMD, val);
504 if (btn_type != 0) {
505 msleep(20);
506 val = snd_soc_component_read(component, RT5670_IL_CMD);
507 snd_soc_component_write(component, RT5670_IL_CMD, val);
508 }
509
510 return btn_type;
511}
512
513static int rt5670_irq_detection(void *data)
514{
515 struct rt5670_priv *rt5670 = (struct rt5670_priv *)data;
516 struct snd_soc_jack_gpio *gpio = &rt5670->hp_gpio;
517 struct snd_soc_jack *jack = rt5670->jack;
518 int val, btn_type, report = jack->status;
519
520 if (rt5670->jd_mode == 1)
521 val = snd_soc_component_read(rt5670->component, RT5670_A_JD_CTRL1) & 0x0070;
522 else
523 val = snd_soc_component_read(rt5670->component, RT5670_A_JD_CTRL1) & 0x0020;
524
525 switch (val) {
526
527 case 0x30:
528 case 0x0:
529 if (rt5670->jack_type == 0) {
530 report = rt5670_headset_detect(rt5670->component, 1);
531
532 gpio->debounce_time = 25;
533 break;
534 }
535 btn_type = 0;
536 if (snd_soc_component_read(rt5670->component, RT5670_INT_IRQ_ST) & 0x4) {
537
538 report = SND_JACK_HEADSET;
539 btn_type = rt5670_button_detect(rt5670->component);
540 switch (btn_type) {
541 case 0x2000:
542 report |= SND_JACK_BTN_1;
543 break;
544 case 0x0400:
545 report |= SND_JACK_BTN_0;
546 break;
547 case 0x0080:
548 report |= SND_JACK_BTN_2;
549 break;
550 default:
551 dev_err(rt5670->component->dev,
552 "Unexpected button code 0x%04x\n",
553 btn_type);
554 break;
555 }
556 }
557 if (btn_type == 0)
558 report = rt5670->jack_type;
559
560 break;
561
562 case 0x70:
563 case 0x10:
564 case 0x20:
565 report = 0;
566 snd_soc_component_update_bits(rt5670->component, RT5670_INT_IRQ_ST, 0x1, 0x0);
567 rt5670_headset_detect(rt5670->component, 0);
568 gpio->debounce_time = 150;
569 break;
570 default:
571 break;
572 }
573
574 return report;
575}
576
577int rt5670_set_jack_detect(struct snd_soc_component *component,
578 struct snd_soc_jack *jack)
579{
580 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
581 int ret;
582
583 rt5670->jack = jack;
584 rt5670->hp_gpio.gpiod_dev = component->dev;
585 rt5670->hp_gpio.name = "headset";
586 rt5670->hp_gpio.report = SND_JACK_HEADSET |
587 SND_JACK_BTN_0 | SND_JACK_BTN_1 | SND_JACK_BTN_2;
588 rt5670->hp_gpio.debounce_time = 150;
589 rt5670->hp_gpio.wake = true;
590 rt5670->hp_gpio.data = (struct rt5670_priv *)rt5670;
591 rt5670->hp_gpio.jack_status_check = rt5670_irq_detection;
592
593 ret = snd_soc_jack_add_gpios(rt5670->jack, 1,
594 &rt5670->hp_gpio);
595 if (ret) {
596 dev_err(component->dev, "Adding jack GPIO failed\n");
597 return ret;
598 }
599
600 return 0;
601}
602EXPORT_SYMBOL_GPL(rt5670_set_jack_detect);
603
604static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
605static const DECLARE_TLV_DB_MINMAX(dac_vol_tlv, -6562, 0);
606static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
607static const DECLARE_TLV_DB_MINMAX(adc_vol_tlv, -1762, 3000);
608static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
609
610
611static const DECLARE_TLV_DB_RANGE(bst_tlv,
612 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
613 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
614 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
615 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
616 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
617 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
618 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0)
619);
620
621
622static const char * const rt5670_data_select[] = {
623 "Normal", "Swap", "left copy to right", "right copy to left"
624};
625
626static SOC_ENUM_SINGLE_DECL(rt5670_if2_dac_enum, RT5670_DIG_INF1_DATA,
627 RT5670_IF2_DAC_SEL_SFT, rt5670_data_select);
628
629static SOC_ENUM_SINGLE_DECL(rt5670_if2_adc_enum, RT5670_DIG_INF1_DATA,
630 RT5670_IF2_ADC_SEL_SFT, rt5670_data_select);
631
632static const struct snd_kcontrol_new rt5670_snd_controls[] = {
633
634 SOC_DOUBLE("HP Playback Switch", RT5670_HP_VOL,
635 RT5670_L_MUTE_SFT, RT5670_R_MUTE_SFT, 1, 1),
636 SOC_DOUBLE_TLV("HP Playback Volume", RT5670_HP_VOL,
637 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
638 39, 1, out_vol_tlv),
639
640 SOC_DOUBLE("OUT Channel Switch", RT5670_LOUT1,
641 RT5670_VOL_L_SFT, RT5670_VOL_R_SFT, 1, 1),
642 SOC_DOUBLE_TLV("OUT Playback Volume", RT5670_LOUT1,
643 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT, 39, 1, out_vol_tlv),
644
645 SOC_DOUBLE("DAC2 Playback Switch", RT5670_DAC_CTRL,
646 RT5670_M_DAC_L2_VOL_SFT, RT5670_M_DAC_R2_VOL_SFT, 1, 1),
647 SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5670_DAC1_DIG_VOL,
648 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
649 175, 0, dac_vol_tlv),
650 SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5670_DAC2_DIG_VOL,
651 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
652 175, 0, dac_vol_tlv),
653
654 SOC_SINGLE_TLV("IN1 Boost Volume", RT5670_CJ_CTRL1,
655 RT5670_BST_SFT1, 8, 0, bst_tlv),
656 SOC_SINGLE_TLV("IN2 Boost Volume", RT5670_IN2,
657 RT5670_BST_SFT1, 8, 0, bst_tlv),
658
659 SOC_DOUBLE_TLV("IN Capture Volume", RT5670_INL1_INR1_VOL,
660 RT5670_INL_VOL_SFT, RT5670_INR_VOL_SFT,
661 31, 1, in_vol_tlv),
662
663 SOC_DOUBLE("ADC Capture Switch", RT5670_STO1_ADC_DIG_VOL,
664 RT5670_L_MUTE_SFT, RT5670_R_MUTE_SFT, 1, 1),
665 SOC_DOUBLE_TLV("ADC Capture Volume", RT5670_STO1_ADC_DIG_VOL,
666 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
667 127, 0, adc_vol_tlv),
668
669 SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5670_MONO_ADC_DIG_VOL,
670 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
671 127, 0, adc_vol_tlv),
672
673
674 SOC_DOUBLE_TLV("STO1 ADC Boost Gain Volume", RT5670_ADC_BST_VOL1,
675 RT5670_STO1_ADC_L_BST_SFT, RT5670_STO1_ADC_R_BST_SFT,
676 3, 0, adc_bst_tlv),
677
678 SOC_DOUBLE_TLV("STO2 ADC Boost Gain Volume", RT5670_ADC_BST_VOL1,
679 RT5670_STO2_ADC_L_BST_SFT, RT5670_STO2_ADC_R_BST_SFT,
680 3, 0, adc_bst_tlv),
681
682 SOC_ENUM("ADC IF2 Data Switch", rt5670_if2_adc_enum),
683 SOC_ENUM("DAC IF2 Data Switch", rt5670_if2_dac_enum),
684};
685
686
687
688
689
690
691
692
693
694
695
696static int set_dmic_clk(struct snd_soc_dapm_widget *w,
697 struct snd_kcontrol *kcontrol, int event)
698{
699 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
700 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
701 int idx, rate;
702
703 rate = rt5670->sysclk / rl6231_get_pre_div(rt5670->regmap,
704 RT5670_ADDA_CLK1, RT5670_I2S_PD1_SFT);
705 idx = rl6231_calc_dmic_clk(rate);
706 if (idx < 0)
707 dev_err(component->dev, "Failed to set DMIC clock\n");
708 else
709 snd_soc_component_update_bits(component, RT5670_DMIC_CTRL1,
710 RT5670_DMIC_CLK_MASK, idx << RT5670_DMIC_CLK_SFT);
711 return idx;
712}
713
714static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source,
715 struct snd_soc_dapm_widget *sink)
716{
717 struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm);
718 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
719
720 if (rt5670->sysclk_src == RT5670_SCLK_S_PLL1)
721 return 1;
722 else
723 return 0;
724}
725
726static int is_using_asrc(struct snd_soc_dapm_widget *source,
727 struct snd_soc_dapm_widget *sink)
728{
729 struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm);
730 unsigned int reg, shift, val;
731
732 switch (source->shift) {
733 case 0:
734 reg = RT5670_ASRC_3;
735 shift = 0;
736 break;
737 case 1:
738 reg = RT5670_ASRC_3;
739 shift = 4;
740 break;
741 case 2:
742 reg = RT5670_ASRC_5;
743 shift = 12;
744 break;
745 case 3:
746 reg = RT5670_ASRC_2;
747 shift = 0;
748 break;
749 case 8:
750 reg = RT5670_ASRC_2;
751 shift = 4;
752 break;
753 case 9:
754 reg = RT5670_ASRC_2;
755 shift = 8;
756 break;
757 case 10:
758 reg = RT5670_ASRC_2;
759 shift = 12;
760 break;
761 default:
762 return 0;
763 }
764
765 val = (snd_soc_component_read(component, reg) >> shift) & 0xf;
766 switch (val) {
767 case 1:
768 case 2:
769 case 3:
770 case 4:
771 return 1;
772 default:
773 return 0;
774 }
775
776}
777
778static int can_use_asrc(struct snd_soc_dapm_widget *source,
779 struct snd_soc_dapm_widget *sink)
780{
781 struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm);
782 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
783
784 if (rt5670->sysclk > rt5670->lrck[RT5670_AIF1] * 384)
785 return 1;
786
787 return 0;
788}
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805int rt5670_sel_asrc_clk_src(struct snd_soc_component *component,
806 unsigned int filter_mask, unsigned int clk_src)
807{
808 unsigned int asrc2_mask = 0, asrc2_value = 0;
809 unsigned int asrc3_mask = 0, asrc3_value = 0;
810
811 if (clk_src > RT5670_CLK_SEL_SYS3)
812 return -EINVAL;
813
814 if (filter_mask & RT5670_DA_STEREO_FILTER) {
815 asrc2_mask |= RT5670_DA_STO_CLK_SEL_MASK;
816 asrc2_value = (asrc2_value & ~RT5670_DA_STO_CLK_SEL_MASK)
817 | (clk_src << RT5670_DA_STO_CLK_SEL_SFT);
818 }
819
820 if (filter_mask & RT5670_DA_MONO_L_FILTER) {
821 asrc2_mask |= RT5670_DA_MONOL_CLK_SEL_MASK;
822 asrc2_value = (asrc2_value & ~RT5670_DA_MONOL_CLK_SEL_MASK)
823 | (clk_src << RT5670_DA_MONOL_CLK_SEL_SFT);
824 }
825
826 if (filter_mask & RT5670_DA_MONO_R_FILTER) {
827 asrc2_mask |= RT5670_DA_MONOR_CLK_SEL_MASK;
828 asrc2_value = (asrc2_value & ~RT5670_DA_MONOR_CLK_SEL_MASK)
829 | (clk_src << RT5670_DA_MONOR_CLK_SEL_SFT);
830 }
831
832 if (filter_mask & RT5670_AD_STEREO_FILTER) {
833 asrc2_mask |= RT5670_AD_STO1_CLK_SEL_MASK;
834 asrc2_value = (asrc2_value & ~RT5670_AD_STO1_CLK_SEL_MASK)
835 | (clk_src << RT5670_AD_STO1_CLK_SEL_SFT);
836 }
837
838 if (filter_mask & RT5670_AD_MONO_L_FILTER) {
839 asrc3_mask |= RT5670_AD_MONOL_CLK_SEL_MASK;
840 asrc3_value = (asrc3_value & ~RT5670_AD_MONOL_CLK_SEL_MASK)
841 | (clk_src << RT5670_AD_MONOL_CLK_SEL_SFT);
842 }
843
844 if (filter_mask & RT5670_AD_MONO_R_FILTER) {
845 asrc3_mask |= RT5670_AD_MONOR_CLK_SEL_MASK;
846 asrc3_value = (asrc3_value & ~RT5670_AD_MONOR_CLK_SEL_MASK)
847 | (clk_src << RT5670_AD_MONOR_CLK_SEL_SFT);
848 }
849
850 if (filter_mask & RT5670_UP_RATE_FILTER) {
851 asrc3_mask |= RT5670_UP_CLK_SEL_MASK;
852 asrc3_value = (asrc3_value & ~RT5670_UP_CLK_SEL_MASK)
853 | (clk_src << RT5670_UP_CLK_SEL_SFT);
854 }
855
856 if (filter_mask & RT5670_DOWN_RATE_FILTER) {
857 asrc3_mask |= RT5670_DOWN_CLK_SEL_MASK;
858 asrc3_value = (asrc3_value & ~RT5670_DOWN_CLK_SEL_MASK)
859 | (clk_src << RT5670_DOWN_CLK_SEL_SFT);
860 }
861
862 if (asrc2_mask)
863 snd_soc_component_update_bits(component, RT5670_ASRC_2,
864 asrc2_mask, asrc2_value);
865
866 if (asrc3_mask)
867 snd_soc_component_update_bits(component, RT5670_ASRC_3,
868 asrc3_mask, asrc3_value);
869 return 0;
870}
871EXPORT_SYMBOL_GPL(rt5670_sel_asrc_clk_src);
872
873
874static const struct snd_kcontrol_new rt5670_sto1_adc_l_mix[] = {
875 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO1_ADC_MIXER,
876 RT5670_M_ADC_L1_SFT, 1, 1),
877 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO1_ADC_MIXER,
878 RT5670_M_ADC_L2_SFT, 1, 1),
879};
880
881static const struct snd_kcontrol_new rt5670_sto1_adc_r_mix[] = {
882 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO1_ADC_MIXER,
883 RT5670_M_ADC_R1_SFT, 1, 1),
884 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO1_ADC_MIXER,
885 RT5670_M_ADC_R2_SFT, 1, 1),
886};
887
888static const struct snd_kcontrol_new rt5670_sto2_adc_l_mix[] = {
889 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO2_ADC_MIXER,
890 RT5670_M_ADC_L1_SFT, 1, 1),
891 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO2_ADC_MIXER,
892 RT5670_M_ADC_L2_SFT, 1, 1),
893};
894
895static const struct snd_kcontrol_new rt5670_sto2_adc_r_mix[] = {
896 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO2_ADC_MIXER,
897 RT5670_M_ADC_R1_SFT, 1, 1),
898 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO2_ADC_MIXER,
899 RT5670_M_ADC_R2_SFT, 1, 1),
900};
901
902static const struct snd_kcontrol_new rt5670_mono_adc_l_mix[] = {
903 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_MONO_ADC_MIXER,
904 RT5670_M_MONO_ADC_L1_SFT, 1, 1),
905 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_MONO_ADC_MIXER,
906 RT5670_M_MONO_ADC_L2_SFT, 1, 1),
907};
908
909static const struct snd_kcontrol_new rt5670_mono_adc_r_mix[] = {
910 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_MONO_ADC_MIXER,
911 RT5670_M_MONO_ADC_R1_SFT, 1, 1),
912 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_MONO_ADC_MIXER,
913 RT5670_M_MONO_ADC_R2_SFT, 1, 1),
914};
915
916static const struct snd_kcontrol_new rt5670_dac_l_mix[] = {
917 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5670_AD_DA_MIXER,
918 RT5670_M_ADCMIX_L_SFT, 1, 1),
919 SOC_DAPM_SINGLE("DAC1 Switch", RT5670_AD_DA_MIXER,
920 RT5670_M_DAC1_L_SFT, 1, 1),
921};
922
923static const struct snd_kcontrol_new rt5670_dac_r_mix[] = {
924 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5670_AD_DA_MIXER,
925 RT5670_M_ADCMIX_R_SFT, 1, 1),
926 SOC_DAPM_SINGLE("DAC1 Switch", RT5670_AD_DA_MIXER,
927 RT5670_M_DAC1_R_SFT, 1, 1),
928};
929
930static const struct snd_kcontrol_new rt5670_sto_dac_l_mix[] = {
931 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_STO_DAC_MIXER,
932 RT5670_M_DAC_L1_SFT, 1, 1),
933 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_STO_DAC_MIXER,
934 RT5670_M_DAC_L2_SFT, 1, 1),
935 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_STO_DAC_MIXER,
936 RT5670_M_DAC_R1_STO_L_SFT, 1, 1),
937};
938
939static const struct snd_kcontrol_new rt5670_sto_dac_r_mix[] = {
940 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_STO_DAC_MIXER,
941 RT5670_M_DAC_R1_SFT, 1, 1),
942 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_STO_DAC_MIXER,
943 RT5670_M_DAC_R2_SFT, 1, 1),
944 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_STO_DAC_MIXER,
945 RT5670_M_DAC_L1_STO_R_SFT, 1, 1),
946};
947
948static const struct snd_kcontrol_new rt5670_mono_dac_l_mix[] = {
949 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_DD_MIXER,
950 RT5670_M_DAC_L1_MONO_L_SFT, 1, 1),
951 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DD_MIXER,
952 RT5670_M_DAC_L2_MONO_L_SFT, 1, 1),
953 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DD_MIXER,
954 RT5670_M_DAC_R2_MONO_L_SFT, 1, 1),
955};
956
957static const struct snd_kcontrol_new rt5670_mono_dac_r_mix[] = {
958 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_DD_MIXER,
959 RT5670_M_DAC_R1_MONO_R_SFT, 1, 1),
960 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DD_MIXER,
961 RT5670_M_DAC_R2_MONO_R_SFT, 1, 1),
962 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DD_MIXER,
963 RT5670_M_DAC_L2_MONO_R_SFT, 1, 1),
964};
965
966static const struct snd_kcontrol_new rt5670_dig_l_mix[] = {
967 SOC_DAPM_SINGLE("Sto DAC Mix L Switch", RT5670_DIG_MIXER,
968 RT5670_M_STO_L_DAC_L_SFT, 1, 1),
969 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DIG_MIXER,
970 RT5670_M_DAC_L2_DAC_L_SFT, 1, 1),
971 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DIG_MIXER,
972 RT5670_M_DAC_R2_DAC_L_SFT, 1, 1),
973};
974
975static const struct snd_kcontrol_new rt5670_dig_r_mix[] = {
976 SOC_DAPM_SINGLE("Sto DAC Mix R Switch", RT5670_DIG_MIXER,
977 RT5670_M_STO_R_DAC_R_SFT, 1, 1),
978 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DIG_MIXER,
979 RT5670_M_DAC_R2_DAC_R_SFT, 1, 1),
980 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DIG_MIXER,
981 RT5670_M_DAC_L2_DAC_R_SFT, 1, 1),
982};
983
984
985static const struct snd_kcontrol_new rt5670_rec_l_mix[] = {
986 SOC_DAPM_SINGLE("INL Switch", RT5670_REC_L2_MIXER,
987 RT5670_M_IN_L_RM_L_SFT, 1, 1),
988 SOC_DAPM_SINGLE("BST2 Switch", RT5670_REC_L2_MIXER,
989 RT5670_M_BST2_RM_L_SFT, 1, 1),
990 SOC_DAPM_SINGLE("BST1 Switch", RT5670_REC_L2_MIXER,
991 RT5670_M_BST1_RM_L_SFT, 1, 1),
992};
993
994static const struct snd_kcontrol_new rt5670_rec_r_mix[] = {
995 SOC_DAPM_SINGLE("INR Switch", RT5670_REC_R2_MIXER,
996 RT5670_M_IN_R_RM_R_SFT, 1, 1),
997 SOC_DAPM_SINGLE("BST2 Switch", RT5670_REC_R2_MIXER,
998 RT5670_M_BST2_RM_R_SFT, 1, 1),
999 SOC_DAPM_SINGLE("BST1 Switch", RT5670_REC_R2_MIXER,
1000 RT5670_M_BST1_RM_R_SFT, 1, 1),
1001};
1002
1003static const struct snd_kcontrol_new rt5670_out_l_mix[] = {
1004 SOC_DAPM_SINGLE("BST1 Switch", RT5670_OUT_L1_MIXER,
1005 RT5670_M_BST1_OM_L_SFT, 1, 1),
1006 SOC_DAPM_SINGLE("INL Switch", RT5670_OUT_L1_MIXER,
1007 RT5670_M_IN_L_OM_L_SFT, 1, 1),
1008 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_OUT_L1_MIXER,
1009 RT5670_M_DAC_L2_OM_L_SFT, 1, 1),
1010 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_OUT_L1_MIXER,
1011 RT5670_M_DAC_L1_OM_L_SFT, 1, 1),
1012};
1013
1014static const struct snd_kcontrol_new rt5670_out_r_mix[] = {
1015 SOC_DAPM_SINGLE("BST2 Switch", RT5670_OUT_R1_MIXER,
1016 RT5670_M_BST2_OM_R_SFT, 1, 1),
1017 SOC_DAPM_SINGLE("INR Switch", RT5670_OUT_R1_MIXER,
1018 RT5670_M_IN_R_OM_R_SFT, 1, 1),
1019 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_OUT_R1_MIXER,
1020 RT5670_M_DAC_R2_OM_R_SFT, 1, 1),
1021 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_OUT_R1_MIXER,
1022 RT5670_M_DAC_R1_OM_R_SFT, 1, 1),
1023};
1024
1025static const struct snd_kcontrol_new rt5670_hpo_mix[] = {
1026 SOC_DAPM_SINGLE("DAC1 Switch", RT5670_HPO_MIXER,
1027 RT5670_M_DAC1_HM_SFT, 1, 1),
1028 SOC_DAPM_SINGLE("HPVOL Switch", RT5670_HPO_MIXER,
1029 RT5670_M_HPVOL_HM_SFT, 1, 1),
1030};
1031
1032static const struct snd_kcontrol_new rt5670_hpvoll_mix[] = {
1033 SOC_DAPM_SINGLE("DAC1 Switch", RT5670_HPO_MIXER,
1034 RT5670_M_DACL1_HML_SFT, 1, 1),
1035 SOC_DAPM_SINGLE("INL Switch", RT5670_HPO_MIXER,
1036 RT5670_M_INL1_HML_SFT, 1, 1),
1037};
1038
1039static const struct snd_kcontrol_new rt5670_hpvolr_mix[] = {
1040 SOC_DAPM_SINGLE("DAC1 Switch", RT5670_HPO_MIXER,
1041 RT5670_M_DACR1_HMR_SFT, 1, 1),
1042 SOC_DAPM_SINGLE("INR Switch", RT5670_HPO_MIXER,
1043 RT5670_M_INR1_HMR_SFT, 1, 1),
1044};
1045
1046static const struct snd_kcontrol_new rt5670_lout_mix[] = {
1047 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_LOUT_MIXER,
1048 RT5670_M_DAC_L1_LM_SFT, 1, 1),
1049 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_LOUT_MIXER,
1050 RT5670_M_DAC_R1_LM_SFT, 1, 1),
1051 SOC_DAPM_SINGLE("OUTMIX L Switch", RT5670_LOUT_MIXER,
1052 RT5670_M_OV_L_LM_SFT, 1, 1),
1053 SOC_DAPM_SINGLE("OUTMIX R Switch", RT5670_LOUT_MIXER,
1054 RT5670_M_OV_R_LM_SFT, 1, 1),
1055};
1056
1057static const struct snd_kcontrol_new lout_l_enable_control =
1058 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5670_LOUT1,
1059 RT5670_L_MUTE_SFT, 1, 1);
1060
1061static const struct snd_kcontrol_new lout_r_enable_control =
1062 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5670_LOUT1,
1063 RT5670_R_MUTE_SFT, 1, 1);
1064
1065
1066static const char * const rt5670_dac1_src[] = {
1067 "IF1 DAC", "IF2 DAC"
1068};
1069
1070static SOC_ENUM_SINGLE_DECL(rt5670_dac1l_enum, RT5670_AD_DA_MIXER,
1071 RT5670_DAC1_L_SEL_SFT, rt5670_dac1_src);
1072
1073static const struct snd_kcontrol_new rt5670_dac1l_mux =
1074 SOC_DAPM_ENUM("DAC1 L source", rt5670_dac1l_enum);
1075
1076static SOC_ENUM_SINGLE_DECL(rt5670_dac1r_enum, RT5670_AD_DA_MIXER,
1077 RT5670_DAC1_R_SEL_SFT, rt5670_dac1_src);
1078
1079static const struct snd_kcontrol_new rt5670_dac1r_mux =
1080 SOC_DAPM_ENUM("DAC1 R source", rt5670_dac1r_enum);
1081
1082
1083
1084static const char * const rt5670_dac12_src[] = {
1085 "IF1 DAC", "IF2 DAC", "IF3 DAC", "TxDC DAC",
1086 "Bass", "VAD_ADC", "IF4 DAC"
1087};
1088
1089static SOC_ENUM_SINGLE_DECL(rt5670_dac2l_enum, RT5670_DAC_CTRL,
1090 RT5670_DAC2_L_SEL_SFT, rt5670_dac12_src);
1091
1092static const struct snd_kcontrol_new rt5670_dac_l2_mux =
1093 SOC_DAPM_ENUM("DAC2 L source", rt5670_dac2l_enum);
1094
1095static const char * const rt5670_dacr2_src[] = {
1096 "IF1 DAC", "IF2 DAC", "IF3 DAC", "TxDC DAC", "TxDP ADC", "IF4 DAC"
1097};
1098
1099static SOC_ENUM_SINGLE_DECL(rt5670_dac2r_enum, RT5670_DAC_CTRL,
1100 RT5670_DAC2_R_SEL_SFT, rt5670_dacr2_src);
1101
1102static const struct snd_kcontrol_new rt5670_dac_r2_mux =
1103 SOC_DAPM_ENUM("DAC2 R source", rt5670_dac2r_enum);
1104
1105
1106static const char * const rt5670_rxdp_src[] = {
1107 "IF2 DAC", "IF1 DAC", "STO1 ADC Mixer", "STO2 ADC Mixer",
1108 "Mono ADC Mixer L", "Mono ADC Mixer R", "DAC1"
1109};
1110
1111static SOC_ENUM_SINGLE_DECL(rt5670_rxdp_enum, RT5670_DSP_PATH1,
1112 RT5670_RXDP_SEL_SFT, rt5670_rxdp_src);
1113
1114static const struct snd_kcontrol_new rt5670_rxdp_mux =
1115 SOC_DAPM_ENUM("DAC2 L source", rt5670_rxdp_enum);
1116
1117
1118static const char * const rt5670_dsp_bypass_src[] = {
1119 "DSP", "Bypass"
1120};
1121
1122static SOC_ENUM_SINGLE_DECL(rt5670_dsp_ul_enum, RT5670_DSP_PATH1,
1123 RT5670_DSP_UL_SFT, rt5670_dsp_bypass_src);
1124
1125static const struct snd_kcontrol_new rt5670_dsp_ul_mux =
1126 SOC_DAPM_ENUM("DSP UL source", rt5670_dsp_ul_enum);
1127
1128static SOC_ENUM_SINGLE_DECL(rt5670_dsp_dl_enum, RT5670_DSP_PATH1,
1129 RT5670_DSP_DL_SFT, rt5670_dsp_bypass_src);
1130
1131static const struct snd_kcontrol_new rt5670_dsp_dl_mux =
1132 SOC_DAPM_ENUM("DSP DL source", rt5670_dsp_dl_enum);
1133
1134
1135
1136static const char * const rt5670_stereo2_adc_lr_src[] = {
1137 "L", "LR"
1138};
1139
1140static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc_lr_enum, RT5670_STO2_ADC_MIXER,
1141 RT5670_STO2_ADC_SRC_SFT, rt5670_stereo2_adc_lr_src);
1142
1143static const struct snd_kcontrol_new rt5670_sto2_adc_lr_mux =
1144 SOC_DAPM_ENUM("Stereo2 ADC LR source", rt5670_stereo2_adc_lr_enum);
1145
1146
1147
1148static const char * const rt5670_stereo_adc1_src[] = {
1149 "DAC MIX", "ADC"
1150};
1151
1152static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_adc1_enum, RT5670_STO1_ADC_MIXER,
1153 RT5670_ADC_1_SRC_SFT, rt5670_stereo_adc1_src);
1154
1155static const struct snd_kcontrol_new rt5670_sto_adc_1_mux =
1156 SOC_DAPM_ENUM("Stereo1 ADC 1 Mux", rt5670_stereo1_adc1_enum);
1157
1158static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc1_enum, RT5670_STO2_ADC_MIXER,
1159 RT5670_ADC_1_SRC_SFT, rt5670_stereo_adc1_src);
1160
1161static const struct snd_kcontrol_new rt5670_sto2_adc_1_mux =
1162 SOC_DAPM_ENUM("Stereo2 ADC 1 Mux", rt5670_stereo2_adc1_enum);
1163
1164
1165
1166static const char * const rt5670_stereo_adc2_src[] = {
1167 "DAC MIX", "DMIC"
1168};
1169
1170static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_adc2_enum, RT5670_STO1_ADC_MIXER,
1171 RT5670_ADC_2_SRC_SFT, rt5670_stereo_adc2_src);
1172
1173static const struct snd_kcontrol_new rt5670_sto_adc_2_mux =
1174 SOC_DAPM_ENUM("Stereo1 ADC 2 Mux", rt5670_stereo1_adc2_enum);
1175
1176static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc2_enum, RT5670_STO2_ADC_MIXER,
1177 RT5670_ADC_2_SRC_SFT, rt5670_stereo_adc2_src);
1178
1179static const struct snd_kcontrol_new rt5670_sto2_adc_2_mux =
1180 SOC_DAPM_ENUM("Stereo2 ADC 2 Mux", rt5670_stereo2_adc2_enum);
1181
1182
1183static const char * const rt5670_stereo_dmic_src[] = {
1184 "DMIC1", "DMIC2", "DMIC3"
1185};
1186
1187static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_dmic_enum, RT5670_STO1_ADC_MIXER,
1188 RT5670_DMIC_SRC_SFT, rt5670_stereo_dmic_src);
1189
1190static const struct snd_kcontrol_new rt5670_sto1_dmic_mux =
1191 SOC_DAPM_ENUM("Stereo1 DMIC source", rt5670_stereo1_dmic_enum);
1192
1193static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_dmic_enum, RT5670_STO2_ADC_MIXER,
1194 RT5670_DMIC_SRC_SFT, rt5670_stereo_dmic_src);
1195
1196static const struct snd_kcontrol_new rt5670_sto2_dmic_mux =
1197 SOC_DAPM_ENUM("Stereo2 DMIC source", rt5670_stereo2_dmic_enum);
1198
1199
1200
1201static const char * const rt5670_mono_adc_l1_src[] = {
1202 "Mono DAC MIXL", "ADC1"
1203};
1204
1205static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_l1_enum, RT5670_MONO_ADC_MIXER,
1206 RT5670_MONO_ADC_L1_SRC_SFT, rt5670_mono_adc_l1_src);
1207
1208static const struct snd_kcontrol_new rt5670_mono_adc_l1_mux =
1209 SOC_DAPM_ENUM("Mono ADC1 left source", rt5670_mono_adc_l1_enum);
1210
1211static const char * const rt5670_mono_adc_l2_src[] = {
1212 "Mono DAC MIXL", "DMIC"
1213};
1214
1215static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_l2_enum, RT5670_MONO_ADC_MIXER,
1216 RT5670_MONO_ADC_L2_SRC_SFT, rt5670_mono_adc_l2_src);
1217
1218static const struct snd_kcontrol_new rt5670_mono_adc_l2_mux =
1219 SOC_DAPM_ENUM("Mono ADC2 left source", rt5670_mono_adc_l2_enum);
1220
1221
1222static const char * const rt5670_mono_dmic_src[] = {
1223 "DMIC1", "DMIC2", "DMIC3"
1224};
1225
1226static SOC_ENUM_SINGLE_DECL(rt5670_mono_dmic_l_enum, RT5670_MONO_ADC_MIXER,
1227 RT5670_MONO_DMIC_L_SRC_SFT, rt5670_mono_dmic_src);
1228
1229static const struct snd_kcontrol_new rt5670_mono_dmic_l_mux =
1230 SOC_DAPM_ENUM("Mono DMIC left source", rt5670_mono_dmic_l_enum);
1231
1232static SOC_ENUM_SINGLE_DECL(rt5670_mono_dmic_r_enum, RT5670_MONO_ADC_MIXER,
1233 RT5670_MONO_DMIC_R_SRC_SFT, rt5670_mono_dmic_src);
1234
1235static const struct snd_kcontrol_new rt5670_mono_dmic_r_mux =
1236 SOC_DAPM_ENUM("Mono DMIC Right source", rt5670_mono_dmic_r_enum);
1237
1238static const char * const rt5670_mono_adc_r1_src[] = {
1239 "Mono DAC MIXR", "ADC2"
1240};
1241
1242static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_r1_enum, RT5670_MONO_ADC_MIXER,
1243 RT5670_MONO_ADC_R1_SRC_SFT, rt5670_mono_adc_r1_src);
1244
1245static const struct snd_kcontrol_new rt5670_mono_adc_r1_mux =
1246 SOC_DAPM_ENUM("Mono ADC1 right source", rt5670_mono_adc_r1_enum);
1247
1248static const char * const rt5670_mono_adc_r2_src[] = {
1249 "Mono DAC MIXR", "DMIC"
1250};
1251
1252static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_r2_enum, RT5670_MONO_ADC_MIXER,
1253 RT5670_MONO_ADC_R2_SRC_SFT, rt5670_mono_adc_r2_src);
1254
1255static const struct snd_kcontrol_new rt5670_mono_adc_r2_mux =
1256 SOC_DAPM_ENUM("Mono ADC2 right source", rt5670_mono_adc_r2_enum);
1257
1258
1259static const char * const rt5670_txdp_slot_src[] = {
1260 "Slot 0-1", "Slot 2-3", "Slot 4-5", "Slot 6-7"
1261};
1262
1263static SOC_ENUM_SINGLE_DECL(rt5670_txdp_slot_enum, RT5670_DSP_PATH1,
1264 RT5670_TXDP_SLOT_SEL_SFT, rt5670_txdp_slot_src);
1265
1266static const struct snd_kcontrol_new rt5670_txdp_slot_mux =
1267 SOC_DAPM_ENUM("TxDP Slot source", rt5670_txdp_slot_enum);
1268
1269
1270static const char * const rt5670_if1_adc2_in_src[] = {
1271 "IF_ADC2", "VAD_ADC"
1272};
1273
1274static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc2_in_enum, RT5670_DIG_INF1_DATA,
1275 RT5670_IF1_ADC2_IN_SFT, rt5670_if1_adc2_in_src);
1276
1277static const struct snd_kcontrol_new rt5670_if1_adc2_in_mux =
1278 SOC_DAPM_ENUM("IF1 ADC2 IN source", rt5670_if1_adc2_in_enum);
1279
1280
1281static const char * const rt5670_if2_adc_in_src[] = {
1282 "IF_ADC1", "IF_ADC2", "IF_ADC3", "TxDC_DAC", "TxDP_ADC", "VAD_ADC"
1283};
1284
1285static SOC_ENUM_SINGLE_DECL(rt5670_if2_adc_in_enum, RT5670_DIG_INF1_DATA,
1286 RT5670_IF2_ADC_IN_SFT, rt5670_if2_adc_in_src);
1287
1288static const struct snd_kcontrol_new rt5670_if2_adc_in_mux =
1289 SOC_DAPM_ENUM("IF2 ADC IN source", rt5670_if2_adc_in_enum);
1290
1291
1292static const char * const rt5670_pdm_src[] = {
1293 "Mono DAC", "Stereo DAC"
1294};
1295
1296static SOC_ENUM_SINGLE_DECL(rt5670_pdm1_l_enum, RT5670_PDM_OUT_CTRL,
1297 RT5670_PDM1_L_SFT, rt5670_pdm_src);
1298
1299static const struct snd_kcontrol_new rt5670_pdm1_l_mux =
1300 SOC_DAPM_ENUM("PDM1 L source", rt5670_pdm1_l_enum);
1301
1302static SOC_ENUM_SINGLE_DECL(rt5670_pdm1_r_enum, RT5670_PDM_OUT_CTRL,
1303 RT5670_PDM1_R_SFT, rt5670_pdm_src);
1304
1305static const struct snd_kcontrol_new rt5670_pdm1_r_mux =
1306 SOC_DAPM_ENUM("PDM1 R source", rt5670_pdm1_r_enum);
1307
1308static SOC_ENUM_SINGLE_DECL(rt5670_pdm2_l_enum, RT5670_PDM_OUT_CTRL,
1309 RT5670_PDM2_L_SFT, rt5670_pdm_src);
1310
1311static const struct snd_kcontrol_new rt5670_pdm2_l_mux =
1312 SOC_DAPM_ENUM("PDM2 L source", rt5670_pdm2_l_enum);
1313
1314static SOC_ENUM_SINGLE_DECL(rt5670_pdm2_r_enum, RT5670_PDM_OUT_CTRL,
1315 RT5670_PDM2_R_SFT, rt5670_pdm_src);
1316
1317static const struct snd_kcontrol_new rt5670_pdm2_r_mux =
1318 SOC_DAPM_ENUM("PDM2 R source", rt5670_pdm2_r_enum);
1319
1320
1321static const char * const rt5670_if1_adc1_in1_src[] = {
1322 "IF_ADC1", "IF1_ADC3"
1323};
1324
1325static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc1_in1_enum, RT5670_DIG_MISC,
1326 RT5670_IF1_ADC1_IN1_SFT, rt5670_if1_adc1_in1_src);
1327
1328static const struct snd_kcontrol_new rt5670_if1_adc1_in1_mux =
1329 SOC_DAPM_ENUM("IF1 ADC1 IN1 source", rt5670_if1_adc1_in1_enum);
1330
1331
1332static const char * const rt5670_if1_adc1_in2_src[] = {
1333 "IF1_ADC1_IN1", "IF1_ADC4"
1334};
1335
1336static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc1_in2_enum, RT5670_DIG_MISC,
1337 RT5670_IF1_ADC1_IN2_SFT, rt5670_if1_adc1_in2_src);
1338
1339static const struct snd_kcontrol_new rt5670_if1_adc1_in2_mux =
1340 SOC_DAPM_ENUM("IF1 ADC1 IN2 source", rt5670_if1_adc1_in2_enum);
1341
1342
1343static const char * const rt5670_if1_adc2_in1_src[] = {
1344 "IF1_ADC2_IN", "IF1_ADC4"
1345};
1346
1347static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc2_in1_enum, RT5670_DIG_MISC,
1348 RT5670_IF1_ADC2_IN1_SFT, rt5670_if1_adc2_in1_src);
1349
1350static const struct snd_kcontrol_new rt5670_if1_adc2_in1_mux =
1351 SOC_DAPM_ENUM("IF1 ADC2 IN1 source", rt5670_if1_adc2_in1_enum);
1352
1353
1354static const char * const rt5670_vad_adc_src[] = {
1355 "Sto1 ADC L", "Mono ADC L", "Mono ADC R", "Sto2 ADC L"
1356};
1357
1358static SOC_ENUM_SINGLE_DECL(rt5670_vad_adc_enum, RT5670_VAD_CTRL4,
1359 RT5670_VAD_SEL_SFT, rt5670_vad_adc_src);
1360
1361static const struct snd_kcontrol_new rt5670_vad_adc_mux =
1362 SOC_DAPM_ENUM("VAD ADC source", rt5670_vad_adc_enum);
1363
1364static int rt5670_hp_power_event(struct snd_soc_dapm_widget *w,
1365 struct snd_kcontrol *kcontrol, int event)
1366{
1367 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1368 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
1369
1370 switch (event) {
1371 case SND_SOC_DAPM_POST_PMU:
1372 regmap_update_bits(rt5670->regmap, RT5670_CHARGE_PUMP,
1373 RT5670_PM_HP_MASK, RT5670_PM_HP_HV);
1374 regmap_update_bits(rt5670->regmap, RT5670_GEN_CTRL2,
1375 0x0400, 0x0400);
1376
1377 regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1,
1378 RT5670_PWR_HA | RT5670_PWR_FV1 |
1379 RT5670_PWR_FV2, RT5670_PWR_HA |
1380 RT5670_PWR_FV1 | RT5670_PWR_FV2);
1381
1382 regmap_write(rt5670->regmap, RT5670_DEPOP_M2, 0x3100);
1383 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8009);
1384 regmap_write(rt5670->regmap, RT5670_PR_BASE +
1385 RT5670_HP_DCC_INT1, 0x9f00);
1386 mdelay(20);
1387 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8019);
1388 break;
1389 case SND_SOC_DAPM_PRE_PMD:
1390 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x0004);
1391 msleep(30);
1392 break;
1393 default:
1394 return 0;
1395 }
1396
1397 return 0;
1398}
1399
1400static int rt5670_hp_event(struct snd_soc_dapm_widget *w,
1401 struct snd_kcontrol *kcontrol, int event)
1402{
1403 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1404 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
1405
1406 switch (event) {
1407 case SND_SOC_DAPM_POST_PMU:
1408
1409 regmap_write(rt5670->regmap, RT5670_PR_BASE +
1410 RT5670_MAMP_INT_REG2, 0xb400);
1411 regmap_write(rt5670->regmap, RT5670_DEPOP_M3, 0x0772);
1412 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x805d);
1413 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x831d);
1414 regmap_update_bits(rt5670->regmap, RT5670_GEN_CTRL2,
1415 0x0300, 0x0300);
1416 regmap_update_bits(rt5670->regmap, RT5670_HP_VOL,
1417 RT5670_L_MUTE | RT5670_R_MUTE, 0);
1418 msleep(80);
1419 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8019);
1420 break;
1421
1422 case SND_SOC_DAPM_PRE_PMD:
1423
1424 regmap_write(rt5670->regmap, RT5670_PR_BASE +
1425 RT5670_MAMP_INT_REG2, 0xb400);
1426 regmap_write(rt5670->regmap, RT5670_DEPOP_M3, 0x0772);
1427 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x803d);
1428 mdelay(10);
1429 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x831d);
1430 mdelay(10);
1431 regmap_update_bits(rt5670->regmap, RT5670_HP_VOL,
1432 RT5670_L_MUTE | RT5670_R_MUTE,
1433 RT5670_L_MUTE | RT5670_R_MUTE);
1434 msleep(20);
1435 regmap_update_bits(rt5670->regmap,
1436 RT5670_GEN_CTRL2, 0x0300, 0x0);
1437 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8019);
1438 regmap_write(rt5670->regmap, RT5670_DEPOP_M3, 0x0707);
1439 regmap_write(rt5670->regmap, RT5670_PR_BASE +
1440 RT5670_MAMP_INT_REG2, 0xfc00);
1441 break;
1442
1443 default:
1444 return 0;
1445 }
1446
1447 return 0;
1448}
1449
1450static int rt5670_spk_event(struct snd_soc_dapm_widget *w,
1451 struct snd_kcontrol *kcontrol, int event)
1452{
1453 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1454 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
1455
1456 if (!rt5670->gpio1_is_ext_spk_en)
1457 return 0;
1458
1459 switch (event) {
1460 case SND_SOC_DAPM_POST_PMU:
1461 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL2,
1462 RT5670_GP1_OUT_MASK, RT5670_GP1_OUT_HI);
1463 break;
1464
1465 case SND_SOC_DAPM_PRE_PMD:
1466 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL2,
1467 RT5670_GP1_OUT_MASK, RT5670_GP1_OUT_LO);
1468 break;
1469
1470 default:
1471 return 0;
1472 }
1473
1474 return 0;
1475}
1476
1477static int rt5670_bst1_event(struct snd_soc_dapm_widget *w,
1478 struct snd_kcontrol *kcontrol, int event)
1479{
1480 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1481
1482 switch (event) {
1483 case SND_SOC_DAPM_POST_PMU:
1484 snd_soc_component_update_bits(component, RT5670_PWR_ANLG2,
1485 RT5670_PWR_BST1_P, RT5670_PWR_BST1_P);
1486 break;
1487
1488 case SND_SOC_DAPM_PRE_PMD:
1489 snd_soc_component_update_bits(component, RT5670_PWR_ANLG2,
1490 RT5670_PWR_BST1_P, 0);
1491 break;
1492
1493 default:
1494 return 0;
1495 }
1496
1497 return 0;
1498}
1499
1500static int rt5670_bst2_event(struct snd_soc_dapm_widget *w,
1501 struct snd_kcontrol *kcontrol, int event)
1502{
1503 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1504
1505 switch (event) {
1506 case SND_SOC_DAPM_POST_PMU:
1507 snd_soc_component_update_bits(component, RT5670_PWR_ANLG2,
1508 RT5670_PWR_BST2_P, RT5670_PWR_BST2_P);
1509 break;
1510
1511 case SND_SOC_DAPM_PRE_PMD:
1512 snd_soc_component_update_bits(component, RT5670_PWR_ANLG2,
1513 RT5670_PWR_BST2_P, 0);
1514 break;
1515
1516 default:
1517 return 0;
1518 }
1519
1520 return 0;
1521}
1522
1523static const struct snd_soc_dapm_widget rt5670_dapm_widgets[] = {
1524 SND_SOC_DAPM_SUPPLY("PLL1", RT5670_PWR_ANLG2,
1525 RT5670_PWR_PLL_BIT, 0, NULL, 0),
1526 SND_SOC_DAPM_SUPPLY("I2S DSP", RT5670_PWR_DIG2,
1527 RT5670_PWR_I2S_DSP_BIT, 0, NULL, 0),
1528 SND_SOC_DAPM_SUPPLY("Mic Det Power", RT5670_PWR_VOL,
1529 RT5670_PWR_MIC_DET_BIT, 0, NULL, 0),
1530
1531
1532 SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5670_ASRC_1,
1533 11, 0, NULL, 0),
1534 SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5670_ASRC_1,
1535 12, 0, NULL, 0),
1536 SND_SOC_DAPM_SUPPLY_S("DAC STO ASRC", 1, RT5670_ASRC_1,
1537 10, 0, NULL, 0),
1538 SND_SOC_DAPM_SUPPLY_S("DAC MONO L ASRC", 1, RT5670_ASRC_1,
1539 9, 0, NULL, 0),
1540 SND_SOC_DAPM_SUPPLY_S("DAC MONO R ASRC", 1, RT5670_ASRC_1,
1541 8, 0, NULL, 0),
1542 SND_SOC_DAPM_SUPPLY_S("DMIC STO1 ASRC", 1, RT5670_ASRC_1,
1543 7, 0, NULL, 0),
1544 SND_SOC_DAPM_SUPPLY_S("DMIC STO2 ASRC", 1, RT5670_ASRC_1,
1545 6, 0, NULL, 0),
1546 SND_SOC_DAPM_SUPPLY_S("DMIC MONO L ASRC", 1, RT5670_ASRC_1,
1547 5, 0, NULL, 0),
1548 SND_SOC_DAPM_SUPPLY_S("DMIC MONO R ASRC", 1, RT5670_ASRC_1,
1549 4, 0, NULL, 0),
1550 SND_SOC_DAPM_SUPPLY_S("ADC STO1 ASRC", 1, RT5670_ASRC_1,
1551 3, 0, NULL, 0),
1552 SND_SOC_DAPM_SUPPLY_S("ADC STO2 ASRC", 1, RT5670_ASRC_1,
1553 2, 0, NULL, 0),
1554 SND_SOC_DAPM_SUPPLY_S("ADC MONO L ASRC", 1, RT5670_ASRC_1,
1555 1, 0, NULL, 0),
1556 SND_SOC_DAPM_SUPPLY_S("ADC MONO R ASRC", 1, RT5670_ASRC_1,
1557 0, 0, NULL, 0),
1558
1559
1560
1561 SND_SOC_DAPM_SUPPLY("MICBIAS1", RT5670_PWR_ANLG2,
1562 RT5670_PWR_MB1_BIT, 0, NULL, 0),
1563
1564
1565 SND_SOC_DAPM_INPUT("DMIC L1"),
1566 SND_SOC_DAPM_INPUT("DMIC R1"),
1567 SND_SOC_DAPM_INPUT("DMIC L2"),
1568 SND_SOC_DAPM_INPUT("DMIC R2"),
1569 SND_SOC_DAPM_INPUT("DMIC L3"),
1570 SND_SOC_DAPM_INPUT("DMIC R3"),
1571
1572 SND_SOC_DAPM_INPUT("IN1P"),
1573 SND_SOC_DAPM_INPUT("IN1N"),
1574 SND_SOC_DAPM_INPUT("IN2P"),
1575 SND_SOC_DAPM_INPUT("IN2N"),
1576
1577 SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1578 SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1579 SND_SOC_DAPM_PGA("DMIC3", SND_SOC_NOPM, 0, 0, NULL, 0),
1580
1581 SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
1582 set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
1583 SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5670_DMIC_CTRL1,
1584 RT5670_DMIC_1_EN_SFT, 0, NULL, 0),
1585 SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5670_DMIC_CTRL1,
1586 RT5670_DMIC_2_EN_SFT, 0, NULL, 0),
1587 SND_SOC_DAPM_SUPPLY("DMIC3 Power", RT5670_DMIC_CTRL1,
1588 RT5670_DMIC_3_EN_SFT, 0, NULL, 0),
1589
1590 SND_SOC_DAPM_PGA_E("BST1", RT5670_PWR_ANLG2, RT5670_PWR_BST1_BIT,
1591 0, NULL, 0, rt5670_bst1_event,
1592 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1593 SND_SOC_DAPM_PGA_E("BST2", RT5670_PWR_ANLG2, RT5670_PWR_BST2_BIT,
1594 0, NULL, 0, rt5670_bst2_event,
1595 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1596
1597 SND_SOC_DAPM_PGA("INL VOL", RT5670_PWR_VOL,
1598 RT5670_PWR_IN_L_BIT, 0, NULL, 0),
1599 SND_SOC_DAPM_PGA("INR VOL", RT5670_PWR_VOL,
1600 RT5670_PWR_IN_R_BIT, 0, NULL, 0),
1601
1602
1603 SND_SOC_DAPM_MIXER("RECMIXL", RT5670_PWR_MIXER, RT5670_PWR_RM_L_BIT, 0,
1604 rt5670_rec_l_mix, ARRAY_SIZE(rt5670_rec_l_mix)),
1605 SND_SOC_DAPM_MIXER("RECMIXR", RT5670_PWR_MIXER, RT5670_PWR_RM_R_BIT, 0,
1606 rt5670_rec_r_mix, ARRAY_SIZE(rt5670_rec_r_mix)),
1607
1608 SND_SOC_DAPM_ADC("ADC 1", NULL, SND_SOC_NOPM, 0, 0),
1609 SND_SOC_DAPM_ADC("ADC 2", NULL, SND_SOC_NOPM, 0, 0),
1610
1611 SND_SOC_DAPM_PGA("ADC 1_2", SND_SOC_NOPM, 0, 0, NULL, 0),
1612
1613 SND_SOC_DAPM_SUPPLY("ADC 1 power", RT5670_PWR_DIG1,
1614 RT5670_PWR_ADC_L_BIT, 0, NULL, 0),
1615 SND_SOC_DAPM_SUPPLY("ADC 2 power", RT5670_PWR_DIG1,
1616 RT5670_PWR_ADC_R_BIT, 0, NULL, 0),
1617 SND_SOC_DAPM_SUPPLY("ADC clock", RT5670_PR_BASE +
1618 RT5670_CHOP_DAC_ADC, 12, 0, NULL, 0),
1619
1620 SND_SOC_DAPM_MUX("Stereo1 DMIC Mux", SND_SOC_NOPM, 0, 0,
1621 &rt5670_sto1_dmic_mux),
1622 SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1623 &rt5670_sto_adc_2_mux),
1624 SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1625 &rt5670_sto_adc_2_mux),
1626 SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1627 &rt5670_sto_adc_1_mux),
1628 SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1629 &rt5670_sto_adc_1_mux),
1630 SND_SOC_DAPM_MUX("Stereo2 DMIC Mux", SND_SOC_NOPM, 0, 0,
1631 &rt5670_sto2_dmic_mux),
1632 SND_SOC_DAPM_MUX("Stereo2 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1633 &rt5670_sto2_adc_2_mux),
1634 SND_SOC_DAPM_MUX("Stereo2 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1635 &rt5670_sto2_adc_2_mux),
1636 SND_SOC_DAPM_MUX("Stereo2 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1637 &rt5670_sto2_adc_1_mux),
1638 SND_SOC_DAPM_MUX("Stereo2 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1639 &rt5670_sto2_adc_1_mux),
1640 SND_SOC_DAPM_MUX("Stereo2 ADC LR Mux", SND_SOC_NOPM, 0, 0,
1641 &rt5670_sto2_adc_lr_mux),
1642 SND_SOC_DAPM_MUX("Mono DMIC L Mux", SND_SOC_NOPM, 0, 0,
1643 &rt5670_mono_dmic_l_mux),
1644 SND_SOC_DAPM_MUX("Mono DMIC R Mux", SND_SOC_NOPM, 0, 0,
1645 &rt5670_mono_dmic_r_mux),
1646 SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1647 &rt5670_mono_adc_l2_mux),
1648 SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1649 &rt5670_mono_adc_l1_mux),
1650 SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1651 &rt5670_mono_adc_r1_mux),
1652 SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1653 &rt5670_mono_adc_r2_mux),
1654
1655 SND_SOC_DAPM_SUPPLY("ADC Stereo1 Filter", RT5670_PWR_DIG2,
1656 RT5670_PWR_ADC_S1F_BIT, 0, NULL, 0),
1657 SND_SOC_DAPM_SUPPLY("ADC Stereo2 Filter", RT5670_PWR_DIG2,
1658 RT5670_PWR_ADC_S2F_BIT, 0, NULL, 0),
1659 SND_SOC_DAPM_MIXER("Sto1 ADC MIXL", RT5670_STO1_ADC_DIG_VOL,
1660 RT5670_L_MUTE_SFT, 1, rt5670_sto1_adc_l_mix,
1661 ARRAY_SIZE(rt5670_sto1_adc_l_mix)),
1662 SND_SOC_DAPM_MIXER("Sto1 ADC MIXR", RT5670_STO1_ADC_DIG_VOL,
1663 RT5670_R_MUTE_SFT, 1, rt5670_sto1_adc_r_mix,
1664 ARRAY_SIZE(rt5670_sto1_adc_r_mix)),
1665 SND_SOC_DAPM_MIXER("Sto2 ADC MIXL", SND_SOC_NOPM, 0, 0,
1666 rt5670_sto2_adc_l_mix,
1667 ARRAY_SIZE(rt5670_sto2_adc_l_mix)),
1668 SND_SOC_DAPM_MIXER("Sto2 ADC MIXR", SND_SOC_NOPM, 0, 0,
1669 rt5670_sto2_adc_r_mix,
1670 ARRAY_SIZE(rt5670_sto2_adc_r_mix)),
1671 SND_SOC_DAPM_SUPPLY("ADC Mono Left Filter", RT5670_PWR_DIG2,
1672 RT5670_PWR_ADC_MF_L_BIT, 0, NULL, 0),
1673 SND_SOC_DAPM_MIXER("Mono ADC MIXL", RT5670_MONO_ADC_DIG_VOL,
1674 RT5670_L_MUTE_SFT, 1, rt5670_mono_adc_l_mix,
1675 ARRAY_SIZE(rt5670_mono_adc_l_mix)),
1676 SND_SOC_DAPM_SUPPLY("ADC Mono Right Filter", RT5670_PWR_DIG2,
1677 RT5670_PWR_ADC_MF_R_BIT, 0, NULL, 0),
1678 SND_SOC_DAPM_MIXER("Mono ADC MIXR", RT5670_MONO_ADC_DIG_VOL,
1679 RT5670_R_MUTE_SFT, 1, rt5670_mono_adc_r_mix,
1680 ARRAY_SIZE(rt5670_mono_adc_r_mix)),
1681
1682
1683 SND_SOC_DAPM_PGA("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0),
1684 SND_SOC_DAPM_PGA("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0),
1685 SND_SOC_DAPM_PGA("Stereo2 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0),
1686 SND_SOC_DAPM_PGA("Stereo2 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0),
1687 SND_SOC_DAPM_PGA("Sto2 ADC LR MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1688 SND_SOC_DAPM_PGA("Stereo1 ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1689 SND_SOC_DAPM_PGA("Stereo2 ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1690 SND_SOC_DAPM_PGA("Mono ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1691 SND_SOC_DAPM_PGA("VAD_ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1692 SND_SOC_DAPM_PGA("IF_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1693 SND_SOC_DAPM_PGA("IF_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1694 SND_SOC_DAPM_PGA("IF_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
1695 SND_SOC_DAPM_PGA("IF1_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1696 SND_SOC_DAPM_PGA("IF1_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1697 SND_SOC_DAPM_PGA("IF1_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
1698
1699
1700 SND_SOC_DAPM_PGA("TxDP_ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1701 SND_SOC_DAPM_PGA("TxDP_ADC_L", SND_SOC_NOPM, 0, 0, NULL, 0),
1702 SND_SOC_DAPM_PGA("TxDP_ADC_R", SND_SOC_NOPM, 0, 0, NULL, 0),
1703 SND_SOC_DAPM_PGA("TxDC_DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1704
1705 SND_SOC_DAPM_MUX("TDM Data Mux", SND_SOC_NOPM, 0, 0,
1706 &rt5670_txdp_slot_mux),
1707
1708 SND_SOC_DAPM_MUX("DSP UL Mux", SND_SOC_NOPM, 0, 0,
1709 &rt5670_dsp_ul_mux),
1710 SND_SOC_DAPM_MUX("DSP DL Mux", SND_SOC_NOPM, 0, 0,
1711 &rt5670_dsp_dl_mux),
1712
1713 SND_SOC_DAPM_MUX("RxDP Mux", SND_SOC_NOPM, 0, 0,
1714 &rt5670_rxdp_mux),
1715
1716
1717 SND_SOC_DAPM_MUX("IF2 ADC Mux", SND_SOC_NOPM, 0, 0,
1718 &rt5670_if2_adc_in_mux),
1719
1720
1721 SND_SOC_DAPM_SUPPLY("I2S1", RT5670_PWR_DIG1,
1722 RT5670_PWR_I2S1_BIT, 0, NULL, 0),
1723 SND_SOC_DAPM_PGA("IF1 DAC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1724 SND_SOC_DAPM_PGA("IF1 DAC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1725 SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0),
1726 SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0),
1727 SND_SOC_DAPM_PGA("IF1 DAC2 L", SND_SOC_NOPM, 0, 0, NULL, 0),
1728 SND_SOC_DAPM_PGA("IF1 DAC2 R", SND_SOC_NOPM, 0, 0, NULL, 0),
1729 SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1730 SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1731 SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1732 SND_SOC_DAPM_SUPPLY("I2S2", RT5670_PWR_DIG1,
1733 RT5670_PWR_I2S2_BIT, 0, NULL, 0),
1734 SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1735 SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1736 SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1737 SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1738 SND_SOC_DAPM_PGA("IF2 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1739 SND_SOC_DAPM_PGA("IF2 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1740
1741
1742 SND_SOC_DAPM_MUX("IF1 ADC1 IN1 Mux", SND_SOC_NOPM, 0, 0,
1743 &rt5670_if1_adc1_in1_mux),
1744 SND_SOC_DAPM_MUX("IF1 ADC1 IN2 Mux", SND_SOC_NOPM, 0, 0,
1745 &rt5670_if1_adc1_in2_mux),
1746 SND_SOC_DAPM_MUX("IF1 ADC2 IN Mux", SND_SOC_NOPM, 0, 0,
1747 &rt5670_if1_adc2_in_mux),
1748 SND_SOC_DAPM_MUX("IF1 ADC2 IN1 Mux", SND_SOC_NOPM, 0, 0,
1749 &rt5670_if1_adc2_in1_mux),
1750 SND_SOC_DAPM_MUX("VAD ADC Mux", SND_SOC_NOPM, 0, 0,
1751 &rt5670_vad_adc_mux),
1752
1753
1754 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
1755 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
1756 SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
1757 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0,
1758 RT5670_GPIO_CTRL1, RT5670_I2S2_PIN_SFT, 1),
1759
1760
1761 SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0),
1762
1763
1764
1765 SND_SOC_DAPM_MIXER("DAC1 MIXL", SND_SOC_NOPM, 0, 0,
1766 rt5670_dac_l_mix, ARRAY_SIZE(rt5670_dac_l_mix)),
1767 SND_SOC_DAPM_MIXER("DAC1 MIXR", SND_SOC_NOPM, 0, 0,
1768 rt5670_dac_r_mix, ARRAY_SIZE(rt5670_dac_r_mix)),
1769 SND_SOC_DAPM_PGA("DAC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1770
1771
1772 SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0,
1773 &rt5670_dac_l2_mux),
1774 SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0,
1775 &rt5670_dac_r2_mux),
1776 SND_SOC_DAPM_PGA("DAC L2 Volume", RT5670_PWR_DIG1,
1777 RT5670_PWR_DAC_L2_BIT, 0, NULL, 0),
1778 SND_SOC_DAPM_PGA("DAC R2 Volume", RT5670_PWR_DIG1,
1779 RT5670_PWR_DAC_R2_BIT, 0, NULL, 0),
1780
1781 SND_SOC_DAPM_MUX("DAC1 L Mux", SND_SOC_NOPM, 0, 0, &rt5670_dac1l_mux),
1782 SND_SOC_DAPM_MUX("DAC1 R Mux", SND_SOC_NOPM, 0, 0, &rt5670_dac1r_mux),
1783
1784
1785 SND_SOC_DAPM_SUPPLY("DAC Stereo1 Filter", RT5670_PWR_DIG2,
1786 RT5670_PWR_DAC_S1F_BIT, 0, NULL, 0),
1787 SND_SOC_DAPM_SUPPLY("DAC Mono Left Filter", RT5670_PWR_DIG2,
1788 RT5670_PWR_DAC_MF_L_BIT, 0, NULL, 0),
1789 SND_SOC_DAPM_SUPPLY("DAC Mono Right Filter", RT5670_PWR_DIG2,
1790 RT5670_PWR_DAC_MF_R_BIT, 0, NULL, 0),
1791 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
1792 rt5670_sto_dac_l_mix,
1793 ARRAY_SIZE(rt5670_sto_dac_l_mix)),
1794 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
1795 rt5670_sto_dac_r_mix,
1796 ARRAY_SIZE(rt5670_sto_dac_r_mix)),
1797 SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
1798 rt5670_mono_dac_l_mix,
1799 ARRAY_SIZE(rt5670_mono_dac_l_mix)),
1800 SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
1801 rt5670_mono_dac_r_mix,
1802 ARRAY_SIZE(rt5670_mono_dac_r_mix)),
1803 SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
1804 rt5670_dig_l_mix,
1805 ARRAY_SIZE(rt5670_dig_l_mix)),
1806 SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
1807 rt5670_dig_r_mix,
1808 ARRAY_SIZE(rt5670_dig_r_mix)),
1809
1810
1811 SND_SOC_DAPM_SUPPLY("DAC L1 Power", RT5670_PWR_DIG1,
1812 RT5670_PWR_DAC_L1_BIT, 0, NULL, 0),
1813 SND_SOC_DAPM_SUPPLY("DAC R1 Power", RT5670_PWR_DIG1,
1814 RT5670_PWR_DAC_R1_BIT, 0, NULL, 0),
1815 SND_SOC_DAPM_DAC("DAC L1", NULL, SND_SOC_NOPM, 0, 0),
1816 SND_SOC_DAPM_DAC("DAC R1", NULL, SND_SOC_NOPM, 0, 0),
1817 SND_SOC_DAPM_DAC("DAC L2", NULL, RT5670_PWR_DIG1,
1818 RT5670_PWR_DAC_L2_BIT, 0),
1819
1820 SND_SOC_DAPM_DAC("DAC R2", NULL, RT5670_PWR_DIG1,
1821 RT5670_PWR_DAC_R2_BIT, 0),
1822
1823
1824 SND_SOC_DAPM_MIXER("OUT MIXL", RT5670_PWR_MIXER, RT5670_PWR_OM_L_BIT,
1825 0, rt5670_out_l_mix, ARRAY_SIZE(rt5670_out_l_mix)),
1826 SND_SOC_DAPM_MIXER("OUT MIXR", RT5670_PWR_MIXER, RT5670_PWR_OM_R_BIT,
1827 0, rt5670_out_r_mix, ARRAY_SIZE(rt5670_out_r_mix)),
1828
1829 SND_SOC_DAPM_MIXER("HPOVOL MIXL", RT5670_PWR_VOL,
1830 RT5670_PWR_HV_L_BIT, 0,
1831 rt5670_hpvoll_mix, ARRAY_SIZE(rt5670_hpvoll_mix)),
1832 SND_SOC_DAPM_MIXER("HPOVOL MIXR", RT5670_PWR_VOL,
1833 RT5670_PWR_HV_R_BIT, 0,
1834 rt5670_hpvolr_mix, ARRAY_SIZE(rt5670_hpvolr_mix)),
1835 SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM, 0, 0, NULL, 0),
1836 SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM, 0, 0, NULL, 0),
1837 SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM, 0, 0, NULL, 0),
1838
1839
1840 SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM, 0, 0,
1841 rt5670_hpo_mix, ARRAY_SIZE(rt5670_hpo_mix)),
1842 SND_SOC_DAPM_MIXER("LOUT MIX", RT5670_PWR_ANLG1, RT5670_PWR_LM_BIT,
1843 0, rt5670_lout_mix, ARRAY_SIZE(rt5670_lout_mix)),
1844 SND_SOC_DAPM_SUPPLY_S("Improve HP Amp Drv", 1, SND_SOC_NOPM, 0, 0,
1845 rt5670_hp_power_event, SND_SOC_DAPM_POST_PMU |
1846 SND_SOC_DAPM_PRE_PMD),
1847 SND_SOC_DAPM_SUPPLY("HP L Amp", RT5670_PWR_ANLG1,
1848 RT5670_PWR_HP_L_BIT, 0, NULL, 0),
1849 SND_SOC_DAPM_SUPPLY("HP R Amp", RT5670_PWR_ANLG1,
1850 RT5670_PWR_HP_R_BIT, 0, NULL, 0),
1851 SND_SOC_DAPM_PGA_S("HP Amp", 1, SND_SOC_NOPM, 0, 0,
1852 rt5670_hp_event, SND_SOC_DAPM_PRE_PMD |
1853 SND_SOC_DAPM_POST_PMU),
1854 SND_SOC_DAPM_SWITCH("LOUT L Playback", SND_SOC_NOPM, 0, 0,
1855 &lout_l_enable_control),
1856 SND_SOC_DAPM_SWITCH("LOUT R Playback", SND_SOC_NOPM, 0, 0,
1857 &lout_r_enable_control),
1858 SND_SOC_DAPM_PGA("LOUT Amp", SND_SOC_NOPM, 0, 0, NULL, 0),
1859
1860
1861 SND_SOC_DAPM_SUPPLY("PDM1 Power", RT5670_PWR_DIG2,
1862 RT5670_PWR_PDM1_BIT, 0, NULL, 0),
1863
1864 SND_SOC_DAPM_MUX("PDM1 L Mux", RT5670_PDM_OUT_CTRL,
1865 RT5670_M_PDM1_L_SFT, 1, &rt5670_pdm1_l_mux),
1866 SND_SOC_DAPM_MUX("PDM1 R Mux", RT5670_PDM_OUT_CTRL,
1867 RT5670_M_PDM1_R_SFT, 1, &rt5670_pdm1_r_mux),
1868
1869
1870 SND_SOC_DAPM_OUTPUT("HPOL"),
1871 SND_SOC_DAPM_OUTPUT("HPOR"),
1872 SND_SOC_DAPM_OUTPUT("LOUTL"),
1873 SND_SOC_DAPM_OUTPUT("LOUTR"),
1874};
1875
1876static const struct snd_soc_dapm_widget rt5670_specific_dapm_widgets[] = {
1877 SND_SOC_DAPM_SUPPLY("PDM2 Power", RT5670_PWR_DIG2,
1878 RT5670_PWR_PDM2_BIT, 0, NULL, 0),
1879 SND_SOC_DAPM_MUX("PDM2 L Mux", RT5670_PDM_OUT_CTRL,
1880 RT5670_M_PDM2_L_SFT, 1, &rt5670_pdm2_l_mux),
1881 SND_SOC_DAPM_MUX("PDM2 R Mux", RT5670_PDM_OUT_CTRL,
1882 RT5670_M_PDM2_R_SFT, 1, &rt5670_pdm2_r_mux),
1883 SND_SOC_DAPM_OUTPUT("PDM1L"),
1884 SND_SOC_DAPM_OUTPUT("PDM1R"),
1885 SND_SOC_DAPM_OUTPUT("PDM2L"),
1886 SND_SOC_DAPM_OUTPUT("PDM2R"),
1887};
1888
1889static const struct snd_soc_dapm_widget rt5672_specific_dapm_widgets[] = {
1890 SND_SOC_DAPM_PGA_E("SPO Amp", SND_SOC_NOPM, 0, 0, NULL, 0,
1891 rt5670_spk_event, SND_SOC_DAPM_PRE_PMD |
1892 SND_SOC_DAPM_POST_PMU),
1893 SND_SOC_DAPM_OUTPUT("SPOLP"),
1894 SND_SOC_DAPM_OUTPUT("SPOLN"),
1895 SND_SOC_DAPM_OUTPUT("SPORP"),
1896 SND_SOC_DAPM_OUTPUT("SPORN"),
1897};
1898
1899static const struct snd_soc_dapm_route rt5670_dapm_routes[] = {
1900 { "ADC Stereo1 Filter", NULL, "ADC STO1 ASRC", is_using_asrc },
1901 { "ADC Stereo2 Filter", NULL, "ADC STO2 ASRC", is_using_asrc },
1902 { "ADC Mono Left Filter", NULL, "ADC MONO L ASRC", is_using_asrc },
1903 { "ADC Mono Right Filter", NULL, "ADC MONO R ASRC", is_using_asrc },
1904 { "DAC Mono Left Filter", NULL, "DAC MONO L ASRC", is_using_asrc },
1905 { "DAC Mono Right Filter", NULL, "DAC MONO R ASRC", is_using_asrc },
1906 { "DAC Stereo1 Filter", NULL, "DAC STO ASRC", is_using_asrc },
1907 { "Stereo1 DMIC Mux", NULL, "DMIC STO1 ASRC", can_use_asrc },
1908 { "Stereo2 DMIC Mux", NULL, "DMIC STO2 ASRC", can_use_asrc },
1909 { "Mono DMIC L Mux", NULL, "DMIC MONO L ASRC", can_use_asrc },
1910 { "Mono DMIC R Mux", NULL, "DMIC MONO R ASRC", can_use_asrc },
1911
1912 { "I2S1", NULL, "I2S1 ASRC", can_use_asrc},
1913 { "I2S2", NULL, "I2S2 ASRC", can_use_asrc},
1914
1915 { "DMIC1", NULL, "DMIC L1" },
1916 { "DMIC1", NULL, "DMIC R1" },
1917 { "DMIC2", NULL, "DMIC L2" },
1918 { "DMIC2", NULL, "DMIC R2" },
1919 { "DMIC3", NULL, "DMIC L3" },
1920 { "DMIC3", NULL, "DMIC R3" },
1921
1922 { "BST1", NULL, "IN1P" },
1923 { "BST1", NULL, "IN1N" },
1924 { "BST1", NULL, "Mic Det Power" },
1925 { "BST2", NULL, "IN2P" },
1926 { "BST2", NULL, "IN2N" },
1927
1928 { "INL VOL", NULL, "IN2P" },
1929 { "INR VOL", NULL, "IN2N" },
1930
1931 { "RECMIXL", "INL Switch", "INL VOL" },
1932 { "RECMIXL", "BST2 Switch", "BST2" },
1933 { "RECMIXL", "BST1 Switch", "BST1" },
1934
1935 { "RECMIXR", "INR Switch", "INR VOL" },
1936 { "RECMIXR", "BST2 Switch", "BST2" },
1937 { "RECMIXR", "BST1 Switch", "BST1" },
1938
1939 { "ADC 1", NULL, "RECMIXL" },
1940 { "ADC 1", NULL, "ADC 1 power" },
1941 { "ADC 1", NULL, "ADC clock" },
1942 { "ADC 2", NULL, "RECMIXR" },
1943 { "ADC 2", NULL, "ADC 2 power" },
1944 { "ADC 2", NULL, "ADC clock" },
1945
1946 { "DMIC L1", NULL, "DMIC CLK" },
1947 { "DMIC L1", NULL, "DMIC1 Power" },
1948 { "DMIC R1", NULL, "DMIC CLK" },
1949 { "DMIC R1", NULL, "DMIC1 Power" },
1950 { "DMIC L2", NULL, "DMIC CLK" },
1951 { "DMIC L2", NULL, "DMIC2 Power" },
1952 { "DMIC R2", NULL, "DMIC CLK" },
1953 { "DMIC R2", NULL, "DMIC2 Power" },
1954 { "DMIC L3", NULL, "DMIC CLK" },
1955 { "DMIC L3", NULL, "DMIC3 Power" },
1956 { "DMIC R3", NULL, "DMIC CLK" },
1957 { "DMIC R3", NULL, "DMIC3 Power" },
1958
1959 { "Stereo1 DMIC Mux", "DMIC1", "DMIC1" },
1960 { "Stereo1 DMIC Mux", "DMIC2", "DMIC2" },
1961 { "Stereo1 DMIC Mux", "DMIC3", "DMIC3" },
1962
1963 { "Stereo2 DMIC Mux", "DMIC1", "DMIC1" },
1964 { "Stereo2 DMIC Mux", "DMIC2", "DMIC2" },
1965 { "Stereo2 DMIC Mux", "DMIC3", "DMIC3" },
1966
1967 { "Mono DMIC L Mux", "DMIC1", "DMIC L1" },
1968 { "Mono DMIC L Mux", "DMIC2", "DMIC L2" },
1969 { "Mono DMIC L Mux", "DMIC3", "DMIC L3" },
1970
1971 { "Mono DMIC R Mux", "DMIC1", "DMIC R1" },
1972 { "Mono DMIC R Mux", "DMIC2", "DMIC R2" },
1973 { "Mono DMIC R Mux", "DMIC3", "DMIC R3" },
1974
1975 { "ADC 1_2", NULL, "ADC 1" },
1976 { "ADC 1_2", NULL, "ADC 2" },
1977
1978 { "Stereo1 ADC L2 Mux", "DMIC", "Stereo1 DMIC Mux" },
1979 { "Stereo1 ADC L2 Mux", "DAC MIX", "DAC MIXL" },
1980 { "Stereo1 ADC L1 Mux", "ADC", "ADC 1_2" },
1981 { "Stereo1 ADC L1 Mux", "DAC MIX", "DAC MIXL" },
1982
1983 { "Stereo1 ADC R1 Mux", "ADC", "ADC 1_2" },
1984 { "Stereo1 ADC R1 Mux", "DAC MIX", "DAC MIXR" },
1985 { "Stereo1 ADC R2 Mux", "DMIC", "Stereo1 DMIC Mux" },
1986 { "Stereo1 ADC R2 Mux", "DAC MIX", "DAC MIXR" },
1987
1988 { "Mono ADC L2 Mux", "DMIC", "Mono DMIC L Mux" },
1989 { "Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
1990 { "Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
1991 { "Mono ADC L1 Mux", "ADC1", "ADC 1" },
1992
1993 { "Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
1994 { "Mono ADC R1 Mux", "ADC2", "ADC 2" },
1995 { "Mono ADC R2 Mux", "DMIC", "Mono DMIC R Mux" },
1996 { "Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
1997
1998 { "Sto1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux" },
1999 { "Sto1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux" },
2000 { "Sto1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux" },
2001 { "Sto1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux" },
2002
2003 { "Stereo1 ADC MIXL", NULL, "Sto1 ADC MIXL" },
2004 { "Stereo1 ADC MIXL", NULL, "ADC Stereo1 Filter" },
2005
2006 { "Stereo1 ADC MIXR", NULL, "Sto1 ADC MIXR" },
2007 { "Stereo1 ADC MIXR", NULL, "ADC Stereo1 Filter" },
2008 { "ADC Stereo1 Filter", NULL, "PLL1", is_sys_clk_from_pll },
2009
2010 { "Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux" },
2011 { "Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux" },
2012 { "Mono ADC MIXL", NULL, "ADC Mono Left Filter" },
2013 { "ADC Mono Left Filter", NULL, "PLL1", is_sys_clk_from_pll },
2014
2015 { "Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux" },
2016 { "Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux" },
2017 { "Mono ADC MIXR", NULL, "ADC Mono Right Filter" },
2018 { "ADC Mono Right Filter", NULL, "PLL1", is_sys_clk_from_pll },
2019
2020 { "Stereo2 ADC L2 Mux", "DMIC", "Stereo2 DMIC Mux" },
2021 { "Stereo2 ADC L2 Mux", "DAC MIX", "DAC MIXL" },
2022 { "Stereo2 ADC L1 Mux", "ADC", "ADC 1_2" },
2023 { "Stereo2 ADC L1 Mux", "DAC MIX", "DAC MIXL" },
2024
2025 { "Stereo2 ADC R1 Mux", "ADC", "ADC 1_2" },
2026 { "Stereo2 ADC R1 Mux", "DAC MIX", "DAC MIXR" },
2027 { "Stereo2 ADC R2 Mux", "DMIC", "Stereo2 DMIC Mux" },
2028 { "Stereo2 ADC R2 Mux", "DAC MIX", "DAC MIXR" },
2029
2030 { "Sto2 ADC MIXL", "ADC1 Switch", "Stereo2 ADC L1 Mux" },
2031 { "Sto2 ADC MIXL", "ADC2 Switch", "Stereo2 ADC L2 Mux" },
2032 { "Sto2 ADC MIXR", "ADC1 Switch", "Stereo2 ADC R1 Mux" },
2033 { "Sto2 ADC MIXR", "ADC2 Switch", "Stereo2 ADC R2 Mux" },
2034
2035 { "Sto2 ADC LR MIX", NULL, "Sto2 ADC MIXL" },
2036 { "Sto2 ADC LR MIX", NULL, "Sto2 ADC MIXR" },
2037
2038 { "Stereo2 ADC LR Mux", "L", "Sto2 ADC MIXL" },
2039 { "Stereo2 ADC LR Mux", "LR", "Sto2 ADC LR MIX" },
2040
2041 { "Stereo2 ADC MIXL", NULL, "Stereo2 ADC LR Mux" },
2042 { "Stereo2 ADC MIXL", NULL, "ADC Stereo2 Filter" },
2043
2044 { "Stereo2 ADC MIXR", NULL, "Sto2 ADC MIXR" },
2045 { "Stereo2 ADC MIXR", NULL, "ADC Stereo2 Filter" },
2046 { "ADC Stereo2 Filter", NULL, "PLL1", is_sys_clk_from_pll },
2047
2048 { "VAD ADC Mux", "Sto1 ADC L", "Stereo1 ADC MIXL" },
2049 { "VAD ADC Mux", "Mono ADC L", "Mono ADC MIXL" },
2050 { "VAD ADC Mux", "Mono ADC R", "Mono ADC MIXR" },
2051 { "VAD ADC Mux", "Sto2 ADC L", "Sto2 ADC MIXL" },
2052
2053 { "VAD_ADC", NULL, "VAD ADC Mux" },
2054
2055 { "IF_ADC1", NULL, "Stereo1 ADC MIXL" },
2056 { "IF_ADC1", NULL, "Stereo1 ADC MIXR" },
2057 { "IF_ADC2", NULL, "Mono ADC MIXL" },
2058 { "IF_ADC2", NULL, "Mono ADC MIXR" },
2059 { "IF_ADC3", NULL, "Stereo2 ADC MIXL" },
2060 { "IF_ADC3", NULL, "Stereo2 ADC MIXR" },
2061
2062 { "IF1 ADC1 IN1 Mux", "IF_ADC1", "IF_ADC1" },
2063 { "IF1 ADC1 IN1 Mux", "IF1_ADC3", "IF1_ADC3" },
2064
2065 { "IF1 ADC1 IN2 Mux", "IF1_ADC1_IN1", "IF1 ADC1 IN1 Mux" },
2066 { "IF1 ADC1 IN2 Mux", "IF1_ADC4", "TxDP_ADC" },
2067
2068 { "IF1 ADC2 IN Mux", "IF_ADC2", "IF_ADC2" },
2069 { "IF1 ADC2 IN Mux", "VAD_ADC", "VAD_ADC" },
2070
2071 { "IF1 ADC2 IN1 Mux", "IF1_ADC2_IN", "IF1 ADC2 IN Mux" },
2072 { "IF1 ADC2 IN1 Mux", "IF1_ADC4", "TxDP_ADC" },
2073
2074 { "IF1_ADC1" , NULL, "IF1 ADC1 IN2 Mux" },
2075 { "IF1_ADC2" , NULL, "IF1 ADC2 IN1 Mux" },
2076
2077 { "Stereo1 ADC MIX", NULL, "Stereo1 ADC MIXL" },
2078 { "Stereo1 ADC MIX", NULL, "Stereo1 ADC MIXR" },
2079 { "Stereo2 ADC MIX", NULL, "Sto2 ADC MIXL" },
2080 { "Stereo2 ADC MIX", NULL, "Sto2 ADC MIXR" },
2081 { "Mono ADC MIX", NULL, "Mono ADC MIXL" },
2082 { "Mono ADC MIX", NULL, "Mono ADC MIXR" },
2083
2084 { "RxDP Mux", "IF2 DAC", "IF2 DAC" },
2085 { "RxDP Mux", "IF1 DAC", "IF1 DAC2" },
2086 { "RxDP Mux", "STO1 ADC Mixer", "Stereo1 ADC MIX" },
2087 { "RxDP Mux", "STO2 ADC Mixer", "Stereo2 ADC MIX" },
2088 { "RxDP Mux", "Mono ADC Mixer L", "Mono ADC MIXL" },
2089 { "RxDP Mux", "Mono ADC Mixer R", "Mono ADC MIXR" },
2090 { "RxDP Mux", "DAC1", "DAC MIX" },
2091
2092 { "TDM Data Mux", "Slot 0-1", "Stereo1 ADC MIX" },
2093 { "TDM Data Mux", "Slot 2-3", "Mono ADC MIX" },
2094 { "TDM Data Mux", "Slot 4-5", "Stereo2 ADC MIX" },
2095 { "TDM Data Mux", "Slot 6-7", "IF2 DAC" },
2096
2097 { "DSP UL Mux", "Bypass", "TDM Data Mux" },
2098 { "DSP UL Mux", NULL, "I2S DSP" },
2099 { "DSP DL Mux", "Bypass", "RxDP Mux" },
2100 { "DSP DL Mux", NULL, "I2S DSP" },
2101
2102 { "TxDP_ADC_L", NULL, "DSP UL Mux" },
2103 { "TxDP_ADC_R", NULL, "DSP UL Mux" },
2104 { "TxDC_DAC", NULL, "DSP DL Mux" },
2105
2106 { "TxDP_ADC", NULL, "TxDP_ADC_L" },
2107 { "TxDP_ADC", NULL, "TxDP_ADC_R" },
2108
2109 { "IF1 ADC", NULL, "I2S1" },
2110 { "IF1 ADC", NULL, "IF1_ADC1" },
2111 { "IF1 ADC", NULL, "IF1_ADC2" },
2112 { "IF1 ADC", NULL, "IF_ADC3" },
2113 { "IF1 ADC", NULL, "TxDP_ADC" },
2114
2115 { "IF2 ADC Mux", "IF_ADC1", "IF_ADC1" },
2116 { "IF2 ADC Mux", "IF_ADC2", "IF_ADC2" },
2117 { "IF2 ADC Mux", "IF_ADC3", "IF_ADC3" },
2118 { "IF2 ADC Mux", "TxDC_DAC", "TxDC_DAC" },
2119 { "IF2 ADC Mux", "TxDP_ADC", "TxDP_ADC" },
2120 { "IF2 ADC Mux", "VAD_ADC", "VAD_ADC" },
2121
2122 { "IF2 ADC L", NULL, "IF2 ADC Mux" },
2123 { "IF2 ADC R", NULL, "IF2 ADC Mux" },
2124
2125 { "IF2 ADC", NULL, "I2S2" },
2126 { "IF2 ADC", NULL, "IF2 ADC L" },
2127 { "IF2 ADC", NULL, "IF2 ADC R" },
2128
2129 { "AIF1TX", NULL, "IF1 ADC" },
2130 { "AIF2TX", NULL, "IF2 ADC" },
2131
2132 { "IF1 DAC1", NULL, "AIF1RX" },
2133 { "IF1 DAC2", NULL, "AIF1RX" },
2134 { "IF2 DAC", NULL, "AIF2RX" },
2135
2136 { "IF1 DAC1", NULL, "I2S1" },
2137 { "IF1 DAC2", NULL, "I2S1" },
2138 { "IF2 DAC", NULL, "I2S2" },
2139
2140 { "IF1 DAC2 L", NULL, "IF1 DAC2" },
2141 { "IF1 DAC2 R", NULL, "IF1 DAC2" },
2142 { "IF1 DAC1 L", NULL, "IF1 DAC1" },
2143 { "IF1 DAC1 R", NULL, "IF1 DAC1" },
2144 { "IF2 DAC L", NULL, "IF2 DAC" },
2145 { "IF2 DAC R", NULL, "IF2 DAC" },
2146
2147 { "DAC1 L Mux", "IF1 DAC", "IF1 DAC1 L" },
2148 { "DAC1 L Mux", "IF2 DAC", "IF2 DAC L" },
2149
2150 { "DAC1 R Mux", "IF1 DAC", "IF1 DAC1 R" },
2151 { "DAC1 R Mux", "IF2 DAC", "IF2 DAC R" },
2152
2153 { "DAC1 MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL" },
2154 { "DAC1 MIXL", "DAC1 Switch", "DAC1 L Mux" },
2155 { "DAC1 MIXL", NULL, "DAC Stereo1 Filter" },
2156 { "DAC1 MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR" },
2157 { "DAC1 MIXR", "DAC1 Switch", "DAC1 R Mux" },
2158 { "DAC1 MIXR", NULL, "DAC Stereo1 Filter" },
2159
2160 { "DAC Stereo1 Filter", NULL, "PLL1", is_sys_clk_from_pll },
2161 { "DAC Mono Left Filter", NULL, "PLL1", is_sys_clk_from_pll },
2162 { "DAC Mono Right Filter", NULL, "PLL1", is_sys_clk_from_pll },
2163
2164 { "DAC MIX", NULL, "DAC1 MIXL" },
2165 { "DAC MIX", NULL, "DAC1 MIXR" },
2166
2167 { "Audio DSP", NULL, "DAC1 MIXL" },
2168 { "Audio DSP", NULL, "DAC1 MIXR" },
2169
2170 { "DAC L2 Mux", "IF1 DAC", "IF1 DAC2 L" },
2171 { "DAC L2 Mux", "IF2 DAC", "IF2 DAC L" },
2172 { "DAC L2 Mux", "TxDC DAC", "TxDC_DAC" },
2173 { "DAC L2 Mux", "VAD_ADC", "VAD_ADC" },
2174 { "DAC L2 Volume", NULL, "DAC L2 Mux" },
2175 { "DAC L2 Volume", NULL, "DAC Mono Left Filter" },
2176
2177 { "DAC R2 Mux", "IF1 DAC", "IF1 DAC2 R" },
2178 { "DAC R2 Mux", "IF2 DAC", "IF2 DAC R" },
2179 { "DAC R2 Mux", "TxDC DAC", "TxDC_DAC" },
2180 { "DAC R2 Mux", "TxDP ADC", "TxDP_ADC" },
2181 { "DAC R2 Volume", NULL, "DAC R2 Mux" },
2182 { "DAC R2 Volume", NULL, "DAC Mono Right Filter" },
2183
2184 { "Stereo DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
2185 { "Stereo DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" },
2186 { "Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2187 { "Stereo DAC MIXL", NULL, "DAC Stereo1 Filter" },
2188 { "Stereo DAC MIXL", NULL, "DAC L1 Power" },
2189 { "Stereo DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
2190 { "Stereo DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" },
2191 { "Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2192 { "Stereo DAC MIXR", NULL, "DAC Stereo1 Filter" },
2193 { "Stereo DAC MIXR", NULL, "DAC R1 Power" },
2194
2195 { "Mono DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
2196 { "Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2197 { "Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
2198 { "Mono DAC MIXL", NULL, "DAC Mono Left Filter" },
2199 { "Mono DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
2200 { "Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2201 { "Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
2202 { "Mono DAC MIXR", NULL, "DAC Mono Right Filter" },
2203
2204 { "DAC MIXL", "Sto DAC Mix L Switch", "Stereo DAC MIXL" },
2205 { "DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2206 { "DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
2207 { "DAC MIXR", "Sto DAC Mix R Switch", "Stereo DAC MIXR" },
2208 { "DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2209 { "DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
2210
2211 { "DAC L1", NULL, "DAC L1 Power" },
2212 { "DAC L1", NULL, "Stereo DAC MIXL" },
2213 { "DAC R1", NULL, "DAC R1 Power" },
2214 { "DAC R1", NULL, "Stereo DAC MIXR" },
2215 { "DAC L2", NULL, "Mono DAC MIXL" },
2216 { "DAC R2", NULL, "Mono DAC MIXR" },
2217
2218 { "OUT MIXL", "BST1 Switch", "BST1" },
2219 { "OUT MIXL", "INL Switch", "INL VOL" },
2220 { "OUT MIXL", "DAC L2 Switch", "DAC L2" },
2221 { "OUT MIXL", "DAC L1 Switch", "DAC L1" },
2222
2223 { "OUT MIXR", "BST2 Switch", "BST2" },
2224 { "OUT MIXR", "INR Switch", "INR VOL" },
2225 { "OUT MIXR", "DAC R2 Switch", "DAC R2" },
2226 { "OUT MIXR", "DAC R1 Switch", "DAC R1" },
2227
2228 { "HPOVOL MIXL", "DAC1 Switch", "DAC L1" },
2229 { "HPOVOL MIXL", "INL Switch", "INL VOL" },
2230 { "HPOVOL MIXR", "DAC1 Switch", "DAC R1" },
2231 { "HPOVOL MIXR", "INR Switch", "INR VOL" },
2232
2233 { "DAC 2", NULL, "DAC L2" },
2234 { "DAC 2", NULL, "DAC R2" },
2235 { "DAC 1", NULL, "DAC L1" },
2236 { "DAC 1", NULL, "DAC R1" },
2237 { "HPOVOL", NULL, "HPOVOL MIXL" },
2238 { "HPOVOL", NULL, "HPOVOL MIXR" },
2239 { "HPO MIX", "DAC1 Switch", "DAC 1" },
2240 { "HPO MIX", "HPVOL Switch", "HPOVOL" },
2241
2242 { "LOUT MIX", "DAC L1 Switch", "DAC L1" },
2243 { "LOUT MIX", "DAC R1 Switch", "DAC R1" },
2244 { "LOUT MIX", "OUTMIX L Switch", "OUT MIXL" },
2245 { "LOUT MIX", "OUTMIX R Switch", "OUT MIXR" },
2246
2247 { "PDM1 L Mux", "Stereo DAC", "Stereo DAC MIXL" },
2248 { "PDM1 L Mux", "Mono DAC", "Mono DAC MIXL" },
2249 { "PDM1 L Mux", NULL, "PDM1 Power" },
2250 { "PDM1 R Mux", "Stereo DAC", "Stereo DAC MIXR" },
2251 { "PDM1 R Mux", "Mono DAC", "Mono DAC MIXR" },
2252 { "PDM1 R Mux", NULL, "PDM1 Power" },
2253
2254 { "HP Amp", NULL, "HPO MIX" },
2255 { "HP Amp", NULL, "Mic Det Power" },
2256 { "HPOL", NULL, "HP Amp" },
2257 { "HPOL", NULL, "HP L Amp" },
2258 { "HPOL", NULL, "Improve HP Amp Drv" },
2259 { "HPOR", NULL, "HP Amp" },
2260 { "HPOR", NULL, "HP R Amp" },
2261 { "HPOR", NULL, "Improve HP Amp Drv" },
2262
2263 { "LOUT Amp", NULL, "LOUT MIX" },
2264 { "LOUT L Playback", "Switch", "LOUT Amp" },
2265 { "LOUT R Playback", "Switch", "LOUT Amp" },
2266 { "LOUTL", NULL, "LOUT L Playback" },
2267 { "LOUTR", NULL, "LOUT R Playback" },
2268 { "LOUTL", NULL, "Improve HP Amp Drv" },
2269 { "LOUTR", NULL, "Improve HP Amp Drv" },
2270};
2271
2272static const struct snd_soc_dapm_route rt5670_specific_dapm_routes[] = {
2273 { "PDM2 L Mux", "Stereo DAC", "Stereo DAC MIXL" },
2274 { "PDM2 L Mux", "Mono DAC", "Mono DAC MIXL" },
2275 { "PDM2 L Mux", NULL, "PDM2 Power" },
2276 { "PDM2 R Mux", "Stereo DAC", "Stereo DAC MIXR" },
2277 { "PDM2 R Mux", "Mono DAC", "Mono DAC MIXR" },
2278 { "PDM2 R Mux", NULL, "PDM2 Power" },
2279 { "PDM1L", NULL, "PDM1 L Mux" },
2280 { "PDM1R", NULL, "PDM1 R Mux" },
2281 { "PDM2L", NULL, "PDM2 L Mux" },
2282 { "PDM2R", NULL, "PDM2 R Mux" },
2283};
2284
2285static const struct snd_soc_dapm_route rt5672_specific_dapm_routes[] = {
2286 { "SPO Amp", NULL, "PDM1 L Mux" },
2287 { "SPO Amp", NULL, "PDM1 R Mux" },
2288 { "SPOLP", NULL, "SPO Amp" },
2289 { "SPOLN", NULL, "SPO Amp" },
2290 { "SPORP", NULL, "SPO Amp" },
2291 { "SPORN", NULL, "SPO Amp" },
2292};
2293
2294static int rt5670_hw_params(struct snd_pcm_substream *substream,
2295 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
2296{
2297 struct snd_soc_component *component = dai->component;
2298 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
2299 unsigned int val_len = 0, val_clk, mask_clk;
2300 int pre_div, bclk_ms, frame_size;
2301
2302 rt5670->lrck[dai->id] = params_rate(params);
2303 pre_div = rl6231_get_clk_info(rt5670->sysclk, rt5670->lrck[dai->id]);
2304 if (pre_div < 0) {
2305 dev_err(component->dev, "Unsupported clock setting %d for DAI %d\n",
2306 rt5670->lrck[dai->id], dai->id);
2307 return -EINVAL;
2308 }
2309 frame_size = snd_soc_params_to_frame_size(params);
2310 if (frame_size < 0) {
2311 dev_err(component->dev, "Unsupported frame size: %d\n", frame_size);
2312 return -EINVAL;
2313 }
2314 bclk_ms = frame_size > 32;
2315 rt5670->bclk[dai->id] = rt5670->lrck[dai->id] * (32 << bclk_ms);
2316
2317 dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
2318 rt5670->bclk[dai->id], rt5670->lrck[dai->id]);
2319 dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
2320 bclk_ms, pre_div, dai->id);
2321
2322 switch (params_width(params)) {
2323 case 16:
2324 break;
2325 case 20:
2326 val_len |= RT5670_I2S_DL_20;
2327 break;
2328 case 24:
2329 val_len |= RT5670_I2S_DL_24;
2330 break;
2331 case 8:
2332 val_len |= RT5670_I2S_DL_8;
2333 break;
2334 default:
2335 return -EINVAL;
2336 }
2337
2338 switch (dai->id) {
2339 case RT5670_AIF1:
2340 mask_clk = RT5670_I2S_BCLK_MS1_MASK | RT5670_I2S_PD1_MASK;
2341 val_clk = bclk_ms << RT5670_I2S_BCLK_MS1_SFT |
2342 pre_div << RT5670_I2S_PD1_SFT;
2343 snd_soc_component_update_bits(component, RT5670_I2S1_SDP,
2344 RT5670_I2S_DL_MASK, val_len);
2345 snd_soc_component_update_bits(component, RT5670_ADDA_CLK1, mask_clk, val_clk);
2346 break;
2347 case RT5670_AIF2:
2348 mask_clk = RT5670_I2S_BCLK_MS2_MASK | RT5670_I2S_PD2_MASK;
2349 val_clk = bclk_ms << RT5670_I2S_BCLK_MS2_SFT |
2350 pre_div << RT5670_I2S_PD2_SFT;
2351 snd_soc_component_update_bits(component, RT5670_I2S2_SDP,
2352 RT5670_I2S_DL_MASK, val_len);
2353 snd_soc_component_update_bits(component, RT5670_ADDA_CLK1, mask_clk, val_clk);
2354 break;
2355 default:
2356 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
2357 return -EINVAL;
2358 }
2359
2360 return 0;
2361}
2362
2363static int rt5670_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
2364{
2365 struct snd_soc_component *component = dai->component;
2366 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
2367 unsigned int reg_val = 0;
2368
2369 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
2370 case SND_SOC_DAIFMT_CBM_CFM:
2371 rt5670->master[dai->id] = 1;
2372 break;
2373 case SND_SOC_DAIFMT_CBS_CFS:
2374 reg_val |= RT5670_I2S_MS_S;
2375 rt5670->master[dai->id] = 0;
2376 break;
2377 default:
2378 return -EINVAL;
2379 }
2380
2381 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
2382 case SND_SOC_DAIFMT_NB_NF:
2383 break;
2384 case SND_SOC_DAIFMT_IB_NF:
2385 reg_val |= RT5670_I2S_BP_INV;
2386 break;
2387 default:
2388 return -EINVAL;
2389 }
2390
2391 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
2392 case SND_SOC_DAIFMT_I2S:
2393 break;
2394 case SND_SOC_DAIFMT_LEFT_J:
2395 reg_val |= RT5670_I2S_DF_LEFT;
2396 break;
2397 case SND_SOC_DAIFMT_DSP_A:
2398 reg_val |= RT5670_I2S_DF_PCM_A;
2399 break;
2400 case SND_SOC_DAIFMT_DSP_B:
2401 reg_val |= RT5670_I2S_DF_PCM_B;
2402 break;
2403 default:
2404 return -EINVAL;
2405 }
2406
2407 switch (dai->id) {
2408 case RT5670_AIF1:
2409 snd_soc_component_update_bits(component, RT5670_I2S1_SDP,
2410 RT5670_I2S_MS_MASK | RT5670_I2S_BP_MASK |
2411 RT5670_I2S_DF_MASK, reg_val);
2412 break;
2413 case RT5670_AIF2:
2414 snd_soc_component_update_bits(component, RT5670_I2S2_SDP,
2415 RT5670_I2S_MS_MASK | RT5670_I2S_BP_MASK |
2416 RT5670_I2S_DF_MASK, reg_val);
2417 break;
2418 default:
2419 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
2420 return -EINVAL;
2421 }
2422 return 0;
2423}
2424
2425static int rt5670_set_codec_sysclk(struct snd_soc_component *component, int clk_id,
2426 int source, unsigned int freq, int dir)
2427{
2428 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
2429 unsigned int reg_val = 0;
2430
2431 switch (clk_id) {
2432 case RT5670_SCLK_S_MCLK:
2433 reg_val |= RT5670_SCLK_SRC_MCLK;
2434 break;
2435 case RT5670_SCLK_S_PLL1:
2436 reg_val |= RT5670_SCLK_SRC_PLL1;
2437 break;
2438 case RT5670_SCLK_S_RCCLK:
2439 reg_val |= RT5670_SCLK_SRC_RCCLK;
2440 break;
2441 default:
2442 dev_err(component->dev, "Invalid clock id (%d)\n", clk_id);
2443 return -EINVAL;
2444 }
2445 snd_soc_component_update_bits(component, RT5670_GLB_CLK,
2446 RT5670_SCLK_SRC_MASK, reg_val);
2447 rt5670->sysclk = freq;
2448 if (clk_id != RT5670_SCLK_S_RCCLK)
2449 rt5670->sysclk_src = clk_id;
2450
2451 dev_dbg(component->dev, "Sysclk : %dHz clock id : %d\n", freq, clk_id);
2452
2453 return 0;
2454}
2455
2456static int rt5670_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
2457 unsigned int freq_in, unsigned int freq_out)
2458{
2459 struct snd_soc_component *component = dai->component;
2460 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
2461 struct rl6231_pll_code pll_code;
2462 int ret;
2463
2464 if (source == rt5670->pll_src && freq_in == rt5670->pll_in &&
2465 freq_out == rt5670->pll_out)
2466 return 0;
2467
2468 if (!freq_in || !freq_out) {
2469 dev_dbg(component->dev, "PLL disabled\n");
2470
2471 rt5670->pll_in = 0;
2472 rt5670->pll_out = 0;
2473 snd_soc_component_update_bits(component, RT5670_GLB_CLK,
2474 RT5670_SCLK_SRC_MASK, RT5670_SCLK_SRC_MCLK);
2475 return 0;
2476 }
2477
2478 switch (source) {
2479 case RT5670_PLL1_S_MCLK:
2480 snd_soc_component_update_bits(component, RT5670_GLB_CLK,
2481 RT5670_PLL1_SRC_MASK, RT5670_PLL1_SRC_MCLK);
2482 break;
2483 case RT5670_PLL1_S_BCLK1:
2484 case RT5670_PLL1_S_BCLK2:
2485 case RT5670_PLL1_S_BCLK3:
2486 case RT5670_PLL1_S_BCLK4:
2487 switch (dai->id) {
2488 case RT5670_AIF1:
2489 snd_soc_component_update_bits(component, RT5670_GLB_CLK,
2490 RT5670_PLL1_SRC_MASK, RT5670_PLL1_SRC_BCLK1);
2491 break;
2492 case RT5670_AIF2:
2493 snd_soc_component_update_bits(component, RT5670_GLB_CLK,
2494 RT5670_PLL1_SRC_MASK, RT5670_PLL1_SRC_BCLK2);
2495 break;
2496 default:
2497 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
2498 return -EINVAL;
2499 }
2500 break;
2501 default:
2502 dev_err(component->dev, "Unknown PLL source %d\n", source);
2503 return -EINVAL;
2504 }
2505
2506 ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
2507 if (ret < 0) {
2508 dev_err(component->dev, "Unsupport input clock %d\n", freq_in);
2509 return ret;
2510 }
2511
2512 dev_dbg(component->dev, "bypass=%d m=%d n=%d k=%d\n",
2513 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
2514 pll_code.n_code, pll_code.k_code);
2515
2516 snd_soc_component_write(component, RT5670_PLL_CTRL1,
2517 pll_code.n_code << RT5670_PLL_N_SFT | pll_code.k_code);
2518 snd_soc_component_write(component, RT5670_PLL_CTRL2,
2519 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5670_PLL_M_SFT |
2520 pll_code.m_bp << RT5670_PLL_M_BP_SFT);
2521
2522 rt5670->pll_in = freq_in;
2523 rt5670->pll_out = freq_out;
2524 rt5670->pll_src = source;
2525
2526 return 0;
2527}
2528
2529static int rt5670_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
2530 unsigned int rx_mask, int slots, int slot_width)
2531{
2532 struct snd_soc_component *component = dai->component;
2533 unsigned int val = 0;
2534
2535 if (rx_mask || tx_mask)
2536 val |= (1 << 14);
2537
2538 switch (slots) {
2539 case 4:
2540 val |= (1 << 12);
2541 break;
2542 case 6:
2543 val |= (2 << 12);
2544 break;
2545 case 8:
2546 val |= (3 << 12);
2547 break;
2548 case 2:
2549 break;
2550 default:
2551 return -EINVAL;
2552 }
2553
2554 switch (slot_width) {
2555 case 20:
2556 val |= (1 << 10);
2557 break;
2558 case 24:
2559 val |= (2 << 10);
2560 break;
2561 case 32:
2562 val |= (3 << 10);
2563 break;
2564 case 16:
2565 break;
2566 default:
2567 return -EINVAL;
2568 }
2569
2570 snd_soc_component_update_bits(component, RT5670_TDM_CTRL_1, 0x7c00, val);
2571
2572 return 0;
2573}
2574
2575static int rt5670_set_bclk_ratio(struct snd_soc_dai *dai, unsigned int ratio)
2576{
2577 struct snd_soc_component *component = dai->component;
2578
2579 dev_dbg(component->dev, "%s ratio=%d\n", __func__, ratio);
2580 if (dai->id != RT5670_AIF1)
2581 return 0;
2582
2583 if ((ratio % 50) == 0)
2584 snd_soc_component_update_bits(component, RT5670_GEN_CTRL3,
2585 RT5670_TDM_DATA_MODE_SEL, RT5670_TDM_DATA_MODE_50FS);
2586 else
2587 snd_soc_component_update_bits(component, RT5670_GEN_CTRL3,
2588 RT5670_TDM_DATA_MODE_SEL, RT5670_TDM_DATA_MODE_NOR);
2589
2590 return 0;
2591}
2592
2593static int rt5670_set_bias_level(struct snd_soc_component *component,
2594 enum snd_soc_bias_level level)
2595{
2596 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
2597
2598 switch (level) {
2599 case SND_SOC_BIAS_PREPARE:
2600 if (SND_SOC_BIAS_STANDBY == snd_soc_component_get_bias_level(component)) {
2601 snd_soc_component_update_bits(component, RT5670_PWR_ANLG1,
2602 RT5670_PWR_VREF1 | RT5670_PWR_MB |
2603 RT5670_PWR_BG | RT5670_PWR_VREF2,
2604 RT5670_PWR_VREF1 | RT5670_PWR_MB |
2605 RT5670_PWR_BG | RT5670_PWR_VREF2);
2606 mdelay(10);
2607 snd_soc_component_update_bits(component, RT5670_PWR_ANLG1,
2608 RT5670_PWR_FV1 | RT5670_PWR_FV2,
2609 RT5670_PWR_FV1 | RT5670_PWR_FV2);
2610 snd_soc_component_update_bits(component, RT5670_CHARGE_PUMP,
2611 RT5670_OSW_L_MASK | RT5670_OSW_R_MASK,
2612 RT5670_OSW_L_DIS | RT5670_OSW_R_DIS);
2613 snd_soc_component_update_bits(component, RT5670_DIG_MISC, 0x1, 0x1);
2614 snd_soc_component_update_bits(component, RT5670_PWR_ANLG1,
2615 RT5670_LDO_SEL_MASK, 0x5);
2616 }
2617 break;
2618 case SND_SOC_BIAS_STANDBY:
2619 snd_soc_component_update_bits(component, RT5670_PWR_ANLG1,
2620 RT5670_PWR_VREF1 | RT5670_PWR_VREF2 |
2621 RT5670_PWR_FV1 | RT5670_PWR_FV2, 0);
2622 snd_soc_component_update_bits(component, RT5670_PWR_ANLG1,
2623 RT5670_LDO_SEL_MASK, 0x3);
2624 break;
2625 case SND_SOC_BIAS_OFF:
2626 if (rt5670->jd_mode)
2627 snd_soc_component_update_bits(component, RT5670_PWR_ANLG1,
2628 RT5670_PWR_VREF1 | RT5670_PWR_MB |
2629 RT5670_PWR_BG | RT5670_PWR_VREF2 |
2630 RT5670_PWR_FV1 | RT5670_PWR_FV2,
2631 RT5670_PWR_MB | RT5670_PWR_BG);
2632 else
2633 snd_soc_component_update_bits(component, RT5670_PWR_ANLG1,
2634 RT5670_PWR_VREF1 | RT5670_PWR_MB |
2635 RT5670_PWR_BG | RT5670_PWR_VREF2 |
2636 RT5670_PWR_FV1 | RT5670_PWR_FV2, 0);
2637
2638 snd_soc_component_update_bits(component, RT5670_DIG_MISC, 0x1, 0x0);
2639 break;
2640
2641 default:
2642 break;
2643 }
2644
2645 return 0;
2646}
2647
2648static int rt5670_probe(struct snd_soc_component *component)
2649{
2650 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
2651 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
2652
2653 switch (snd_soc_component_read(component, RT5670_RESET) & RT5670_ID_MASK) {
2654 case RT5670_ID_5670:
2655 case RT5670_ID_5671:
2656 snd_soc_dapm_new_controls(dapm,
2657 rt5670_specific_dapm_widgets,
2658 ARRAY_SIZE(rt5670_specific_dapm_widgets));
2659 snd_soc_dapm_add_routes(dapm,
2660 rt5670_specific_dapm_routes,
2661 ARRAY_SIZE(rt5670_specific_dapm_routes));
2662 break;
2663 case RT5670_ID_5672:
2664 snd_soc_dapm_new_controls(dapm,
2665 rt5672_specific_dapm_widgets,
2666 ARRAY_SIZE(rt5672_specific_dapm_widgets));
2667 snd_soc_dapm_add_routes(dapm,
2668 rt5672_specific_dapm_routes,
2669 ARRAY_SIZE(rt5672_specific_dapm_routes));
2670 break;
2671 default:
2672 dev_err(component->dev,
2673 "The driver is for RT5670 RT5671 or RT5672 only\n");
2674 return -ENODEV;
2675 }
2676 rt5670->component = component;
2677
2678 return 0;
2679}
2680
2681static void rt5670_remove(struct snd_soc_component *component)
2682{
2683 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
2684
2685 regmap_write(rt5670->regmap, RT5670_RESET, 0);
2686 snd_soc_jack_free_gpios(rt5670->jack, 1, &rt5670->hp_gpio);
2687}
2688
2689#ifdef CONFIG_PM
2690static int rt5670_suspend(struct snd_soc_component *component)
2691{
2692 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
2693
2694 regcache_cache_only(rt5670->regmap, true);
2695 regcache_mark_dirty(rt5670->regmap);
2696 return 0;
2697}
2698
2699static int rt5670_resume(struct snd_soc_component *component)
2700{
2701 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
2702
2703 regcache_cache_only(rt5670->regmap, false);
2704 regcache_sync(rt5670->regmap);
2705
2706 return 0;
2707}
2708#else
2709#define rt5670_suspend NULL
2710#define rt5670_resume NULL
2711#endif
2712
2713#define RT5670_STEREO_RATES SNDRV_PCM_RATE_8000_96000
2714#define RT5670_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
2715 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
2716
2717static const struct snd_soc_dai_ops rt5670_aif_dai_ops = {
2718 .hw_params = rt5670_hw_params,
2719 .set_fmt = rt5670_set_dai_fmt,
2720 .set_tdm_slot = rt5670_set_tdm_slot,
2721 .set_pll = rt5670_set_dai_pll,
2722 .set_bclk_ratio = rt5670_set_bclk_ratio,
2723};
2724
2725static struct snd_soc_dai_driver rt5670_dai[] = {
2726 {
2727 .name = "rt5670-aif1",
2728 .id = RT5670_AIF1,
2729 .playback = {
2730 .stream_name = "AIF1 Playback",
2731 .channels_min = 1,
2732 .channels_max = 2,
2733 .rates = RT5670_STEREO_RATES,
2734 .formats = RT5670_FORMATS,
2735 },
2736 .capture = {
2737 .stream_name = "AIF1 Capture",
2738 .channels_min = 1,
2739 .channels_max = 2,
2740 .rates = RT5670_STEREO_RATES,
2741 .formats = RT5670_FORMATS,
2742 },
2743 .ops = &rt5670_aif_dai_ops,
2744 .symmetric_rates = 1,
2745 },
2746 {
2747 .name = "rt5670-aif2",
2748 .id = RT5670_AIF2,
2749 .playback = {
2750 .stream_name = "AIF2 Playback",
2751 .channels_min = 1,
2752 .channels_max = 2,
2753 .rates = RT5670_STEREO_RATES,
2754 .formats = RT5670_FORMATS,
2755 },
2756 .capture = {
2757 .stream_name = "AIF2 Capture",
2758 .channels_min = 1,
2759 .channels_max = 2,
2760 .rates = RT5670_STEREO_RATES,
2761 .formats = RT5670_FORMATS,
2762 },
2763 .ops = &rt5670_aif_dai_ops,
2764 .symmetric_rates = 1,
2765 },
2766};
2767
2768static const struct snd_soc_component_driver soc_component_dev_rt5670 = {
2769 .probe = rt5670_probe,
2770 .remove = rt5670_remove,
2771 .suspend = rt5670_suspend,
2772 .resume = rt5670_resume,
2773 .set_bias_level = rt5670_set_bias_level,
2774 .set_sysclk = rt5670_set_codec_sysclk,
2775 .controls = rt5670_snd_controls,
2776 .num_controls = ARRAY_SIZE(rt5670_snd_controls),
2777 .dapm_widgets = rt5670_dapm_widgets,
2778 .num_dapm_widgets = ARRAY_SIZE(rt5670_dapm_widgets),
2779 .dapm_routes = rt5670_dapm_routes,
2780 .num_dapm_routes = ARRAY_SIZE(rt5670_dapm_routes),
2781 .use_pmdown_time = 1,
2782 .endianness = 1,
2783 .non_legacy_dai_naming = 1,
2784};
2785
2786static const struct regmap_config rt5670_regmap = {
2787 .reg_bits = 8,
2788 .val_bits = 16,
2789 .use_single_read = true,
2790 .use_single_write = true,
2791 .max_register = RT5670_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5670_ranges) *
2792 RT5670_PR_SPACING),
2793 .volatile_reg = rt5670_volatile_register,
2794 .readable_reg = rt5670_readable_register,
2795 .cache_type = REGCACHE_RBTREE,
2796 .reg_defaults = rt5670_reg,
2797 .num_reg_defaults = ARRAY_SIZE(rt5670_reg),
2798 .ranges = rt5670_ranges,
2799 .num_ranges = ARRAY_SIZE(rt5670_ranges),
2800};
2801
2802static const struct i2c_device_id rt5670_i2c_id[] = {
2803 { "rt5670", 0 },
2804 { "rt5671", 0 },
2805 { "rt5672", 0 },
2806 { }
2807};
2808MODULE_DEVICE_TABLE(i2c, rt5670_i2c_id);
2809
2810#ifdef CONFIG_ACPI
2811static const struct acpi_device_id rt5670_acpi_match[] = {
2812 { "10EC5670", 0},
2813 { "10EC5672", 0},
2814 { "10EC5640", 0},
2815 { },
2816};
2817MODULE_DEVICE_TABLE(acpi, rt5670_acpi_match);
2818#endif
2819
2820static int rt5670_quirk_cb(const struct dmi_system_id *id)
2821{
2822 rt5670_quirk = (unsigned long)id->driver_data;
2823 return 1;
2824}
2825
2826static const struct dmi_system_id dmi_platform_intel_quirks[] = {
2827 {
2828 .callback = rt5670_quirk_cb,
2829 .ident = "Intel Braswell",
2830 .matches = {
2831 DMI_MATCH(DMI_SYS_VENDOR, "Intel Corporation"),
2832 DMI_MATCH(DMI_BOARD_NAME, "Braswell CRB"),
2833 },
2834 .driver_data = (unsigned long *)(RT5670_DMIC_EN |
2835 RT5670_DMIC1_IN2P |
2836 RT5670_GPIO1_IS_IRQ |
2837 RT5670_JD_MODE1),
2838 },
2839 {
2840 .callback = rt5670_quirk_cb,
2841 .ident = "Dell Wyse 3040",
2842 .matches = {
2843 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
2844 DMI_MATCH(DMI_PRODUCT_NAME, "Wyse 3040"),
2845 },
2846 .driver_data = (unsigned long *)(RT5670_DMIC_EN |
2847 RT5670_DMIC1_IN2P |
2848 RT5670_GPIO1_IS_IRQ |
2849 RT5670_JD_MODE1),
2850 },
2851 {
2852 .callback = rt5670_quirk_cb,
2853 .ident = "Lenovo Thinkpad Tablet 8",
2854 .matches = {
2855 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
2856 DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad 8"),
2857 },
2858 .driver_data = (unsigned long *)(RT5670_DMIC_EN |
2859 RT5670_DMIC2_INR |
2860 RT5670_GPIO1_IS_IRQ |
2861 RT5670_JD_MODE1),
2862 },
2863 {
2864 .callback = rt5670_quirk_cb,
2865 .ident = "Lenovo Thinkpad Tablet 10",
2866 .matches = {
2867 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
2868 DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad 10"),
2869 },
2870 .driver_data = (unsigned long *)(RT5670_DMIC_EN |
2871 RT5670_DMIC1_IN2P |
2872 RT5670_GPIO1_IS_IRQ |
2873 RT5670_JD_MODE1),
2874 },
2875 {
2876 .callback = rt5670_quirk_cb,
2877 .ident = "Lenovo Thinkpad Tablet 10",
2878 .matches = {
2879 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
2880 DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad Tablet B"),
2881 },
2882 .driver_data = (unsigned long *)(RT5670_DMIC_EN |
2883 RT5670_DMIC1_IN2P |
2884 RT5670_GPIO1_IS_IRQ |
2885 RT5670_JD_MODE1),
2886 },
2887 {
2888 .callback = rt5670_quirk_cb,
2889 .ident = "Lenovo Miix 2 10",
2890 .matches = {
2891 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
2892 DMI_MATCH(DMI_PRODUCT_VERSION, "Lenovo Miix 2 10"),
2893 },
2894 .driver_data = (unsigned long *)(RT5670_DMIC_EN |
2895 RT5670_DMIC1_IN2P |
2896 RT5670_GPIO1_IS_EXT_SPK_EN |
2897 RT5670_JD_MODE2),
2898 },
2899 {
2900 .callback = rt5670_quirk_cb,
2901 .ident = "Dell Venue 8 Pro 5855",
2902 .matches = {
2903 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
2904 DMI_MATCH(DMI_PRODUCT_NAME, "Venue 8 Pro 5855"),
2905 },
2906 .driver_data = (unsigned long *)(RT5670_DMIC_EN |
2907 RT5670_DMIC2_INR |
2908 RT5670_GPIO1_IS_IRQ |
2909 RT5670_JD_MODE3),
2910 },
2911 {
2912 .callback = rt5670_quirk_cb,
2913 .ident = "Aegex 10 tablet (RU2)",
2914 .matches = {
2915 DMI_MATCH(DMI_SYS_VENDOR, "AEGEX"),
2916 DMI_MATCH(DMI_PRODUCT_VERSION, "RU2"),
2917 },
2918 .driver_data = (unsigned long *)(RT5670_DMIC_EN |
2919 RT5670_DMIC2_INR |
2920 RT5670_GPIO1_IS_IRQ |
2921 RT5670_JD_MODE3),
2922 },
2923 {}
2924};
2925
2926static int rt5670_i2c_probe(struct i2c_client *i2c,
2927 const struct i2c_device_id *id)
2928{
2929 struct rt5670_priv *rt5670;
2930 int ret;
2931 unsigned int val;
2932
2933 rt5670 = devm_kzalloc(&i2c->dev,
2934 sizeof(struct rt5670_priv),
2935 GFP_KERNEL);
2936 if (NULL == rt5670)
2937 return -ENOMEM;
2938
2939 i2c_set_clientdata(i2c, rt5670);
2940
2941 dmi_check_system(dmi_platform_intel_quirks);
2942 if (quirk_override) {
2943 dev_info(&i2c->dev, "Overriding quirk 0x%x => 0x%x\n",
2944 (unsigned int)rt5670_quirk, quirk_override);
2945 rt5670_quirk = quirk_override;
2946 }
2947
2948 if (rt5670_quirk & RT5670_GPIO1_IS_IRQ) {
2949 rt5670->gpio1_is_irq = true;
2950 dev_info(&i2c->dev, "quirk GPIO1 is IRQ\n");
2951 }
2952 if (rt5670_quirk & RT5670_GPIO1_IS_EXT_SPK_EN) {
2953 rt5670->gpio1_is_ext_spk_en = true;
2954 dev_info(&i2c->dev, "quirk GPIO1 is external speaker enable\n");
2955 }
2956 if (rt5670_quirk & RT5670_IN2_DIFF) {
2957 rt5670->in2_diff = true;
2958 dev_info(&i2c->dev, "quirk IN2_DIFF\n");
2959 }
2960 if (rt5670_quirk & RT5670_DMIC_EN) {
2961 rt5670->dmic_en = true;
2962 dev_info(&i2c->dev, "quirk DMIC enabled\n");
2963 }
2964 if (rt5670_quirk & RT5670_DMIC1_IN2P) {
2965 rt5670->dmic1_data_pin = RT5670_DMIC_DATA_IN2P;
2966 dev_info(&i2c->dev, "quirk DMIC1 on IN2P pin\n");
2967 }
2968 if (rt5670_quirk & RT5670_DMIC1_GPIO6) {
2969 rt5670->dmic1_data_pin = RT5670_DMIC_DATA_GPIO6;
2970 dev_info(&i2c->dev, "quirk DMIC1 on GPIO6 pin\n");
2971 }
2972 if (rt5670_quirk & RT5670_DMIC1_GPIO7) {
2973 rt5670->dmic1_data_pin = RT5670_DMIC_DATA_GPIO7;
2974 dev_info(&i2c->dev, "quirk DMIC1 on GPIO7 pin\n");
2975 }
2976 if (rt5670_quirk & RT5670_DMIC2_INR) {
2977 rt5670->dmic2_data_pin = RT5670_DMIC_DATA_IN3N;
2978 dev_info(&i2c->dev, "quirk DMIC2 on INR pin\n");
2979 }
2980 if (rt5670_quirk & RT5670_DMIC2_GPIO8) {
2981 rt5670->dmic2_data_pin = RT5670_DMIC_DATA_GPIO8;
2982 dev_info(&i2c->dev, "quirk DMIC2 on GPIO8 pin\n");
2983 }
2984 if (rt5670_quirk & RT5670_DMIC3_GPIO5) {
2985 rt5670->dmic3_data_pin = RT5670_DMIC_DATA_GPIO5;
2986 dev_info(&i2c->dev, "quirk DMIC3 on GPIO5 pin\n");
2987 }
2988
2989 if (rt5670_quirk & RT5670_JD_MODE1) {
2990 rt5670->jd_mode = 1;
2991 dev_info(&i2c->dev, "quirk JD mode 1\n");
2992 }
2993 if (rt5670_quirk & RT5670_JD_MODE2) {
2994 rt5670->jd_mode = 2;
2995 dev_info(&i2c->dev, "quirk JD mode 2\n");
2996 }
2997 if (rt5670_quirk & RT5670_JD_MODE3) {
2998 rt5670->jd_mode = 3;
2999 dev_info(&i2c->dev, "quirk JD mode 3\n");
3000 }
3001
3002 rt5670->regmap = devm_regmap_init_i2c(i2c, &rt5670_regmap);
3003 if (IS_ERR(rt5670->regmap)) {
3004 ret = PTR_ERR(rt5670->regmap);
3005 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
3006 ret);
3007 return ret;
3008 }
3009
3010 regmap_read(rt5670->regmap, RT5670_VENDOR_ID2, &val);
3011 if (val != RT5670_DEVICE_ID) {
3012 dev_err(&i2c->dev,
3013 "Device with ID register %#x is not rt5670/72\n", val);
3014 return -ENODEV;
3015 }
3016
3017 regmap_write(rt5670->regmap, RT5670_RESET, 0);
3018 regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1,
3019 RT5670_PWR_HP_L | RT5670_PWR_HP_R |
3020 RT5670_PWR_VREF2, RT5670_PWR_VREF2);
3021 msleep(100);
3022
3023 regmap_write(rt5670->regmap, RT5670_RESET, 0);
3024
3025 regmap_read(rt5670->regmap, RT5670_VENDOR_ID, &val);
3026 if (val >= 4)
3027 regmap_write(rt5670->regmap, RT5670_GPIO_CTRL3, 0x0980);
3028 else
3029 regmap_write(rt5670->regmap, RT5670_GPIO_CTRL3, 0x0d00);
3030
3031 ret = regmap_register_patch(rt5670->regmap, init_list,
3032 ARRAY_SIZE(init_list));
3033 if (ret != 0)
3034 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
3035
3036 regmap_update_bits(rt5670->regmap, RT5670_DIG_MISC,
3037 RT5670_MCLK_DET, RT5670_MCLK_DET);
3038
3039 if (rt5670->in2_diff)
3040 regmap_update_bits(rt5670->regmap, RT5670_IN2,
3041 RT5670_IN_DF2, RT5670_IN_DF2);
3042
3043 if (rt5670->gpio1_is_irq) {
3044
3045 regmap_write(rt5670->regmap, RT5670_IL_CMD, 0x0000);
3046 regmap_write(rt5670->regmap, RT5670_IL_CMD2, 0x0010);
3047 regmap_write(rt5670->regmap, RT5670_IL_CMD3, 0x0014);
3048
3049 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
3050 RT5670_GP1_PIN_MASK, RT5670_GP1_PIN_IRQ);
3051 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL2,
3052 RT5670_GP1_PF_MASK, RT5670_GP1_PF_OUT);
3053 }
3054
3055 if (rt5670->gpio1_is_ext_spk_en) {
3056 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
3057 RT5670_GP1_PIN_MASK, RT5670_GP1_PIN_GPIO1);
3058 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL2,
3059 RT5670_GP1_PF_MASK, RT5670_GP1_PF_OUT);
3060 }
3061
3062 if (rt5670->jd_mode) {
3063 regmap_update_bits(rt5670->regmap, RT5670_GLB_CLK,
3064 RT5670_SCLK_SRC_MASK, RT5670_SCLK_SRC_RCCLK);
3065 rt5670->sysclk = 0;
3066 rt5670->sysclk_src = RT5670_SCLK_S_RCCLK;
3067 regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1,
3068 RT5670_PWR_MB, RT5670_PWR_MB);
3069 regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG2,
3070 RT5670_PWR_JD1, RT5670_PWR_JD1);
3071 regmap_update_bits(rt5670->regmap, RT5670_IRQ_CTRL1,
3072 RT5670_JD1_1_EN_MASK, RT5670_JD1_1_EN);
3073 regmap_update_bits(rt5670->regmap, RT5670_JD_CTRL3,
3074 RT5670_JD_TRI_CBJ_SEL_MASK |
3075 RT5670_JD_TRI_HPO_SEL_MASK,
3076 RT5670_JD_CBJ_JD1_1 | RT5670_JD_HPO_JD1_1);
3077 switch (rt5670->jd_mode) {
3078 case 1:
3079 regmap_update_bits(rt5670->regmap, RT5670_A_JD_CTRL1,
3080 RT5670_JD1_MODE_MASK,
3081 RT5670_JD1_MODE_0);
3082 break;
3083 case 2:
3084 regmap_update_bits(rt5670->regmap, RT5670_A_JD_CTRL1,
3085 RT5670_JD1_MODE_MASK,
3086 RT5670_JD1_MODE_1);
3087 break;
3088 case 3:
3089 regmap_update_bits(rt5670->regmap, RT5670_A_JD_CTRL1,
3090 RT5670_JD1_MODE_MASK,
3091 RT5670_JD1_MODE_2);
3092 break;
3093 default:
3094 break;
3095 }
3096 }
3097
3098 if (rt5670->dmic_en) {
3099 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
3100 RT5670_GP2_PIN_MASK,
3101 RT5670_GP2_PIN_DMIC1_SCL);
3102
3103 switch (rt5670->dmic1_data_pin) {
3104 case RT5670_DMIC_DATA_IN2P:
3105 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
3106 RT5670_DMIC_1_DP_MASK,
3107 RT5670_DMIC_1_DP_IN2P);
3108 break;
3109
3110 case RT5670_DMIC_DATA_GPIO6:
3111 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
3112 RT5670_DMIC_1_DP_MASK,
3113 RT5670_DMIC_1_DP_GPIO6);
3114 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
3115 RT5670_GP6_PIN_MASK,
3116 RT5670_GP6_PIN_DMIC1_SDA);
3117 break;
3118
3119 case RT5670_DMIC_DATA_GPIO7:
3120 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
3121 RT5670_DMIC_1_DP_MASK,
3122 RT5670_DMIC_1_DP_GPIO7);
3123 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
3124 RT5670_GP7_PIN_MASK,
3125 RT5670_GP7_PIN_DMIC1_SDA);
3126 break;
3127
3128 default:
3129 break;
3130 }
3131
3132 switch (rt5670->dmic2_data_pin) {
3133 case RT5670_DMIC_DATA_IN3N:
3134 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
3135 RT5670_DMIC_2_DP_MASK,
3136 RT5670_DMIC_2_DP_IN3N);
3137 break;
3138
3139 case RT5670_DMIC_DATA_GPIO8:
3140 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
3141 RT5670_DMIC_2_DP_MASK,
3142 RT5670_DMIC_2_DP_GPIO8);
3143 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
3144 RT5670_GP8_PIN_MASK,
3145 RT5670_GP8_PIN_DMIC2_SDA);
3146 break;
3147
3148 default:
3149 break;
3150 }
3151
3152 switch (rt5670->dmic3_data_pin) {
3153 case RT5670_DMIC_DATA_GPIO5:
3154 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL2,
3155 RT5670_DMIC_3_DP_MASK,
3156 RT5670_DMIC_3_DP_GPIO5);
3157 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
3158 RT5670_GP5_PIN_MASK,
3159 RT5670_GP5_PIN_DMIC3_SDA);
3160 break;
3161
3162 case RT5670_DMIC_DATA_GPIO9:
3163 case RT5670_DMIC_DATA_GPIO10:
3164 dev_err(&i2c->dev,
3165 "Always use GPIO5 as DMIC3 data pin\n");
3166 break;
3167
3168 default:
3169 break;
3170 }
3171
3172 }
3173
3174 pm_runtime_enable(&i2c->dev);
3175 pm_request_idle(&i2c->dev);
3176
3177 ret = devm_snd_soc_register_component(&i2c->dev,
3178 &soc_component_dev_rt5670,
3179 rt5670_dai, ARRAY_SIZE(rt5670_dai));
3180 if (ret < 0)
3181 goto err;
3182
3183 pm_runtime_put(&i2c->dev);
3184
3185 return 0;
3186err:
3187 pm_runtime_disable(&i2c->dev);
3188
3189 return ret;
3190}
3191
3192static int rt5670_i2c_remove(struct i2c_client *i2c)
3193{
3194 pm_runtime_disable(&i2c->dev);
3195
3196 return 0;
3197}
3198
3199static struct i2c_driver rt5670_i2c_driver = {
3200 .driver = {
3201 .name = "rt5670",
3202 .acpi_match_table = ACPI_PTR(rt5670_acpi_match),
3203 },
3204 .probe = rt5670_i2c_probe,
3205 .remove = rt5670_i2c_remove,
3206 .id_table = rt5670_i2c_id,
3207};
3208
3209module_i2c_driver(rt5670_i2c_driver);
3210
3211MODULE_DESCRIPTION("ASoC RT5670 driver");
3212MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
3213MODULE_LICENSE("GPL v2");
3214
