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10#include <linux/delay.h>
11#include <linux/device.h>
12#include <linux/mod_devicetable.h>
13#include <linux/soundwire/sdw.h>
14#include <linux/soundwire/sdw_type.h>
15#include <linux/module.h>
16#include <linux/of.h>
17#include <linux/regmap.h>
18#include <sound/soc.h>
19#include "rt715.h"
20#include "rt715-sdw.h"
21
22static bool rt715_readable_register(struct device *dev, unsigned int reg)
23{
24 switch (reg) {
25 case 0x00e0 ... 0x00e5:
26 case 0x00ee ... 0x00ef:
27 case 0x00f0 ... 0x00f5:
28 case 0x00fe ... 0x00ff:
29 case 0x02e0:
30 case 0x02f0:
31 case 0x04e0:
32 case 0x04f0:
33 case 0x06e0:
34 case 0x06f0:
35 case 0x2000 ... 0x2016:
36 case 0x201a ... 0x2027:
37 case 0x2029 ... 0x202a:
38 case 0x202d ... 0x2034:
39 case 0x2200 ... 0x2204:
40 case 0x2206 ... 0x2212:
41 case 0x2220 ... 0x2223:
42 case 0x2230 ... 0x2239:
43 case 0x22f0 ... 0x22f3:
44 case 0x3122:
45 case 0x3123:
46 case 0x3124:
47 case 0x3125:
48 case 0x3607:
49 case 0x3608:
50 case 0x3609:
51 case 0x3610:
52 case 0x3611:
53 case 0x3627:
54 case 0x3712:
55 case 0x3713:
56 case 0x3718:
57 case 0x3719:
58 case 0x371a:
59 case 0x371b:
60 case 0x371d:
61 case 0x3729:
62 case 0x385e:
63 case 0x3859:
64 case 0x4c12:
65 case 0x4c13:
66 case 0x4c1d:
67 case 0x4c29:
68 case 0x4d12:
69 case 0x4d13:
70 case 0x4d1d:
71 case 0x4d29:
72 case 0x4e12:
73 case 0x4e13:
74 case 0x4e1d:
75 case 0x4e29:
76 case 0x4f12:
77 case 0x4f13:
78 case 0x4f1d:
79 case 0x4f29:
80 case 0x7207:
81 case 0x7208:
82 case 0x7209:
83 case 0x7227:
84 case 0x7307:
85 case 0x7308:
86 case 0x7309:
87 case 0x7312:
88 case 0x7313:
89 case 0x7318:
90 case 0x7319:
91 case 0x731a:
92 case 0x731b:
93 case 0x731d:
94 case 0x7327:
95 case 0x7329:
96 case 0x8287:
97 case 0x8288:
98 case 0x8289:
99 case 0x82a7:
100 case 0x8387:
101 case 0x8388:
102 case 0x8389:
103 case 0x8392:
104 case 0x8393:
105 case 0x8398:
106 case 0x8399:
107 case 0x839a:
108 case 0x839b:
109 case 0x839d:
110 case 0x83a7:
111 case 0x83a9:
112 case 0x752039:
113 return true;
114 default:
115 return false;
116 }
117}
118
119static bool rt715_volatile_register(struct device *dev, unsigned int reg)
120{
121 switch (reg) {
122 case 0x00e5:
123 case 0x00f0:
124 case 0x00f3:
125 case 0x00f5:
126 case 0x2009:
127 case 0x2016:
128 case 0x201b:
129 case 0x201c:
130 case 0x201d:
131 case 0x201f:
132 case 0x2023:
133 case 0x2230:
134 case 0x200b ... 0x200e:
135 case 0x2012 ... 0x2015:
136 case 0x202d ... 0x202f:
137 case 0x2201 ... 0x2212:
138 case 0x2220 ... 0x2223:
139 return true;
140 default:
141 return false;
142 }
143}
144
145static int rt715_sdw_read(void *context, unsigned int reg, unsigned int *val)
146{
147 struct device *dev = context;
148 struct rt715_priv *rt715 = dev_get_drvdata(dev);
149 unsigned int sdw_data_3, sdw_data_2, sdw_data_1, sdw_data_0;
150 unsigned int reg2 = 0, reg3 = 0, reg4 = 0, mask, nid, val2;
151 unsigned int is_hda_reg = 1, is_index_reg = 0;
152 int ret;
153
154 if (reg > 0xffff)
155 is_index_reg = 1;
156
157 mask = reg & 0xf000;
158
159 if (is_index_reg) {
160 val2 = reg & 0xff;
161 reg = reg >> 8;
162 nid = reg & 0xff;
163 ret = regmap_write(rt715->sdw_regmap, reg, 0);
164 if (ret < 0)
165 return ret;
166 reg2 = reg + 0x1000;
167 reg2 |= 0x80;
168 ret = regmap_write(rt715->sdw_regmap, reg2, val2);
169 if (ret < 0)
170 return ret;
171
172 reg3 = RT715_PRIV_DATA_R_H | nid;
173 ret = regmap_write(rt715->sdw_regmap, reg3,
174 ((*val >> 8) & 0xff));
175 if (ret < 0)
176 return ret;
177 reg4 = reg3 + 0x1000;
178 reg4 |= 0x80;
179 ret = regmap_write(rt715->sdw_regmap, reg4, (*val & 0xff));
180 if (ret < 0)
181 return ret;
182 } else if (mask == 0x3000) {
183 reg += 0x8000;
184 ret = regmap_write(rt715->sdw_regmap, reg, *val);
185 if (ret < 0)
186 return ret;
187 } else if (mask == 0x7000) {
188 reg += 0x2000;
189 reg |= 0x800;
190 ret = regmap_write(rt715->sdw_regmap, reg,
191 ((*val >> 8) & 0xff));
192 if (ret < 0)
193 return ret;
194 reg2 = reg + 0x1000;
195 reg2 |= 0x80;
196 ret = regmap_write(rt715->sdw_regmap, reg2, (*val & 0xff));
197 if (ret < 0)
198 return ret;
199 } else if ((reg & 0xff00) == 0x8300) {
200 reg2 = reg - 0x1000;
201 reg2 &= ~0x80;
202 ret = regmap_write(rt715->sdw_regmap, reg2,
203 ((*val >> 8) & 0xff));
204 if (ret < 0)
205 return ret;
206 ret = regmap_write(rt715->sdw_regmap, reg, (*val & 0xff));
207 if (ret < 0)
208 return ret;
209 } else if (mask == 0x9000) {
210 ret = regmap_write(rt715->sdw_regmap, reg,
211 ((*val >> 8) & 0xff));
212 if (ret < 0)
213 return ret;
214 reg2 = reg + 0x1000;
215 reg2 |= 0x80;
216 ret = regmap_write(rt715->sdw_regmap, reg2, (*val & 0xff));
217 if (ret < 0)
218 return ret;
219 } else if (mask == 0xb000) {
220 ret = regmap_write(rt715->sdw_regmap, reg, *val);
221 if (ret < 0)
222 return ret;
223 } else {
224 ret = regmap_read(rt715->sdw_regmap, reg, val);
225 if (ret < 0)
226 return ret;
227 is_hda_reg = 0;
228 }
229
230 if (is_hda_reg || is_index_reg) {
231 sdw_data_3 = 0;
232 sdw_data_2 = 0;
233 sdw_data_1 = 0;
234 sdw_data_0 = 0;
235 ret = regmap_read(rt715->sdw_regmap, RT715_READ_HDA_3,
236 &sdw_data_3);
237 if (ret < 0)
238 return ret;
239 ret = regmap_read(rt715->sdw_regmap, RT715_READ_HDA_2,
240 &sdw_data_2);
241 if (ret < 0)
242 return ret;
243 ret = regmap_read(rt715->sdw_regmap, RT715_READ_HDA_1,
244 &sdw_data_1);
245 if (ret < 0)
246 return ret;
247 ret = regmap_read(rt715->sdw_regmap, RT715_READ_HDA_0,
248 &sdw_data_0);
249 if (ret < 0)
250 return ret;
251 *val = ((sdw_data_3 & 0xff) << 24) |
252 ((sdw_data_2 & 0xff) << 16) |
253 ((sdw_data_1 & 0xff) << 8) | (sdw_data_0 & 0xff);
254 }
255
256 if (is_hda_reg == 0)
257 dev_dbg(dev, "[%s] %04x => %08x\n", __func__, reg, *val);
258 else if (is_index_reg)
259 dev_dbg(dev, "[%s] %04x %04x %04x %04x => %08x\n", __func__,
260 reg, reg2, reg3, reg4, *val);
261 else
262 dev_dbg(dev, "[%s] %04x %04x => %08x\n",
263 __func__, reg, reg2, *val);
264
265 return 0;
266}
267
268static int rt715_sdw_write(void *context, unsigned int reg, unsigned int val)
269{
270 struct device *dev = context;
271 struct rt715_priv *rt715 = dev_get_drvdata(dev);
272 unsigned int reg2 = 0, reg3, reg4, nid, mask, val2;
273 unsigned int is_index_reg = 0;
274 int ret;
275
276 if (reg > 0xffff)
277 is_index_reg = 1;
278
279 mask = reg & 0xf000;
280
281 if (is_index_reg) {
282 val2 = reg & 0xff;
283 reg = reg >> 8;
284 nid = reg & 0xff;
285 ret = regmap_write(rt715->sdw_regmap, reg, 0);
286 if (ret < 0)
287 return ret;
288 reg2 = reg + 0x1000;
289 reg2 |= 0x80;
290 ret = regmap_write(rt715->sdw_regmap, reg2, val2);
291 if (ret < 0)
292 return ret;
293
294 reg3 = RT715_PRIV_DATA_W_H | nid;
295 ret = regmap_write(rt715->sdw_regmap, reg3,
296 ((val >> 8) & 0xff));
297 if (ret < 0)
298 return ret;
299 reg4 = reg3 + 0x1000;
300 reg4 |= 0x80;
301 ret = regmap_write(rt715->sdw_regmap, reg4, (val & 0xff));
302 if (ret < 0)
303 return ret;
304 is_index_reg = 1;
305 } else if (reg < 0x4fff) {
306 ret = regmap_write(rt715->sdw_regmap, reg, val);
307 if (ret < 0)
308 return ret;
309 } else if (reg == RT715_FUNC_RESET) {
310 ret = regmap_write(rt715->sdw_regmap, reg, val);
311 if (ret < 0)
312 return ret;
313 } else if (mask == 0x7000) {
314 ret = regmap_write(rt715->sdw_regmap, reg,
315 ((val >> 8) & 0xff));
316 if (ret < 0)
317 return ret;
318 reg2 = reg + 0x1000;
319 reg2 |= 0x80;
320 ret = regmap_write(rt715->sdw_regmap, reg2, (val & 0xff));
321 if (ret < 0)
322 return ret;
323 } else if ((reg & 0xff00) == 0x8300) {
324 reg2 = reg - 0x1000;
325 reg2 &= ~0x80;
326 ret = regmap_write(rt715->sdw_regmap, reg2,
327 ((val >> 8) & 0xff));
328 if (ret < 0)
329 return ret;
330 ret = regmap_write(rt715->sdw_regmap, reg, (val & 0xff));
331 if (ret < 0)
332 return ret;
333 }
334
335 if (reg2 == 0)
336 dev_dbg(dev, "[%s] %04x <= %04x\n", __func__, reg, val);
337 else if (is_index_reg)
338 dev_dbg(dev, "[%s] %04x %04x %04x %04x <= %04x %04x\n",
339 __func__, reg, reg2, reg3, reg4, val2, val);
340 else
341 dev_dbg(dev, "[%s] %04x %04x <= %04x\n",
342 __func__, reg, reg2, val);
343
344 return 0;
345}
346
347static const struct regmap_config rt715_regmap = {
348 .reg_bits = 24,
349 .val_bits = 32,
350 .readable_reg = rt715_readable_register,
351 .volatile_reg = rt715_volatile_register,
352 .max_register = 0x752039,
353 .reg_defaults = rt715_reg_defaults,
354 .num_reg_defaults = ARRAY_SIZE(rt715_reg_defaults),
355 .cache_type = REGCACHE_RBTREE,
356 .use_single_read = true,
357 .use_single_write = true,
358 .reg_read = rt715_sdw_read,
359 .reg_write = rt715_sdw_write,
360};
361
362static const struct regmap_config rt715_sdw_regmap = {
363 .name = "sdw",
364 .reg_bits = 32,
365 .val_bits = 8,
366 .max_register = 0xff01,
367 .cache_type = REGCACHE_NONE,
368 .use_single_read = true,
369 .use_single_write = true,
370};
371
372int hda_to_sdw(unsigned int nid, unsigned int verb, unsigned int payload,
373 unsigned int *sdw_addr_h, unsigned int *sdw_data_h,
374 unsigned int *sdw_addr_l, unsigned int *sdw_data_l)
375{
376 unsigned int offset_h, offset_l, e_verb;
377
378 if (((verb & 0xff) != 0) || verb == 0xf00) {
379 if (verb == 0x7ff)
380 offset_h = 0;
381 else
382 offset_h = 0x3000;
383
384 if (verb & 0x800)
385 e_verb = (verb - 0xf00) | 0x80;
386 else
387 e_verb = (verb - 0x700);
388
389 *sdw_data_h = payload;
390 *sdw_addr_l = *sdw_data_l = 0;
391 } else {
392 if ((verb & 0x800) == 0x800) {
393 offset_h = 0x9000;
394 offset_l = 0xa000;
395 } else {
396 offset_h = 0x7000;
397 offset_l = 0x8000;
398 }
399 e_verb = verb >> 8;
400 *sdw_data_h = (payload >> 8);
401 *sdw_addr_l = (e_verb << 8) | nid | 0x80;
402 *sdw_addr_l += offset_l;
403 *sdw_data_l = payload & 0xff;
404 }
405
406 *sdw_addr_h = (e_verb << 8) | nid;
407 *sdw_addr_h += offset_h;
408
409 return 0;
410}
411EXPORT_SYMBOL(hda_to_sdw);
412
413static int rt715_update_status(struct sdw_slave *slave,
414 enum sdw_slave_status status)
415{
416 struct rt715_priv *rt715 = dev_get_drvdata(&slave->dev);
417
418
419 rt715->status = status;
420
421
422
423
424 if (rt715->hw_init || rt715->status != SDW_SLAVE_ATTACHED)
425 return 0;
426
427
428 return rt715_io_init(&slave->dev, slave);
429}
430
431static int rt715_read_prop(struct sdw_slave *slave)
432{
433 struct sdw_slave_prop *prop = &slave->prop;
434 int nval, i, num_of_ports = 1;
435 u32 bit;
436 unsigned long addr;
437 struct sdw_dpn_prop *dpn;
438
439 prop->paging_support = false;
440
441
442 prop->source_ports = 0x50;
443 prop->sink_ports = 0x0;
444
445 nval = hweight32(prop->source_ports);
446 num_of_ports += nval;
447 prop->src_dpn_prop = devm_kcalloc(&slave->dev, nval,
448 sizeof(*prop->src_dpn_prop),
449 GFP_KERNEL);
450 if (!prop->src_dpn_prop)
451 return -ENOMEM;
452
453 dpn = prop->src_dpn_prop;
454 i = 0;
455 addr = prop->source_ports;
456 for_each_set_bit(bit, &addr, 32) {
457 dpn[i].num = bit;
458 dpn[i].simple_ch_prep_sm = true;
459 dpn[i].ch_prep_timeout = 10;
460 i++;
461 }
462
463
464 nval = hweight32(prop->sink_ports);
465 num_of_ports += nval;
466 prop->sink_dpn_prop = devm_kcalloc(&slave->dev, nval,
467 sizeof(*prop->sink_dpn_prop),
468 GFP_KERNEL);
469 if (!prop->sink_dpn_prop)
470 return -ENOMEM;
471
472 dpn = prop->sink_dpn_prop;
473 i = 0;
474 addr = prop->sink_ports;
475 for_each_set_bit(bit, &addr, 32) {
476 dpn[i].num = bit;
477 dpn[i].simple_ch_prep_sm = true;
478 dpn[i].ch_prep_timeout = 10;
479 i++;
480 }
481
482
483 slave->port_ready = devm_kcalloc(&slave->dev, num_of_ports,
484 sizeof(*slave->port_ready),
485 GFP_KERNEL);
486 if (!slave->port_ready)
487 return -ENOMEM;
488
489
490 for (i = 0; i < num_of_ports; i++)
491 init_completion(&slave->port_ready[i]);
492
493
494 prop->clk_stop_timeout = 20;
495
496
497 prop->wake_capable = 1;
498
499 return 0;
500}
501
502static int rt715_bus_config(struct sdw_slave *slave,
503 struct sdw_bus_params *params)
504{
505 struct rt715_priv *rt715 = dev_get_drvdata(&slave->dev);
506 int ret;
507
508 memcpy(&rt715->params, params, sizeof(*params));
509
510 ret = rt715_clock_config(&slave->dev);
511 if (ret < 0)
512 dev_err(&slave->dev, "Invalid clk config");
513
514 return 0;
515}
516
517static struct sdw_slave_ops rt715_slave_ops = {
518 .read_prop = rt715_read_prop,
519 .update_status = rt715_update_status,
520 .bus_config = rt715_bus_config,
521};
522
523static int rt715_sdw_probe(struct sdw_slave *slave,
524 const struct sdw_device_id *id)
525{
526 struct regmap *sdw_regmap, *regmap;
527
528
529 sdw_regmap = devm_regmap_init_sdw(slave, &rt715_sdw_regmap);
530 if (IS_ERR(sdw_regmap))
531 return PTR_ERR(sdw_regmap);
532
533 regmap = devm_regmap_init(&slave->dev, NULL, &slave->dev,
534 &rt715_regmap);
535 if (IS_ERR(regmap))
536 return PTR_ERR(regmap);
537
538 rt715_init(&slave->dev, sdw_regmap, regmap, slave);
539
540 return 0;
541}
542
543static const struct sdw_device_id rt715_id[] = {
544 SDW_SLAVE_ENTRY(0x025d, 0x715, 0),
545 {},
546};
547MODULE_DEVICE_TABLE(sdw, rt715_id);
548
549static int __maybe_unused rt715_dev_suspend(struct device *dev)
550{
551 struct rt715_priv *rt715 = dev_get_drvdata(dev);
552
553 if (!rt715->hw_init)
554 return 0;
555
556 regcache_cache_only(rt715->regmap, true);
557
558 return 0;
559}
560
561#define RT715_PROBE_TIMEOUT 2000
562
563static int __maybe_unused rt715_dev_resume(struct device *dev)
564{
565 struct sdw_slave *slave = dev_to_sdw_dev(dev);
566 struct rt715_priv *rt715 = dev_get_drvdata(dev);
567 unsigned long time;
568
569 if (!rt715->hw_init)
570 return 0;
571
572 if (!slave->unattach_request)
573 goto regmap_sync;
574
575 time = wait_for_completion_timeout(&slave->initialization_complete,
576 msecs_to_jiffies(RT715_PROBE_TIMEOUT));
577 if (!time) {
578 dev_err(&slave->dev, "Initialization not complete, timed out\n");
579 return -ETIMEDOUT;
580 }
581
582regmap_sync:
583 slave->unattach_request = 0;
584 regcache_cache_only(rt715->regmap, false);
585 regcache_sync_region(rt715->regmap, 0x3000, 0x8fff);
586 regcache_sync_region(rt715->regmap, 0x752039, 0x752039);
587
588 return 0;
589}
590
591static const struct dev_pm_ops rt715_pm = {
592 SET_SYSTEM_SLEEP_PM_OPS(rt715_dev_suspend, rt715_dev_resume)
593 SET_RUNTIME_PM_OPS(rt715_dev_suspend, rt715_dev_resume, NULL)
594};
595
596static struct sdw_driver rt715_sdw_driver = {
597 .driver = {
598 .name = "rt715",
599 .owner = THIS_MODULE,
600 .pm = &rt715_pm,
601 },
602 .probe = rt715_sdw_probe,
603 .ops = &rt715_slave_ops,
604 .id_table = rt715_id,
605};
606module_sdw_driver(rt715_sdw_driver);
607
608MODULE_DESCRIPTION("ASoC RT715 driver SDW");
609MODULE_AUTHOR("Jack Yu <jack.yu@realtek.com>");
610MODULE_LICENSE("GPL v2");
611
