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11#include <linux/module.h>
12#include <linux/moduleparam.h>
13#include <linux/kernel.h>
14#include <linux/init.h>
15#include <linux/delay.h>
16#include <linux/i2c.h>
17#include <linux/pm_runtime.h>
18#include <linux/pm.h>
19#include <linux/soundwire/sdw.h>
20#include <linux/gpio.h>
21#include <linux/regmap.h>
22#include <linux/slab.h>
23#include <linux/platform_device.h>
24#include <linux/regulator/consumer.h>
25#include <linux/gpio/consumer.h>
26#include <linux/of.h>
27#include <linux/of_gpio.h>
28#include <linux/of_device.h>
29#include <sound/core.h>
30#include <sound/pcm.h>
31#include <sound/pcm_params.h>
32#include <sound/soc.h>
33#include <sound/soc-dapm.h>
34#include <sound/initval.h>
35#include <sound/tlv.h>
36#include <sound/hda_verbs.h>
37
38#include "rt715.h"
39
40static int rt715_index_write(struct regmap *regmap, unsigned int reg,
41 unsigned int value)
42{
43 int ret;
44 unsigned int addr = ((RT715_PRIV_INDEX_W_H) << 8) | reg;
45
46 ret = regmap_write(regmap, addr, value);
47 if (ret < 0) {
48 pr_err("Failed to set private value: %08x <= %04x %d\n", ret,
49 addr, value);
50 }
51
52 return ret;
53}
54
55static void rt715_get_gain(struct rt715_priv *rt715, unsigned int addr_h,
56 unsigned int addr_l, unsigned int val_h,
57 unsigned int *r_val, unsigned int *l_val)
58{
59 int ret;
60
61 *r_val = (val_h << 8);
62 ret = regmap_read(rt715->regmap, addr_l, r_val);
63 if (ret < 0)
64 pr_err("Failed to get R channel gain.\n");
65
66
67 val_h |= 0x20;
68 *l_val = (val_h << 8);
69 ret = regmap_read(rt715->regmap, addr_h, l_val);
70 if (ret < 0)
71 pr_err("Failed to get L channel gain.\n");
72}
73
74
75static int rt715_set_amp_gain_put(struct snd_kcontrol *kcontrol,
76 struct snd_ctl_elem_value *ucontrol)
77{
78 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
79 struct snd_soc_dapm_context *dapm =
80 snd_soc_component_get_dapm(component);
81 struct soc_mixer_control *mc =
82 (struct soc_mixer_control *)kcontrol->private_value;
83 struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
84 unsigned int addr_h, addr_l, val_h, val_ll, val_lr;
85 unsigned int read_ll, read_rl;
86 int i;
87
88
89 addr_h = mc->reg;
90 addr_l = mc->rreg;
91 if (mc->shift == RT715_DIR_OUT_SFT)
92 val_h = 0x80;
93 else
94 val_h = 0x0;
95
96 rt715_get_gain(rt715, addr_h, addr_l, val_h, &read_rl, &read_ll);
97
98
99 if (mc->invert) {
100
101 val_ll = (mc->max - ucontrol->value.integer.value[0]) << 7;
102
103 read_ll = read_ll & 0x7f;
104 val_ll |= read_ll;
105 } else {
106
107 val_ll = ((ucontrol->value.integer.value[0]) & 0x7f);
108 if (val_ll > mc->max)
109 val_ll = mc->max;
110
111 read_ll = read_ll & 0x80;
112 val_ll |= read_ll;
113 }
114
115
116 if (mc->invert) {
117 regmap_write(rt715->regmap,
118 RT715_SET_AUDIO_POWER_STATE, AC_PWRST_D0);
119
120 val_lr = (mc->max - ucontrol->value.integer.value[1]) << 7;
121
122 read_rl = read_rl & 0x7f;
123 val_lr |= read_rl;
124 } else {
125
126 val_lr = ((ucontrol->value.integer.value[1]) & 0x7f);
127 if (val_lr > mc->max)
128 val_lr = mc->max;
129
130 read_rl = read_rl & 0x80;
131 val_lr |= read_rl;
132 }
133
134 for (i = 0; i < 3; i++) {
135
136 if (val_ll == val_lr) {
137
138 val_h = (1 << mc->shift) | (3 << 4);
139 regmap_write(rt715->regmap, addr_h,
140 (val_h << 8 | val_ll));
141 regmap_write(rt715->regmap, addr_l,
142 (val_h << 8 | val_ll));
143 } else {
144
145 val_h = (1 << mc->shift) | (1 << 5);
146 regmap_write(rt715->regmap, addr_h,
147 (val_h << 8 | val_ll));
148
149 val_h = (1 << mc->shift) | (1 << 4);
150 regmap_write(rt715->regmap, addr_l,
151 (val_h << 8 | val_lr));
152 }
153
154 if (mc->shift == RT715_DIR_OUT_SFT)
155 val_h = 0x80;
156 else
157 val_h = 0x0;
158
159 rt715_get_gain(rt715, addr_h, addr_l, val_h,
160 &read_rl, &read_ll);
161 if (read_rl == val_lr && read_ll == val_ll)
162 break;
163 }
164
165 if (dapm->bias_level <= SND_SOC_BIAS_STANDBY)
166 regmap_write(rt715->regmap,
167 RT715_SET_AUDIO_POWER_STATE, AC_PWRST_D3);
168 return 0;
169}
170
171static int rt715_set_amp_gain_get(struct snd_kcontrol *kcontrol,
172 struct snd_ctl_elem_value *ucontrol)
173{
174 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
175 struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
176 struct soc_mixer_control *mc =
177 (struct soc_mixer_control *)kcontrol->private_value;
178 unsigned int addr_h, addr_l, val_h;
179 unsigned int read_ll, read_rl;
180
181 addr_h = mc->reg;
182 addr_l = mc->rreg;
183 if (mc->shift == RT715_DIR_OUT_SFT)
184 val_h = 0x80;
185 else
186 val_h = 0x0;
187
188 rt715_get_gain(rt715, addr_h, addr_l, val_h, &read_rl, &read_ll);
189
190 if (mc->invert) {
191
192 read_ll = !((read_ll & 0x80) >> RT715_MUTE_SFT);
193 read_rl = !((read_rl & 0x80) >> RT715_MUTE_SFT);
194 } else {
195
196 read_ll = read_ll & 0x7f;
197 read_rl = read_rl & 0x7f;
198 }
199 ucontrol->value.integer.value[0] = read_ll;
200 ucontrol->value.integer.value[1] = read_rl;
201
202 return 0;
203}
204
205static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -1725, 75, 0);
206static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, 0, 1000, 0);
207
208#define SOC_DOUBLE_R_EXT(xname, reg_left, reg_right, xshift, xmax, xinvert,\
209 xhandler_get, xhandler_put) \
210{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
211 .info = snd_soc_info_volsw, \
212 .get = xhandler_get, .put = xhandler_put, \
213 .private_value = SOC_DOUBLE_R_VALUE(reg_left, reg_right, xshift, \
214 xmax, xinvert) }
215
216static const struct snd_kcontrol_new rt715_snd_controls[] = {
217
218 SOC_DOUBLE_R_EXT("ADC 07 Capture Switch", RT715_SET_GAIN_MIC_ADC_H,
219 RT715_SET_GAIN_MIC_ADC_L, RT715_DIR_IN_SFT, 1, 1,
220 rt715_set_amp_gain_get, rt715_set_amp_gain_put),
221 SOC_DOUBLE_R_EXT("ADC 08 Capture Switch", RT715_SET_GAIN_LINE_ADC_H,
222 RT715_SET_GAIN_LINE_ADC_L, RT715_DIR_IN_SFT, 1, 1,
223 rt715_set_amp_gain_get, rt715_set_amp_gain_put),
224 SOC_DOUBLE_R_EXT("ADC 09 Capture Switch", RT715_SET_GAIN_MIX_ADC_H,
225 RT715_SET_GAIN_MIX_ADC_L, RT715_DIR_IN_SFT, 1, 1,
226 rt715_set_amp_gain_get, rt715_set_amp_gain_put),
227 SOC_DOUBLE_R_EXT("ADC 27 Capture Switch", RT715_SET_GAIN_MIX_ADC2_H,
228 RT715_SET_GAIN_MIX_ADC2_L, RT715_DIR_IN_SFT, 1, 1,
229 rt715_set_amp_gain_get, rt715_set_amp_gain_put),
230
231 SOC_DOUBLE_R_EXT_TLV("ADC 07 Capture Volume", RT715_SET_GAIN_MIC_ADC_H,
232 RT715_SET_GAIN_MIC_ADC_L, RT715_DIR_IN_SFT, 0x3f, 0,
233 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
234 in_vol_tlv),
235 SOC_DOUBLE_R_EXT_TLV("ADC 08 Capture Volume", RT715_SET_GAIN_LINE_ADC_H,
236 RT715_SET_GAIN_LINE_ADC_L, RT715_DIR_IN_SFT, 0x3f, 0,
237 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
238 in_vol_tlv),
239 SOC_DOUBLE_R_EXT_TLV("ADC 09 Capture Volume", RT715_SET_GAIN_MIX_ADC_H,
240 RT715_SET_GAIN_MIX_ADC_L, RT715_DIR_IN_SFT, 0x3f, 0,
241 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
242 in_vol_tlv),
243 SOC_DOUBLE_R_EXT_TLV("ADC 27 Capture Volume", RT715_SET_GAIN_MIX_ADC2_H,
244 RT715_SET_GAIN_MIX_ADC2_L, RT715_DIR_IN_SFT, 0x3f, 0,
245 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
246 in_vol_tlv),
247
248 SOC_DOUBLE_R_EXT_TLV("DMIC1 Boost", RT715_SET_GAIN_DMIC1_H,
249 RT715_SET_GAIN_DMIC1_L, RT715_DIR_IN_SFT, 3, 0,
250 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
251 mic_vol_tlv),
252 SOC_DOUBLE_R_EXT_TLV("DMIC2 Boost", RT715_SET_GAIN_DMIC2_H,
253 RT715_SET_GAIN_DMIC2_L, RT715_DIR_IN_SFT, 3, 0,
254 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
255 mic_vol_tlv),
256 SOC_DOUBLE_R_EXT_TLV("DMIC3 Boost", RT715_SET_GAIN_DMIC3_H,
257 RT715_SET_GAIN_DMIC3_L, RT715_DIR_IN_SFT, 3, 0,
258 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
259 mic_vol_tlv),
260 SOC_DOUBLE_R_EXT_TLV("DMIC4 Boost", RT715_SET_GAIN_DMIC4_H,
261 RT715_SET_GAIN_DMIC4_L, RT715_DIR_IN_SFT, 3, 0,
262 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
263 mic_vol_tlv),
264 SOC_DOUBLE_R_EXT_TLV("MIC1 Boost", RT715_SET_GAIN_MIC1_H,
265 RT715_SET_GAIN_MIC1_L, RT715_DIR_IN_SFT, 3, 0,
266 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
267 mic_vol_tlv),
268 SOC_DOUBLE_R_EXT_TLV("MIC2 Boost", RT715_SET_GAIN_MIC2_H,
269 RT715_SET_GAIN_MIC2_L, RT715_DIR_IN_SFT, 3, 0,
270 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
271 mic_vol_tlv),
272 SOC_DOUBLE_R_EXT_TLV("LINE1 Boost", RT715_SET_GAIN_LINE1_H,
273 RT715_SET_GAIN_LINE1_L, RT715_DIR_IN_SFT, 3, 0,
274 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
275 mic_vol_tlv),
276 SOC_DOUBLE_R_EXT_TLV("LINE2 Boost", RT715_SET_GAIN_LINE2_H,
277 RT715_SET_GAIN_LINE2_L, RT715_DIR_IN_SFT, 3, 0,
278 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
279 mic_vol_tlv),
280};
281
282static int rt715_mux_get(struct snd_kcontrol *kcontrol,
283 struct snd_ctl_elem_value *ucontrol)
284{
285 struct snd_soc_component *component =
286 snd_soc_dapm_kcontrol_component(kcontrol);
287 struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
288 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
289 unsigned int reg, val;
290 int ret;
291
292
293 reg = RT715_VERB_SET_CONNECT_SEL | e->reg;
294 ret = regmap_read(rt715->regmap, reg, &val);
295 if (ret < 0) {
296 dev_err(component->dev, "%s: sdw read failed: %d\n",
297 __func__, ret);
298 return ret;
299 }
300
301
302
303
304
305
306 if ((e->reg == RT715_MUX_IN3 || e->reg == RT715_MUX_IN4) && (val > 0))
307 val -= 1;
308 ucontrol->value.enumerated.item[0] = val;
309
310 return 0;
311}
312
313static int rt715_mux_put(struct snd_kcontrol *kcontrol,
314 struct snd_ctl_elem_value *ucontrol)
315{
316 struct snd_soc_component *component =
317 snd_soc_dapm_kcontrol_component(kcontrol);
318 struct snd_soc_dapm_context *dapm =
319 snd_soc_dapm_kcontrol_dapm(kcontrol);
320 struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
321 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
322 unsigned int *item = ucontrol->value.enumerated.item;
323 unsigned int val, val2 = 0, change, reg;
324 int ret;
325
326 if (item[0] >= e->items)
327 return -EINVAL;
328
329
330 val = snd_soc_enum_item_to_val(e, item[0]) << e->shift_l;
331
332 reg = RT715_VERB_SET_CONNECT_SEL | e->reg;
333 ret = regmap_read(rt715->regmap, reg, &val2);
334 if (ret < 0) {
335 dev_err(component->dev, "%s: sdw read failed: %d\n",
336 __func__, ret);
337 return ret;
338 }
339
340 if (val == val2)
341 change = 0;
342 else
343 change = 1;
344
345 if (change) {
346 reg = RT715_VERB_SET_CONNECT_SEL | e->reg;
347 regmap_write(rt715->regmap, reg, val);
348 }
349
350 snd_soc_dapm_mux_update_power(dapm, kcontrol,
351 item[0], e, NULL);
352
353 return change;
354}
355
356static const char * const adc_22_23_mux_text[] = {
357 "MIC1",
358 "MIC2",
359 "LINE1",
360 "LINE2",
361 "DMIC1",
362 "DMIC2",
363 "DMIC3",
364 "DMIC4",
365};
366
367
368
369
370
371
372static const unsigned int rt715_adc_24_25_values[] = {
373 0,
374 2,
375 3,
376 4,
377 5,
378};
379
380static const char * const adc_24_mux_text[] = {
381 "MIC2",
382 "DMIC1",
383 "DMIC2",
384 "DMIC3",
385 "DMIC4",
386};
387
388static const char * const adc_25_mux_text[] = {
389 "MIC1",
390 "DMIC1",
391 "DMIC2",
392 "DMIC3",
393 "DMIC4",
394};
395
396static SOC_ENUM_SINGLE_DECL(
397 rt715_adc22_enum, RT715_MUX_IN1, 0, adc_22_23_mux_text);
398
399static SOC_ENUM_SINGLE_DECL(
400 rt715_adc23_enum, RT715_MUX_IN2, 0, adc_22_23_mux_text);
401
402static SOC_VALUE_ENUM_SINGLE_DECL(rt715_adc24_enum,
403 RT715_MUX_IN3, 0, 0xf,
404 adc_24_mux_text, rt715_adc_24_25_values);
405
406static SOC_VALUE_ENUM_SINGLE_DECL(rt715_adc25_enum,
407 RT715_MUX_IN4, 0, 0xf,
408 adc_25_mux_text, rt715_adc_24_25_values);
409
410static const struct snd_kcontrol_new rt715_adc22_mux =
411 SOC_DAPM_ENUM_EXT("ADC 22 Mux", rt715_adc22_enum,
412 rt715_mux_get, rt715_mux_put);
413
414static const struct snd_kcontrol_new rt715_adc23_mux =
415 SOC_DAPM_ENUM_EXT("ADC 23 Mux", rt715_adc23_enum,
416 rt715_mux_get, rt715_mux_put);
417
418static const struct snd_kcontrol_new rt715_adc24_mux =
419 SOC_DAPM_ENUM_EXT("ADC 24 Mux", rt715_adc24_enum,
420 rt715_mux_get, rt715_mux_put);
421
422static const struct snd_kcontrol_new rt715_adc25_mux =
423 SOC_DAPM_ENUM_EXT("ADC 25 Mux", rt715_adc25_enum,
424 rt715_mux_get, rt715_mux_put);
425
426static const struct snd_soc_dapm_widget rt715_dapm_widgets[] = {
427 SND_SOC_DAPM_INPUT("DMIC1"),
428 SND_SOC_DAPM_INPUT("DMIC2"),
429 SND_SOC_DAPM_INPUT("DMIC3"),
430 SND_SOC_DAPM_INPUT("DMIC4"),
431 SND_SOC_DAPM_INPUT("MIC1"),
432 SND_SOC_DAPM_INPUT("MIC2"),
433 SND_SOC_DAPM_INPUT("LINE1"),
434 SND_SOC_DAPM_INPUT("LINE2"),
435 SND_SOC_DAPM_ADC("ADC 07", NULL, RT715_SET_STREAMID_MIC_ADC, 4, 0),
436 SND_SOC_DAPM_ADC("ADC 08", NULL, RT715_SET_STREAMID_LINE_ADC, 4, 0),
437 SND_SOC_DAPM_ADC("ADC 09", NULL, RT715_SET_STREAMID_MIX_ADC, 4, 0),
438 SND_SOC_DAPM_ADC("ADC 27", NULL, RT715_SET_STREAMID_MIX_ADC2, 4, 0),
439 SND_SOC_DAPM_MUX("ADC 22 Mux", SND_SOC_NOPM, 0, 0,
440 &rt715_adc22_mux),
441 SND_SOC_DAPM_MUX("ADC 23 Mux", SND_SOC_NOPM, 0, 0,
442 &rt715_adc23_mux),
443 SND_SOC_DAPM_MUX("ADC 24 Mux", SND_SOC_NOPM, 0, 0,
444 &rt715_adc24_mux),
445 SND_SOC_DAPM_MUX("ADC 25 Mux", SND_SOC_NOPM, 0, 0,
446 &rt715_adc25_mux),
447 SND_SOC_DAPM_AIF_OUT("DP4TX", "DP4 Capture", 0, SND_SOC_NOPM, 0, 0),
448 SND_SOC_DAPM_AIF_OUT("DP6TX", "DP6 Capture", 0, SND_SOC_NOPM, 0, 0),
449};
450
451static const struct snd_soc_dapm_route rt715_audio_map[] = {
452 {"DP6TX", NULL, "ADC 09"},
453 {"DP6TX", NULL, "ADC 08"},
454 {"DP4TX", NULL, "ADC 07"},
455 {"DP4TX", NULL, "ADC 27"},
456 {"ADC 09", NULL, "ADC 22 Mux"},
457 {"ADC 08", NULL, "ADC 23 Mux"},
458 {"ADC 07", NULL, "ADC 24 Mux"},
459 {"ADC 27", NULL, "ADC 25 Mux"},
460 {"ADC 22 Mux", "MIC1", "MIC1"},
461 {"ADC 22 Mux", "MIC2", "MIC2"},
462 {"ADC 22 Mux", "LINE1", "LINE1"},
463 {"ADC 22 Mux", "LINE2", "LINE2"},
464 {"ADC 22 Mux", "DMIC1", "DMIC1"},
465 {"ADC 22 Mux", "DMIC2", "DMIC2"},
466 {"ADC 22 Mux", "DMIC3", "DMIC3"},
467 {"ADC 22 Mux", "DMIC4", "DMIC4"},
468 {"ADC 23 Mux", "MIC1", "MIC1"},
469 {"ADC 23 Mux", "MIC2", "MIC2"},
470 {"ADC 23 Mux", "LINE1", "LINE1"},
471 {"ADC 23 Mux", "LINE2", "LINE2"},
472 {"ADC 23 Mux", "DMIC1", "DMIC1"},
473 {"ADC 23 Mux", "DMIC2", "DMIC2"},
474 {"ADC 23 Mux", "DMIC3", "DMIC3"},
475 {"ADC 23 Mux", "DMIC4", "DMIC4"},
476 {"ADC 24 Mux", "MIC2", "MIC2"},
477 {"ADC 24 Mux", "DMIC1", "DMIC1"},
478 {"ADC 24 Mux", "DMIC2", "DMIC2"},
479 {"ADC 24 Mux", "DMIC3", "DMIC3"},
480 {"ADC 24 Mux", "DMIC4", "DMIC4"},
481 {"ADC 25 Mux", "MIC1", "MIC1"},
482 {"ADC 25 Mux", "DMIC1", "DMIC1"},
483 {"ADC 25 Mux", "DMIC2", "DMIC2"},
484 {"ADC 25 Mux", "DMIC3", "DMIC3"},
485 {"ADC 25 Mux", "DMIC4", "DMIC4"},
486};
487
488static int rt715_set_bias_level(struct snd_soc_component *component,
489 enum snd_soc_bias_level level)
490{
491 struct snd_soc_dapm_context *dapm =
492 snd_soc_component_get_dapm(component);
493 struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
494
495 switch (level) {
496 case SND_SOC_BIAS_PREPARE:
497 if (dapm->bias_level == SND_SOC_BIAS_STANDBY) {
498 regmap_write(rt715->regmap,
499 RT715_SET_AUDIO_POWER_STATE,
500 AC_PWRST_D0);
501 }
502 break;
503
504 case SND_SOC_BIAS_STANDBY:
505 regmap_write(rt715->regmap,
506 RT715_SET_AUDIO_POWER_STATE,
507 AC_PWRST_D3);
508 break;
509
510 default:
511 break;
512 }
513 dapm->bias_level = level;
514 return 0;
515}
516
517static const struct snd_soc_component_driver soc_codec_dev_rt715 = {
518 .set_bias_level = rt715_set_bias_level,
519 .controls = rt715_snd_controls,
520 .num_controls = ARRAY_SIZE(rt715_snd_controls),
521 .dapm_widgets = rt715_dapm_widgets,
522 .num_dapm_widgets = ARRAY_SIZE(rt715_dapm_widgets),
523 .dapm_routes = rt715_audio_map,
524 .num_dapm_routes = ARRAY_SIZE(rt715_audio_map),
525};
526
527static int rt715_set_sdw_stream(struct snd_soc_dai *dai, void *sdw_stream,
528 int direction)
529{
530
531 struct sdw_stream_data *stream;
532
533 if (!sdw_stream)
534 return 0;
535
536 stream = kzalloc(sizeof(*stream), GFP_KERNEL);
537 if (!stream)
538 return -ENOMEM;
539
540 stream->sdw_stream = (struct sdw_stream_runtime *)sdw_stream;
541
542
543 if (direction == SNDRV_PCM_STREAM_PLAYBACK)
544 dai->playback_dma_data = stream;
545 else
546 dai->capture_dma_data = stream;
547
548 return 0;
549}
550
551static void rt715_shutdown(struct snd_pcm_substream *substream,
552 struct snd_soc_dai *dai)
553
554{
555 struct sdw_stream_data *stream;
556
557 stream = snd_soc_dai_get_dma_data(dai, substream);
558 snd_soc_dai_set_dma_data(dai, substream, NULL);
559 kfree(stream);
560}
561
562static int rt715_pcm_hw_params(struct snd_pcm_substream *substream,
563 struct snd_pcm_hw_params *params,
564 struct snd_soc_dai *dai)
565{
566 struct snd_soc_component *component = dai->component;
567 struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
568 struct sdw_stream_config stream_config;
569 struct sdw_port_config port_config;
570 enum sdw_data_direction direction;
571 struct sdw_stream_data *stream;
572 int retval, port, num_channels;
573 unsigned int val = 0;
574
575 stream = snd_soc_dai_get_dma_data(dai, substream);
576
577 if (!stream)
578 return -EINVAL;
579
580 if (!rt715->slave)
581 return -EINVAL;
582
583 switch (dai->id) {
584 case RT715_AIF1:
585 direction = SDW_DATA_DIR_TX;
586 port = 6;
587 rt715_index_write(rt715->regmap, RT715_SDW_INPUT_SEL, 0xa500);
588 break;
589 case RT715_AIF2:
590 direction = SDW_DATA_DIR_TX;
591 port = 4;
592 rt715_index_write(rt715->regmap, RT715_SDW_INPUT_SEL, 0xa000);
593 break;
594 default:
595 dev_err(component->dev, "Invalid DAI id %d\n", dai->id);
596 return -EINVAL;
597 }
598
599 stream_config.frame_rate = params_rate(params);
600 stream_config.ch_count = params_channels(params);
601 stream_config.bps = snd_pcm_format_width(params_format(params));
602 stream_config.direction = direction;
603
604 num_channels = params_channels(params);
605 port_config.ch_mask = (1 << (num_channels)) - 1;
606 port_config.num = port;
607
608 retval = sdw_stream_add_slave(rt715->slave, &stream_config,
609 &port_config, 1, stream->sdw_stream);
610 if (retval) {
611 dev_err(dai->dev, "Unable to configure port\n");
612 return retval;
613 }
614
615 switch (params_rate(params)) {
616
617
618 case 44100:
619 val |= 0x40 << 8;
620 break;
621 case 48000:
622 val |= 0x0 << 8;
623 break;
624 default:
625 dev_err(component->dev, "Unsupported sample rate %d\n",
626 params_rate(params));
627 return -EINVAL;
628 }
629
630 if (params_channels(params) <= 16) {
631
632 val |= (params_channels(params) - 1);
633 } else {
634 dev_err(component->dev, "Unsupported channels %d\n",
635 params_channels(params));
636 return -EINVAL;
637 }
638
639 switch (params_width(params)) {
640
641 case 8:
642 break;
643 case 16:
644 val |= (0x1 << 4);
645 break;
646 case 20:
647 val |= (0x2 << 4);
648 break;
649 case 24:
650 val |= (0x3 << 4);
651 break;
652 case 32:
653 val |= (0x4 << 4);
654 break;
655 default:
656 return -EINVAL;
657 }
658
659 regmap_write(rt715->regmap, RT715_MIC_ADC_FORMAT_H, val);
660 regmap_write(rt715->regmap, RT715_MIC_LINE_FORMAT_H, val);
661 regmap_write(rt715->regmap, RT715_MIX_ADC_FORMAT_H, val);
662 regmap_write(rt715->regmap, RT715_MIX_ADC2_FORMAT_H, val);
663
664 return retval;
665}
666
667static int rt715_pcm_hw_free(struct snd_pcm_substream *substream,
668 struct snd_soc_dai *dai)
669{
670 struct snd_soc_component *component = dai->component;
671 struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
672 struct sdw_stream_data *stream =
673 snd_soc_dai_get_dma_data(dai, substream);
674
675 if (!rt715->slave)
676 return -EINVAL;
677
678 sdw_stream_remove_slave(rt715->slave, stream->sdw_stream);
679 return 0;
680}
681
682#define RT715_STEREO_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000)
683#define RT715_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
684 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
685
686static struct snd_soc_dai_ops rt715_ops = {
687 .hw_params = rt715_pcm_hw_params,
688 .hw_free = rt715_pcm_hw_free,
689 .set_sdw_stream = rt715_set_sdw_stream,
690 .shutdown = rt715_shutdown,
691};
692
693static struct snd_soc_dai_driver rt715_dai[] = {
694 {
695 .name = "rt715-aif1",
696 .id = RT715_AIF1,
697 .capture = {
698 .stream_name = "DP6 Capture",
699 .channels_min = 1,
700 .channels_max = 2,
701 .rates = RT715_STEREO_RATES,
702 .formats = RT715_FORMATS,
703 },
704 .ops = &rt715_ops,
705 },
706 {
707 .name = "rt715-aif2",
708 .id = RT715_AIF2,
709 .capture = {
710 .stream_name = "DP4 Capture",
711 .channels_min = 1,
712 .channels_max = 2,
713 .rates = RT715_STEREO_RATES,
714 .formats = RT715_FORMATS,
715 },
716 .ops = &rt715_ops,
717 },
718};
719
720
721#define RT715_CLK_FREQ_9600000HZ 9600000
722#define RT715_CLK_FREQ_12000000HZ 12000000
723#define RT715_CLK_FREQ_6000000HZ 6000000
724#define RT715_CLK_FREQ_4800000HZ 4800000
725#define RT715_CLK_FREQ_2400000HZ 2400000
726#define RT715_CLK_FREQ_12288000HZ 12288000
727
728int rt715_clock_config(struct device *dev)
729{
730 struct rt715_priv *rt715 = dev_get_drvdata(dev);
731 unsigned int clk_freq, value;
732
733 clk_freq = (rt715->params.curr_dr_freq >> 1);
734
735 switch (clk_freq) {
736 case RT715_CLK_FREQ_12000000HZ:
737 value = 0x0;
738 break;
739 case RT715_CLK_FREQ_6000000HZ:
740 value = 0x1;
741 break;
742 case RT715_CLK_FREQ_9600000HZ:
743 value = 0x2;
744 break;
745 case RT715_CLK_FREQ_4800000HZ:
746 value = 0x3;
747 break;
748 case RT715_CLK_FREQ_2400000HZ:
749 value = 0x4;
750 break;
751 case RT715_CLK_FREQ_12288000HZ:
752 value = 0x5;
753 break;
754 default:
755 return -EINVAL;
756 }
757
758 regmap_write(rt715->regmap, 0xe0, value);
759 regmap_write(rt715->regmap, 0xf0, value);
760
761 return 0;
762}
763
764int rt715_init(struct device *dev, struct regmap *sdw_regmap,
765 struct regmap *regmap, struct sdw_slave *slave)
766{
767 struct rt715_priv *rt715;
768 int ret;
769
770 rt715 = devm_kzalloc(dev, sizeof(*rt715), GFP_KERNEL);
771 if (!rt715)
772 return -ENOMEM;
773
774 dev_set_drvdata(dev, rt715);
775 rt715->slave = slave;
776 rt715->regmap = regmap;
777 rt715->sdw_regmap = sdw_regmap;
778
779
780
781
782
783 rt715->hw_init = false;
784 rt715->first_hw_init = false;
785
786 ret = devm_snd_soc_register_component(dev,
787 &soc_codec_dev_rt715,
788 rt715_dai,
789 ARRAY_SIZE(rt715_dai));
790
791 return ret;
792}
793
794int rt715_io_init(struct device *dev, struct sdw_slave *slave)
795{
796 struct rt715_priv *rt715 = dev_get_drvdata(dev);
797
798 if (rt715->hw_init)
799 return 0;
800
801
802
803
804 if (!rt715->first_hw_init) {
805
806 pm_runtime_set_autosuspend_delay(&slave->dev, 3000);
807 pm_runtime_use_autosuspend(&slave->dev);
808
809
810 pm_runtime_set_active(&slave->dev);
811
812
813 pm_runtime_mark_last_busy(&slave->dev);
814
815 pm_runtime_enable(&slave->dev);
816 }
817
818 pm_runtime_get_noresume(&slave->dev);
819
820
821 regmap_write(rt715->regmap, RT715_SET_GAIN_LINE_ADC_H, 0xb080);
822 regmap_write(rt715->regmap, RT715_SET_GAIN_MIX_ADC_H, 0xb080);
823
824 regmap_write(rt715->regmap, RT715_SET_GAIN_MIC_ADC_H, 0xb080);
825 regmap_write(rt715->regmap, RT715_SET_GAIN_MIX_ADC2_H, 0xb080);
826
827
828 regmap_write(rt715->regmap, RT715_SET_PIN_DMIC1, 0x20);
829 regmap_write(rt715->regmap, RT715_SET_PIN_DMIC2, 0x20);
830 regmap_write(rt715->regmap, RT715_SET_PIN_DMIC3, 0x20);
831 regmap_write(rt715->regmap, RT715_SET_PIN_DMIC4, 0x20);
832
833 regmap_write(rt715->regmap, RT715_SET_STREAMID_LINE_ADC, 0x10);
834 regmap_write(rt715->regmap, RT715_SET_STREAMID_MIX_ADC, 0x10);
835 regmap_write(rt715->regmap, RT715_SET_STREAMID_MIC_ADC, 0x10);
836 regmap_write(rt715->regmap, RT715_SET_STREAMID_MIX_ADC2, 0x10);
837
838 regmap_write(rt715->regmap, RT715_SET_DMIC1_CONFIG_DEFAULT1, 0xd0);
839 regmap_write(rt715->regmap, RT715_SET_DMIC1_CONFIG_DEFAULT2, 0x11);
840 regmap_write(rt715->regmap, RT715_SET_DMIC1_CONFIG_DEFAULT3, 0xa1);
841 regmap_write(rt715->regmap, RT715_SET_DMIC1_CONFIG_DEFAULT4, 0x81);
842 regmap_write(rt715->regmap, RT715_SET_DMIC2_CONFIG_DEFAULT1, 0xd1);
843 regmap_write(rt715->regmap, RT715_SET_DMIC2_CONFIG_DEFAULT2, 0x11);
844 regmap_write(rt715->regmap, RT715_SET_DMIC2_CONFIG_DEFAULT3, 0xa1);
845 regmap_write(rt715->regmap, RT715_SET_DMIC2_CONFIG_DEFAULT4, 0x81);
846 regmap_write(rt715->regmap, RT715_SET_DMIC3_CONFIG_DEFAULT1, 0xd0);
847 regmap_write(rt715->regmap, RT715_SET_DMIC3_CONFIG_DEFAULT2, 0x11);
848 regmap_write(rt715->regmap, RT715_SET_DMIC3_CONFIG_DEFAULT3, 0xa1);
849 regmap_write(rt715->regmap, RT715_SET_DMIC3_CONFIG_DEFAULT4, 0x81);
850 regmap_write(rt715->regmap, RT715_SET_DMIC4_CONFIG_DEFAULT1, 0xd1);
851 regmap_write(rt715->regmap, RT715_SET_DMIC4_CONFIG_DEFAULT2, 0x11);
852 regmap_write(rt715->regmap, RT715_SET_DMIC4_CONFIG_DEFAULT3, 0xa1);
853 regmap_write(rt715->regmap, RT715_SET_DMIC4_CONFIG_DEFAULT4, 0x81);
854
855
856 regmap_write(rt715->regmap, RT715_SET_AUDIO_POWER_STATE, AC_PWRST_D3);
857
858 if (rt715->first_hw_init)
859 regcache_mark_dirty(rt715->regmap);
860 else
861 rt715->first_hw_init = true;
862
863
864 rt715->hw_init = true;
865
866 pm_runtime_mark_last_busy(&slave->dev);
867 pm_runtime_put_autosuspend(&slave->dev);
868
869 return 0;
870}
871
872MODULE_DESCRIPTION("ASoC rt715 driver");
873MODULE_DESCRIPTION("ASoC rt715 driver SDW");
874MODULE_AUTHOR("Jack Yu <jack.yu@realtek.com>");
875MODULE_LICENSE("GPL v2");
876
