LXR linux/arch/arm/mach-iop33x/iq80331.c

   1/*
   2 * arch/arm/mach-iop33x/iq80331.c
   3 *
   4 * Board support code for the Intel IQ80331 platform.
   5 *
   6 * Author: Dave Jiang <dave.jiang@intel.com>
   7 * Copyright (C) 2003 Intel Corp.
   8 *
   9 * This program is free software; you can redistribute it and/or modify it
  10 * under the terms of the GNU General Public License as published by the
  11 * Free Software Foundation; either version 2 of the License, or (at your
  12 * option) any later version.
  13 */
  14
  15#include <linux/mm.h>
  16#include <linux/init.h>
  17#include <linux/kernel.h>
  18#include <linux/pci.h>
  19#include <linux/string.h>
  20#include <linux/serial_core.h>
  21#include <linux/serial_8250.h>
  22#include <linux/mtd/physmap.h>
  23#include <linux/platform_device.h>
  24#include <linux/io.h>
  25#include <mach/hardware.h>
  26#include <asm/irq.h>
  27#include <asm/mach/arch.h>
  28#include <asm/mach/map.h>
  29#include <asm/mach/pci.h>
  30#include <asm/mach/time.h>
  31#include <asm/mach-types.h>
  32#include <asm/page.h>
  33#include <asm/pgtable.h>
  34#include <mach/time.h>
  35
  36/*
  37 * IQ80331 timer tick configuration.
  38 */
  39static void __init iq80331_timer_init(void)
  40{
  41        /* D-Step parts run at a higher internal bus frequency */
  42        if (*IOP3XX_ATURID >= 0xa)
  43                iop_init_time(333000000);
  44        else
  45                iop_init_time(266000000);
  46}
  47
  48
  49/*
  50 * IQ80331 PCI.
  51 */
  52static int __init
  53iq80331_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
  54{
  55        int irq;
  56
  57        if (slot == 1 && pin == 1) {
  58                /* PCI-X Slot INTA */
  59                irq = IRQ_IOP33X_XINT1;
  60        } else if (slot == 1 && pin == 2) {
  61                /* PCI-X Slot INTB */
  62                irq = IRQ_IOP33X_XINT2;
  63        } else if (slot == 1 && pin == 3) {
  64                /* PCI-X Slot INTC */
  65                irq = IRQ_IOP33X_XINT3;
  66        } else if (slot == 1 && pin == 4) {
  67                /* PCI-X Slot INTD */
  68                irq = IRQ_IOP33X_XINT0;
  69        } else if (slot == 2) {
  70                /* GigE */
  71                irq = IRQ_IOP33X_XINT2;
  72        } else {
  73                printk(KERN_ERR "iq80331_pci_map_irq() called for unknown "
  74                        "device PCI:%d:%d:%d\n", dev->bus->number,
  75                        PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
  76                irq = -1;
  77        }
  78
  79        return irq;
  80}
  81
  82static struct hw_pci iq80331_pci __initdata = {
  83        .nr_controllers = 1,
  84        .ops            = &iop3xx_ops,
  85        .setup          = iop3xx_pci_setup,
  86        .preinit        = iop3xx_pci_preinit_cond,
  87        .map_irq        = iq80331_pci_map_irq,
  88};
  89
  90static int __init iq80331_pci_init(void)
  91{
  92        if ((iop3xx_get_init_atu() == IOP3XX_INIT_ATU_ENABLE) &&
  93                machine_is_iq80331())
  94                pci_common_init(&iq80331_pci);
  95
  96        return 0;
  97}
  98
  99subsys_initcall(iq80331_pci_init);
 100
 101
 102/*
 103 * IQ80331 machine initialisation.
 104 */
 105static struct physmap_flash_data iq80331_flash_data = {
 106        .width          = 1,
 107};
 108
 109static struct resource iq80331_flash_resource = {
 110        .start          = 0xc0000000,
 111        .end            = 0xc07fffff,
 112        .flags          = IORESOURCE_MEM,
 113};
 114
 115static struct platform_device iq80331_flash_device = {
 116        .name           = "physmap-flash",
 117        .id             = 0,
 118        .dev            = {
 119                .platform_data  = &iq80331_flash_data,
 120        },
 121        .num_resources  = 1,
 122        .resource       = &iq80331_flash_resource,
 123};
 124
 125static struct resource iq80331_gpio_res[] = {
 126        DEFINE_RES_MEM((IOP3XX_PERIPHERAL_PHYS_BASE + 0x1780), 0x10),
 127};
 128
 129static void __init iq80331_init_machine(void)
 130{
 131        platform_device_register_simple("gpio-iop", 0,
 132                                        iq80331_gpio_res,
 133                                        ARRAY_SIZE(iq80331_gpio_res));
 134        platform_device_register(&iop3xx_i2c0_device);
 135        platform_device_register(&iop3xx_i2c1_device);
 136        platform_device_register(&iop33x_uart0_device);
 137        platform_device_register(&iop33x_uart1_device);
 138        platform_device_register(&iq80331_flash_device);
 139        platform_device_register(&iop3xx_dma_0_channel);
 140        platform_device_register(&iop3xx_dma_1_channel);
 141        platform_device_register(&iop3xx_aau_channel);
 142}
 143
 144MACHINE_START(IQ80331, "Intel IQ80331")
 145        /* Maintainer: Intel Corp. */
 146        .atag_offset    = 0x100,
 147        .map_io         = iop3xx_map_io,
 148        .init_irq       = iop33x_init_irq,
 149        .init_time      = iq80331_timer_init,
 150        .init_machine   = iq80331_init_machine,
 151        .restart        = iop3xx_restart,
 152MACHINE_END
 153