1/* 2 * arch/arm/mach-ixp4xx/include/mach/platform.h 3 * 4 * Constants and functions that are useful to IXP4xx platform-specific code 5 * and device drivers. 6 * 7 * Copyright (C) 2004 MontaVista Software, Inc. 8 */ 9 10#ifndef __ASM_ARCH_HARDWARE_H__ 11#error "Do not include this directly, instead #include <mach/hardware.h>" 12#endif 13 14#ifndef __ASSEMBLY__ 15 16#include <linux/reboot.h> 17 18#include <asm/types.h> 19 20#ifndef __ARMEB__ 21#define REG_OFFSET 0 22#else 23#define REG_OFFSET 3 24#endif 25 26/* 27 * Expansion bus memory regions 28 */ 29#define IXP4XX_EXP_BUS_BASE_PHYS (0x50000000) 30 31/* 32 * The expansion bus on the IXP4xx can be configured for either 16 or 33 * 32MB windows and the CS offset for each region changes based on the 34 * current configuration. This means that we cannot simply hardcode 35 * each offset. ixp4xx_sys_init() looks at the expansion bus configuration 36 * as setup by the bootloader to determine our window size. 37 */ 38extern unsigned long ixp4xx_exp_bus_size; 39 40#define IXP4XX_EXP_BUS_BASE(region)\ 41 (IXP4XX_EXP_BUS_BASE_PHYS + ((region) * ixp4xx_exp_bus_size)) 42 43#define IXP4XX_EXP_BUS_END(region)\ 44 (IXP4XX_EXP_BUS_BASE(region) + ixp4xx_exp_bus_size - 1) 45 46/* Those macros can be used to adjust timing and configure 47 * other features for each region. 48 */ 49 50#define IXP4XX_EXP_BUS_RECOVERY_T(x) (((x) & 0x0f) << 16) 51#define IXP4XX_EXP_BUS_HOLD_T(x) (((x) & 0x03) << 20) 52#define IXP4XX_EXP_BUS_STROBE_T(x) (((x) & 0x0f) << 22) 53#define IXP4XX_EXP_BUS_SETUP_T(x) (((x) & 0x03) << 26) 54#define IXP4XX_EXP_BUS_ADDR_T(x) (((x) & 0x03) << 28) 55#define IXP4XX_EXP_BUS_SIZE(x) (((x) & 0x0f) << 10) 56#define IXP4XX_EXP_BUS_CYCLES(x) (((x) & 0x03) << 14) 57 58#define IXP4XX_EXP_BUS_CS_EN (1L << 31) 59#define IXP4XX_EXP_BUS_BYTE_RD16 (1L << 6) 60#define IXP4XX_EXP_BUS_HRDY_POL (1L << 5) 61#define IXP4XX_EXP_BUS_MUX_EN (1L << 4) 62#define IXP4XX_EXP_BUS_SPLT_EN (1L << 3) 63#define IXP4XX_EXP_BUS_WR_EN (1L << 1) 64#define IXP4XX_EXP_BUS_BYTE_EN (1L << 0) 65 66#define IXP4XX_EXP_BUS_CYCLES_INTEL 0x00 67#define IXP4XX_EXP_BUS_CYCLES_MOTOROLA 0x01 68#define IXP4XX_EXP_BUS_CYCLES_HPI 0x02 69 70#define IXP4XX_FLASH_WRITABLE (0x2) 71#define IXP4XX_FLASH_DEFAULT (0xbcd23c40) 72#define IXP4XX_FLASH_WRITE (0xbcd23c42) 73 74/* 75 * Clock Speed Definitions. 76 */ 77#define IXP4XX_PERIPHERAL_BUS_CLOCK (66) /* 66MHzi APB BUS */ 78#define IXP4XX_UART_XTAL 14745600 79 80/* 81 * This structure provide a means for the board setup code 82 * to give information to th pata_ixp4xx driver. It is 83 * passed as platform_data. 84 */ 85struct ixp4xx_pata_data { 86 volatile u32 *cs0_cfg; 87 volatile u32 *cs1_cfg; 88 unsigned long cs0_bits; 89 unsigned long cs1_bits; 90 void __iomem *cs0; 91 void __iomem *cs1; 92}; 93 94#define IXP4XX_ETH_NPEA 0x00 95#define IXP4XX_ETH_NPEB 0x10 96#define IXP4XX_ETH_NPEC 0x20 97 98/* Information about built-in Ethernet MAC interfaces */ 99struct eth_plat_info { 100 u8 phy; /* MII PHY ID, 0 - 31 */ 101 u8 rxq; /* configurable, currently 0 - 31 only */ 102 u8 txreadyq; 103 u8 hwaddr[6]; 104}; 105 106/* Information about built-in HSS (synchronous serial) interfaces */ 107struct hss_plat_info { 108 int (*set_clock)(int port, unsigned int clock_type); 109 int (*open)(int port, void *pdev, 110 void (*set_carrier_cb)(void *pdev, int carrier)); 111 void (*close)(int port, void *pdev); 112 u8 txreadyq; 113}; 114 115/* 116 * Frequency of clock used for primary clocksource 117 */ 118extern unsigned long ixp4xx_timer_freq; 119 120/* 121 * Functions used by platform-level setup code 122 */ 123extern void ixp4xx_map_io(void); 124extern void ixp4xx_init_early(void); 125extern void ixp4xx_init_irq(void); 126extern void ixp4xx_sys_init(void); 127extern void ixp4xx_timer_init(void); 128extern void ixp4xx_restart(enum reboot_mode, const char *); 129extern void ixp4xx_pci_preinit(void); 130struct pci_sys_data; 131extern int ixp4xx_setup(int nr, struct pci_sys_data *sys); 132extern struct pci_ops ixp4xx_ops; 133 134#endif // __ASSEMBLY__ 135 136