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12#include <linux/platform_device.h>
13#include <linux/syscore_ops.h>
14#include <linux/irq.h>
15#include <linux/gpio.h>
16#include <linux/regulator/machine.h>
17
18#include <linux/dm9000.h>
19#include <linux/leds.h>
20
21#include <asm/mach/arch.h>
22#include <asm/mach-types.h>
23#include <asm/mach/map.h>
24
25#include "pxa25x.h"
26#undef GPIO24_SSP1_SFRM
27#undef GPIO86_GPIO
28#undef GPIO87_GPIO
29#undef GPIO88_GPIO
30#undef GPIO89_GPIO
31#include "pxa27x.h"
32#undef GPIO24_SSP1_SFRM
33#undef GPIO86_GPIO
34#undef GPIO87_GPIO
35#undef GPIO88_GPIO
36#undef GPIO89_GPIO
37#include <mach/audio.h>
38#include <linux/platform_data/video-pxafb.h>
39#include <mach/smemc.h>
40
41#include <asm/hardware/it8152.h>
42
43#include "generic.h"
44#include "cm-x2xx-pci.h"
45
46extern void cmx255_init(void);
47extern void cmx270_init(void);
48
49
50#define CMX2XX_NR_IRQS (IRQ_BOARD_START + 40)
51
52
53#define CMX2XX_VIRT_BASE (void __iomem *)(0xe8000000)
54#define CMX2XX_IT8152_VIRT (CMX2XX_VIRT_BASE)
55
56
57#define CMX255_DM9000_PHYS_BASE (PXA_CS1_PHYS + (8 << 22))
58#define CMX270_DM9000_PHYS_BASE (PXA_CS1_PHYS + (6 << 22))
59
60
61#define CMX255_GPIO_RED (27)
62#define CMX255_GPIO_GREEN (32)
63#define CMX270_GPIO_RED (93)
64#define CMX270_GPIO_GREEN (94)
65
66
67#define GPIO22_ETHIRQ (22)
68#define GPIO10_ETHIRQ (10)
69#define CMX255_GPIO_IT8152_IRQ (0)
70#define CMX270_GPIO_IT8152_IRQ (22)
71
72#define CMX255_ETHIRQ PXA_GPIO_TO_IRQ(GPIO22_ETHIRQ)
73#define CMX270_ETHIRQ PXA_GPIO_TO_IRQ(GPIO10_ETHIRQ)
74
75#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
76static struct resource cmx255_dm9000_resource[] = {
77 [0] = {
78 .start = CMX255_DM9000_PHYS_BASE,
79 .end = CMX255_DM9000_PHYS_BASE + 3,
80 .flags = IORESOURCE_MEM,
81 },
82 [1] = {
83 .start = CMX255_DM9000_PHYS_BASE + 4,
84 .end = CMX255_DM9000_PHYS_BASE + 4 + 500,
85 .flags = IORESOURCE_MEM,
86 },
87 [2] = {
88 .start = CMX255_ETHIRQ,
89 .end = CMX255_ETHIRQ,
90 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
91 }
92};
93
94static struct resource cmx270_dm9000_resource[] = {
95 [0] = {
96 .start = CMX270_DM9000_PHYS_BASE,
97 .end = CMX270_DM9000_PHYS_BASE + 3,
98 .flags = IORESOURCE_MEM,
99 },
100 [1] = {
101 .start = CMX270_DM9000_PHYS_BASE + 8,
102 .end = CMX270_DM9000_PHYS_BASE + 8 + 500,
103 .flags = IORESOURCE_MEM,
104 },
105 [2] = {
106 .start = CMX270_ETHIRQ,
107 .end = CMX270_ETHIRQ,
108 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
109 }
110};
111
112static struct dm9000_plat_data cmx270_dm9000_platdata = {
113 .flags = DM9000_PLATF_32BITONLY | DM9000_PLATF_NO_EEPROM,
114};
115
116static struct platform_device cmx2xx_dm9000_device = {
117 .name = "dm9000",
118 .id = 0,
119 .num_resources = ARRAY_SIZE(cmx270_dm9000_resource),
120 .dev = {
121 .platform_data = &cmx270_dm9000_platdata,
122 }
123};
124
125static void __init cmx2xx_init_dm9000(void)
126{
127 if (cpu_is_pxa25x())
128 cmx2xx_dm9000_device.resource = cmx255_dm9000_resource;
129 else
130 cmx2xx_dm9000_device.resource = cmx270_dm9000_resource;
131 platform_device_register(&cmx2xx_dm9000_device);
132}
133#else
134static inline void cmx2xx_init_dm9000(void) {}
135#endif
136
137
138#if defined(CONFIG_TOUCHSCREEN_UCB1400) || defined(CONFIG_TOUCHSCREEN_UCB1400_MODULE)
139static struct platform_device cmx2xx_ts_device = {
140 .name = "ucb1400_core",
141 .id = -1,
142};
143
144static void __init cmx2xx_init_touchscreen(void)
145{
146 platform_device_register(&cmx2xx_ts_device);
147}
148#else
149static inline void cmx2xx_init_touchscreen(void) {}
150#endif
151
152
153#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
154static struct gpio_led cmx2xx_leds[] = {
155 [0] = {
156 .name = "cm-x2xx:red",
157 .default_trigger = "nand-disk",
158 .active_low = 1,
159 },
160 [1] = {
161 .name = "cm-x2xx:green",
162 .default_trigger = "heartbeat",
163 .active_low = 1,
164 },
165};
166
167static struct gpio_led_platform_data cmx2xx_gpio_led_pdata = {
168 .num_leds = ARRAY_SIZE(cmx2xx_leds),
169 .leds = cmx2xx_leds,
170};
171
172static struct platform_device cmx2xx_led_device = {
173 .name = "leds-gpio",
174 .id = -1,
175 .dev = {
176 .platform_data = &cmx2xx_gpio_led_pdata,
177 },
178};
179
180static void __init cmx2xx_init_leds(void)
181{
182 if (cpu_is_pxa25x()) {
183 cmx2xx_leds[0].gpio = CMX255_GPIO_RED;
184 cmx2xx_leds[1].gpio = CMX255_GPIO_GREEN;
185 } else {
186 cmx2xx_leds[0].gpio = CMX270_GPIO_RED;
187 cmx2xx_leds[1].gpio = CMX270_GPIO_GREEN;
188 }
189 platform_device_register(&cmx2xx_led_device);
190}
191#else
192static inline void cmx2xx_init_leds(void) {}
193#endif
194
195#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
196
197
198
199
200
201#define MTYPE_STN320x240 0
202#define MTYPE_TFT640x480 1
203#define MTYPE_CRT640x480 2
204#define MTYPE_CRT800x600 3
205#define MTYPE_TFT320x240 6
206#define MTYPE_STN640x480 7
207
208static struct pxafb_mode_info generic_stn_320x240_mode = {
209 .pixclock = 76923,
210 .bpp = 8,
211 .xres = 320,
212 .yres = 240,
213 .hsync_len = 3,
214 .vsync_len = 2,
215 .left_margin = 3,
216 .upper_margin = 0,
217 .right_margin = 3,
218 .lower_margin = 0,
219 .sync = (FB_SYNC_HOR_HIGH_ACT |
220 FB_SYNC_VERT_HIGH_ACT),
221 .cmap_greyscale = 0,
222};
223
224static struct pxafb_mach_info generic_stn_320x240 = {
225 .modes = &generic_stn_320x240_mode,
226 .num_modes = 1,
227 .lcd_conn = LCD_COLOR_STN_8BPP | LCD_PCLK_EDGE_FALL |\
228 LCD_AC_BIAS_FREQ(0xff),
229 .cmap_inverse = 0,
230 .cmap_static = 0,
231};
232
233static struct pxafb_mode_info generic_tft_640x480_mode = {
234 .pixclock = 38461,
235 .bpp = 8,
236 .xres = 640,
237 .yres = 480,
238 .hsync_len = 60,
239 .vsync_len = 2,
240 .left_margin = 70,
241 .upper_margin = 10,
242 .right_margin = 70,
243 .lower_margin = 5,
244 .sync = 0,
245 .cmap_greyscale = 0,
246};
247
248static struct pxafb_mach_info generic_tft_640x480 = {
249 .modes = &generic_tft_640x480_mode,
250 .num_modes = 1,
251 .lcd_conn = LCD_COLOR_TFT_8BPP | LCD_PCLK_EDGE_FALL |\
252 LCD_AC_BIAS_FREQ(0xff),
253 .cmap_inverse = 0,
254 .cmap_static = 0,
255};
256
257static struct pxafb_mode_info generic_crt_640x480_mode = {
258 .pixclock = 38461,
259 .bpp = 8,
260 .xres = 640,
261 .yres = 480,
262 .hsync_len = 63,
263 .vsync_len = 2,
264 .left_margin = 81,
265 .upper_margin = 33,
266 .right_margin = 16,
267 .lower_margin = 10,
268 .sync = (FB_SYNC_HOR_HIGH_ACT |
269 FB_SYNC_VERT_HIGH_ACT),
270 .cmap_greyscale = 0,
271};
272
273static struct pxafb_mach_info generic_crt_640x480 = {
274 .modes = &generic_crt_640x480_mode,
275 .num_modes = 1,
276 .lcd_conn = LCD_COLOR_TFT_8BPP | LCD_AC_BIAS_FREQ(0xff),
277 .cmap_inverse = 0,
278 .cmap_static = 0,
279};
280
281static struct pxafb_mode_info generic_crt_800x600_mode = {
282 .pixclock = 28846,
283 .bpp = 8,
284 .xres = 800,
285 .yres = 600,
286 .hsync_len = 63,
287 .vsync_len = 2,
288 .left_margin = 26,
289 .upper_margin = 21,
290 .right_margin = 26,
291 .lower_margin = 11,
292 .sync = (FB_SYNC_HOR_HIGH_ACT |
293 FB_SYNC_VERT_HIGH_ACT),
294 .cmap_greyscale = 0,
295};
296
297static struct pxafb_mach_info generic_crt_800x600 = {
298 .modes = &generic_crt_800x600_mode,
299 .num_modes = 1,
300 .lcd_conn = LCD_COLOR_TFT_8BPP | LCD_AC_BIAS_FREQ(0xff),
301 .cmap_inverse = 0,
302 .cmap_static = 0,
303};
304
305static struct pxafb_mode_info generic_tft_320x240_mode = {
306 .pixclock = 134615,
307 .bpp = 16,
308 .xres = 320,
309 .yres = 240,
310 .hsync_len = 63,
311 .vsync_len = 7,
312 .left_margin = 75,
313 .upper_margin = 0,
314 .right_margin = 15,
315 .lower_margin = 15,
316 .sync = 0,
317 .cmap_greyscale = 0,
318};
319
320static struct pxafb_mach_info generic_tft_320x240 = {
321 .modes = &generic_tft_320x240_mode,
322 .num_modes = 1,
323 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_AC_BIAS_FREQ(0xff),
324 .cmap_inverse = 0,
325 .cmap_static = 0,
326};
327
328static struct pxafb_mode_info generic_stn_640x480_mode = {
329 .pixclock = 57692,
330 .bpp = 8,
331 .xres = 640,
332 .yres = 480,
333 .hsync_len = 4,
334 .vsync_len = 2,
335 .left_margin = 10,
336 .upper_margin = 5,
337 .right_margin = 10,
338 .lower_margin = 5,
339 .sync = (FB_SYNC_HOR_HIGH_ACT |
340 FB_SYNC_VERT_HIGH_ACT),
341 .cmap_greyscale = 0,
342};
343
344static struct pxafb_mach_info generic_stn_640x480 = {
345 .modes = &generic_stn_640x480_mode,
346 .num_modes = 1,
347 .lcd_conn = LCD_COLOR_STN_8BPP | LCD_AC_BIAS_FREQ(0xff),
348 .cmap_inverse = 0,
349 .cmap_static = 0,
350};
351
352static struct pxafb_mach_info *cmx2xx_display = &generic_crt_640x480;
353
354static int __init cmx2xx_set_display(char *str)
355{
356 int disp_type = simple_strtol(str, NULL, 0);
357 switch (disp_type) {
358 case MTYPE_STN320x240:
359 cmx2xx_display = &generic_stn_320x240;
360 break;
361 case MTYPE_TFT640x480:
362 cmx2xx_display = &generic_tft_640x480;
363 break;
364 case MTYPE_CRT640x480:
365 cmx2xx_display = &generic_crt_640x480;
366 break;
367 case MTYPE_CRT800x600:
368 cmx2xx_display = &generic_crt_800x600;
369 break;
370 case MTYPE_TFT320x240:
371 cmx2xx_display = &generic_tft_320x240;
372 break;
373 case MTYPE_STN640x480:
374 cmx2xx_display = &generic_stn_640x480;
375 break;
376 default:
377 cmx2xx_display = &generic_crt_640x480;
378 break;
379 }
380 return 1;
381}
382
383
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387
388
389
390__setup("monitor=", cmx2xx_set_display);
391
392static void __init cmx2xx_init_display(void)
393{
394 pxa_set_fb_info(NULL, cmx2xx_display);
395}
396#else
397static inline void cmx2xx_init_display(void) {}
398#endif
399
400#ifdef CONFIG_PM
401static unsigned long sleep_save_msc[10];
402
403static int cmx2xx_suspend(void)
404{
405 cmx2xx_pci_suspend();
406
407
408 sleep_save_msc[0] = __raw_readl(MSC0);
409 sleep_save_msc[1] = __raw_readl(MSC1);
410 sleep_save_msc[2] = __raw_readl(MSC2);
411
412
413 PCFR = 0x0;
414 PSLR = 0xff400000;
415 PMCR = 0x00000005;
416 PWER = 0x80000000;
417 PFER = 0x00000000;
418 PRER = 0x00000000;
419 PGSR0 = 0xC0018800;
420 PGSR1 = 0x004F0002;
421 PGSR2 = 0x6021C000;
422 PGSR3 = 0x00020000;
423
424 return 0;
425}
426
427static void cmx2xx_resume(void)
428{
429 cmx2xx_pci_resume();
430
431
432 __raw_writel(sleep_save_msc[0], MSC0);
433 __raw_writel(sleep_save_msc[1], MSC1);
434 __raw_writel(sleep_save_msc[2], MSC2);
435}
436
437static struct syscore_ops cmx2xx_pm_syscore_ops = {
438 .resume = cmx2xx_resume,
439 .suspend = cmx2xx_suspend,
440};
441
442static int __init cmx2xx_pm_init(void)
443{
444 register_syscore_ops(&cmx2xx_pm_syscore_ops);
445
446 return 0;
447}
448#else
449static int __init cmx2xx_pm_init(void) { return 0; }
450#endif
451
452#if defined(CONFIG_SND_PXA2XX_AC97) || defined(CONFIG_SND_PXA2XX_AC97_MODULE)
453static void __init cmx2xx_init_ac97(void)
454{
455 pxa_set_ac97_info(NULL);
456}
457#else
458static inline void cmx2xx_init_ac97(void) {}
459#endif
460
461static void __init cmx2xx_init(void)
462{
463 pxa_set_ffuart_info(NULL);
464 pxa_set_btuart_info(NULL);
465 pxa_set_stuart_info(NULL);
466
467 cmx2xx_pm_init();
468
469 if (cpu_is_pxa25x())
470 cmx255_init();
471 else
472 cmx270_init();
473
474 cmx2xx_init_dm9000();
475 cmx2xx_init_display();
476 cmx2xx_init_ac97();
477 cmx2xx_init_touchscreen();
478 cmx2xx_init_leds();
479
480 regulator_has_full_constraints();
481}
482
483static void __init cmx2xx_init_irq(void)
484{
485 if (cpu_is_pxa25x()) {
486 pxa25x_init_irq();
487 cmx2xx_pci_init_irq(CMX255_GPIO_IT8152_IRQ);
488 } else {
489 pxa27x_init_irq();
490 cmx2xx_pci_init_irq(CMX270_GPIO_IT8152_IRQ);
491 }
492}
493
494#ifdef CONFIG_PCI
495
496static struct map_desc cmx2xx_io_desc[] __initdata = {
497 [0] = {
498 .virtual = (unsigned long)CMX2XX_IT8152_VIRT,
499 .pfn = __phys_to_pfn(PXA_CS4_PHYS),
500 .length = SZ_64M,
501 .type = MT_DEVICE
502 },
503};
504
505static void __init cmx2xx_map_io(void)
506{
507 if (cpu_is_pxa25x())
508 pxa25x_map_io();
509
510 if (cpu_is_pxa27x())
511 pxa27x_map_io();
512
513 iotable_init(cmx2xx_io_desc, ARRAY_SIZE(cmx2xx_io_desc));
514
515 it8152_base_address = CMX2XX_IT8152_VIRT;
516}
517#else
518static void __init cmx2xx_map_io(void)
519{
520 if (cpu_is_pxa25x())
521 pxa25x_map_io();
522
523 if (cpu_is_pxa27x())
524 pxa27x_map_io();
525}
526#endif
527
528MACHINE_START(ARMCORE, "Compulab CM-X2XX")
529 .atag_offset = 0x100,
530 .map_io = cmx2xx_map_io,
531 .nr_irqs = CMX2XX_NR_IRQS,
532 .init_irq = cmx2xx_init_irq,
533
534 .handle_irq = pxa25x_handle_irq,
535 .init_time = pxa_timer_init,
536 .init_machine = cmx2xx_init,
537#ifdef CONFIG_PCI
538 .dma_zone_size = SZ_64M,
539#endif
540 .restart = pxa_restart,
541MACHINE_END
542
