1/* 2 * Copyright (C) 2012 ARM Ltd. 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 as 6 * published by the Free Software Foundation. 7 * 8 * This program is distributed in the hope that it will be useful, 9 * but WITHOUT ANY WARRANTY; without even the implied warranty of 10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11 * GNU General Public License for more details. 12 * 13 * You should have received a copy of the GNU General Public License 14 * along with this program. If not, see <http://www.gnu.org/licenses/>. 15 */ 16#ifndef __ASM_DEBUG_MONITORS_H 17#define __ASM_DEBUG_MONITORS_H 18 19#ifdef __KERNEL__ 20 21#include <linux/errno.h> 22#include <linux/types.h> 23#include <asm/brk-imm.h> 24#include <asm/esr.h> 25#include <asm/insn.h> 26#include <asm/ptrace.h> 27 28/* Low-level stepping controls. */ 29#define DBG_MDSCR_SS (1 << 0) 30#define DBG_SPSR_SS (1 << 21) 31 32/* MDSCR_EL1 enabling bits */ 33#define DBG_MDSCR_KDE (1 << 13) 34#define DBG_MDSCR_MDE (1 << 15) 35#define DBG_MDSCR_MASK ~(DBG_MDSCR_KDE | DBG_MDSCR_MDE) 36 37#define DBG_ESR_EVT(x) (((x) >> 27) & 0x7) 38 39/* AArch64 */ 40#define DBG_ESR_EVT_HWBP 0x0 41#define DBG_ESR_EVT_HWSS 0x1 42#define DBG_ESR_EVT_HWWP 0x2 43#define DBG_ESR_EVT_BRK 0x6 44 45/* 46 * Break point instruction encoding 47 */ 48#define BREAK_INSTR_SIZE AARCH64_INSN_SIZE 49 50/* 51 * BRK instruction encoding 52 * The #imm16 value should be placed at bits[20:5] within BRK ins 53 */ 54#define AARCH64_BREAK_MON 0xd4200000 55 56/* 57 * BRK instruction for provoking a fault on purpose 58 * Unlike kgdb, #imm16 value with unallocated handler is used for faulting. 59 */ 60#define AARCH64_BREAK_FAULT (AARCH64_BREAK_MON | (FAULT_BRK_IMM << 5)) 61 62#define AARCH64_BREAK_KGDB_DYN_DBG \ 63 (AARCH64_BREAK_MON | (KGDB_DYN_DBG_BRK_IMM << 5)) 64#define KGDB_DYN_BRK_INS_BYTE(x) \ 65 ((AARCH64_BREAK_KGDB_DYN_DBG >> (8 * (x))) & 0xff) 66 67#define CACHE_FLUSH_IS_SAFE 1 68 69/* AArch32 */ 70#define DBG_ESR_EVT_BKPT 0x4 71#define DBG_ESR_EVT_VECC 0x5 72 73#define AARCH32_BREAK_ARM 0x07f001f0 74#define AARCH32_BREAK_THUMB 0xde01 75#define AARCH32_BREAK_THUMB2_LO 0xf7f0 76#define AARCH32_BREAK_THUMB2_HI 0xa000 77 78#ifndef __ASSEMBLY__ 79struct task_struct; 80 81#define DBG_ARCH_ID_RESERVED 0 /* In case of ptrace ABI updates. */ 82 83#define DBG_HOOK_HANDLED 0 84#define DBG_HOOK_ERROR 1 85 86struct step_hook { 87 struct list_head node; 88 int (*fn)(struct pt_regs *regs, unsigned int esr); 89}; 90 91void register_step_hook(struct step_hook *hook); 92void unregister_step_hook(struct step_hook *hook); 93 94struct break_hook { 95 struct list_head node; 96 u32 esr_val; 97 u32 esr_mask; 98 int (*fn)(struct pt_regs *regs, unsigned int esr); 99}; 100 101void register_break_hook(struct break_hook *hook); 102void unregister_break_hook(struct break_hook *hook); 103 104u8 debug_monitors_arch(void); 105 106enum dbg_active_el { 107 DBG_ACTIVE_EL0 = 0, 108 DBG_ACTIVE_EL1, 109}; 110 111void enable_debug_monitors(enum dbg_active_el el); 112void disable_debug_monitors(enum dbg_active_el el); 113 114void user_rewind_single_step(struct task_struct *task); 115void user_fastforward_single_step(struct task_struct *task); 116 117void kernel_enable_single_step(struct pt_regs *regs); 118void kernel_disable_single_step(void); 119int kernel_active_single_step(void); 120 121#ifdef CONFIG_HAVE_HW_BREAKPOINT 122int reinstall_suspended_bps(struct pt_regs *regs); 123#else 124static inline int reinstall_suspended_bps(struct pt_regs *regs) 125{ 126 return -ENODEV; 127} 128#endif 129 130int aarch32_break_handler(struct pt_regs *regs); 131 132#endif /* __ASSEMBLY */ 133#endif /* __KERNEL__ */ 134#endif /* __ASM_DEBUG_MONITORS_H */ 135