LXR linux/arch/arm64/kernel/smp_spin

   1/*
   2 * Spin Table SMP initialisation
   3 *
   4 * Copyright (C) 2013 ARM Ltd.
   5 *
   6 * This program is free software; you can redistribute it and/or modify
   7 * it under the terms of the GNU General Public License version 2 as
   8 * published by the Free Software Foundation.
   9 *
  10 * This program is distributed in the hope that it will be useful,
  11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13 * GNU General Public License for more details.
  14 *
  15 * You should have received a copy of the GNU General Public License
  16 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  17 */
  18
  19#include <linux/delay.h>
  20#include <linux/init.h>
  21#include <linux/of.h>
  22#include <linux/smp.h>
  23#include <linux/types.h>
  24
  25#include <asm/cacheflush.h>
  26#include <asm/cpu_ops.h>
  27#include <asm/cputype.h>
  28#include <asm/io.h>
  29#include <asm/smp_plat.h>
  30
  31extern void secondary_holding_pen(void);
  32volatile unsigned long secondary_holding_pen_release = INVALID_HWID;
  33
  34static phys_addr_t cpu_release_addr[NR_CPUS];
  35
  36/*
  37 * Write secondary_holding_pen_release in a way that is guaranteed to be
  38 * visible to all observers, irrespective of whether they're taking part
  39 * in coherency or not.  This is necessary for the hotplug code to work
  40 * reliably.
  41 */
  42static void write_pen_release(u64 val)
  43{
  44        void *start = (void *)&secondary_holding_pen_release;
  45        unsigned long size = sizeof(secondary_holding_pen_release);
  46
  47        secondary_holding_pen_release = val;
  48        __flush_dcache_area(start, size);
  49}
  50
  51
  52static int smp_spin_table_cpu_init(unsigned int cpu)
  53{
  54        struct device_node *dn;
  55        int ret;
  56
  57        dn = of_get_cpu_node(cpu, NULL);
  58        if (!dn)
  59                return -ENODEV;
  60
  61        /*
  62         * Determine the address from which the CPU is polling.
  63         */
  64        ret = of_property_read_u64(dn, "cpu-release-addr",
  65                                   &cpu_release_addr[cpu]);
  66        if (ret)
  67                pr_err("CPU %d: missing or invalid cpu-release-addr property\n",
  68                       cpu);
  69
  70        of_node_put(dn);
  71
  72        return ret;
  73}
  74
  75static int smp_spin_table_cpu_prepare(unsigned int cpu)
  76{
  77        __le64 __iomem *release_addr;
  78
  79        if (!cpu_release_addr[cpu])
  80                return -ENODEV;
  81
  82        /*
  83         * The cpu-release-addr may or may not be inside the linear mapping.
  84         * As ioremap_cache will either give us a new mapping or reuse the
  85         * existing linear mapping, we can use it to cover both cases. In
  86         * either case the memory will be MT_NORMAL.
  87         */
  88        release_addr = ioremap_cache(cpu_release_addr[cpu],
  89                                     sizeof(*release_addr));
  90        if (!release_addr)
  91                return -ENOMEM;
  92
  93        /*
  94         * We write the release address as LE regardless of the native
  95         * endianess of the kernel. Therefore, any boot-loaders that
  96         * read this address need to convert this address to the
  97         * boot-loader's endianess before jumping. This is mandated by
  98         * the boot protocol.
  99         */
 100        writeq_relaxed(__pa(secondary_holding_pen), release_addr);
 101        __flush_dcache_area((__force void *)release_addr,
 102                            sizeof(*release_addr));
 103
 104        /*
 105         * Send an event to wake up the secondary CPU.
 106         */
 107        sev();
 108
 109        iounmap(release_addr);
 110
 111        return 0;
 112}
 113
 114static int smp_spin_table_cpu_boot(unsigned int cpu)
 115{
 116        /*
 117         * Update the pen release flag.
 118         */
 119        write_pen_release(cpu_logical_map(cpu));
 120
 121        /*
 122         * Send an event, causing the secondaries to read pen_release.
 123         */
 124        sev();
 125
 126        return 0;
 127}
 128
 129const struct cpu_operations smp_spin_table_ops = {
 130        .name           = "spin-table",
 131        .cpu_init       = smp_spin_table_cpu_init,
 132        .cpu_prepare    = smp_spin_table_cpu_prepare,
 133        .cpu_boot       = smp_spin_table_cpu_boot,
 134};
 135