1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16#include <linux/console.h>
17#include <linux/init.h>
18#include <linux/major.h>
19#include <linux/delay.h>
20#include <linux/tty.h>
21#include <arch/svinto.h>
22
23extern void reset_watchdog(void);
24
25struct dbg_port
26{
27 unsigned int index;
28 const volatile unsigned* read;
29 volatile char* write;
30 volatile unsigned* xoff;
31 volatile char* baud;
32 volatile char* tr_ctrl;
33 volatile char* rec_ctrl;
34 unsigned long irq;
35 unsigned int started;
36 unsigned long baudrate;
37 unsigned char parity;
38 unsigned int bits;
39};
40
41struct dbg_port ports[]=
42{
43 {
44 0,
45 R_SERIAL0_READ,
46 R_SERIAL0_TR_DATA,
47 R_SERIAL0_XOFF,
48 R_SERIAL0_BAUD,
49 R_SERIAL0_TR_CTRL,
50 R_SERIAL0_REC_CTRL,
51 IO_STATE(R_IRQ_MASK1_SET, ser0_data, set),
52 0,
53 115200,
54 'N',
55 8
56 },
57 {
58 1,
59 R_SERIAL1_READ,
60 R_SERIAL1_TR_DATA,
61 R_SERIAL1_XOFF,
62 R_SERIAL1_BAUD,
63 R_SERIAL1_TR_CTRL,
64 R_SERIAL1_REC_CTRL,
65 IO_STATE(R_IRQ_MASK1_SET, ser1_data, set),
66 0,
67 115200,
68 'N',
69 8
70 },
71 {
72 2,
73 R_SERIAL2_READ,
74 R_SERIAL2_TR_DATA,
75 R_SERIAL2_XOFF,
76 R_SERIAL2_BAUD,
77 R_SERIAL2_TR_CTRL,
78 R_SERIAL2_REC_CTRL,
79 IO_STATE(R_IRQ_MASK1_SET, ser2_data, set),
80 0,
81 115200,
82 'N',
83 8
84 },
85 {
86 3,
87 R_SERIAL3_READ,
88 R_SERIAL3_TR_DATA,
89 R_SERIAL3_XOFF,
90 R_SERIAL3_BAUD,
91 R_SERIAL3_TR_CTRL,
92 R_SERIAL3_REC_CTRL,
93 IO_STATE(R_IRQ_MASK1_SET, ser3_data, set),
94 0,
95 115200,
96 'N',
97 8
98 }
99};
100
101#ifdef CONFIG_ETRAX_SERIAL
102extern struct tty_driver *serial_driver;
103#endif
104
105struct dbg_port* port =
106#if defined(CONFIG_ETRAX_DEBUG_PORT0)
107 &ports[0];
108#elif defined(CONFIG_ETRAX_DEBUG_PORT1)
109 &ports[1];
110#elif defined(CONFIG_ETRAX_DEBUG_PORT2)
111 &ports[2];
112#elif defined(CONFIG_ETRAX_DEBUG_PORT3)
113 &ports[3];
114#else
115 NULL;
116#endif
117
118static struct dbg_port* kgdb_port =
119#if defined(CONFIG_ETRAX_KGDB_PORT0)
120 &ports[0];
121#elif defined(CONFIG_ETRAX_KGDB_PORT1)
122 &ports[1];
123#elif defined(CONFIG_ETRAX_KGDB_PORT2)
124 &ports[2];
125#elif defined(CONFIG_ETRAX_KGDB_PORT3)
126 &ports[3];
127#else
128 NULL;
129#endif
130
131static void
132start_port(struct dbg_port* p)
133{
134 unsigned long rec_ctrl = 0;
135 unsigned long tr_ctrl = 0;
136
137 if (!p)
138 return;
139
140 if (p->started)
141 return;
142 p->started = 1;
143
144 if (p->index == 0)
145 {
146 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma6);
147 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma6, unused);
148 }
149 else if (p->index == 1)
150 {
151 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma8);
152 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma8, usb);
153 }
154 else if (p->index == 2)
155 {
156 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma2);
157 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma2, par0);
158 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma3);
159 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma3, par0);
160 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, ser2, select);
161 }
162 else
163 {
164 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma4);
165 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma4, par1);
166 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma5);
167 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma5, par1);
168 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, ser3, select);
169 }
170
171 *R_GEN_CONFIG = genconfig_shadow;
172
173 *p->xoff =
174 IO_STATE(R_SERIAL0_XOFF, tx_stop, enable) |
175 IO_STATE(R_SERIAL0_XOFF, auto_xoff, disable) |
176 IO_FIELD(R_SERIAL0_XOFF, xoff_char, 0);
177
178 switch (p->baudrate)
179 {
180 case 0:
181 case 115200:
182 *p->baud =
183 IO_STATE(R_SERIAL0_BAUD, tr_baud, c115k2Hz) |
184 IO_STATE(R_SERIAL0_BAUD, rec_baud, c115k2Hz);
185 break;
186 case 1200:
187 *p->baud =
188 IO_STATE(R_SERIAL0_BAUD, tr_baud, c1200Hz) |
189 IO_STATE(R_SERIAL0_BAUD, rec_baud, c1200Hz);
190 break;
191 case 2400:
192 *p->baud =
193 IO_STATE(R_SERIAL0_BAUD, tr_baud, c2400Hz) |
194 IO_STATE(R_SERIAL0_BAUD, rec_baud, c2400Hz);
195 break;
196 case 4800:
197 *p->baud =
198 IO_STATE(R_SERIAL0_BAUD, tr_baud, c4800Hz) |
199 IO_STATE(R_SERIAL0_BAUD, rec_baud, c4800Hz);
200 break;
201 case 9600:
202 *p->baud =
203 IO_STATE(R_SERIAL0_BAUD, tr_baud, c9600Hz) |
204 IO_STATE(R_SERIAL0_BAUD, rec_baud, c9600Hz);
205 break;
206 case 19200:
207 *p->baud =
208 IO_STATE(R_SERIAL0_BAUD, tr_baud, c19k2Hz) |
209 IO_STATE(R_SERIAL0_BAUD, rec_baud, c19k2Hz);
210 break;
211 case 38400:
212 *p->baud =
213 IO_STATE(R_SERIAL0_BAUD, tr_baud, c38k4Hz) |
214 IO_STATE(R_SERIAL0_BAUD, rec_baud, c38k4Hz);
215 break;
216 case 57600:
217 *p->baud =
218 IO_STATE(R_SERIAL0_BAUD, tr_baud, c57k6Hz) |
219 IO_STATE(R_SERIAL0_BAUD, rec_baud, c57k6Hz);
220 break;
221 default:
222 *p->baud =
223 IO_STATE(R_SERIAL0_BAUD, tr_baud, c115k2Hz) |
224 IO_STATE(R_SERIAL0_BAUD, rec_baud, c115k2Hz);
225 break;
226 }
227
228 if (p->parity == 'E') {
229 rec_ctrl =
230 IO_STATE(R_SERIAL0_REC_CTRL, rec_par, even) |
231 IO_STATE(R_SERIAL0_REC_CTRL, rec_par_en, enable);
232 tr_ctrl =
233 IO_STATE(R_SERIAL0_TR_CTRL, tr_par, even) |
234 IO_STATE(R_SERIAL0_TR_CTRL, tr_par_en, enable);
235 } else if (p->parity == 'O') {
236 rec_ctrl =
237 IO_STATE(R_SERIAL0_REC_CTRL, rec_par, odd) |
238 IO_STATE(R_SERIAL0_REC_CTRL, rec_par_en, enable);
239 tr_ctrl =
240 IO_STATE(R_SERIAL0_TR_CTRL, tr_par, odd) |
241 IO_STATE(R_SERIAL0_TR_CTRL, tr_par_en, enable);
242 } else {
243 rec_ctrl =
244 IO_STATE(R_SERIAL0_REC_CTRL, rec_par, even) |
245 IO_STATE(R_SERIAL0_REC_CTRL, rec_par_en, disable);
246 tr_ctrl =
247 IO_STATE(R_SERIAL0_TR_CTRL, tr_par, even) |
248 IO_STATE(R_SERIAL0_TR_CTRL, tr_par_en, disable);
249 }
250 if (p->bits == 7)
251 {
252 rec_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_bitnr, rec_7bit);
253 tr_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_bitnr, tr_7bit);
254 }
255 else
256 {
257 rec_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_bitnr, rec_8bit);
258 tr_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_bitnr, tr_8bit);
259 }
260
261 *p->rec_ctrl =
262 IO_STATE(R_SERIAL0_REC_CTRL, dma_err, stop) |
263 IO_STATE(R_SERIAL0_REC_CTRL, rec_enable, enable) |
264 IO_STATE(R_SERIAL0_REC_CTRL, rts_, active) |
265 IO_STATE(R_SERIAL0_REC_CTRL, sampling, middle) |
266 IO_STATE(R_SERIAL0_REC_CTRL, rec_stick_par, normal) |
267 rec_ctrl;
268
269 *p->tr_ctrl =
270 IO_FIELD(R_SERIAL0_TR_CTRL, txd, 0) |
271 IO_STATE(R_SERIAL0_TR_CTRL, tr_enable, enable) |
272 IO_STATE(R_SERIAL0_TR_CTRL, auto_cts, disabled) |
273 IO_STATE(R_SERIAL0_TR_CTRL, stop_bits, one_bit) |
274 IO_STATE(R_SERIAL0_TR_CTRL, tr_stick_par, normal) |
275 tr_ctrl;
276}
277
278static void
279console_write_direct(struct console *co, const char *buf, unsigned int len)
280{
281 int i;
282 unsigned long flags;
283
284 if (!port)
285 return;
286
287 local_irq_save(flags);
288
289
290 for (i = 0; i < len; i++) {
291
292 if (buf[i] == '\n') {
293 while (!(*port->read & IO_MASK(R_SERIAL0_READ, tr_ready)))
294 ;
295 *port->write = '\r';
296 }
297
298 while (!(*port->read & IO_MASK(R_SERIAL0_READ, tr_ready)))
299 ;
300 *port->write = buf[i];
301 }
302
303
304
305
306
307
308
309 reset_watchdog();
310
311 local_irq_restore(flags);
312}
313
314static void
315console_write(struct console *co, const char *buf, unsigned int len)
316{
317 if (!port)
318 return;
319
320 console_write_direct(co, buf, len);
321}
322
323
324
325void
326console_print_etrax(const char *buf)
327{
328 console_write(NULL, buf, strlen(buf));
329}
330
331
332
333int
334getDebugChar(void)
335{
336 unsigned long readval;
337
338 if (!kgdb_port)
339 return 0;
340
341 do {
342 readval = *kgdb_port->read;
343 } while (!(readval & IO_MASK(R_SERIAL0_READ, data_avail)));
344
345 return (readval & IO_MASK(R_SERIAL0_READ, data_in));
346}
347
348
349
350void
351putDebugChar(int val)
352{
353 if (!kgdb_port)
354 return;
355
356 while (!(*kgdb_port->read & IO_MASK(R_SERIAL0_READ, tr_ready)))
357 ;
358 *kgdb_port->write = val;
359}
360
361
362
363void
364enableDebugIRQ(void)
365{
366 if (!kgdb_port)
367 return;
368
369 *R_IRQ_MASK1_SET = kgdb_port->irq;
370
371
372
373 *R_VECT_MASK_SET = IO_STATE(R_VECT_MASK_SET, serial, set);
374
375 *kgdb_port->rec_ctrl = IO_STATE(R_SERIAL0_REC_CTRL, rec_enable, enable);
376}
377
378static int __init
379console_setup(struct console *co, char *options)
380{
381 char* s;
382
383 if (options) {
384 port = &ports[co->index];
385 port->baudrate = 115200;
386 port->parity = 'N';
387 port->bits = 8;
388 port->baudrate = simple_strtoul(options, NULL, 10);
389 s = options;
390 while(*s >= '0' && *s <= '9')
391 s++;
392 if (*s) port->parity = *s++;
393 if (*s) port->bits = *s++ - '0';
394 port->started = 0;
395 start_port(0);
396 }
397 return 0;
398}
399
400
401
402
403
404static struct tty_driver dummy_driver;
405
406static int dummy_open(struct tty_struct *tty, struct file * filp)
407{
408 return 0;
409}
410
411static void dummy_close(struct tty_struct *tty, struct file * filp)
412{
413}
414
415static int dummy_write(struct tty_struct * tty,
416 const unsigned char *buf, int count)
417{
418 return count;
419}
420
421static int dummy_write_room(struct tty_struct *tty)
422{
423 return 8192;
424}
425
426static const struct tty_operations dummy_ops = {
427 .open = dummy_open,
428 .close = dummy_close,
429 .write = dummy_write,
430 .write_room = dummy_write_room,
431};
432
433void __init
434init_dummy_console(void)
435{
436 memset(&dummy_driver, 0, sizeof(struct tty_driver));
437 dummy_driver.driver_name = "serial";
438 dummy_driver.name = "ttyS";
439 dummy_driver.major = TTY_MAJOR;
440 dummy_driver.minor_start = 68;
441 dummy_driver.num = 1;
442 dummy_driver.type = TTY_DRIVER_TYPE_SERIAL;
443 dummy_driver.subtype = SERIAL_TYPE_NORMAL;
444 dummy_driver.init_termios = tty_std_termios;
445
446 dummy_driver.init_termios.c_cflag =
447 B115200 | CS8 | CREAD | HUPCL | CLOCAL;
448 dummy_driver.flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_DYNAMIC_DEV;
449 dummy_driver.init_termios.c_ispeed = 115200;
450 dummy_driver.init_termios.c_ospeed = 115200;
451
452 dummy_driver.ops = &dummy_ops;
453 if (tty_register_driver(&dummy_driver))
454 panic("Couldn't register dummy serial driver\n");
455}
456
457static struct tty_driver*
458etrax_console_device(struct console* co, int *index)
459{
460 if (port)
461 *index = port->index;
462 else
463 *index = 0;
464#ifdef CONFIG_ETRAX_SERIAL
465 return port ? serial_driver : &dummy_driver;
466#else
467 return &dummy_driver;
468#endif
469}
470
471static struct console ser_console = {
472 name : "ttyS",
473 write: console_write,
474 read : NULL,
475 device : etrax_console_device,
476 unblank : NULL,
477 setup : console_setup,
478 flags : CON_PRINTBUFFER,
479 index : -1,
480 cflag : 0,
481 next : NULL
482};
483static struct console ser0_console = {
484 name : "ttyS",
485 write: console_write,
486 read : NULL,
487 device : etrax_console_device,
488 unblank : NULL,
489 setup : console_setup,
490 flags : CON_PRINTBUFFER,
491 index : 0,
492 cflag : 0,
493 next : NULL
494};
495
496static struct console ser1_console = {
497 name : "ttyS",
498 write: console_write,
499 read : NULL,
500 device : etrax_console_device,
501 unblank : NULL,
502 setup : console_setup,
503 flags : CON_PRINTBUFFER,
504 index : 1,
505 cflag : 0,
506 next : NULL
507};
508static struct console ser2_console = {
509 name : "ttyS",
510 write: console_write,
511 read : NULL,
512 device : etrax_console_device,
513 unblank : NULL,
514 setup : console_setup,
515 flags : CON_PRINTBUFFER,
516 index : 2,
517 cflag : 0,
518 next : NULL
519};
520static struct console ser3_console = {
521 name : "ttyS",
522 write: console_write,
523 read : NULL,
524 device : etrax_console_device,
525 unblank : NULL,
526 setup : console_setup,
527 flags : CON_PRINTBUFFER,
528 index : 3,
529 cflag : 0,
530 next : NULL
531};
532
533
534
535
536int __init
537init_etrax_debug(void)
538{
539 static int first = 1;
540
541 if (!first) {
542 unregister_console(&ser_console);
543 register_console(&ser0_console);
544 register_console(&ser1_console);
545 register_console(&ser2_console);
546 register_console(&ser3_console);
547 init_dummy_console();
548 return 0;
549 }
550
551 first = 0;
552 register_console(&ser_console);
553 start_port(port);
554#ifdef CONFIG_ETRAX_KGDB
555 start_port(kgdb_port);
556#endif
557 return 0;
558}
559__initcall(init_etrax_debug);
560
