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14#include <linux/types.h>
15#include <linux/kernel.h>
16#include <linux/errno.h>
17#include <linux/interrupt.h>
18#include <linux/irq.h>
19
20#include <asm/ptrace.h>
21#include <asm/traps.h>
22
23#include <asm/q40_master.h>
24#include <asm/q40ints.h>
25
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32
33
34
35
36static void q40_irq_handler(unsigned int, struct pt_regs *fp);
37static void q40_irq_enable(struct irq_data *data);
38static void q40_irq_disable(struct irq_data *data);
39
40unsigned short q40_ablecount[35];
41unsigned short q40_state[35];
42
43static unsigned int q40_irq_startup(struct irq_data *data)
44{
45 unsigned int irq = data->irq;
46
47
48 switch (irq) {
49 case 1: case 2: case 8: case 9:
50 case 11: case 12: case 13:
51 printk("%s: ISA IRQ %d not implemented by HW\n", __func__, irq);
52
53 }
54 return 0;
55}
56
57static void q40_irq_shutdown(struct irq_data *data)
58{
59}
60
61static struct irq_chip q40_irq_chip = {
62 .name = "q40",
63 .irq_startup = q40_irq_startup,
64 .irq_shutdown = q40_irq_shutdown,
65 .irq_enable = q40_irq_enable,
66 .irq_disable = q40_irq_disable,
67};
68
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78
79
80static int disabled;
81
82void __init q40_init_IRQ(void)
83{
84 m68k_setup_irq_controller(&q40_irq_chip, handle_simple_irq, 1,
85 Q40_IRQ_MAX);
86
87
88 m68k_setup_auto_interrupt(q40_irq_handler);
89
90 m68k_irq_startup_irq(IRQ_AUTO_2);
91 m68k_irq_startup_irq(IRQ_AUTO_4);
92
93
94 master_outb(1, EXT_ENABLE_REG);
95
96
97 master_outb(0, KEY_IRQ_ENABLE_REG);
98}
99
100
101
102
103
104
105int ql_ticks;
106static int sound_ticks;
107
108#define SVOL 45
109
110void q40_mksound(unsigned int hz, unsigned int ticks)
111{
112
113
114 if (hz == 0) {
115 if (sound_ticks)
116 sound_ticks = 1;
117
118 *DAC_LEFT = 128;
119 *DAC_RIGHT = 128;
120
121 return;
122 }
123
124 if (sound_ticks == 0)
125 sound_ticks = 1000;
126 sound_ticks = ticks << 1;
127}
128
129static irq_handler_t q40_timer_routine;
130
131static irqreturn_t q40_timer_int (int irq, void * dev)
132{
133 ql_ticks = ql_ticks ? 0 : 1;
134 if (sound_ticks) {
135 unsigned char sval=(sound_ticks & 1) ? 128-SVOL : 128+SVOL;
136 sound_ticks--;
137 *DAC_LEFT=sval;
138 *DAC_RIGHT=sval;
139 }
140
141 if (!ql_ticks)
142 q40_timer_routine(irq, dev);
143 return IRQ_HANDLED;
144}
145
146void q40_sched_init (irq_handler_t timer_routine)
147{
148 int timer_irq;
149
150 q40_timer_routine = timer_routine;
151 timer_irq = Q40_IRQ_FRAME;
152
153 if (request_irq(timer_irq, q40_timer_int, 0,
154 "timer", q40_timer_int))
155 panic("Couldn't register timer int");
156
157 master_outb(-1, FRAME_CLEAR_REG);
158 master_outb( 1, FRAME_RATE_REG);
159}
160
161
162
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165
166
167
168struct IRQ_TABLE{ unsigned mask; int irq ;};
169#if 0
170static struct IRQ_TABLE iirqs[]={
171 {Q40_IRQ_FRAME_MASK,Q40_IRQ_FRAME},
172 {Q40_IRQ_KEYB_MASK,Q40_IRQ_KEYBOARD},
173 {0,0}};
174#endif
175static struct IRQ_TABLE eirqs[] = {
176 { .mask = Q40_IRQ3_MASK, .irq = 3 },
177 { .mask = Q40_IRQ4_MASK, .irq = 4 },
178 { .mask = Q40_IRQ14_MASK, .irq = 14 },
179 { .mask = Q40_IRQ15_MASK, .irq = 15 },
180 { .mask = Q40_IRQ6_MASK, .irq = 6 },
181 { .mask = Q40_IRQ7_MASK, .irq = 7 },
182 { .mask = Q40_IRQ5_MASK, .irq = 5 },
183 { .mask = Q40_IRQ10_MASK, .irq = 10 },
184 {0,0}
185};
186
187
188static int ccleirq=60;
189
190
191
192
193#define IRQ_INPROGRESS 1
194
195
196
197#define DEBUG_Q40INT
198
199
200static int mext_disabled=0;
201static int aliased_irq=0;
202
203
204
205static void q40_irq_handler(unsigned int irq, struct pt_regs *fp)
206{
207 unsigned mir, mer;
208 int i;
209
210
211 mir = master_inb(IIRQ_REG);
212#ifdef CONFIG_BLK_DEV_FD
213 if ((mir & Q40_IRQ_EXT_MASK) &&
214 (master_inb(EIRQ_REG) & Q40_IRQ6_MASK)) {
215 floppy_hardint();
216 return;
217 }
218#endif
219 switch (irq) {
220 case 4:
221 case 6:
222 do_IRQ(Q40_IRQ_SAMPLE, fp);
223 return;
224 }
225 if (mir & Q40_IRQ_FRAME_MASK) {
226 do_IRQ(Q40_IRQ_FRAME, fp);
227 master_outb(-1, FRAME_CLEAR_REG);
228 }
229 if ((mir & Q40_IRQ_SER_MASK) || (mir & Q40_IRQ_EXT_MASK)) {
230 mer = master_inb(EIRQ_REG);
231 for (i = 0; eirqs[i].mask; i++) {
232 if (mer & eirqs[i].mask) {
233 irq = eirqs[i].irq;
234
235
236
237
238
239
240 if (irq > 4 && irq <= 15 && mext_disabled) {
241
242 goto iirq;
243 }
244 if (q40_state[irq] & IRQ_INPROGRESS) {
245
246
247#ifdef IP_USE_DISABLE
248
249
250 disable_irq(irq);
251 disabled = 1;
252#else
253
254
255 fp->sr = (((fp->sr) & (~0x700))+0x200);
256 disabled = 1;
257#endif
258 goto iirq;
259 }
260 q40_state[irq] |= IRQ_INPROGRESS;
261 do_IRQ(irq, fp);
262 q40_state[irq] &= ~IRQ_INPROGRESS;
263
264
265
266
267
268 if (disabled) {
269#ifdef IP_USE_DISABLE
270 if (irq > 4) {
271 disabled = 0;
272 enable_irq(irq);
273 }
274#else
275 disabled = 0;
276
277#endif
278 }
279
280 return;
281 }
282 }
283 if (mer && ccleirq > 0 && !aliased_irq) {
284 printk("ISA interrupt from unknown source? EIRQ_REG = %x\n",mer);
285 ccleirq--;
286 }
287 }
288 iirq:
289 mir = master_inb(IIRQ_REG);
290
291 if (mir & Q40_IRQ_KEYB_MASK)
292 do_IRQ(Q40_IRQ_KEYBOARD, fp);
293
294 return;
295}
296
297void q40_irq_enable(struct irq_data *data)
298{
299 unsigned int irq = data->irq;
300
301 if (irq >= 5 && irq <= 15) {
302 mext_disabled--;
303 if (mext_disabled > 0)
304 printk("q40_irq_enable : nested disable/enable\n");
305 if (mext_disabled == 0)
306 master_outb(1, EXT_ENABLE_REG);
307 }
308}
309
310
311void q40_irq_disable(struct irq_data *data)
312{
313 unsigned int irq = data->irq;
314
315
316
317
318
319
320 if (irq >= 5 && irq <= 15) {
321 master_outb(0, EXT_ENABLE_REG);
322 mext_disabled++;
323 if (mext_disabled > 1)
324 printk("disable_irq nesting count %d\n",mext_disabled);
325 }
326}
327