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2
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4
5#include <linux/bcd.h>
6#include <linux/clockchips.h>
7#include <linux/init.h>
8#include <linux/kernel.h>
9#include <linux/sched.h>
10#include <linux/sched_clock.h>
11#include <linux/interrupt.h>
12#include <linux/kernel_stat.h>
13#include <linux/param.h>
14#include <linux/smp.h>
15#include <linux/time.h>
16#include <linux/timex.h>
17#include <linux/mm.h>
18#include <linux/platform_device.h>
19
20#include <asm/time.h>
21#include <asm/pgtable.h>
22#include <asm/sgialib.h>
23#include <asm/sn/ioc3.h>
24#include <asm/sn/klconfig.h>
25#include <asm/sn/arch.h>
26#include <asm/sn/addrs.h>
27#include <asm/sn/sn_private.h>
28#include <asm/sn/sn0/ip27.h>
29#include <asm/sn/sn0/hub.h>
30
31#define TICK_SIZE (tick_nsec / 1000)
32
33
34#include <asm/sn/types.h>
35#include <asm/sn/sn0/addrs.h>
36#include <asm/sn/sn0/hubni.h>
37#include <asm/sn/sn0/hubio.h>
38#include <asm/pci/bridge.h>
39
40static void enable_rt_irq(struct irq_data *d)
41{
42}
43
44static void disable_rt_irq(struct irq_data *d)
45{
46}
47
48static struct irq_chip rt_irq_type = {
49 .name = "SN HUB RT timer",
50 .irq_mask = disable_rt_irq,
51 .irq_unmask = enable_rt_irq,
52};
53
54static int rt_next_event(unsigned long delta, struct clock_event_device *evt)
55{
56 unsigned int cpu = smp_processor_id();
57 int slice = cputoslice(cpu);
58 unsigned long cnt;
59
60 cnt = LOCAL_HUB_L(PI_RT_COUNT);
61 cnt += delta;
62 LOCAL_HUB_S(PI_RT_COMPARE_A + PI_COUNT_OFFSET * slice, cnt);
63
64 return LOCAL_HUB_L(PI_RT_COUNT) >= cnt ? -ETIME : 0;
65}
66
67unsigned int rt_timer_irq;
68
69static DEFINE_PER_CPU(struct clock_event_device, hub_rt_clockevent);
70static DEFINE_PER_CPU(char [11], hub_rt_name);
71
72static irqreturn_t hub_rt_counter_handler(int irq, void *dev_id)
73{
74 unsigned int cpu = smp_processor_id();
75 struct clock_event_device *cd = &per_cpu(hub_rt_clockevent, cpu);
76 int slice = cputoslice(cpu);
77
78
79
80
81 LOCAL_HUB_S(PI_RT_PEND_A + PI_COUNT_OFFSET * slice, 0);
82 cd->event_handler(cd);
83
84 return IRQ_HANDLED;
85}
86
87struct irqaction hub_rt_irqaction = {
88 .handler = hub_rt_counter_handler,
89 .flags = IRQF_PERCPU | IRQF_TIMER,
90 .name = "hub-rt",
91};
92
93
94
95
96
97
98
99
100
101#define NSEC_PER_CYCLE 800
102#define CYCLES_PER_SEC (NSEC_PER_SEC / NSEC_PER_CYCLE)
103
104void hub_rt_clock_event_init(void)
105{
106 unsigned int cpu = smp_processor_id();
107 struct clock_event_device *cd = &per_cpu(hub_rt_clockevent, cpu);
108 unsigned char *name = per_cpu(hub_rt_name, cpu);
109 int irq = rt_timer_irq;
110
111 sprintf(name, "hub-rt %d", cpu);
112 cd->name = name;
113 cd->features = CLOCK_EVT_FEAT_ONESHOT;
114 clockevent_set_clock(cd, CYCLES_PER_SEC);
115 cd->max_delta_ns = clockevent_delta2ns(0xfffffffffffff, cd);
116 cd->min_delta_ns = clockevent_delta2ns(0x300, cd);
117 cd->rating = 200;
118 cd->irq = irq;
119 cd->cpumask = cpumask_of(cpu);
120 cd->set_next_event = rt_next_event;
121 clockevents_register_device(cd);
122}
123
124static void __init hub_rt_clock_event_global_init(void)
125{
126 int irq;
127
128 do {
129 smp_wmb();
130 irq = rt_timer_irq;
131 if (irq)
132 break;
133
134 irq = allocate_irqno();
135 if (irq < 0)
136 panic("Allocation of irq number for timer failed");
137 } while (xchg(&rt_timer_irq, irq));
138
139 irq_set_chip_and_handler(irq, &rt_irq_type, handle_percpu_irq);
140 setup_irq(irq, &hub_rt_irqaction);
141}
142
143static cycle_t hub_rt_read(struct clocksource *cs)
144{
145 return REMOTE_HUB_L(cputonasid(0), PI_RT_COUNT);
146}
147
148struct clocksource hub_rt_clocksource = {
149 .name = "HUB-RT",
150 .rating = 200,
151 .read = hub_rt_read,
152 .mask = CLOCKSOURCE_MASK(52),
153 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
154};
155
156static u64 notrace hub_rt_read_sched_clock(void)
157{
158 return REMOTE_HUB_L(cputonasid(0), PI_RT_COUNT);
159}
160
161static void __init hub_rt_clocksource_init(void)
162{
163 struct clocksource *cs = &hub_rt_clocksource;
164
165 clocksource_register_hz(cs, CYCLES_PER_SEC);
166
167 sched_clock_register(hub_rt_read_sched_clock, 52, CYCLES_PER_SEC);
168}
169
170void __init plat_time_init(void)
171{
172 hub_rt_clocksource_init();
173 hub_rt_clock_event_global_init();
174 hub_rt_clock_event_init();
175}
176
177void cpu_time_init(void)
178{
179 lboard_t *board;
180 klcpu_t *cpu;
181 int cpuid;
182
183
184 board = find_lboard(KL_CONFIG_INFO(get_nasid()), KLTYPE_IP27);
185 if (!board)
186 panic("Can't find board info for myself.");
187
188 cpuid = LOCAL_HUB_L(PI_CPU_NUM) ? IP27_CPU0_INDEX : IP27_CPU1_INDEX;
189 cpu = (klcpu_t *) KLCF_COMP(board, cpuid);
190 if (!cpu)
191 panic("No information about myself?");
192
193 printk("CPU %d clock is %dMHz.\n", smp_processor_id(), cpu->cpu_speed);
194
195 set_c0_status(SRB_TIMOCLK);
196}
197
198void hub_rtc_init(cnodeid_t cnode)
199{
200
201
202
203
204
205
206 if (get_compact_nodeid() == cnode) {
207 LOCAL_HUB_S(PI_RT_EN_A, 1);
208 LOCAL_HUB_S(PI_RT_EN_B, 1);
209 LOCAL_HUB_S(PI_PROF_EN_A, 0);
210 LOCAL_HUB_S(PI_PROF_EN_B, 0);
211 LOCAL_HUB_S(PI_RT_COUNT, 0);
212 LOCAL_HUB_S(PI_RT_PEND_A, 0);
213 LOCAL_HUB_S(PI_RT_PEND_B, 0);
214 }
215}
216
217static int __init sgi_ip27_rtc_devinit(void)
218{
219 struct resource res;
220
221 memset(&res, 0, sizeof(res));
222 res.start = XPHYSADDR(KL_CONFIG_CH_CONS_INFO(master_nasid)->memory_base +
223 IOC3_BYTEBUS_DEV0);
224 res.end = res.start + 32767;
225 res.flags = IORESOURCE_MEM;
226
227 return IS_ERR(platform_device_register_simple("rtc-m48t35", -1,
228 &res, 1));
229}
230
231
232
233
234
235late_initcall(sgi_ip27_rtc_devinit);
236
