linux/arch/sh/boards/mach-ap325rxa/setup.c
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   1/*
   2 * Renesas - AP-325RXA
   3 * (Compatible with Algo System ., LTD. - AP-320A)
   4 *
   5 * Copyright (C) 2008 Renesas Solutions Corp.
   6 * Author : Yusuke Goda <goda.yuske@renesas.com>
   7 *
   8 * This file is subject to the terms and conditions of the GNU General Public
   9 * License.  See the file "COPYING" in the main directory of this archive
  10 * for more details.
  11 */
  12
  13#include <linux/init.h>
  14#include <linux/device.h>
  15#include <linux/interrupt.h>
  16#include <linux/platform_device.h>
  17#include <linux/mmc/host.h>
  18#include <linux/mmc/sh_mobile_sdhi.h>
  19#include <linux/mtd/physmap.h>
  20#include <linux/mtd/sh_flctl.h>
  21#include <linux/mfd/tmio.h>
  22#include <linux/delay.h>
  23#include <linux/i2c.h>
  24#include <linux/regulator/fixed.h>
  25#include <linux/regulator/machine.h>
  26#include <linux/smsc911x.h>
  27#include <linux/gpio.h>
  28#include <linux/videodev2.h>
  29#include <linux/sh_intc.h>
  30#include <media/i2c/ov772x.h>
  31#include <media/soc_camera.h>
  32#include <linux/platform_data/media/soc_camera_platform.h>
  33#include <media/drv-intf/sh_mobile_ceu.h>
  34#include <video/sh_mobile_lcdc.h>
  35#include <asm/io.h>
  36#include <asm/clock.h>
  37#include <asm/suspend.h>
  38#include <cpu/sh7723.h>
  39
  40/* Dummy supplies, where voltage doesn't matter */
  41static struct regulator_consumer_supply dummy_supplies[] = {
  42        REGULATOR_SUPPLY("vddvario", "smsc911x"),
  43        REGULATOR_SUPPLY("vdd33a", "smsc911x"),
  44};
  45
  46static struct smsc911x_platform_config smsc911x_config = {
  47        .phy_interface  = PHY_INTERFACE_MODE_MII,
  48        .irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  49        .irq_type       = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
  50        .flags          = SMSC911X_USE_32BIT,
  51};
  52
  53static struct resource smsc9118_resources[] = {
  54        [0] = {
  55                .start  = 0xb6080000,
  56                .end    = 0xb60fffff,
  57                .flags  = IORESOURCE_MEM,
  58        },
  59        [1] = {
  60                .start  = evt2irq(0x660),
  61                .end    = evt2irq(0x660),
  62                .flags  = IORESOURCE_IRQ,
  63        }
  64};
  65
  66static struct platform_device smsc9118_device = {
  67        .name           = "smsc911x",
  68        .id             = -1,
  69        .num_resources  = ARRAY_SIZE(smsc9118_resources),
  70        .resource       = smsc9118_resources,
  71        .dev            = {
  72                .platform_data = &smsc911x_config,
  73        },
  74};
  75
  76/*
  77 * AP320 and AP325RXA has CPLD data in NOR Flash(0xA80000-0xABFFFF).
  78 * If this area erased, this board can not boot.
  79 */
  80static struct mtd_partition ap325rxa_nor_flash_partitions[] = {
  81        {
  82                .name = "uboot",
  83                .offset = 0,
  84                .size = (1 * 1024 * 1024),
  85                .mask_flags = MTD_WRITEABLE,    /* Read-only */
  86        }, {
  87                .name = "kernel",
  88                .offset = MTDPART_OFS_APPEND,
  89                .size = (2 * 1024 * 1024),
  90        }, {
  91                .name = "free-area0",
  92                .offset = MTDPART_OFS_APPEND,
  93                .size = ((7 * 1024 * 1024) + (512 * 1024)),
  94        }, {
  95                .name = "CPLD-Data",
  96                .offset = MTDPART_OFS_APPEND,
  97                .mask_flags = MTD_WRITEABLE,    /* Read-only */
  98                .size = (1024 * 128 * 2),
  99        }, {
 100                .name = "free-area1",
 101                .offset = MTDPART_OFS_APPEND,
 102                .size = MTDPART_SIZ_FULL,
 103        },
 104};
 105
 106static struct physmap_flash_data ap325rxa_nor_flash_data = {
 107        .width          = 2,
 108        .parts          = ap325rxa_nor_flash_partitions,
 109        .nr_parts       = ARRAY_SIZE(ap325rxa_nor_flash_partitions),
 110};
 111
 112static struct resource ap325rxa_nor_flash_resources[] = {
 113        [0] = {
 114                .name   = "NOR Flash",
 115                .start  = 0x00000000,
 116                .end    = 0x00ffffff,
 117                .flags  = IORESOURCE_MEM,
 118        }
 119};
 120
 121static struct platform_device ap325rxa_nor_flash_device = {
 122        .name           = "physmap-flash",
 123        .resource       = ap325rxa_nor_flash_resources,
 124        .num_resources  = ARRAY_SIZE(ap325rxa_nor_flash_resources),
 125        .dev            = {
 126                .platform_data = &ap325rxa_nor_flash_data,
 127        },
 128};
 129
 130static struct mtd_partition nand_partition_info[] = {
 131        {
 132                .name   = "nand_data",
 133                .offset = 0,
 134                .size   = MTDPART_SIZ_FULL,
 135        },
 136};
 137
 138static struct resource nand_flash_resources[] = {
 139        [0] = {
 140                .start  = 0xa4530000,
 141                .end    = 0xa45300ff,
 142                .flags  = IORESOURCE_MEM,
 143        }
 144};
 145
 146static struct sh_flctl_platform_data nand_flash_data = {
 147        .parts          = nand_partition_info,
 148        .nr_parts       = ARRAY_SIZE(nand_partition_info),
 149        .flcmncr_val    = FCKSEL_E | TYPESEL_SET | NANWF_E,
 150        .has_hwecc      = 1,
 151};
 152
 153static struct platform_device nand_flash_device = {
 154        .name           = "sh_flctl",
 155        .resource       = nand_flash_resources,
 156        .num_resources  = ARRAY_SIZE(nand_flash_resources),
 157        .dev            = {
 158                .platform_data = &nand_flash_data,
 159        },
 160};
 161
 162#define FPGA_LCDREG     0xB4100180
 163#define FPGA_BKLREG     0xB4100212
 164#define FPGA_LCDREG_VAL 0x0018
 165#define PORT_MSELCRB    0xA4050182
 166#define PORT_HIZCRC     0xA405015C
 167#define PORT_DRVCRA     0xA405018A
 168#define PORT_DRVCRB     0xA405018C
 169
 170static int ap320_wvga_set_brightness(int brightness)
 171{
 172        if (brightness) {
 173                gpio_set_value(GPIO_PTS3, 0);
 174                __raw_writew(0x100, FPGA_BKLREG);
 175        } else {
 176                __raw_writew(0, FPGA_BKLREG);
 177                gpio_set_value(GPIO_PTS3, 1);
 178        }
 179
 180        return 0;
 181}
 182
 183static void ap320_wvga_power_on(void)
 184{
 185        msleep(100);
 186
 187        /* ASD AP-320/325 LCD ON */
 188        __raw_writew(FPGA_LCDREG_VAL, FPGA_LCDREG);
 189}
 190
 191static void ap320_wvga_power_off(void)
 192{
 193        /* ASD AP-320/325 LCD OFF */
 194        __raw_writew(0, FPGA_LCDREG);
 195}
 196
 197static const struct fb_videomode ap325rxa_lcdc_modes[] = {
 198        {
 199                .name = "LB070WV1",
 200                .xres = 800,
 201                .yres = 480,
 202                .left_margin = 32,
 203                .right_margin = 160,
 204                .hsync_len = 8,
 205                .upper_margin = 63,
 206                .lower_margin = 80,
 207                .vsync_len = 1,
 208                .sync = 0, /* hsync and vsync are active low */
 209        },
 210};
 211
 212static struct sh_mobile_lcdc_info lcdc_info = {
 213        .clock_source = LCDC_CLK_EXTERNAL,
 214        .ch[0] = {
 215                .chan = LCDC_CHAN_MAINLCD,
 216                .fourcc = V4L2_PIX_FMT_RGB565,
 217                .interface_type = RGB18,
 218                .clock_divider = 1,
 219                .lcd_modes = ap325rxa_lcdc_modes,
 220                .num_modes = ARRAY_SIZE(ap325rxa_lcdc_modes),
 221                .panel_cfg = {
 222                        .width = 152,   /* 7.0 inch */
 223                        .height = 91,
 224                        .display_on = ap320_wvga_power_on,
 225                        .display_off = ap320_wvga_power_off,
 226                },
 227                .bl_info = {
 228                        .name = "sh_mobile_lcdc_bl",
 229                        .max_brightness = 1,
 230                        .set_brightness = ap320_wvga_set_brightness,
 231                },
 232        }
 233};
 234
 235static struct resource lcdc_resources[] = {
 236        [0] = {
 237                .name   = "LCDC",
 238                .start  = 0xfe940000, /* P4-only space */
 239                .end    = 0xfe942fff,
 240                .flags  = IORESOURCE_MEM,
 241        },
 242        [1] = {
 243                .start  = evt2irq(0x580),
 244                .flags  = IORESOURCE_IRQ,
 245        },
 246};
 247
 248static struct platform_device lcdc_device = {
 249        .name           = "sh_mobile_lcdc_fb",
 250        .num_resources  = ARRAY_SIZE(lcdc_resources),
 251        .resource       = lcdc_resources,
 252        .dev            = {
 253                .platform_data  = &lcdc_info,
 254        },
 255};
 256
 257static void camera_power(int val)
 258{
 259        gpio_set_value(GPIO_PTZ5, val); /* RST_CAM/RSTB */
 260        mdelay(10);
 261}
 262
 263#ifdef CONFIG_I2C
 264/* support for the old ncm03j camera */
 265static unsigned char camera_ncm03j_magic[] =
 266{
 267        0x87, 0x00, 0x88, 0x08, 0x89, 0x01, 0x8A, 0xE8,
 268        0x1D, 0x00, 0x1E, 0x8A, 0x21, 0x00, 0x33, 0x36,
 269        0x36, 0x60, 0x37, 0x08, 0x3B, 0x31, 0x44, 0x0F,
 270        0x46, 0xF0, 0x4B, 0x28, 0x4C, 0x21, 0x4D, 0x55,
 271        0x4E, 0x1B, 0x4F, 0xC7, 0x50, 0xFC, 0x51, 0x12,
 272        0x58, 0x02, 0x66, 0xC0, 0x67, 0x46, 0x6B, 0xA0,
 273        0x6C, 0x34, 0x7E, 0x25, 0x7F, 0x25, 0x8D, 0x0F,
 274        0x92, 0x40, 0x93, 0x04, 0x94, 0x26, 0x95, 0x0A,
 275        0x99, 0x03, 0x9A, 0xF0, 0x9B, 0x14, 0x9D, 0x7A,
 276        0xC5, 0x02, 0xD6, 0x07, 0x59, 0x00, 0x5A, 0x1A,
 277        0x5B, 0x2A, 0x5C, 0x37, 0x5D, 0x42, 0x5E, 0x56,
 278        0xC8, 0x00, 0xC9, 0x1A, 0xCA, 0x2A, 0xCB, 0x37,
 279        0xCC, 0x42, 0xCD, 0x56, 0xCE, 0x00, 0xCF, 0x1A,
 280        0xD0, 0x2A, 0xD1, 0x37, 0xD2, 0x42, 0xD3, 0x56,
 281        0x5F, 0x68, 0x60, 0x87, 0x61, 0xA3, 0x62, 0xBC,
 282        0x63, 0xD4, 0x64, 0xEA, 0xD6, 0x0F,
 283};
 284
 285static int camera_probe(void)
 286{
 287        struct i2c_adapter *a = i2c_get_adapter(0);
 288        struct i2c_msg msg;
 289        int ret;
 290
 291        if (!a)
 292                return -ENODEV;
 293
 294        camera_power(1);
 295        msg.addr = 0x6e;
 296        msg.buf = camera_ncm03j_magic;
 297        msg.len = 2;
 298        msg.flags = 0;
 299        ret = i2c_transfer(a, &msg, 1);
 300        camera_power(0);
 301
 302        return ret;
 303}
 304
 305static int camera_set_capture(struct soc_camera_platform_info *info,
 306                              int enable)
 307{
 308        struct i2c_adapter *a = i2c_get_adapter(0);
 309        struct i2c_msg msg;
 310        int ret = 0;
 311        int i;
 312
 313        camera_power(0);
 314        if (!enable)
 315                return 0; /* no disable for now */
 316
 317        camera_power(1);
 318        for (i = 0; i < ARRAY_SIZE(camera_ncm03j_magic); i += 2) {
 319                u_int8_t buf[8];
 320
 321                msg.addr = 0x6e;
 322                msg.buf = buf;
 323                msg.len = 2;
 324                msg.flags = 0;
 325
 326                buf[0] = camera_ncm03j_magic[i];
 327                buf[1] = camera_ncm03j_magic[i + 1];
 328
 329                ret = (ret < 0) ? ret : i2c_transfer(a, &msg, 1);
 330        }
 331
 332        return ret;
 333}
 334
 335static int ap325rxa_camera_add(struct soc_camera_device *icd);
 336static void ap325rxa_camera_del(struct soc_camera_device *icd);
 337
 338static struct soc_camera_platform_info camera_info = {
 339        .format_name = "UYVY",
 340        .format_depth = 16,
 341        .format = {
 342                .code = MEDIA_BUS_FMT_UYVY8_2X8,
 343                .colorspace = V4L2_COLORSPACE_SMPTE170M,
 344                .field = V4L2_FIELD_NONE,
 345                .width = 640,
 346                .height = 480,
 347        },
 348        .mbus_param = V4L2_MBUS_PCLK_SAMPLE_RISING | V4L2_MBUS_MASTER |
 349        V4L2_MBUS_VSYNC_ACTIVE_HIGH | V4L2_MBUS_HSYNC_ACTIVE_HIGH |
 350        V4L2_MBUS_DATA_ACTIVE_HIGH,
 351        .mbus_type = V4L2_MBUS_PARALLEL,
 352        .set_capture = camera_set_capture,
 353};
 354
 355static struct soc_camera_link camera_link = {
 356        .bus_id         = 0,
 357        .add_device     = ap325rxa_camera_add,
 358        .del_device     = ap325rxa_camera_del,
 359        .module_name    = "soc_camera_platform",
 360        .priv           = &camera_info,
 361};
 362
 363static struct platform_device *camera_device;
 364
 365static void ap325rxa_camera_release(struct device *dev)
 366{
 367        soc_camera_platform_release(&camera_device);
 368}
 369
 370static int ap325rxa_camera_add(struct soc_camera_device *icd)
 371{
 372        int ret = soc_camera_platform_add(icd, &camera_device, &camera_link,
 373                                          ap325rxa_camera_release, 0);
 374        if (ret < 0)
 375                return ret;
 376
 377        ret = camera_probe();
 378        if (ret < 0)
 379                soc_camera_platform_del(icd, camera_device, &camera_link);
 380
 381        return ret;
 382}
 383
 384static void ap325rxa_camera_del(struct soc_camera_device *icd)
 385{
 386        soc_camera_platform_del(icd, camera_device, &camera_link);
 387}
 388#endif /* CONFIG_I2C */
 389
 390static int ov7725_power(struct device *dev, int mode)
 391{
 392        camera_power(0);
 393        if (mode)
 394                camera_power(1);
 395
 396        return 0;
 397}
 398
 399static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
 400        .flags = SH_CEU_FLAG_USE_8BIT_BUS,
 401};
 402
 403static struct resource ceu_resources[] = {
 404        [0] = {
 405                .name   = "CEU",
 406                .start  = 0xfe910000,
 407                .end    = 0xfe91009f,
 408                .flags  = IORESOURCE_MEM,
 409        },
 410        [1] = {
 411                .start  = evt2irq(0x880),
 412                .flags  = IORESOURCE_IRQ,
 413        },
 414        [2] = {
 415                /* place holder for contiguous memory */
 416        },
 417};
 418
 419static struct platform_device ceu_device = {
 420        .name           = "sh_mobile_ceu",
 421        .id             = 0, /* "ceu0" clock */
 422        .num_resources  = ARRAY_SIZE(ceu_resources),
 423        .resource       = ceu_resources,
 424        .dev            = {
 425                .platform_data  = &sh_mobile_ceu_info,
 426        },
 427};
 428
 429/* Fixed 3.3V regulators to be used by SDHI0, SDHI1 */
 430static struct regulator_consumer_supply fixed3v3_power_consumers[] =
 431{
 432        REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
 433        REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"),
 434        REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"),
 435        REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.1"),
 436};
 437
 438static struct resource sdhi0_cn3_resources[] = {
 439        [0] = {
 440                .name   = "SDHI0",
 441                .start  = 0x04ce0000,
 442                .end    = 0x04ce00ff,
 443                .flags  = IORESOURCE_MEM,
 444        },
 445        [1] = {
 446                .start  = evt2irq(0xe80),
 447                .flags  = IORESOURCE_IRQ,
 448        },
 449};
 450
 451static struct tmio_mmc_data sdhi0_cn3_data = {
 452        .capabilities   = MMC_CAP_SDIO_IRQ,
 453};
 454
 455static struct platform_device sdhi0_cn3_device = {
 456        .name           = "sh_mobile_sdhi",
 457        .id             = 0, /* "sdhi0" clock */
 458        .num_resources  = ARRAY_SIZE(sdhi0_cn3_resources),
 459        .resource       = sdhi0_cn3_resources,
 460        .dev = {
 461                .platform_data = &sdhi0_cn3_data,
 462        },
 463};
 464
 465static struct resource sdhi1_cn7_resources[] = {
 466        [0] = {
 467                .name   = "SDHI1",
 468                .start  = 0x04cf0000,
 469                .end    = 0x04cf00ff,
 470                .flags  = IORESOURCE_MEM,
 471        },
 472        [1] = {
 473                .start  = evt2irq(0x4e0),
 474                .flags  = IORESOURCE_IRQ,
 475        },
 476};
 477
 478static struct tmio_mmc_data sdhi1_cn7_data = {
 479        .capabilities   = MMC_CAP_SDIO_IRQ,
 480};
 481
 482static struct platform_device sdhi1_cn7_device = {
 483        .name           = "sh_mobile_sdhi",
 484        .id             = 1, /* "sdhi1" clock */
 485        .num_resources  = ARRAY_SIZE(sdhi1_cn7_resources),
 486        .resource       = sdhi1_cn7_resources,
 487        .dev = {
 488                .platform_data = &sdhi1_cn7_data,
 489        },
 490};
 491
 492static struct i2c_board_info __initdata ap325rxa_i2c_devices[] = {
 493        {
 494                I2C_BOARD_INFO("pcf8563", 0x51),
 495        },
 496};
 497
 498static struct i2c_board_info ap325rxa_i2c_camera[] = {
 499        {
 500                I2C_BOARD_INFO("ov772x", 0x21),
 501        },
 502};
 503
 504static struct ov772x_camera_info ov7725_info = {
 505        .flags          = OV772X_FLAG_VFLIP | OV772X_FLAG_HFLIP,
 506        .edgectrl       = OV772X_AUTO_EDGECTRL(0xf, 0),
 507};
 508
 509static struct soc_camera_link ov7725_link = {
 510        .bus_id         = 0,
 511        .power          = ov7725_power,
 512        .board_info     = &ap325rxa_i2c_camera[0],
 513        .i2c_adapter_id = 0,
 514        .priv           = &ov7725_info,
 515};
 516
 517static struct platform_device ap325rxa_camera[] = {
 518        {
 519                .name   = "soc-camera-pdrv",
 520                .id     = 0,
 521                .dev    = {
 522                        .platform_data = &ov7725_link,
 523                },
 524        }, {
 525                .name   = "soc-camera-pdrv",
 526                .id     = 1,
 527                .dev    = {
 528                        .platform_data = &camera_link,
 529                },
 530        },
 531};
 532
 533static struct platform_device *ap325rxa_devices[] __initdata = {
 534        &smsc9118_device,
 535        &ap325rxa_nor_flash_device,
 536        &lcdc_device,
 537        &ceu_device,
 538        &nand_flash_device,
 539        &sdhi0_cn3_device,
 540        &sdhi1_cn7_device,
 541        &ap325rxa_camera[0],
 542        &ap325rxa_camera[1],
 543};
 544
 545extern char ap325rxa_sdram_enter_start;
 546extern char ap325rxa_sdram_enter_end;
 547extern char ap325rxa_sdram_leave_start;
 548extern char ap325rxa_sdram_leave_end;
 549
 550static int __init ap325rxa_devices_setup(void)
 551{
 552        /* register board specific self-refresh code */
 553        sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF,
 554                                        &ap325rxa_sdram_enter_start,
 555                                        &ap325rxa_sdram_enter_end,
 556                                        &ap325rxa_sdram_leave_start,
 557                                        &ap325rxa_sdram_leave_end);
 558
 559        regulator_register_always_on(0, "fixed-3.3V", fixed3v3_power_consumers,
 560                                     ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
 561        regulator_register_fixed(1, dummy_supplies, ARRAY_SIZE(dummy_supplies));
 562
 563        /* LD3 and LD4 LEDs */
 564        gpio_request(GPIO_PTX5, NULL); /* RUN */
 565        gpio_direction_output(GPIO_PTX5, 1);
 566        gpio_export(GPIO_PTX5, 0);
 567
 568        gpio_request(GPIO_PTX4, NULL); /* INDICATOR */
 569        gpio_direction_output(GPIO_PTX4, 0);
 570        gpio_export(GPIO_PTX4, 0);
 571
 572        /* SW1 input */
 573        gpio_request(GPIO_PTF7, NULL); /* MODE */
 574        gpio_direction_input(GPIO_PTF7);
 575        gpio_export(GPIO_PTF7, 0);
 576
 577        /* LCDC */
 578        gpio_request(GPIO_FN_LCDD15, NULL);
 579        gpio_request(GPIO_FN_LCDD14, NULL);
 580        gpio_request(GPIO_FN_LCDD13, NULL);
 581        gpio_request(GPIO_FN_LCDD12, NULL);
 582        gpio_request(GPIO_FN_LCDD11, NULL);
 583        gpio_request(GPIO_FN_LCDD10, NULL);
 584        gpio_request(GPIO_FN_LCDD9, NULL);
 585        gpio_request(GPIO_FN_LCDD8, NULL);
 586        gpio_request(GPIO_FN_LCDD7, NULL);
 587        gpio_request(GPIO_FN_LCDD6, NULL);
 588        gpio_request(GPIO_FN_LCDD5, NULL);
 589        gpio_request(GPIO_FN_LCDD4, NULL);
 590        gpio_request(GPIO_FN_LCDD3, NULL);
 591        gpio_request(GPIO_FN_LCDD2, NULL);
 592        gpio_request(GPIO_FN_LCDD1, NULL);
 593        gpio_request(GPIO_FN_LCDD0, NULL);
 594        gpio_request(GPIO_FN_LCDLCLK_PTR, NULL);
 595        gpio_request(GPIO_FN_LCDDCK, NULL);
 596        gpio_request(GPIO_FN_LCDVEPWC, NULL);
 597        gpio_request(GPIO_FN_LCDVCPWC, NULL);
 598        gpio_request(GPIO_FN_LCDVSYN, NULL);
 599        gpio_request(GPIO_FN_LCDHSYN, NULL);
 600        gpio_request(GPIO_FN_LCDDISP, NULL);
 601        gpio_request(GPIO_FN_LCDDON, NULL);
 602
 603        /* LCD backlight */
 604        gpio_request(GPIO_PTS3, NULL);
 605        gpio_direction_output(GPIO_PTS3, 1);
 606
 607        /* CEU */
 608        gpio_request(GPIO_FN_VIO_CLK2, NULL);
 609        gpio_request(GPIO_FN_VIO_VD2, NULL);
 610        gpio_request(GPIO_FN_VIO_HD2, NULL);
 611        gpio_request(GPIO_FN_VIO_FLD, NULL);
 612        gpio_request(GPIO_FN_VIO_CKO, NULL);
 613        gpio_request(GPIO_FN_VIO_D15, NULL);
 614        gpio_request(GPIO_FN_VIO_D14, NULL);
 615        gpio_request(GPIO_FN_VIO_D13, NULL);
 616        gpio_request(GPIO_FN_VIO_D12, NULL);
 617        gpio_request(GPIO_FN_VIO_D11, NULL);
 618        gpio_request(GPIO_FN_VIO_D10, NULL);
 619        gpio_request(GPIO_FN_VIO_D9, NULL);
 620        gpio_request(GPIO_FN_VIO_D8, NULL);
 621
 622        gpio_request(GPIO_PTZ7, NULL);
 623        gpio_direction_output(GPIO_PTZ7, 0); /* OE_CAM */
 624        gpio_request(GPIO_PTZ6, NULL);
 625        gpio_direction_output(GPIO_PTZ6, 0); /* STBY_CAM */
 626        gpio_request(GPIO_PTZ5, NULL);
 627        gpio_direction_output(GPIO_PTZ5, 0); /* RST_CAM */
 628        gpio_request(GPIO_PTZ4, NULL);
 629        gpio_direction_output(GPIO_PTZ4, 0); /* SADDR */
 630
 631        __raw_writew(__raw_readw(PORT_MSELCRB) & ~0x0001, PORT_MSELCRB);
 632
 633        /* FLCTL */
 634        gpio_request(GPIO_FN_FCE, NULL);
 635        gpio_request(GPIO_FN_NAF7, NULL);
 636        gpio_request(GPIO_FN_NAF6, NULL);
 637        gpio_request(GPIO_FN_NAF5, NULL);
 638        gpio_request(GPIO_FN_NAF4, NULL);
 639        gpio_request(GPIO_FN_NAF3, NULL);
 640        gpio_request(GPIO_FN_NAF2, NULL);
 641        gpio_request(GPIO_FN_NAF1, NULL);
 642        gpio_request(GPIO_FN_NAF0, NULL);
 643        gpio_request(GPIO_FN_FCDE, NULL);
 644        gpio_request(GPIO_FN_FOE, NULL);
 645        gpio_request(GPIO_FN_FSC, NULL);
 646        gpio_request(GPIO_FN_FWE, NULL);
 647        gpio_request(GPIO_FN_FRB, NULL);
 648
 649        __raw_writew(0, PORT_HIZCRC);
 650        __raw_writew(0xFFFF, PORT_DRVCRA);
 651        __raw_writew(0xFFFF, PORT_DRVCRB);
 652
 653        platform_resource_setup_memory(&ceu_device, "ceu", 4 << 20);
 654
 655        /* SDHI0 - CN3 - SD CARD */
 656        gpio_request(GPIO_FN_SDHI0CD_PTD, NULL);
 657        gpio_request(GPIO_FN_SDHI0WP_PTD, NULL);
 658        gpio_request(GPIO_FN_SDHI0D3_PTD, NULL);
 659        gpio_request(GPIO_FN_SDHI0D2_PTD, NULL);
 660        gpio_request(GPIO_FN_SDHI0D1_PTD, NULL);
 661        gpio_request(GPIO_FN_SDHI0D0_PTD, NULL);
 662        gpio_request(GPIO_FN_SDHI0CMD_PTD, NULL);
 663        gpio_request(GPIO_FN_SDHI0CLK_PTD, NULL);
 664
 665        /* SDHI1 - CN7 - MICRO SD CARD */
 666        gpio_request(GPIO_FN_SDHI1CD, NULL);
 667        gpio_request(GPIO_FN_SDHI1D3, NULL);
 668        gpio_request(GPIO_FN_SDHI1D2, NULL);
 669        gpio_request(GPIO_FN_SDHI1D1, NULL);
 670        gpio_request(GPIO_FN_SDHI1D0, NULL);
 671        gpio_request(GPIO_FN_SDHI1CMD, NULL);
 672        gpio_request(GPIO_FN_SDHI1CLK, NULL);
 673
 674        i2c_register_board_info(0, ap325rxa_i2c_devices,
 675                                ARRAY_SIZE(ap325rxa_i2c_devices));
 676
 677        return platform_add_devices(ap325rxa_devices,
 678                                ARRAY_SIZE(ap325rxa_devices));
 679}
 680arch_initcall(ap325rxa_devices_setup);
 681
 682/* Return the board specific boot mode pin configuration */
 683static int ap325rxa_mode_pins(void)
 684{
 685        /* MD0=0, MD1=0, MD2=0: Clock Mode 0
 686         * MD3=0: 16-bit Area0 Bus Width
 687         * MD5=1: Little Endian
 688         * TSTMD=1, MD8=1: Test Mode Disabled
 689         */
 690        return MODE_PIN5 | MODE_PIN8;
 691}
 692
 693static struct sh_machine_vector mv_ap325rxa __initmv = {
 694        .mv_name = "AP-325RXA",
 695        .mv_mode_pins = ap325rxa_mode_pins,
 696};
 697