linux/arch/sh/boards/mach-se/7724/setup.c
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   1/*
   2 * linux/arch/sh/boards/se/7724/setup.c
   3 *
   4 * Copyright (C) 2009 Renesas Solutions Corp.
   5 *
   6 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
   7 *
   8 * This file is subject to the terms and conditions of the GNU General Public
   9 * License.  See the file "COPYING" in the main directory of this archive
  10 * for more details.
  11 */
  12
  13#include <linux/init.h>
  14#include <linux/device.h>
  15#include <linux/interrupt.h>
  16#include <linux/platform_device.h>
  17#include <linux/mmc/host.h>
  18#include <linux/mmc/sh_mobile_sdhi.h>
  19#include <linux/mfd/tmio.h>
  20#include <linux/mtd/physmap.h>
  21#include <linux/delay.h>
  22#include <linux/regulator/fixed.h>
  23#include <linux/regulator/machine.h>
  24#include <linux/smc91x.h>
  25#include <linux/gpio.h>
  26#include <linux/input.h>
  27#include <linux/input/sh_keysc.h>
  28#include <linux/usb/r8a66597.h>
  29#include <linux/sh_eth.h>
  30#include <linux/sh_intc.h>
  31#include <linux/videodev2.h>
  32#include <video/sh_mobile_lcdc.h>
  33#include <media/drv-intf/sh_mobile_ceu.h>
  34#include <sound/sh_fsi.h>
  35#include <sound/simple_card.h>
  36#include <asm/io.h>
  37#include <asm/heartbeat.h>
  38#include <asm/clock.h>
  39#include <asm/suspend.h>
  40#include <cpu/sh7724.h>
  41#include <mach-se/mach/se7724.h>
  42
  43/*
  44 * SWx    1234 5678
  45 * ------------------------------------
  46 * SW31 : 1001 1100    : default
  47 * SW32 : 0111 1111    : use on board flash
  48 *
  49 * SW41 : abxx xxxx  -> a = 0 : Analog  monitor
  50 *                          1 : Digital monitor
  51 *                      b = 0 : VGA
  52 *                          1 : 720p
  53 */
  54
  55/*
  56 * about 720p
  57 *
  58 * When you use 1280 x 720 lcdc output,
  59 * you should change OSC6 lcdc clock from 25.175MHz to 74.25MHz,
  60 * and change SW41 to use 720p
  61 */
  62
  63/*
  64 * about sound
  65 *
  66 * This setup.c supports FSI slave mode.
  67 * Please change J20, J21, J22 pin to 1-2 connection.
  68 */
  69
  70/* Heartbeat */
  71static struct resource heartbeat_resource = {
  72        .start  = PA_LED,
  73        .end    = PA_LED,
  74        .flags  = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
  75};
  76
  77static struct platform_device heartbeat_device = {
  78        .name           = "heartbeat",
  79        .id             = -1,
  80        .num_resources  = 1,
  81        .resource       = &heartbeat_resource,
  82};
  83
  84/* LAN91C111 */
  85static struct smc91x_platdata smc91x_info = {
  86        .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  87};
  88
  89static struct resource smc91x_eth_resources[] = {
  90        [0] = {
  91                .name   = "SMC91C111" ,
  92                .start  = 0x1a300300,
  93                .end    = 0x1a30030f,
  94                .flags  = IORESOURCE_MEM,
  95        },
  96        [1] = {
  97                .start  = IRQ0_SMC,
  98                .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  99        },
 100};
 101
 102static struct platform_device smc91x_eth_device = {
 103        .name   = "smc91x",
 104        .num_resources  = ARRAY_SIZE(smc91x_eth_resources),
 105        .resource       = smc91x_eth_resources,
 106        .dev    = {
 107                .platform_data  = &smc91x_info,
 108        },
 109};
 110
 111/* MTD */
 112static struct mtd_partition nor_flash_partitions[] = {
 113        {
 114                .name = "uboot",
 115                .offset = 0,
 116                .size = (1 * 1024 * 1024),
 117                .mask_flags = MTD_WRITEABLE,    /* Read-only */
 118        }, {
 119                .name = "kernel",
 120                .offset = MTDPART_OFS_APPEND,
 121                .size = (2 * 1024 * 1024),
 122        }, {
 123                .name = "free-area",
 124                .offset = MTDPART_OFS_APPEND,
 125                .size = MTDPART_SIZ_FULL,
 126        },
 127};
 128
 129static struct physmap_flash_data nor_flash_data = {
 130        .width          = 2,
 131        .parts          = nor_flash_partitions,
 132        .nr_parts       = ARRAY_SIZE(nor_flash_partitions),
 133};
 134
 135static struct resource nor_flash_resources[] = {
 136        [0] = {
 137                .name   = "NOR Flash",
 138                .start  = 0x00000000,
 139                .end    = 0x01ffffff,
 140                .flags  = IORESOURCE_MEM,
 141        }
 142};
 143
 144static struct platform_device nor_flash_device = {
 145        .name           = "physmap-flash",
 146        .resource       = nor_flash_resources,
 147        .num_resources  = ARRAY_SIZE(nor_flash_resources),
 148        .dev            = {
 149                .platform_data = &nor_flash_data,
 150        },
 151};
 152
 153/* LCDC */
 154static const struct fb_videomode lcdc_720p_modes[] = {
 155        {
 156                .name           = "LB070WV1",
 157                .sync           = 0, /* hsync and vsync are active low */
 158                .xres           = 1280,
 159                .yres           = 720,
 160                .left_margin    = 220,
 161                .right_margin   = 110,
 162                .hsync_len      = 40,
 163                .upper_margin   = 20,
 164                .lower_margin   = 5,
 165                .vsync_len      = 5,
 166        },
 167};
 168
 169static const struct fb_videomode lcdc_vga_modes[] = {
 170        {
 171                .name           = "LB070WV1",
 172                .sync           = 0, /* hsync and vsync are active low */
 173                .xres           = 640,
 174                .yres           = 480,
 175                .left_margin    = 105,
 176                .right_margin   = 50,
 177                .hsync_len      = 96,
 178                .upper_margin   = 33,
 179                .lower_margin   = 10,
 180                .vsync_len      = 2,
 181        },
 182};
 183
 184static struct sh_mobile_lcdc_info lcdc_info = {
 185        .clock_source = LCDC_CLK_EXTERNAL,
 186        .ch[0] = {
 187                .chan = LCDC_CHAN_MAINLCD,
 188                .fourcc = V4L2_PIX_FMT_RGB565,
 189                .clock_divider = 1,
 190                .panel_cfg = { /* 7.0 inch */
 191                        .width = 152,
 192                        .height = 91,
 193                },
 194        }
 195};
 196
 197static struct resource lcdc_resources[] = {
 198        [0] = {
 199                .name   = "LCDC",
 200                .start  = 0xfe940000,
 201                .end    = 0xfe942fff,
 202                .flags  = IORESOURCE_MEM,
 203        },
 204        [1] = {
 205                .start  = evt2irq(0xf40),
 206                .flags  = IORESOURCE_IRQ,
 207        },
 208};
 209
 210static struct platform_device lcdc_device = {
 211        .name           = "sh_mobile_lcdc_fb",
 212        .num_resources  = ARRAY_SIZE(lcdc_resources),
 213        .resource       = lcdc_resources,
 214        .dev            = {
 215                .platform_data  = &lcdc_info,
 216        },
 217};
 218
 219/* CEU0 */
 220static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
 221        .flags = SH_CEU_FLAG_USE_8BIT_BUS,
 222};
 223
 224static struct resource ceu0_resources[] = {
 225        [0] = {
 226                .name   = "CEU0",
 227                .start  = 0xfe910000,
 228                .end    = 0xfe91009f,
 229                .flags  = IORESOURCE_MEM,
 230        },
 231        [1] = {
 232                .start  = evt2irq(0x880),
 233                .flags  = IORESOURCE_IRQ,
 234        },
 235        [2] = {
 236                /* place holder for contiguous memory */
 237        },
 238};
 239
 240static struct platform_device ceu0_device = {
 241        .name           = "sh_mobile_ceu",
 242        .id             = 0, /* "ceu0" clock */
 243        .num_resources  = ARRAY_SIZE(ceu0_resources),
 244        .resource       = ceu0_resources,
 245        .dev    = {
 246                .platform_data  = &sh_mobile_ceu0_info,
 247        },
 248};
 249
 250/* CEU1 */
 251static struct sh_mobile_ceu_info sh_mobile_ceu1_info = {
 252        .flags = SH_CEU_FLAG_USE_8BIT_BUS,
 253};
 254
 255static struct resource ceu1_resources[] = {
 256        [0] = {
 257                .name   = "CEU1",
 258                .start  = 0xfe914000,
 259                .end    = 0xfe91409f,
 260                .flags  = IORESOURCE_MEM,
 261        },
 262        [1] = {
 263                .start  = evt2irq(0x9e0),
 264                .flags  = IORESOURCE_IRQ,
 265        },
 266        [2] = {
 267                /* place holder for contiguous memory */
 268        },
 269};
 270
 271static struct platform_device ceu1_device = {
 272        .name           = "sh_mobile_ceu",
 273        .id             = 1, /* "ceu1" clock */
 274        .num_resources  = ARRAY_SIZE(ceu1_resources),
 275        .resource       = ceu1_resources,
 276        .dev    = {
 277                .platform_data  = &sh_mobile_ceu1_info,
 278        },
 279};
 280
 281/* FSI */
 282/* change J20, J21, J22 pin to 1-2 connection to use slave mode */
 283static struct resource fsi_resources[] = {
 284        [0] = {
 285                .name   = "FSI",
 286                .start  = 0xFE3C0000,
 287                .end    = 0xFE3C021d,
 288                .flags  = IORESOURCE_MEM,
 289        },
 290        [1] = {
 291                .start  = evt2irq(0xf80),
 292                .flags  = IORESOURCE_IRQ,
 293        },
 294};
 295
 296static struct platform_device fsi_device = {
 297        .name           = "sh_fsi",
 298        .id             = 0,
 299        .num_resources  = ARRAY_SIZE(fsi_resources),
 300        .resource       = fsi_resources,
 301};
 302
 303static struct asoc_simple_card_info fsi_ak4642_info = {
 304        .name           = "AK4642",
 305        .card           = "FSIA-AK4642",
 306        .codec          = "ak4642-codec.0-0012",
 307        .platform       = "sh_fsi.0",
 308        .daifmt         = SND_SOC_DAIFMT_LEFT_J | SND_SOC_DAIFMT_CBM_CFM,
 309        .cpu_dai = {
 310                .name   = "fsia-dai",
 311        },
 312        .codec_dai = {
 313                .name   = "ak4642-hifi",
 314                .sysclk = 11289600,
 315        },
 316};
 317
 318static struct platform_device fsi_ak4642_device = {
 319        .name   = "asoc-simple-card",
 320        .dev    = {
 321                .platform_data  = &fsi_ak4642_info,
 322        },
 323};
 324
 325/* KEYSC in SoC (Needs SW33-2 set to ON) */
 326static struct sh_keysc_info keysc_info = {
 327        .mode = SH_KEYSC_MODE_1,
 328        .scan_timing = 3,
 329        .delay = 50,
 330        .keycodes = {
 331                KEY_1, KEY_2, KEY_3, KEY_4, KEY_5,
 332                KEY_6, KEY_7, KEY_8, KEY_9, KEY_A,
 333                KEY_B, KEY_C, KEY_D, KEY_E, KEY_F,
 334                KEY_G, KEY_H, KEY_I, KEY_K, KEY_L,
 335                KEY_M, KEY_N, KEY_O, KEY_P, KEY_Q,
 336                KEY_R, KEY_S, KEY_T, KEY_U, KEY_V,
 337        },
 338};
 339
 340static struct resource keysc_resources[] = {
 341        [0] = {
 342                .name   = "KEYSC",
 343                .start  = 0x044b0000,
 344                .end    = 0x044b000f,
 345                .flags  = IORESOURCE_MEM,
 346        },
 347        [1] = {
 348                .start  = evt2irq(0xbe0),
 349                .flags  = IORESOURCE_IRQ,
 350        },
 351};
 352
 353static struct platform_device keysc_device = {
 354        .name           = "sh_keysc",
 355        .id             = 0, /* "keysc0" clock */
 356        .num_resources  = ARRAY_SIZE(keysc_resources),
 357        .resource       = keysc_resources,
 358        .dev    = {
 359                .platform_data  = &keysc_info,
 360        },
 361};
 362
 363/* SH Eth */
 364static struct resource sh_eth_resources[] = {
 365        [0] = {
 366                .start = SH_ETH_ADDR,
 367                .end   = SH_ETH_ADDR + 0x1FC - 1,
 368                .flags = IORESOURCE_MEM,
 369        },
 370        [1] = {
 371                .start = evt2irq(0xd60),
 372                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
 373        },
 374};
 375
 376static struct sh_eth_plat_data sh_eth_plat = {
 377        .phy = 0x1f, /* SMSC LAN8187 */
 378        .edmac_endian = EDMAC_LITTLE_ENDIAN,
 379        .phy_interface = PHY_INTERFACE_MODE_MII,
 380};
 381
 382static struct platform_device sh_eth_device = {
 383        .name = "sh7724-ether",
 384        .id = 0,
 385        .dev = {
 386                .platform_data = &sh_eth_plat,
 387        },
 388        .num_resources = ARRAY_SIZE(sh_eth_resources),
 389        .resource = sh_eth_resources,
 390};
 391
 392static struct r8a66597_platdata sh7724_usb0_host_data = {
 393        .on_chip = 1,
 394};
 395
 396static struct resource sh7724_usb0_host_resources[] = {
 397        [0] = {
 398                .start  = 0xa4d80000,
 399                .end    = 0xa4d80124 - 1,
 400                .flags  = IORESOURCE_MEM,
 401        },
 402        [1] = {
 403                .start  = evt2irq(0xa20),
 404                .end    = evt2irq(0xa20),
 405                .flags  = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
 406        },
 407};
 408
 409static struct platform_device sh7724_usb0_host_device = {
 410        .name           = "r8a66597_hcd",
 411        .id             = 0,
 412        .dev = {
 413                .dma_mask               = NULL,         /*  not use dma */
 414                .coherent_dma_mask      = 0xffffffff,
 415                .platform_data          = &sh7724_usb0_host_data,
 416        },
 417        .num_resources  = ARRAY_SIZE(sh7724_usb0_host_resources),
 418        .resource       = sh7724_usb0_host_resources,
 419};
 420
 421static struct r8a66597_platdata sh7724_usb1_gadget_data = {
 422        .on_chip = 1,
 423};
 424
 425static struct resource sh7724_usb1_gadget_resources[] = {
 426        [0] = {
 427                .start  = 0xa4d90000,
 428                .end    = 0xa4d90123,
 429                .flags  = IORESOURCE_MEM,
 430        },
 431        [1] = {
 432                .start  = evt2irq(0xa40),
 433                .end    = evt2irq(0xa40),
 434                .flags  = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
 435        },
 436};
 437
 438static struct platform_device sh7724_usb1_gadget_device = {
 439        .name           = "r8a66597_udc",
 440        .id             = 1, /* USB1 */
 441        .dev = {
 442                .dma_mask               = NULL,         /*  not use dma */
 443                .coherent_dma_mask      = 0xffffffff,
 444                .platform_data          = &sh7724_usb1_gadget_data,
 445        },
 446        .num_resources  = ARRAY_SIZE(sh7724_usb1_gadget_resources),
 447        .resource       = sh7724_usb1_gadget_resources,
 448};
 449
 450/* Fixed 3.3V regulator to be used by SDHI0, SDHI1 */
 451static struct regulator_consumer_supply fixed3v3_power_consumers[] =
 452{
 453        REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
 454        REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"),
 455        REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"),
 456        REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.1"),
 457};
 458
 459static struct resource sdhi0_cn7_resources[] = {
 460        [0] = {
 461                .name   = "SDHI0",
 462                .start  = 0x04ce0000,
 463                .end    = 0x04ce00ff,
 464                .flags  = IORESOURCE_MEM,
 465        },
 466        [1] = {
 467                .start  = evt2irq(0xe80),
 468                .flags  = IORESOURCE_IRQ,
 469        },
 470};
 471
 472static struct tmio_mmc_data sh7724_sdhi0_data = {
 473        .chan_priv_tx   = (void *)SHDMA_SLAVE_SDHI0_TX,
 474        .chan_priv_rx   = (void *)SHDMA_SLAVE_SDHI0_RX,
 475        .capabilities   = MMC_CAP_SDIO_IRQ,
 476};
 477
 478static struct platform_device sdhi0_cn7_device = {
 479        .name           = "sh_mobile_sdhi",
 480        .id             = 0,
 481        .num_resources  = ARRAY_SIZE(sdhi0_cn7_resources),
 482        .resource       = sdhi0_cn7_resources,
 483        .dev = {
 484                .platform_data  = &sh7724_sdhi0_data,
 485        },
 486};
 487
 488static struct resource sdhi1_cn8_resources[] = {
 489        [0] = {
 490                .name   = "SDHI1",
 491                .start  = 0x04cf0000,
 492                .end    = 0x04cf00ff,
 493                .flags  = IORESOURCE_MEM,
 494        },
 495        [1] = {
 496                .start  = evt2irq(0x4e0),
 497                .flags  = IORESOURCE_IRQ,
 498        },
 499};
 500
 501static struct tmio_mmc_data sh7724_sdhi1_data = {
 502        .chan_priv_tx   = (void *)SHDMA_SLAVE_SDHI1_TX,
 503        .chan_priv_rx   = (void *)SHDMA_SLAVE_SDHI1_RX,
 504        .capabilities   = MMC_CAP_SDIO_IRQ,
 505};
 506
 507static struct platform_device sdhi1_cn8_device = {
 508        .name           = "sh_mobile_sdhi",
 509        .id             = 1,
 510        .num_resources  = ARRAY_SIZE(sdhi1_cn8_resources),
 511        .resource       = sdhi1_cn8_resources,
 512        .dev = {
 513                .platform_data  = &sh7724_sdhi1_data,
 514        },
 515};
 516
 517/* IrDA */
 518static struct resource irda_resources[] = {
 519        [0] = {
 520                .name   = "IrDA",
 521                .start  = 0xA45D0000,
 522                .end    = 0xA45D0049,
 523                .flags  = IORESOURCE_MEM,
 524        },
 525        [1] = {
 526                .start  = evt2irq(0x480),
 527                .flags  = IORESOURCE_IRQ,
 528        },
 529};
 530
 531static struct platform_device irda_device = {
 532        .name           = "sh_sir",
 533        .num_resources  = ARRAY_SIZE(irda_resources),
 534        .resource       = irda_resources,
 535};
 536
 537#include <media/i2c/ak881x.h>
 538#include <media/drv-intf/sh_vou.h>
 539
 540static struct ak881x_pdata ak881x_pdata = {
 541        .flags = AK881X_IF_MODE_SLAVE,
 542};
 543
 544static struct i2c_board_info ak8813 = {
 545        /* With open J18 jumper address is 0x21 */
 546        I2C_BOARD_INFO("ak8813", 0x20),
 547        .platform_data = &ak881x_pdata,
 548};
 549
 550static struct sh_vou_pdata sh_vou_pdata = {
 551        .bus_fmt        = SH_VOU_BUS_8BIT,
 552        .flags          = SH_VOU_HSYNC_LOW | SH_VOU_VSYNC_LOW,
 553        .board_info     = &ak8813,
 554        .i2c_adap       = 0,
 555};
 556
 557static struct resource sh_vou_resources[] = {
 558        [0] = {
 559                .start  = 0xfe960000,
 560                .end    = 0xfe962043,
 561                .flags  = IORESOURCE_MEM,
 562        },
 563        [1] = {
 564                .start  = evt2irq(0x8e0),
 565                .flags  = IORESOURCE_IRQ,
 566        },
 567};
 568
 569static struct platform_device vou_device = {
 570        .name           = "sh-vou",
 571        .id             = -1,
 572        .num_resources  = ARRAY_SIZE(sh_vou_resources),
 573        .resource       = sh_vou_resources,
 574        .dev            = {
 575                .platform_data  = &sh_vou_pdata,
 576        },
 577};
 578
 579static struct platform_device *ms7724se_devices[] __initdata = {
 580        &heartbeat_device,
 581        &smc91x_eth_device,
 582        &lcdc_device,
 583        &nor_flash_device,
 584        &ceu0_device,
 585        &ceu1_device,
 586        &keysc_device,
 587        &sh_eth_device,
 588        &sh7724_usb0_host_device,
 589        &sh7724_usb1_gadget_device,
 590        &fsi_device,
 591        &fsi_ak4642_device,
 592        &sdhi0_cn7_device,
 593        &sdhi1_cn8_device,
 594        &irda_device,
 595        &vou_device,
 596};
 597
 598/* I2C device */
 599static struct i2c_board_info i2c0_devices[] = {
 600        {
 601                I2C_BOARD_INFO("ak4642", 0x12),
 602        },
 603};
 604
 605#define EEPROM_OP   0xBA206000
 606#define EEPROM_ADR  0xBA206004
 607#define EEPROM_DATA 0xBA20600C
 608#define EEPROM_STAT 0xBA206010
 609#define EEPROM_STRT 0xBA206014
 610
 611static int __init sh_eth_is_eeprom_ready(void)
 612{
 613        int t = 10000;
 614
 615        while (t--) {
 616                if (!__raw_readw(EEPROM_STAT))
 617                        return 1;
 618                udelay(1);
 619        }
 620
 621        printk(KERN_ERR "ms7724se can not access to eeprom\n");
 622        return 0;
 623}
 624
 625static void __init sh_eth_init(void)
 626{
 627        int i;
 628        u16 mac;
 629
 630        /* check EEPROM status */
 631        if (!sh_eth_is_eeprom_ready())
 632                return;
 633
 634        /* read MAC addr from EEPROM */
 635        for (i = 0 ; i < 3 ; i++) {
 636                __raw_writew(0x0, EEPROM_OP); /* read */
 637                __raw_writew(i*2, EEPROM_ADR);
 638                __raw_writew(0x1, EEPROM_STRT);
 639                if (!sh_eth_is_eeprom_ready())
 640                        return;
 641
 642                mac = __raw_readw(EEPROM_DATA);
 643                sh_eth_plat.mac_addr[i << 1] = mac & 0xff;
 644                sh_eth_plat.mac_addr[(i << 1) + 1] = mac >> 8;
 645        }
 646}
 647
 648#define SW4140    0xBA201000
 649#define FPGA_OUT  0xBA200400
 650#define PORT_HIZA 0xA4050158
 651#define PORT_MSELCRB 0xA4050182
 652
 653#define SW41_A    0x0100
 654#define SW41_B    0x0200
 655#define SW41_C    0x0400
 656#define SW41_D    0x0800
 657#define SW41_E    0x1000
 658#define SW41_F    0x2000
 659#define SW41_G    0x4000
 660#define SW41_H    0x8000
 661
 662extern char ms7724se_sdram_enter_start;
 663extern char ms7724se_sdram_enter_end;
 664extern char ms7724se_sdram_leave_start;
 665extern char ms7724se_sdram_leave_end;
 666
 667static int __init arch_setup(void)
 668{
 669        /* enable I2C device */
 670        i2c_register_board_info(0, i2c0_devices,
 671                                ARRAY_SIZE(i2c0_devices));
 672        return 0;
 673}
 674arch_initcall(arch_setup);
 675
 676static int __init devices_setup(void)
 677{
 678        u16 sw = __raw_readw(SW4140); /* select camera, monitor */
 679        struct clk *clk;
 680        u16 fpga_out;
 681
 682        /* register board specific self-refresh code */
 683        sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF |
 684                                        SUSP_SH_RSTANDBY,
 685                                        &ms7724se_sdram_enter_start,
 686                                        &ms7724se_sdram_enter_end,
 687                                        &ms7724se_sdram_leave_start,
 688                                        &ms7724se_sdram_leave_end);
 689
 690        regulator_register_always_on(0, "fixed-3.3V", fixed3v3_power_consumers,
 691                                     ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
 692
 693        /* Reset Release */
 694        fpga_out = __raw_readw(FPGA_OUT);
 695        /* bit4: NTSC_PDN, bit5: NTSC_RESET */
 696        fpga_out &= ~((1 << 1)  | /* LAN */
 697                      (1 << 4)  | /* AK8813 PDN */
 698                      (1 << 5)  | /* AK8813 RESET */
 699                      (1 << 6)  | /* VIDEO DAC */
 700                      (1 << 7)  | /* AK4643 */
 701                      (1 << 8)  | /* IrDA */
 702                      (1 << 12) | /* USB0 */
 703                      (1 << 14)); /* RMII */
 704        __raw_writew(fpga_out | (1 << 4), FPGA_OUT);
 705
 706        udelay(10);
 707
 708        /* AK8813 RESET */
 709        __raw_writew(fpga_out | (1 << 5), FPGA_OUT);
 710
 711        udelay(10);
 712
 713        __raw_writew(fpga_out, FPGA_OUT);
 714
 715        /* turn on USB clocks, use external clock */
 716        __raw_writew((__raw_readw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB);
 717
 718        /* Let LED9 show STATUS2 */
 719        gpio_request(GPIO_FN_STATUS2, NULL);
 720
 721        /* Lit LED10 show STATUS0 */
 722        gpio_request(GPIO_FN_STATUS0, NULL);
 723
 724        /* Lit LED11 show PDSTATUS */
 725        gpio_request(GPIO_FN_PDSTATUS, NULL);
 726
 727        /* enable USB0 port */
 728        __raw_writew(0x0600, 0xa40501d4);
 729
 730        /* enable USB1 port */
 731        __raw_writew(0x0600, 0xa4050192);
 732
 733        /* enable IRQ 0,1,2 */
 734        gpio_request(GPIO_FN_INTC_IRQ0, NULL);
 735        gpio_request(GPIO_FN_INTC_IRQ1, NULL);
 736        gpio_request(GPIO_FN_INTC_IRQ2, NULL);
 737
 738        /* enable SCIFA3 */
 739        gpio_request(GPIO_FN_SCIF3_I_SCK, NULL);
 740        gpio_request(GPIO_FN_SCIF3_I_RXD, NULL);
 741        gpio_request(GPIO_FN_SCIF3_I_TXD, NULL);
 742        gpio_request(GPIO_FN_SCIF3_I_CTS, NULL);
 743        gpio_request(GPIO_FN_SCIF3_I_RTS, NULL);
 744
 745        /* enable LCDC */
 746        gpio_request(GPIO_FN_LCDD23,   NULL);
 747        gpio_request(GPIO_FN_LCDD22,   NULL);
 748        gpio_request(GPIO_FN_LCDD21,   NULL);
 749        gpio_request(GPIO_FN_LCDD20,   NULL);
 750        gpio_request(GPIO_FN_LCDD19,   NULL);
 751        gpio_request(GPIO_FN_LCDD18,   NULL);
 752        gpio_request(GPIO_FN_LCDD17,   NULL);
 753        gpio_request(GPIO_FN_LCDD16,   NULL);
 754        gpio_request(GPIO_FN_LCDD15,   NULL);
 755        gpio_request(GPIO_FN_LCDD14,   NULL);
 756        gpio_request(GPIO_FN_LCDD13,   NULL);
 757        gpio_request(GPIO_FN_LCDD12,   NULL);
 758        gpio_request(GPIO_FN_LCDD11,   NULL);
 759        gpio_request(GPIO_FN_LCDD10,   NULL);
 760        gpio_request(GPIO_FN_LCDD9,    NULL);
 761        gpio_request(GPIO_FN_LCDD8,    NULL);
 762        gpio_request(GPIO_FN_LCDD7,    NULL);
 763        gpio_request(GPIO_FN_LCDD6,    NULL);
 764        gpio_request(GPIO_FN_LCDD5,    NULL);
 765        gpio_request(GPIO_FN_LCDD4,    NULL);
 766        gpio_request(GPIO_FN_LCDD3,    NULL);
 767        gpio_request(GPIO_FN_LCDD2,    NULL);
 768        gpio_request(GPIO_FN_LCDD1,    NULL);
 769        gpio_request(GPIO_FN_LCDD0,    NULL);
 770        gpio_request(GPIO_FN_LCDDISP,  NULL);
 771        gpio_request(GPIO_FN_LCDHSYN,  NULL);
 772        gpio_request(GPIO_FN_LCDDCK,   NULL);
 773        gpio_request(GPIO_FN_LCDVSYN,  NULL);
 774        gpio_request(GPIO_FN_LCDDON,   NULL);
 775        gpio_request(GPIO_FN_LCDVEPWC, NULL);
 776        gpio_request(GPIO_FN_LCDVCPWC, NULL);
 777        gpio_request(GPIO_FN_LCDRD,    NULL);
 778        gpio_request(GPIO_FN_LCDLCLK,  NULL);
 779        __raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA);
 780
 781        /* enable CEU0 */
 782        gpio_request(GPIO_FN_VIO0_D15, NULL);
 783        gpio_request(GPIO_FN_VIO0_D14, NULL);
 784        gpio_request(GPIO_FN_VIO0_D13, NULL);
 785        gpio_request(GPIO_FN_VIO0_D12, NULL);
 786        gpio_request(GPIO_FN_VIO0_D11, NULL);
 787        gpio_request(GPIO_FN_VIO0_D10, NULL);
 788        gpio_request(GPIO_FN_VIO0_D9,  NULL);
 789        gpio_request(GPIO_FN_VIO0_D8,  NULL);
 790        gpio_request(GPIO_FN_VIO0_D7,  NULL);
 791        gpio_request(GPIO_FN_VIO0_D6,  NULL);
 792        gpio_request(GPIO_FN_VIO0_D5,  NULL);
 793        gpio_request(GPIO_FN_VIO0_D4,  NULL);
 794        gpio_request(GPIO_FN_VIO0_D3,  NULL);
 795        gpio_request(GPIO_FN_VIO0_D2,  NULL);
 796        gpio_request(GPIO_FN_VIO0_D1,  NULL);
 797        gpio_request(GPIO_FN_VIO0_D0,  NULL);
 798        gpio_request(GPIO_FN_VIO0_VD,  NULL);
 799        gpio_request(GPIO_FN_VIO0_CLK, NULL);
 800        gpio_request(GPIO_FN_VIO0_FLD, NULL);
 801        gpio_request(GPIO_FN_VIO0_HD,  NULL);
 802        platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20);
 803
 804        /* enable CEU1 */
 805        gpio_request(GPIO_FN_VIO1_D7,  NULL);
 806        gpio_request(GPIO_FN_VIO1_D6,  NULL);
 807        gpio_request(GPIO_FN_VIO1_D5,  NULL);
 808        gpio_request(GPIO_FN_VIO1_D4,  NULL);
 809        gpio_request(GPIO_FN_VIO1_D3,  NULL);
 810        gpio_request(GPIO_FN_VIO1_D2,  NULL);
 811        gpio_request(GPIO_FN_VIO1_D1,  NULL);
 812        gpio_request(GPIO_FN_VIO1_D0,  NULL);
 813        gpio_request(GPIO_FN_VIO1_FLD, NULL);
 814        gpio_request(GPIO_FN_VIO1_HD,  NULL);
 815        gpio_request(GPIO_FN_VIO1_VD,  NULL);
 816        gpio_request(GPIO_FN_VIO1_CLK, NULL);
 817        platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20);
 818
 819        /* KEYSC */
 820        gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
 821        gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
 822        gpio_request(GPIO_FN_KEYIN4,      NULL);
 823        gpio_request(GPIO_FN_KEYIN3,      NULL);
 824        gpio_request(GPIO_FN_KEYIN2,      NULL);
 825        gpio_request(GPIO_FN_KEYIN1,      NULL);
 826        gpio_request(GPIO_FN_KEYIN0,      NULL);
 827        gpio_request(GPIO_FN_KEYOUT3,     NULL);
 828        gpio_request(GPIO_FN_KEYOUT2,     NULL);
 829        gpio_request(GPIO_FN_KEYOUT1,     NULL);
 830        gpio_request(GPIO_FN_KEYOUT0,     NULL);
 831
 832        /* enable FSI */
 833        gpio_request(GPIO_FN_FSIMCKA,    NULL);
 834        gpio_request(GPIO_FN_FSIIASD,    NULL);
 835        gpio_request(GPIO_FN_FSIOASD,    NULL);
 836        gpio_request(GPIO_FN_FSIIABCK,   NULL);
 837        gpio_request(GPIO_FN_FSIIALRCK,  NULL);
 838        gpio_request(GPIO_FN_FSIOABCK,   NULL);
 839        gpio_request(GPIO_FN_FSIOALRCK,  NULL);
 840        gpio_request(GPIO_FN_CLKAUDIOAO, NULL);
 841
 842        /* set SPU2 clock to 83.4 MHz */
 843        clk = clk_get(NULL, "spu_clk");
 844        if (!IS_ERR(clk)) {
 845                clk_set_rate(clk, clk_round_rate(clk, 83333333));
 846                clk_put(clk);
 847        }
 848
 849        /* change parent of FSI A */
 850        clk = clk_get(NULL, "fsia_clk");
 851        if (!IS_ERR(clk)) {
 852                /* 48kHz dummy clock was used to make sure 1/1 divide */
 853                clk_set_rate(&sh7724_fsimcka_clk, 48000);
 854                clk_set_parent(clk, &sh7724_fsimcka_clk);
 855                clk_set_rate(clk, 48000);
 856                clk_put(clk);
 857        }
 858
 859        /* SDHI0 connected to cn7 */
 860        gpio_request(GPIO_FN_SDHI0CD, NULL);
 861        gpio_request(GPIO_FN_SDHI0WP, NULL);
 862        gpio_request(GPIO_FN_SDHI0D3, NULL);
 863        gpio_request(GPIO_FN_SDHI0D2, NULL);
 864        gpio_request(GPIO_FN_SDHI0D1, NULL);
 865        gpio_request(GPIO_FN_SDHI0D0, NULL);
 866        gpio_request(GPIO_FN_SDHI0CMD, NULL);
 867        gpio_request(GPIO_FN_SDHI0CLK, NULL);
 868
 869        /* SDHI1 connected to cn8 */
 870        gpio_request(GPIO_FN_SDHI1CD, NULL);
 871        gpio_request(GPIO_FN_SDHI1WP, NULL);
 872        gpio_request(GPIO_FN_SDHI1D3, NULL);
 873        gpio_request(GPIO_FN_SDHI1D2, NULL);
 874        gpio_request(GPIO_FN_SDHI1D1, NULL);
 875        gpio_request(GPIO_FN_SDHI1D0, NULL);
 876        gpio_request(GPIO_FN_SDHI1CMD, NULL);
 877        gpio_request(GPIO_FN_SDHI1CLK, NULL);
 878
 879        /* enable IrDA */
 880        gpio_request(GPIO_FN_IRDA_OUT, NULL);
 881        gpio_request(GPIO_FN_IRDA_IN,  NULL);
 882
 883        /*
 884         * enable SH-Eth
 885         *
 886         * please remove J33 pin from your board !!
 887         *
 888         * ms7724 board should not use GPIO_FN_LNKSTA pin
 889         * So, This time PTX5 is set to input pin
 890         */
 891        gpio_request(GPIO_FN_RMII_RXD0,    NULL);
 892        gpio_request(GPIO_FN_RMII_RXD1,    NULL);
 893        gpio_request(GPIO_FN_RMII_TXD0,    NULL);
 894        gpio_request(GPIO_FN_RMII_TXD1,    NULL);
 895        gpio_request(GPIO_FN_RMII_REF_CLK, NULL);
 896        gpio_request(GPIO_FN_RMII_TX_EN,   NULL);
 897        gpio_request(GPIO_FN_RMII_RX_ER,   NULL);
 898        gpio_request(GPIO_FN_RMII_CRS_DV,  NULL);
 899        gpio_request(GPIO_FN_MDIO,         NULL);
 900        gpio_request(GPIO_FN_MDC,          NULL);
 901        gpio_request(GPIO_PTX5, NULL);
 902        gpio_direction_input(GPIO_PTX5);
 903        sh_eth_init();
 904
 905        if (sw & SW41_B) {
 906                /* 720p */
 907                lcdc_info.ch[0].lcd_modes = lcdc_720p_modes;
 908                lcdc_info.ch[0].num_modes = ARRAY_SIZE(lcdc_720p_modes);
 909        } else {
 910                /* VGA */
 911                lcdc_info.ch[0].lcd_modes = lcdc_vga_modes;
 912                lcdc_info.ch[0].num_modes = ARRAY_SIZE(lcdc_vga_modes);
 913        }
 914
 915        if (sw & SW41_A) {
 916                /* Digital monitor */
 917                lcdc_info.ch[0].interface_type = RGB18;
 918                lcdc_info.ch[0].flags          = 0;
 919        } else {
 920                /* Analog monitor */
 921                lcdc_info.ch[0].interface_type = RGB24;
 922                lcdc_info.ch[0].flags          = LCDC_FLAGS_DWPOL;
 923        }
 924
 925        /* VOU */
 926        gpio_request(GPIO_FN_DV_D15, NULL);
 927        gpio_request(GPIO_FN_DV_D14, NULL);
 928        gpio_request(GPIO_FN_DV_D13, NULL);
 929        gpio_request(GPIO_FN_DV_D12, NULL);
 930        gpio_request(GPIO_FN_DV_D11, NULL);
 931        gpio_request(GPIO_FN_DV_D10, NULL);
 932        gpio_request(GPIO_FN_DV_D9, NULL);
 933        gpio_request(GPIO_FN_DV_D8, NULL);
 934        gpio_request(GPIO_FN_DV_CLKI, NULL);
 935        gpio_request(GPIO_FN_DV_CLK, NULL);
 936        gpio_request(GPIO_FN_DV_VSYNC, NULL);
 937        gpio_request(GPIO_FN_DV_HSYNC, NULL);
 938
 939        return platform_add_devices(ms7724se_devices,
 940                                    ARRAY_SIZE(ms7724se_devices));
 941}
 942device_initcall(devices_setup);
 943
 944static struct sh_machine_vector mv_ms7724se __initmv = {
 945        .mv_name        = "ms7724se",
 946        .mv_init_irq    = init_se7724_IRQ,
 947};
 948