LXR linux/arch/sh/kernel/cpu/shmobile/pm.c

   1/*
   2 * arch/sh/kernel/cpu/shmobile/pm.c
   3 *
   4 * Power management support code for SuperH Mobile
   5 *
   6 *  Copyright (C) 2009 Magnus Damm
   7 *
   8 * This file is subject to the terms and conditions of the GNU General Public
   9 * License.  See the file "COPYING" in the main directory of this archive
  10 * for more details.
  11 */
  12#include <linux/init.h>
  13#include <linux/kernel.h>
  14#include <linux/io.h>
  15#include <linux/suspend.h>
  16#include <asm/suspend.h>
  17#include <asm/uaccess.h>
  18#include <asm/cacheflush.h>
  19#include <asm/bl_bit.h>
  20
  21/*
  22 * Notifier lists for pre/post sleep notification
  23 */
  24ATOMIC_NOTIFIER_HEAD(sh_mobile_pre_sleep_notifier_list);
  25ATOMIC_NOTIFIER_HEAD(sh_mobile_post_sleep_notifier_list);
  26
  27/*
  28 * Sleep modes available on SuperH Mobile:
  29 *
  30 * Sleep mode is just plain "sleep" instruction
  31 * Sleep Self-Refresh mode is above plus RAM put in Self-Refresh
  32 * Standby Self-Refresh mode is above plus stopped clocks
  33 */
  34#define SUSP_MODE_SLEEP         (SUSP_SH_SLEEP)
  35#define SUSP_MODE_SLEEP_SF      (SUSP_SH_SLEEP | SUSP_SH_SF)
  36#define SUSP_MODE_STANDBY_SF    (SUSP_SH_STANDBY | SUSP_SH_SF)
  37#define SUSP_MODE_RSTANDBY_SF \
  38        (SUSP_SH_RSTANDBY | SUSP_SH_MMU | SUSP_SH_REGS | SUSP_SH_SF)
  39 /*
  40  * U-standby mode is unsupported since it needs bootloader hacks
  41  */
  42
  43#ifdef CONFIG_CPU_SUBTYPE_SH7724
  44#define RAM_BASE 0xfd800000 /* RSMEM */
  45#else
  46#define RAM_BASE 0xe5200000 /* ILRAM */
  47#endif
  48
  49void sh_mobile_call_standby(unsigned long mode)
  50{
  51        void *onchip_mem = (void *)RAM_BASE;
  52        struct sh_sleep_data *sdp = onchip_mem;
  53        void (*standby_onchip_mem)(unsigned long, unsigned long);
  54
  55        /* code located directly after data structure */
  56        standby_onchip_mem = (void *)(sdp + 1);
  57
  58        atomic_notifier_call_chain(&sh_mobile_pre_sleep_notifier_list,
  59                                   mode, NULL);
  60
  61        /* flush the caches if MMU flag is set */
  62        if (mode & SUSP_SH_MMU)
  63                flush_cache_all();
  64
  65        /* Let assembly snippet in on-chip memory handle the rest */
  66        standby_onchip_mem(mode, RAM_BASE);
  67
  68        atomic_notifier_call_chain(&sh_mobile_post_sleep_notifier_list,
  69                                   mode, NULL);
  70}
  71
  72extern char sh_mobile_sleep_enter_start;
  73extern char sh_mobile_sleep_enter_end;
  74
  75extern char sh_mobile_sleep_resume_start;
  76extern char sh_mobile_sleep_resume_end;
  77
  78unsigned long sh_mobile_sleep_supported = SUSP_SH_SLEEP;
  79
  80void sh_mobile_register_self_refresh(unsigned long flags,
  81                                     void *pre_start, void *pre_end,
  82                                     void *post_start, void *post_end)
  83{
  84        void *onchip_mem = (void *)RAM_BASE;
  85        void *vp;
  86        struct sh_sleep_data *sdp;
  87        int n;
  88
  89        /* part 0: data area */
  90        sdp = onchip_mem;
  91        sdp->addr.stbcr = 0xa4150020; /* STBCR */
  92        sdp->addr.bar = 0xa4150040; /* BAR */
  93        sdp->addr.pteh = 0xff000000; /* PTEH */
  94        sdp->addr.ptel = 0xff000004; /* PTEL */
  95        sdp->addr.ttb = 0xff000008; /* TTB */
  96        sdp->addr.tea = 0xff00000c; /* TEA */
  97        sdp->addr.mmucr = 0xff000010; /* MMUCR */
  98        sdp->addr.ptea = 0xff000034; /* PTEA */
  99        sdp->addr.pascr = 0xff000070; /* PASCR */
 100        sdp->addr.irmcr = 0xff000078; /* IRMCR */
 101        sdp->addr.ccr = 0xff00001c; /* CCR */
 102        sdp->addr.ramcr = 0xff000074; /* RAMCR */
 103        vp = sdp + 1;
 104
 105        /* part 1: common code to enter sleep mode */
 106        n = &sh_mobile_sleep_enter_end - &sh_mobile_sleep_enter_start;
 107        memcpy(vp, &sh_mobile_sleep_enter_start, n);
 108        vp += roundup(n, 4);
 109
 110        /* part 2: board specific code to enter self-refresh mode */
 111        n = pre_end - pre_start;
 112        memcpy(vp, pre_start, n);
 113        sdp->sf_pre = (unsigned long)vp;
 114        vp += roundup(n, 4);
 115
 116        /* part 3: board specific code to resume from self-refresh mode */
 117        n = post_end - post_start;
 118        memcpy(vp, post_start, n);
 119        sdp->sf_post = (unsigned long)vp;
 120        vp += roundup(n, 4);
 121
 122        /* part 4: common code to resume from sleep mode */
 123        WARN_ON(vp > (onchip_mem + 0x600));
 124        vp = onchip_mem + 0x600; /* located at interrupt vector */
 125        n = &sh_mobile_sleep_resume_end - &sh_mobile_sleep_resume_start;
 126        memcpy(vp, &sh_mobile_sleep_resume_start, n);
 127        sdp->resume = (unsigned long)vp;
 128
 129        sh_mobile_sleep_supported |= flags;
 130}
 131
 132static int sh_pm_enter(suspend_state_t state)
 133{
 134        if (!(sh_mobile_sleep_supported & SUSP_MODE_STANDBY_SF))
 135                return -ENXIO;
 136
 137        local_irq_disable();
 138        set_bl_bit();
 139        sh_mobile_call_standby(SUSP_MODE_STANDBY_SF);
 140        local_irq_disable();
 141        clear_bl_bit();
 142        return 0;
 143}
 144
 145static const struct platform_suspend_ops sh_pm_ops = {
 146        .enter          = sh_pm_enter,
 147        .valid          = suspend_valid_only_mem,
 148};
 149
 150static int __init sh_pm_init(void)
 151{
 152        suspend_set_ops(&sh_pm_ops);
 153        return sh_mobile_setup_cpuidle();
 154}
 155
 156late_initcall(sh_pm_init);
 157