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13#include <linux/kernel.h>
14#include <linux/types.h>
15#include <linux/init.h>
16#include <linux/mm.h>
17#include <linux/slab.h>
18#include <linux/jiffies.h>
19
20#include <asm/swift.h>
21#include <asm/io.h>
22
23#include <linux/ctype.h>
24#include <linux/pci.h>
25#include <linux/time.h>
26#include <linux/timex.h>
27#include <linux/interrupt.h>
28#include <linux/export.h>
29
30#include <asm/irq.h>
31#include <asm/oplib.h>
32#include <asm/prom.h>
33#include <asm/pcic.h>
34#include <asm/timex.h>
35#include <asm/timer.h>
36#include <asm/uaccess.h>
37#include <asm/irq_regs.h>
38
39#include "kernel.h"
40#include "irq.h"
41
42
43
44
45
46
47
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50
51
52
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54
55
56
57struct pcic_ca2irq {
58 unsigned char busno;
59 unsigned char devfn;
60 unsigned char pin;
61 unsigned char irq;
62 unsigned int force;
63};
64
65struct pcic_sn2list {
66 char *sysname;
67 struct pcic_ca2irq *intmap;
68 int mapdim;
69};
70
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89
90static struct pcic_ca2irq pcic_i_je1a[] = {
91 { 0, 0x00, 2, 12, 0 },
92 { 0, 0x01, 1, 6, 1 },
93 { 0, 0x80, 0, 7, 0 },
94};
95
96
97static struct pcic_ca2irq pcic_i_jse[] = {
98 { 0, 0x00, 0, 13, 0 },
99 { 0, 0x01, 1, 6, 0 },
100 { 0, 0x08, 2, 9, 0 },
101 { 0, 0x10, 6, 8, 0 },
102 { 0, 0x18, 7, 12, 0 },
103 { 0, 0x38, 4, 9, 0 },
104 { 0, 0x80, 5, 11, 0 },
105
106 { 0, 0xA0, 4, 9, 0 },
107
108
109
110
111
112
113
114};
115
116
117
118
119static struct pcic_ca2irq pcic_i_se6[] = {
120 { 0, 0x08, 0, 2, 0 },
121 { 0, 0x01, 1, 6, 0 },
122 { 0, 0x00, 3, 13, 0 },
123};
124
125
126
127
128
129
130
131
132
133
134
135
136
137static struct pcic_ca2irq pcic_i_jk[] = {
138 { 0, 0x00, 0, 13, 0 },
139 { 0, 0x01, 1, 6, 0 },
140};
141
142
143
144
145
146#define SN2L_INIT(name, map) \
147 { name, map, ARRAY_SIZE(map) }
148
149static struct pcic_sn2list pcic_known_sysnames[] = {
150 SN2L_INIT("SUNW,JavaEngine1", pcic_i_je1a),
151 SN2L_INIT("SUNW,JS-E", pcic_i_jse),
152 SN2L_INIT("SUNW,SPARCengine-6", pcic_i_se6),
153 SN2L_INIT("SUNW,JS-NC", pcic_i_jk),
154 SN2L_INIT("SUNW,JSIIep", pcic_i_jk),
155 { NULL, NULL, 0 }
156};
157
158
159
160
161
162static int pcic0_up;
163static struct linux_pcic pcic0;
164
165void __iomem *pcic_regs;
166static volatile int pcic_speculative;
167static volatile int pcic_trapped;
168
169
170unsigned int pcic_build_device_irq(struct platform_device *op,
171 unsigned int real_irq);
172
173#define CONFIG_CMD(bus, device_fn, where) (0x80000000 | (((unsigned int)bus) << 16) | (((unsigned int)device_fn) << 8) | (where & ~3))
174
175static int pcic_read_config_dword(unsigned int busno, unsigned int devfn,
176 int where, u32 *value)
177{
178 struct linux_pcic *pcic;
179 unsigned long flags;
180
181 pcic = &pcic0;
182
183 local_irq_save(flags);
184#if 0
185 pcic_speculative = 1;
186 pcic_trapped = 0;
187#endif
188 writel(CONFIG_CMD(busno, devfn, where), pcic->pcic_config_space_addr);
189#if 0
190 nop();
191 if (pcic_trapped) {
192 local_irq_restore(flags);
193 *value = ~0;
194 return 0;
195 }
196#endif
197 pcic_speculative = 2;
198 pcic_trapped = 0;
199 *value = readl(pcic->pcic_config_space_data + (where&4));
200 nop();
201 if (pcic_trapped) {
202 pcic_speculative = 0;
203 local_irq_restore(flags);
204 *value = ~0;
205 return 0;
206 }
207 pcic_speculative = 0;
208 local_irq_restore(flags);
209 return 0;
210}
211
212static int pcic_read_config(struct pci_bus *bus, unsigned int devfn,
213 int where, int size, u32 *val)
214{
215 unsigned int v;
216
217 if (bus->number != 0) return -EINVAL;
218 switch (size) {
219 case 1:
220 pcic_read_config_dword(bus->number, devfn, where&~3, &v);
221 *val = 0xff & (v >> (8*(where & 3)));
222 return 0;
223 case 2:
224 if (where&1) return -EINVAL;
225 pcic_read_config_dword(bus->number, devfn, where&~3, &v);
226 *val = 0xffff & (v >> (8*(where & 3)));
227 return 0;
228 case 4:
229 if (where&3) return -EINVAL;
230 pcic_read_config_dword(bus->number, devfn, where&~3, val);
231 return 0;
232 }
233 return -EINVAL;
234}
235
236static int pcic_write_config_dword(unsigned int busno, unsigned int devfn,
237 int where, u32 value)
238{
239 struct linux_pcic *pcic;
240 unsigned long flags;
241
242 pcic = &pcic0;
243
244 local_irq_save(flags);
245 writel(CONFIG_CMD(busno, devfn, where), pcic->pcic_config_space_addr);
246 writel(value, pcic->pcic_config_space_data + (where&4));
247 local_irq_restore(flags);
248 return 0;
249}
250
251static int pcic_write_config(struct pci_bus *bus, unsigned int devfn,
252 int where, int size, u32 val)
253{
254 unsigned int v;
255
256 if (bus->number != 0) return -EINVAL;
257 switch (size) {
258 case 1:
259 pcic_read_config_dword(bus->number, devfn, where&~3, &v);
260 v = (v & ~(0xff << (8*(where&3)))) |
261 ((0xff&val) << (8*(where&3)));
262 return pcic_write_config_dword(bus->number, devfn, where&~3, v);
263 case 2:
264 if (where&1) return -EINVAL;
265 pcic_read_config_dword(bus->number, devfn, where&~3, &v);
266 v = (v & ~(0xffff << (8*(where&3)))) |
267 ((0xffff&val) << (8*(where&3)));
268 return pcic_write_config_dword(bus->number, devfn, where&~3, v);
269 case 4:
270 if (where&3) return -EINVAL;
271 return pcic_write_config_dword(bus->number, devfn, where, val);
272 }
273 return -EINVAL;
274}
275
276static struct pci_ops pcic_ops = {
277 .read = pcic_read_config,
278 .write = pcic_write_config,
279};
280
281
282
283
284
285
286int __init pcic_probe(void)
287{
288 struct linux_pcic *pcic;
289 struct linux_prom_registers regs[PROMREG_MAX];
290 struct linux_pbm_info* pbm;
291 char namebuf[64];
292 phandle node;
293 int err;
294
295 if (pcic0_up) {
296 prom_printf("PCIC: called twice!\n");
297 prom_halt();
298 }
299 pcic = &pcic0;
300
301 node = prom_getchild (prom_root_node);
302 node = prom_searchsiblings (node, "pci");
303 if (node == 0)
304 return -ENODEV;
305
306
307
308 err = prom_getproperty(node, "reg", (char*)regs, sizeof(regs));
309 if (err == 0 || err == -1) {
310 prom_printf("PCIC: Error, cannot get PCIC registers "
311 "from PROM.\n");
312 prom_halt();
313 }
314
315 pcic0_up = 1;
316
317 pcic->pcic_res_regs.name = "pcic_registers";
318 pcic->pcic_regs = ioremap(regs[0].phys_addr, regs[0].reg_size);
319 if (!pcic->pcic_regs) {
320 prom_printf("PCIC: Error, cannot map PCIC registers.\n");
321 prom_halt();
322 }
323
324 pcic->pcic_res_io.name = "pcic_io";
325 if ((pcic->pcic_io = (unsigned long)
326 ioremap(regs[1].phys_addr, 0x10000)) == 0) {
327 prom_printf("PCIC: Error, cannot map PCIC IO Base.\n");
328 prom_halt();
329 }
330
331 pcic->pcic_res_cfg_addr.name = "pcic_cfg_addr";
332 if ((pcic->pcic_config_space_addr =
333 ioremap(regs[2].phys_addr, regs[2].reg_size * 2)) == NULL) {
334 prom_printf("PCIC: Error, cannot map "
335 "PCI Configuration Space Address.\n");
336 prom_halt();
337 }
338
339
340
341
342
343 pcic->pcic_res_cfg_data.name = "pcic_cfg_data";
344 if ((pcic->pcic_config_space_data =
345 ioremap(regs[3].phys_addr, regs[3].reg_size * 2)) == NULL) {
346 prom_printf("PCIC: Error, cannot map "
347 "PCI Configuration Space Data.\n");
348 prom_halt();
349 }
350
351 pbm = &pcic->pbm;
352 pbm->prom_node = node;
353 prom_getstring(node, "name", namebuf, 63); namebuf[63] = 0;
354 strcpy(pbm->prom_name, namebuf);
355
356 {
357 extern int pcic_nmi_trap_patch[4];
358
359 t_nmi[0] = pcic_nmi_trap_patch[0];
360 t_nmi[1] = pcic_nmi_trap_patch[1];
361 t_nmi[2] = pcic_nmi_trap_patch[2];
362 t_nmi[3] = pcic_nmi_trap_patch[3];
363 swift_flush_dcache();
364 pcic_regs = pcic->pcic_regs;
365 }
366
367 prom_getstring(prom_root_node, "name", namebuf, 63); namebuf[63] = 0;
368 {
369 struct pcic_sn2list *p;
370
371 for (p = pcic_known_sysnames; p->sysname != NULL; p++) {
372 if (strcmp(namebuf, p->sysname) == 0)
373 break;
374 }
375 pcic->pcic_imap = p->intmap;
376 pcic->pcic_imdim = p->mapdim;
377 }
378 if (pcic->pcic_imap == NULL) {
379
380
381
382 printk("PCIC: System %s is unknown, cannot route interrupts\n",
383 namebuf);
384 }
385
386 return 0;
387}
388
389static void __init pcic_pbm_scan_bus(struct linux_pcic *pcic)
390{
391 struct linux_pbm_info *pbm = &pcic->pbm;
392
393 pbm->pci_bus = pci_scan_bus(pbm->pci_first_busno, &pcic_ops, pbm);
394 if (!pbm->pci_bus)
395 return;
396
397#if 0
398 pci_fill_in_pbm_cookies(pbm->pci_bus, pbm, pbm->prom_node);
399 pci_record_assignments(pbm, pbm->pci_bus);
400 pci_assign_unassigned(pbm, pbm->pci_bus);
401 pci_fixup_irq(pbm, pbm->pci_bus);
402#endif
403 pci_bus_add_devices(pbm->pci_bus);
404}
405
406
407
408
409static int __init pcic_init(void)
410{
411 struct linux_pcic *pcic;
412
413
414
415
416
417 if(!pcic0_up)
418 return 0;
419 pcic = &pcic0;
420
421
422
423
424 writeb(PCI_DVMA_CONTROL_IOTLB_DISABLE,
425 pcic->pcic_regs+PCI_DVMA_CONTROL);
426
427
428
429
430
431
432 writel(0xF0000000UL, pcic->pcic_regs+PCI_SIZE_0);
433 writel(0+PCI_BASE_ADDRESS_SPACE_MEMORY,
434 pcic->pcic_regs+PCI_BASE_ADDRESS_0);
435
436 pcic_pbm_scan_bus(pcic);
437
438 return 0;
439}
440
441int pcic_present(void)
442{
443 return pcic0_up;
444}
445
446static int pdev_to_pnode(struct linux_pbm_info *pbm, struct pci_dev *pdev)
447{
448 struct linux_prom_pci_registers regs[PROMREG_MAX];
449 int err;
450 phandle node = prom_getchild(pbm->prom_node);
451
452 while(node) {
453 err = prom_getproperty(node, "reg",
454 (char *)®s[0], sizeof(regs));
455 if(err != 0 && err != -1) {
456 unsigned long devfn = (regs[0].which_io >> 8) & 0xff;
457 if(devfn == pdev->devfn)
458 return node;
459 }
460 node = prom_getsibling(node);
461 }
462 return 0;
463}
464
465static inline struct pcidev_cookie *pci_devcookie_alloc(void)
466{
467 return kmalloc(sizeof(struct pcidev_cookie), GFP_ATOMIC);
468}
469
470static void pcic_map_pci_device(struct linux_pcic *pcic,
471 struct pci_dev *dev, int node)
472{
473 char namebuf[64];
474 unsigned long address;
475 unsigned long flags;
476 int j;
477
478 if (node == 0 || node == -1) {
479 strcpy(namebuf, "???");
480 } else {
481 prom_getstring(node, "name", namebuf, 63); namebuf[63] = 0;
482 }
483
484 for (j = 0; j < 6; j++) {
485 address = dev->resource[j].start;
486 if (address == 0) break;
487 flags = dev->resource[j].flags;
488 if ((flags & IORESOURCE_IO) != 0) {
489 if (address < 0x10000) {
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507 dev->resource[j].start =
508 pcic->pcic_io + address;
509 dev->resource[j].end = 1;
510 dev->resource[j].flags =
511 (flags & ~IORESOURCE_IO) | IORESOURCE_MEM;
512 } else {
513
514
515
516
517
518
519
520 printk("PCIC: Skipping I/O space at 0x%lx, "
521 "this will Oops if a driver attaches "
522 "device '%s' at %02x:%02x)\n", address,
523 namebuf, dev->bus->number, dev->devfn);
524 }
525 }
526 }
527}
528
529static void
530pcic_fill_irq(struct linux_pcic *pcic, struct pci_dev *dev, int node)
531{
532 struct pcic_ca2irq *p;
533 unsigned int real_irq;
534 int i, ivec;
535 char namebuf[64];
536
537 if (node == 0 || node == -1) {
538 strcpy(namebuf, "???");
539 } else {
540 prom_getstring(node, "name", namebuf, sizeof(namebuf));
541 }
542
543 if ((p = pcic->pcic_imap) == NULL) {
544 dev->irq = 0;
545 return;
546 }
547 for (i = 0; i < pcic->pcic_imdim; i++) {
548 if (p->busno == dev->bus->number && p->devfn == dev->devfn)
549 break;
550 p++;
551 }
552 if (i >= pcic->pcic_imdim) {
553 printk("PCIC: device %s devfn %02x:%02x not found in %d\n",
554 namebuf, dev->bus->number, dev->devfn, pcic->pcic_imdim);
555 dev->irq = 0;
556 return;
557 }
558
559 i = p->pin;
560 if (i >= 0 && i < 4) {
561 ivec = readw(pcic->pcic_regs+PCI_INT_SELECT_LO);
562 real_irq = ivec >> (i << 2) & 0xF;
563 } else if (i >= 4 && i < 8) {
564 ivec = readw(pcic->pcic_regs+PCI_INT_SELECT_HI);
565 real_irq = ivec >> ((i-4) << 2) & 0xF;
566 } else {
567 printk("PCIC: BAD PIN %d\n", i); for (;;) {}
568 }
569
570
571
572
573
574 if (real_irq == 0 || p->force) {
575 if (p->irq == 0 || p->irq >= 15) {
576 printk("PCIC: BAD IRQ %d\n", p->irq); for (;;) {}
577 }
578 printk("PCIC: setting irq %d at pin %d for device %02x:%02x\n",
579 p->irq, p->pin, dev->bus->number, dev->devfn);
580 real_irq = p->irq;
581
582 i = p->pin;
583 if (i >= 4) {
584 ivec = readw(pcic->pcic_regs+PCI_INT_SELECT_HI);
585 ivec &= ~(0xF << ((i - 4) << 2));
586 ivec |= p->irq << ((i - 4) << 2);
587 writew(ivec, pcic->pcic_regs+PCI_INT_SELECT_HI);
588 } else {
589 ivec = readw(pcic->pcic_regs+PCI_INT_SELECT_LO);
590 ivec &= ~(0xF << (i << 2));
591 ivec |= p->irq << (i << 2);
592 writew(ivec, pcic->pcic_regs+PCI_INT_SELECT_LO);
593 }
594 }
595 dev->irq = pcic_build_device_irq(NULL, real_irq);
596}
597
598
599
600
601void pcibios_fixup_bus(struct pci_bus *bus)
602{
603 struct pci_dev *dev;
604 int i, has_io, has_mem;
605 unsigned int cmd;
606 struct linux_pcic *pcic;
607
608 int node;
609 struct pcidev_cookie *pcp;
610
611 if (!pcic0_up) {
612 printk("pcibios_fixup_bus: no PCIC\n");
613 return;
614 }
615 pcic = &pcic0;
616
617
618
619
620 if (bus->number != 0) {
621 printk("pcibios_fixup_bus: nonzero bus 0x%x\n", bus->number);
622 return;
623 }
624
625 list_for_each_entry(dev, &bus->devices, bus_list) {
626
627
628
629
630
631
632
633
634
635 has_io = has_mem = 0;
636 for(i=0; i<6; i++) {
637 unsigned long f = dev->resource[i].flags;
638 if (f & IORESOURCE_IO) {
639 has_io = 1;
640 } else if (f & IORESOURCE_MEM)
641 has_mem = 1;
642 }
643 pcic_read_config(dev->bus, dev->devfn, PCI_COMMAND, 2, &cmd);
644 if (has_io && !(cmd & PCI_COMMAND_IO)) {
645 printk("PCIC: Enabling I/O for device %02x:%02x\n",
646 dev->bus->number, dev->devfn);
647 cmd |= PCI_COMMAND_IO;
648 pcic_write_config(dev->bus, dev->devfn,
649 PCI_COMMAND, 2, cmd);
650 }
651 if (has_mem && !(cmd & PCI_COMMAND_MEMORY)) {
652 printk("PCIC: Enabling memory for device %02x:%02x\n",
653 dev->bus->number, dev->devfn);
654 cmd |= PCI_COMMAND_MEMORY;
655 pcic_write_config(dev->bus, dev->devfn,
656 PCI_COMMAND, 2, cmd);
657 }
658
659 node = pdev_to_pnode(&pcic->pbm, dev);
660 if(node == 0)
661 node = -1;
662
663
664 pcp = pci_devcookie_alloc();
665 pcp->pbm = &pcic->pbm;
666 pcp->prom_node = of_find_node_by_phandle(node);
667 dev->sysdata = pcp;
668
669
670 if ((dev->class>>16) != PCI_BASE_CLASS_BRIDGE)
671 pcic_map_pci_device(pcic, dev, node);
672
673 pcic_fill_irq(pcic, dev, node);
674 }
675}
676
677
678static volatile int pcic_timer_dummy;
679
680static void pcic_clear_clock_irq(void)
681{
682 pcic_timer_dummy = readl(pcic0.pcic_regs+PCI_SYS_LIMIT);
683}
684
685
686#define USECS_PER_JIFFY (1000000 / HZ)
687#define TICK_TIMER_LIMIT ((100 * 1000000 / 4) / HZ)
688
689static unsigned int pcic_cycles_offset(void)
690{
691 u32 value, count;
692
693 value = readl(pcic0.pcic_regs + PCI_SYS_COUNTER);
694 count = value & ~PCI_SYS_COUNTER_OVERFLOW;
695
696 if (value & PCI_SYS_COUNTER_OVERFLOW)
697 count += TICK_TIMER_LIMIT;
698
699
700
701
702 count = ((count / HZ) * USECS_PER_JIFFY) / (TICK_TIMER_LIMIT / HZ);
703
704
705 return count * 2;
706}
707
708void __init pci_time_init(void)
709{
710 struct linux_pcic *pcic = &pcic0;
711 unsigned long v;
712 int timer_irq, irq;
713 int err;
714
715#ifndef CONFIG_SMP
716
717
718
719
720 sparc_config.clock_rate = SBUS_CLOCK_RATE / HZ;
721 sparc_config.features |= FEAT_L10_CLOCKEVENT;
722#endif
723 sparc_config.features |= FEAT_L10_CLOCKSOURCE;
724 sparc_config.get_cycles_offset = pcic_cycles_offset;
725
726 writel (TICK_TIMER_LIMIT, pcic->pcic_regs+PCI_SYS_LIMIT);
727
728 v = readb(pcic->pcic_regs+PCI_COUNTER_IRQ);
729 timer_irq = PCI_COUNTER_IRQ_SYS(v);
730 writel (PCI_COUNTER_IRQ_SET(timer_irq, 0),
731 pcic->pcic_regs+PCI_COUNTER_IRQ);
732 irq = pcic_build_device_irq(NULL, timer_irq);
733 err = request_irq(irq, timer_interrupt,
734 IRQF_TIMER, "timer", NULL);
735 if (err) {
736 prom_printf("time_init: unable to attach IRQ%d\n", timer_irq);
737 prom_halt();
738 }
739 local_irq_enable();
740}
741
742
743#if 0
744static void watchdog_reset() {
745 writeb(0, pcic->pcic_regs+PCI_SYS_STATUS);
746}
747#endif
748
749resource_size_t pcibios_align_resource(void *data, const struct resource *res,
750 resource_size_t size, resource_size_t align)
751{
752 return res->start;
753}
754
755int pcibios_enable_device(struct pci_dev *pdev, int mask)
756{
757 return 0;
758}
759
760
761
762
763void pcic_nmi(unsigned int pend, struct pt_regs *regs)
764{
765
766 pend = swab32(pend);
767
768 if (!pcic_speculative || (pend & PCI_SYS_INT_PENDING_PIO) == 0) {
769
770
771
772
773 printk("Aiee, NMI pend 0x%x pc 0x%x spec %d, hanging\n",
774 pend, (int)regs->pc, pcic_speculative);
775 for (;;) { }
776 }
777 pcic_speculative = 0;
778 pcic_trapped = 1;
779 regs->pc = regs->npc;
780 regs->npc += 4;
781}
782
783static inline unsigned long get_irqmask(int irq_nr)
784{
785 return 1 << irq_nr;
786}
787
788static void pcic_mask_irq(struct irq_data *data)
789{
790 unsigned long mask, flags;
791
792 mask = (unsigned long)data->chip_data;
793 local_irq_save(flags);
794 writel(mask, pcic0.pcic_regs+PCI_SYS_INT_TARGET_MASK_SET);
795 local_irq_restore(flags);
796}
797
798static void pcic_unmask_irq(struct irq_data *data)
799{
800 unsigned long mask, flags;
801
802 mask = (unsigned long)data->chip_data;
803 local_irq_save(flags);
804 writel(mask, pcic0.pcic_regs+PCI_SYS_INT_TARGET_MASK_CLEAR);
805 local_irq_restore(flags);
806}
807
808static unsigned int pcic_startup_irq(struct irq_data *data)
809{
810 irq_link(data->irq);
811 pcic_unmask_irq(data);
812 return 0;
813}
814
815static struct irq_chip pcic_irq = {
816 .name = "pcic",
817 .irq_startup = pcic_startup_irq,
818 .irq_mask = pcic_mask_irq,
819 .irq_unmask = pcic_unmask_irq,
820};
821
822unsigned int pcic_build_device_irq(struct platform_device *op,
823 unsigned int real_irq)
824{
825 unsigned int irq;
826 unsigned long mask;
827
828 irq = 0;
829 mask = get_irqmask(real_irq);
830 if (mask == 0)
831 goto out;
832
833 irq = irq_alloc(real_irq, real_irq);
834 if (irq == 0)
835 goto out;
836
837 irq_set_chip_and_handler_name(irq, &pcic_irq,
838 handle_level_irq, "PCIC");
839 irq_set_chip_data(irq, (void *)mask);
840
841out:
842 return irq;
843}
844
845
846static void pcic_load_profile_irq(int cpu, unsigned int limit)
847{
848 printk("PCIC: unimplemented code: FILE=%s LINE=%d", __FILE__, __LINE__);
849}
850
851void __init sun4m_pci_init_IRQ(void)
852{
853 sparc_config.build_device_irq = pcic_build_device_irq;
854 sparc_config.clear_clock_irq = pcic_clear_clock_irq;
855 sparc_config.load_profile_irq = pcic_load_profile_irq;
856}
857
858subsys_initcall(pcic_init);
859