1#ifndef _ASM_X86_ATOMIC_H
2#define _ASM_X86_ATOMIC_H
3
4#include <linux/compiler.h>
5#include <linux/types.h>
6#include <asm/alternative.h>
7#include <asm/cmpxchg.h>
8#include <asm/rmwcc.h>
9#include <asm/barrier.h>
10
11
12
13
14
15
16#define ATOMIC_INIT(i) { (i) }
17
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21
22
23
24static __always_inline int atomic_read(const atomic_t *v)
25{
26 return READ_ONCE((v)->counter);
27}
28
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34
35
36static __always_inline void atomic_set(atomic_t *v, int i)
37{
38 WRITE_ONCE(v->counter, i);
39}
40
41
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45
46
47
48static __always_inline void atomic_add(int i, atomic_t *v)
49{
50 asm volatile(LOCK_PREFIX "addl %1,%0"
51 : "+m" (v->counter)
52 : "ir" (i));
53}
54
55
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60
61
62static __always_inline void atomic_sub(int i, atomic_t *v)
63{
64 asm volatile(LOCK_PREFIX "subl %1,%0"
65 : "+m" (v->counter)
66 : "ir" (i));
67}
68
69
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76
77
78static __always_inline int atomic_sub_and_test(int i, atomic_t *v)
79{
80 GEN_BINARY_RMWcc(LOCK_PREFIX "subl", v->counter, "er", i, "%0", "e");
81}
82
83
84
85
86
87
88
89static __always_inline void atomic_inc(atomic_t *v)
90{
91 asm volatile(LOCK_PREFIX "incl %0"
92 : "+m" (v->counter));
93}
94
95
96
97
98
99
100
101static __always_inline void atomic_dec(atomic_t *v)
102{
103 asm volatile(LOCK_PREFIX "decl %0"
104 : "+m" (v->counter));
105}
106
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112
113
114
115static __always_inline int atomic_dec_and_test(atomic_t *v)
116{
117 GEN_UNARY_RMWcc(LOCK_PREFIX "decl", v->counter, "%0", "e");
118}
119
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125
126
127
128static __always_inline int atomic_inc_and_test(atomic_t *v)
129{
130 GEN_UNARY_RMWcc(LOCK_PREFIX "incl", v->counter, "%0", "e");
131}
132
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140
141
142static __always_inline int atomic_add_negative(int i, atomic_t *v)
143{
144 GEN_BINARY_RMWcc(LOCK_PREFIX "addl", v->counter, "er", i, "%0", "s");
145}
146
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152
153
154static __always_inline int atomic_add_return(int i, atomic_t *v)
155{
156 return i + xadd(&v->counter, i);
157}
158
159
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163
164
165
166static __always_inline int atomic_sub_return(int i, atomic_t *v)
167{
168 return atomic_add_return(-i, v);
169}
170
171#define atomic_inc_return(v) (atomic_add_return(1, v))
172#define atomic_dec_return(v) (atomic_sub_return(1, v))
173
174static __always_inline int atomic_cmpxchg(atomic_t *v, int old, int new)
175{
176 return cmpxchg(&v->counter, old, new);
177}
178
179static inline int atomic_xchg(atomic_t *v, int new)
180{
181 return xchg(&v->counter, new);
182}
183
184#define ATOMIC_OP(op) \
185static inline void atomic_##op(int i, atomic_t *v) \
186{ \
187 asm volatile(LOCK_PREFIX #op"l %1,%0" \
188 : "+m" (v->counter) \
189 : "ir" (i) \
190 : "memory"); \
191}
192
193ATOMIC_OP(and)
194ATOMIC_OP(or)
195ATOMIC_OP(xor)
196
197#undef ATOMIC_OP
198
199
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207
208static __always_inline int __atomic_add_unless(atomic_t *v, int a, int u)
209{
210 int c, old;
211 c = atomic_read(v);
212 for (;;) {
213 if (unlikely(c == (u)))
214 break;
215 old = atomic_cmpxchg((v), c, c + (a));
216 if (likely(old == c))
217 break;
218 c = old;
219 }
220 return c;
221}
222
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228
229
230static __always_inline short int atomic_inc_short(short int *v)
231{
232 asm(LOCK_PREFIX "addw $1, %0" : "+m" (*v));
233 return *v;
234}
235
236#ifdef CONFIG_X86_32
237# include <asm/atomic64_32.h>
238#else
239# include <asm/atomic64_64.h>
240#endif
241
242#endif
243