LXR linux/arch/xtensa/include/asm/irqflags.h

   1/*
   2 * Xtensa IRQ flags handling functions
   3 *
   4 * This file is subject to the terms and conditions of the GNU General Public
   5 * License.  See the file "COPYING" in the main directory of this archive
   6 * for more details.
   7 *
   8 * Copyright (C) 2001 - 2005 Tensilica Inc.
   9 * Copyright (C) 2015 Cadence Design Systems Inc.
  10 */
  11
  12#ifndef _XTENSA_IRQFLAGS_H
  13#define _XTENSA_IRQFLAGS_H
  14
  15#include <linux/types.h>
  16#include <asm/processor.h>
  17
  18static inline unsigned long arch_local_save_flags(void)
  19{
  20        unsigned long flags;
  21        asm volatile("rsr %0, ps" : "=a" (flags));
  22        return flags;
  23}
  24
  25static inline unsigned long arch_local_irq_save(void)
  26{
  27        unsigned long flags;
  28#if XTENSA_FAKE_NMI
  29#if defined(CONFIG_DEBUG_KERNEL) && (LOCKLEVEL | TOPLEVEL) >= XCHAL_DEBUGLEVEL
  30        unsigned long tmp;
  31
  32        asm volatile("rsr       %0, ps\t\n"
  33                     "extui     %1, %0, 0, 4\t\n"
  34                     "bgei      %1, "__stringify(LOCKLEVEL)", 1f\t\n"
  35                     "rsil      %0, "__stringify(LOCKLEVEL)"\n"
  36                     "1:"
  37                     : "=a" (flags), "=a" (tmp) :: "memory");
  38#else
  39        asm volatile("rsr       %0, ps\t\n"
  40                     "or        %0, %0, %1\t\n"
  41                     "xsr       %0, ps\t\n"
  42                     "rsync"
  43                     : "=&a" (flags) : "a" (LOCKLEVEL) : "memory");
  44#endif
  45#else
  46        asm volatile("rsil      %0, "__stringify(LOCKLEVEL)
  47                     : "=a" (flags) :: "memory");
  48#endif
  49        return flags;
  50}
  51
  52static inline void arch_local_irq_disable(void)
  53{
  54        arch_local_irq_save();
  55}
  56
  57static inline void arch_local_irq_enable(void)
  58{
  59        unsigned long flags;
  60        asm volatile("rsil %0, 0" : "=a" (flags) :: "memory");
  61}
  62
  63static inline void arch_local_irq_restore(unsigned long flags)
  64{
  65        asm volatile("wsr %0, ps; rsync"
  66                     :: "a" (flags) : "memory");
  67}
  68
  69static inline bool arch_irqs_disabled_flags(unsigned long flags)
  70{
  71#if XCHAL_EXCM_LEVEL < LOCKLEVEL || (1 << PS_EXCM_BIT) < LOCKLEVEL
  72#error "XCHAL_EXCM_LEVEL and 1<<PS_EXCM_BIT must be no less than LOCKLEVEL"
  73#endif
  74        return (flags & (PS_INTLEVEL_MASK | (1 << PS_EXCM_BIT))) >= LOCKLEVEL;
  75}
  76
  77static inline bool arch_irqs_disabled(void)
  78{
  79        return arch_irqs_disabled_flags(arch_local_save_flags());
  80}
  81
  82#endif /* _XTENSA_IRQFLAGS_H */
  83