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10#ifndef _XTENSA_PROCESSOR_H
11#define _XTENSA_PROCESSOR_H
12
13#include <variant/core.h>
14#include <platform/hardware.h>
15
16#include <linux/compiler.h>
17#include <asm/ptrace.h>
18#include <asm/types.h>
19#include <asm/regs.h>
20
21
22
23#if (XCHAL_HAVE_WINDOWED != 1)
24# error Linux requires the Xtensa Windowed Registers Option.
25#endif
26
27#define ARCH_SLAB_MINALIGN XCHAL_DATA_WIDTH
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36
37#ifdef CONFIG_MMU
38#define TASK_SIZE __XTENSA_UL_CONST(0x40000000)
39#else
40#define TASK_SIZE (PLATFORM_DEFAULT_MEM_START + PLATFORM_DEFAULT_MEM_SIZE)
41#endif
42
43#define STACK_TOP TASK_SIZE
44#define STACK_TOP_MAX STACK_TOP
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46
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50
51
52#define EXCCAUSE_MAPPED_NMI 62
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61
62
63#define EXCCAUSE_MAPPED_DEBUG 63
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71
72
73#define VALID_DOUBLE_EXCEPTION_ADDRESS 64
74
75#define XTENSA_INT_LEVEL(intno) _XTENSA_INT_LEVEL(intno)
76#define _XTENSA_INT_LEVEL(intno) XCHAL_INT##intno##_LEVEL
77
78#define XTENSA_INTLEVEL_MASK(level) _XTENSA_INTLEVEL_MASK(level)
79#define _XTENSA_INTLEVEL_MASK(level) (XCHAL_INTLEVEL##level##_MASK)
80
81#define XTENSA_INTLEVEL_ANDBELOW_MASK(l) _XTENSA_INTLEVEL_ANDBELOW_MASK(l)
82#define _XTENSA_INTLEVEL_ANDBELOW_MASK(l) (XCHAL_INTLEVEL##l##_ANDBELOW_MASK)
83
84#define PROFILING_INTLEVEL XTENSA_INT_LEVEL(XCHAL_PROFILING_INTERRUPT)
85
86
87
88
89#if defined(CONFIG_XTENSA_FAKE_NMI) && defined(XCHAL_PROFILING_INTERRUPT)
90#define LOCKLEVEL (PROFILING_INTLEVEL - 1)
91#else
92#define LOCKLEVEL XCHAL_EXCM_LEVEL
93#endif
94
95#define TOPLEVEL XCHAL_EXCM_LEVEL
96#define XTENSA_FAKE_NMI (LOCKLEVEL < TOPLEVEL)
97
98
99
100
101#define WSBITS (XCHAL_NUM_AREGS / 4)
102#define WBBITS (XCHAL_NUM_AREGS_LOG2 - 2)
103
104#ifndef __ASSEMBLY__
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108
109#define MAKE_RA_FOR_CALL(ra,ws) (((ra) & 0x3fffffff) | (ws) << 30)
110
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113
114#define MAKE_PC_FROM_RA(ra,sp) (((ra) & 0x3fffffff) | ((sp) & 0xc0000000))
115
116typedef struct {
117 unsigned long seg;
118} mm_segment_t;
119
120struct thread_struct {
121
122
123 unsigned long ra;
124 unsigned long sp;
125
126 mm_segment_t current_ds;
127
128
129
130 unsigned long bad_vaddr;
131 unsigned long bad_uaddr;
132 unsigned long error_code;
133#ifdef CONFIG_HAVE_HW_BREAKPOINT
134 struct perf_event *ptrace_bp[XCHAL_NUM_IBREAK];
135 struct perf_event *ptrace_wp[XCHAL_NUM_DBREAK];
136#endif
137
138 int align[0] __attribute__ ((aligned(16)));
139};
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145
146#define current_text_addr() ({ __label__ _l; _l: &&_l;})
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151
152#define TASK_UNMAPPED_BASE (TASK_SIZE / 2)
153
154#define INIT_THREAD \
155{ \
156 ra: 0, \
157 sp: sizeof(init_stack) + (long) &init_stack, \
158 current_ds: {0}, \
159 \
160 bad_vaddr: 0, \
161 bad_uaddr: 0, \
162 error_code: 0, \
163}
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170
171#define USER_PS_VALUE ((1 << PS_WOE_BIT) | \
172 (1 << PS_CALLINC_SHIFT) | \
173 (USER_RING << PS_RING_SHIFT) | \
174 (1 << PS_UM_BIT) | \
175 (1 << PS_EXCM_BIT))
176
177
178#define start_thread(regs, new_pc, new_sp) \
179 memset(regs, 0, sizeof(*regs)); \
180 regs->pc = new_pc; \
181 regs->ps = USER_PS_VALUE; \
182 regs->areg[1] = new_sp; \
183 regs->areg[0] = 0; \
184 regs->wmask = 1; \
185 regs->depc = 0; \
186 regs->windowbase = 0; \
187 regs->windowstart = 1;
188
189
190struct task_struct;
191struct mm_struct;
192
193
194#define release_thread(thread) do { } while(0)
195
196
197#define copy_segments(p, mm) do { } while(0)
198#define release_segments(mm) do { } while(0)
199#define forget_segments() do { } while (0)
200
201#define thread_saved_pc(tsk) (task_pt_regs(tsk)->pc)
202
203extern unsigned long get_wchan(struct task_struct *p);
204
205#define KSTK_EIP(tsk) (task_pt_regs(tsk)->pc)
206#define KSTK_ESP(tsk) (task_pt_regs(tsk)->areg[1])
207
208#define cpu_relax() barrier()
209#define cpu_relax_lowlatency() cpu_relax()
210
211
212
213#define WSR(v,sr) __asm__ __volatile__ ("wsr %0,"__stringify(sr) :: "a"(v));
214#define RSR(v,sr) __asm__ __volatile__ ("rsr %0,"__stringify(sr) : "=a"(v));
215
216#define set_sr(x,sr) ({unsigned int v=(unsigned int)x; WSR(v,sr);})
217#define get_sr(sr) ({unsigned int v; RSR(v,sr); v; })
218
219#ifndef XCHAL_HAVE_EXTERN_REGS
220#define XCHAL_HAVE_EXTERN_REGS 0
221#endif
222
223#if XCHAL_HAVE_EXTERN_REGS
224
225static inline void set_er(unsigned long value, unsigned long addr)
226{
227 asm volatile ("wer %0, %1" : : "a" (value), "a" (addr) : "memory");
228}
229
230static inline unsigned long get_er(unsigned long addr)
231{
232 register unsigned long value;
233 asm volatile ("rer %0, %1" : "=a" (value) : "a" (addr) : "memory");
234 return value;
235}
236
237#endif
238
239#endif
240#endif
241