linux/drivers/ata/pata_cmd640.c
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   1/*
   2 * pata_cmd640.c        - CMD640 PCI PATA for new ATA layer
   3 *                        (C) 2007 Red Hat Inc
   4 *
   5 * Based upon
   6 *  linux/drivers/ide/pci/cmd640.c              Version 1.02  Sep 01, 1996
   7 *
   8 *  Copyright (C) 1995-1996  Linus Torvalds & authors (see driver)
   9 *
  10 *      This drives only the PCI version of the controller. If you have a
  11 *      VLB one then we have enough docs to support it but you can write
  12 *      your own code.
  13 */
  14
  15#include <linux/kernel.h>
  16#include <linux/module.h>
  17#include <linux/pci.h>
  18#include <linux/blkdev.h>
  19#include <linux/delay.h>
  20#include <linux/gfp.h>
  21#include <scsi/scsi_host.h>
  22#include <linux/libata.h>
  23
  24#define DRV_NAME "pata_cmd640"
  25#define DRV_VERSION "0.0.5"
  26
  27struct cmd640_reg {
  28        int last;
  29        u8 reg58[ATA_MAX_DEVICES];
  30};
  31
  32enum {
  33        CFR = 0x50,
  34        CNTRL = 0x51,
  35        CMDTIM = 0x52,
  36        ARTIM0 = 0x53,
  37        DRWTIM0 = 0x54,
  38        ARTIM23 = 0x57,
  39        DRWTIM23 = 0x58,
  40        BRST = 0x59
  41};
  42
  43/**
  44 *      cmd640_set_piomode      -       set initial PIO mode data
  45 *      @ap: ATA port
  46 *      @adev: ATA device
  47 *
  48 *      Called to do the PIO mode setup.
  49 */
  50
  51static void cmd640_set_piomode(struct ata_port *ap, struct ata_device *adev)
  52{
  53        struct cmd640_reg *timing = ap->private_data;
  54        struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  55        struct ata_timing t;
  56        const unsigned long T = 1000000 / 33;
  57        const u8 setup_data[] = { 0x40, 0x40, 0x40, 0x80, 0x00 };
  58        u8 reg;
  59        int arttim = ARTIM0 + 2 * adev->devno;
  60        struct ata_device *pair = ata_dev_pair(adev);
  61
  62        if (ata_timing_compute(adev, adev->pio_mode, &t, T, 0) < 0) {
  63                printk(KERN_ERR DRV_NAME ": mode computation failed.\n");
  64                return;
  65        }
  66
  67        /* The second channel has shared timings and the setup timing is
  68           messy to switch to merge it for worst case */
  69        if (ap->port_no && pair) {
  70                struct ata_timing p;
  71                ata_timing_compute(pair, pair->pio_mode, &p, T, 1);
  72                ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP);
  73        }
  74
  75        /* Make the timings fit */
  76        if (t.recover > 16) {
  77                t.active += t.recover - 16;
  78                t.recover = 16;
  79        }
  80        if (t.active > 16)
  81                t.active = 16;
  82
  83        /* Now convert the clocks into values we can actually stuff into
  84           the chip */
  85
  86        if (t.recover > 1)
  87                t.recover--;    /* 640B only */
  88        else
  89                t.recover = 15;
  90
  91        if (t.setup > 4)
  92                t.setup = 0xC0;
  93        else
  94                t.setup = setup_data[t.setup];
  95
  96        if (ap->port_no == 0) {
  97                t.active &= 0x0F;       /* 0 = 16 */
  98
  99                /* Load setup timing */
 100                pci_read_config_byte(pdev, arttim, &reg);
 101                reg &= 0x3F;
 102                reg |= t.setup;
 103                pci_write_config_byte(pdev, arttim, reg);
 104
 105                /* Load active/recovery */
 106                pci_write_config_byte(pdev, arttim + 1, (t.active << 4) | t.recover);
 107        } else {
 108                /* Save the shared timings for channel, they will be loaded
 109                   by qc_issue. Reloading the setup time is expensive so we
 110                   keep a merged one loaded */
 111                pci_read_config_byte(pdev, ARTIM23, &reg);
 112                reg &= 0x3F;
 113                reg |= t.setup;
 114                pci_write_config_byte(pdev, ARTIM23, reg);
 115                timing->reg58[adev->devno] = (t.active << 4) | t.recover;
 116        }
 117}
 118
 119
 120/**
 121 *      cmd640_qc_issue -       command preparation hook
 122 *      @qc: Command to be issued
 123 *
 124 *      Channel 1 has shared timings. We must reprogram the
 125 *      clock each drive 2/3 switch we do.
 126 */
 127
 128static unsigned int cmd640_qc_issue(struct ata_queued_cmd *qc)
 129{
 130        struct ata_port *ap = qc->ap;
 131        struct ata_device *adev = qc->dev;
 132        struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 133        struct cmd640_reg *timing = ap->private_data;
 134
 135        if (ap->port_no != 0 && adev->devno != timing->last) {
 136                pci_write_config_byte(pdev, DRWTIM23, timing->reg58[adev->devno]);
 137                timing->last = adev->devno;
 138        }
 139        return ata_sff_qc_issue(qc);
 140}
 141
 142/**
 143 *      cmd640_port_start       -       port setup
 144 *      @ap: ATA port being set up
 145 *
 146 *      The CMD640 needs to maintain private data structures so we
 147 *      allocate space here.
 148 */
 149
 150static int cmd640_port_start(struct ata_port *ap)
 151{
 152        struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 153        struct cmd640_reg *timing;
 154
 155        timing = devm_kzalloc(&pdev->dev, sizeof(struct cmd640_reg), GFP_KERNEL);
 156        if (timing == NULL)
 157                return -ENOMEM;
 158        timing->last = -1;      /* Force a load */
 159        ap->private_data = timing;
 160        return 0;
 161}
 162
 163static bool cmd640_sff_irq_check(struct ata_port *ap)
 164{
 165        struct pci_dev *pdev    = to_pci_dev(ap->host->dev);
 166        int irq_reg             = ap->port_no ? ARTIM23 : CFR;
 167        u8  irq_stat, irq_mask  = ap->port_no ? 0x10 : 0x04;
 168
 169        pci_read_config_byte(pdev, irq_reg, &irq_stat);
 170
 171        return irq_stat & irq_mask;
 172}
 173
 174static struct scsi_host_template cmd640_sht = {
 175        ATA_PIO_SHT(DRV_NAME),
 176};
 177
 178static struct ata_port_operations cmd640_port_ops = {
 179        .inherits       = &ata_sff_port_ops,
 180        /* In theory xfer_noirq is not needed once we kill the prefetcher */
 181        .sff_data_xfer  = ata_sff_data_xfer_noirq,
 182        .sff_irq_check  = cmd640_sff_irq_check,
 183        .qc_issue       = cmd640_qc_issue,
 184        .cable_detect   = ata_cable_40wire,
 185        .set_piomode    = cmd640_set_piomode,
 186        .port_start     = cmd640_port_start,
 187};
 188
 189static void cmd640_hardware_init(struct pci_dev *pdev)
 190{
 191        u8 ctrl;
 192
 193        /* CMD640 detected, commiserations */
 194        pci_write_config_byte(pdev, 0x5B, 0x00);
 195        /* PIO0 command cycles */
 196        pci_write_config_byte(pdev, CMDTIM, 0);
 197        /* 512 byte bursts (sector) */
 198        pci_write_config_byte(pdev, BRST, 0x40);
 199        /*
 200         * A reporter a long time ago
 201         * Had problems with the data fifo
 202         * So don't run the risk
 203         * Of putting crap on the disk
 204         * For its better just to go slow
 205         */
 206        /* Do channel 0 */
 207        pci_read_config_byte(pdev, CNTRL, &ctrl);
 208        pci_write_config_byte(pdev, CNTRL, ctrl | 0xC0);
 209        /* Ditto for channel 1 */
 210        pci_read_config_byte(pdev, ARTIM23, &ctrl);
 211        ctrl |= 0x0C;
 212        pci_write_config_byte(pdev, ARTIM23, ctrl);
 213}
 214
 215static int cmd640_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
 216{
 217        static const struct ata_port_info info = {
 218                .flags = ATA_FLAG_SLAVE_POSS,
 219                .pio_mask = ATA_PIO4,
 220                .port_ops = &cmd640_port_ops
 221        };
 222        const struct ata_port_info *ppi[] = { &info, NULL };
 223        int rc;
 224
 225        rc = pcim_enable_device(pdev);
 226        if (rc)
 227                return rc;
 228
 229        cmd640_hardware_init(pdev);
 230
 231        return ata_pci_sff_init_one(pdev, ppi, &cmd640_sht, NULL, 0);
 232}
 233
 234#ifdef CONFIG_PM_SLEEP
 235static int cmd640_reinit_one(struct pci_dev *pdev)
 236{
 237        struct ata_host *host = pci_get_drvdata(pdev);
 238        int rc;
 239
 240        rc = ata_pci_device_do_resume(pdev);
 241        if (rc)
 242                return rc;
 243        cmd640_hardware_init(pdev);
 244        ata_host_resume(host);
 245        return 0;
 246}
 247#endif
 248
 249static const struct pci_device_id cmd640[] = {
 250        { PCI_VDEVICE(CMD, 0x640), 0 },
 251        { },
 252};
 253
 254static struct pci_driver cmd640_pci_driver = {
 255        .name           = DRV_NAME,
 256        .id_table       = cmd640,
 257        .probe          = cmd640_init_one,
 258        .remove         = ata_pci_remove_one,
 259#ifdef CONFIG_PM_SLEEP
 260        .suspend        = ata_pci_device_suspend,
 261        .resume         = cmd640_reinit_one,
 262#endif
 263};
 264
 265module_pci_driver(cmd640_pci_driver);
 266
 267MODULE_AUTHOR("Alan Cox");
 268MODULE_DESCRIPTION("low-level driver for CMD640 PATA controllers");
 269MODULE_LICENSE("GPL");
 270MODULE_DEVICE_TABLE(pci, cmd640);
 271MODULE_VERSION(DRV_VERSION);
 272