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27#include <linux/kernel.h>
28#include <linux/module.h>
29#include <linux/gfp.h>
30#include <linux/pci.h>
31#include <linux/blkdev.h>
32#include <linux/delay.h>
33#include <linux/interrupt.h>
34#include <linux/device.h>
35#include <scsi/scsi_host.h>
36#include <linux/libata.h>
37
38#define DRV_NAME "sata_uli"
39#define DRV_VERSION "1.3"
40
41enum {
42 uli_5289 = 0,
43 uli_5287 = 1,
44 uli_5281 = 2,
45
46 uli_max_ports = 4,
47
48
49 ULI5287_BASE = 0x90,
50 ULI5287_OFFS = 0x10,
51 ULI5281_BASE = 0x60,
52 ULI5281_OFFS = 0x60,
53};
54
55struct uli_priv {
56 unsigned int scr_cfg_addr[uli_max_ports];
57};
58
59static int uli_init_one(struct pci_dev *pdev, const struct pci_device_id *ent);
60static int uli_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val);
61static int uli_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val);
62
63static const struct pci_device_id uli_pci_tbl[] = {
64 { PCI_VDEVICE(AL, 0x5289), uli_5289 },
65 { PCI_VDEVICE(AL, 0x5287), uli_5287 },
66 { PCI_VDEVICE(AL, 0x5281), uli_5281 },
67
68 { }
69};
70
71static struct pci_driver uli_pci_driver = {
72 .name = DRV_NAME,
73 .id_table = uli_pci_tbl,
74 .probe = uli_init_one,
75 .remove = ata_pci_remove_one,
76};
77
78static struct scsi_host_template uli_sht = {
79 ATA_BMDMA_SHT(DRV_NAME),
80};
81
82static struct ata_port_operations uli_ops = {
83 .inherits = &ata_bmdma_port_ops,
84 .scr_read = uli_scr_read,
85 .scr_write = uli_scr_write,
86 .hardreset = ATA_OP_NULL,
87};
88
89static const struct ata_port_info uli_port_info = {
90 .flags = ATA_FLAG_SATA | ATA_FLAG_IGN_SIMPLEX,
91 .pio_mask = ATA_PIO4,
92 .udma_mask = ATA_UDMA6,
93 .port_ops = &uli_ops,
94};
95
96
97MODULE_AUTHOR("Peer Chen");
98MODULE_DESCRIPTION("low-level driver for ULi Electronics SATA controller");
99MODULE_LICENSE("GPL");
100MODULE_DEVICE_TABLE(pci, uli_pci_tbl);
101MODULE_VERSION(DRV_VERSION);
102
103static unsigned int get_scr_cfg_addr(struct ata_port *ap, unsigned int sc_reg)
104{
105 struct uli_priv *hpriv = ap->host->private_data;
106 return hpriv->scr_cfg_addr[ap->port_no] + (4 * sc_reg);
107}
108
109static u32 uli_scr_cfg_read(struct ata_link *link, unsigned int sc_reg)
110{
111 struct pci_dev *pdev = to_pci_dev(link->ap->host->dev);
112 unsigned int cfg_addr = get_scr_cfg_addr(link->ap, sc_reg);
113 u32 val;
114
115 pci_read_config_dword(pdev, cfg_addr, &val);
116 return val;
117}
118
119static void uli_scr_cfg_write(struct ata_link *link, unsigned int scr, u32 val)
120{
121 struct pci_dev *pdev = to_pci_dev(link->ap->host->dev);
122 unsigned int cfg_addr = get_scr_cfg_addr(link->ap, scr);
123
124 pci_write_config_dword(pdev, cfg_addr, val);
125}
126
127static int uli_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val)
128{
129 if (sc_reg > SCR_CONTROL)
130 return -EINVAL;
131
132 *val = uli_scr_cfg_read(link, sc_reg);
133 return 0;
134}
135
136static int uli_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val)
137{
138 if (sc_reg > SCR_CONTROL)
139 return -EINVAL;
140
141 uli_scr_cfg_write(link, sc_reg, val);
142 return 0;
143}
144
145static int uli_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
146{
147 const struct ata_port_info *ppi[] = { &uli_port_info, NULL };
148 unsigned int board_idx = (unsigned int) ent->driver_data;
149 struct ata_host *host;
150 struct uli_priv *hpriv;
151 void __iomem * const *iomap;
152 struct ata_ioports *ioaddr;
153 int n_ports, rc;
154
155 ata_print_version_once(&pdev->dev, DRV_VERSION);
156
157 rc = pcim_enable_device(pdev);
158 if (rc)
159 return rc;
160
161 n_ports = 2;
162 if (board_idx == uli_5287)
163 n_ports = 4;
164
165
166 host = ata_host_alloc_pinfo(&pdev->dev, ppi, n_ports);
167 if (!host)
168 return -ENOMEM;
169
170 hpriv = devm_kzalloc(&pdev->dev, sizeof(*hpriv), GFP_KERNEL);
171 if (!hpriv)
172 return -ENOMEM;
173 host->private_data = hpriv;
174
175
176 rc = ata_pci_sff_init_host(host);
177 if (rc)
178 return rc;
179
180 ata_pci_bmdma_init(host);
181
182 iomap = host->iomap;
183
184 switch (board_idx) {
185 case uli_5287:
186
187
188
189 hpriv->scr_cfg_addr[0] = ULI5287_BASE;
190 hpriv->scr_cfg_addr[1] = ULI5287_BASE + ULI5287_OFFS;
191
192 ioaddr = &host->ports[2]->ioaddr;
193 ioaddr->cmd_addr = iomap[0] + 8;
194 ioaddr->altstatus_addr =
195 ioaddr->ctl_addr = (void __iomem *)
196 ((unsigned long)iomap[1] | ATA_PCI_CTL_OFS) + 4;
197 ioaddr->bmdma_addr = iomap[4] + 16;
198 hpriv->scr_cfg_addr[2] = ULI5287_BASE + ULI5287_OFFS*4;
199 ata_sff_std_ports(ioaddr);
200
201 ata_port_desc(host->ports[2],
202 "cmd 0x%llx ctl 0x%llx bmdma 0x%llx",
203 (unsigned long long)pci_resource_start(pdev, 0) + 8,
204 ((unsigned long long)pci_resource_start(pdev, 1) | ATA_PCI_CTL_OFS) + 4,
205 (unsigned long long)pci_resource_start(pdev, 4) + 16);
206
207 ioaddr = &host->ports[3]->ioaddr;
208 ioaddr->cmd_addr = iomap[2] + 8;
209 ioaddr->altstatus_addr =
210 ioaddr->ctl_addr = (void __iomem *)
211 ((unsigned long)iomap[3] | ATA_PCI_CTL_OFS) + 4;
212 ioaddr->bmdma_addr = iomap[4] + 24;
213 hpriv->scr_cfg_addr[3] = ULI5287_BASE + ULI5287_OFFS*5;
214 ata_sff_std_ports(ioaddr);
215
216 ata_port_desc(host->ports[2],
217 "cmd 0x%llx ctl 0x%llx bmdma 0x%llx",
218 (unsigned long long)pci_resource_start(pdev, 2) + 9,
219 ((unsigned long long)pci_resource_start(pdev, 3) | ATA_PCI_CTL_OFS) + 4,
220 (unsigned long long)pci_resource_start(pdev, 4) + 24);
221
222 break;
223
224 case uli_5289:
225 hpriv->scr_cfg_addr[0] = ULI5287_BASE;
226 hpriv->scr_cfg_addr[1] = ULI5287_BASE + ULI5287_OFFS;
227 break;
228
229 case uli_5281:
230 hpriv->scr_cfg_addr[0] = ULI5281_BASE;
231 hpriv->scr_cfg_addr[1] = ULI5281_BASE + ULI5281_OFFS;
232 break;
233
234 default:
235 BUG();
236 break;
237 }
238
239 pci_set_master(pdev);
240 pci_intx(pdev, 1);
241 return ata_host_activate(host, pdev->irq, ata_bmdma_interrupt,
242 IRQF_SHARED, &uli_sht);
243}
244
245module_pci_driver(uli_pci_driver);
246
