linux/drivers/block/cciss.c
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   1/*
   2 *    Disk Array driver for HP Smart Array controllers.
   3 *    (C) Copyright 2000, 2007 Hewlett-Packard Development Company, L.P.
   4 *
   5 *    This program is free software; you can redistribute it and/or modify
   6 *    it under the terms of the GNU General Public License as published by
   7 *    the Free Software Foundation; version 2 of the License.
   8 *
   9 *    This program is distributed in the hope that it will be useful,
  10 *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  11 *    MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  12 *    General Public License for more details.
  13 *
  14 *    You should have received a copy of the GNU General Public License
  15 *    along with this program; if not, write to the Free Software
  16 *    Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
  17 *    02111-1307, USA.
  18 *
  19 *    Questions/Comments/Bugfixes to iss_storagedev@hp.com
  20 *
  21 */
  22
  23#include <linux/module.h>
  24#include <linux/interrupt.h>
  25#include <linux/types.h>
  26#include <linux/pci.h>
  27#include <linux/pci-aspm.h>
  28#include <linux/kernel.h>
  29#include <linux/slab.h>
  30#include <linux/delay.h>
  31#include <linux/major.h>
  32#include <linux/fs.h>
  33#include <linux/bio.h>
  34#include <linux/blkpg.h>
  35#include <linux/timer.h>
  36#include <linux/proc_fs.h>
  37#include <linux/seq_file.h>
  38#include <linux/init.h>
  39#include <linux/jiffies.h>
  40#include <linux/hdreg.h>
  41#include <linux/spinlock.h>
  42#include <linux/compat.h>
  43#include <linux/mutex.h>
  44#include <linux/bitmap.h>
  45#include <linux/io.h>
  46#include <asm/uaccess.h>
  47
  48#include <linux/dma-mapping.h>
  49#include <linux/blkdev.h>
  50#include <linux/genhd.h>
  51#include <linux/completion.h>
  52#include <scsi/scsi.h>
  53#include <scsi/sg.h>
  54#include <scsi/scsi_ioctl.h>
  55#include <linux/cdrom.h>
  56#include <linux/scatterlist.h>
  57#include <linux/kthread.h>
  58
  59#define CCISS_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin))
  60#define DRIVER_NAME "HP CISS Driver (v 3.6.26)"
  61#define DRIVER_VERSION CCISS_DRIVER_VERSION(3, 6, 26)
  62
  63/* Embedded module documentation macros - see modules.h */
  64MODULE_AUTHOR("Hewlett-Packard Company");
  65MODULE_DESCRIPTION("Driver for HP Smart Array Controllers");
  66MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
  67MODULE_VERSION("3.6.26");
  68MODULE_LICENSE("GPL");
  69static int cciss_tape_cmds = 6;
  70module_param(cciss_tape_cmds, int, 0644);
  71MODULE_PARM_DESC(cciss_tape_cmds,
  72        "number of commands to allocate for tape devices (default: 6)");
  73static int cciss_simple_mode;
  74module_param(cciss_simple_mode, int, S_IRUGO|S_IWUSR);
  75MODULE_PARM_DESC(cciss_simple_mode,
  76        "Use 'simple mode' rather than 'performant mode'");
  77
  78static int cciss_allow_hpsa;
  79module_param(cciss_allow_hpsa, int, S_IRUGO|S_IWUSR);
  80MODULE_PARM_DESC(cciss_allow_hpsa,
  81        "Prevent cciss driver from accessing hardware known to be "
  82        " supported by the hpsa driver");
  83
  84static DEFINE_MUTEX(cciss_mutex);
  85static struct proc_dir_entry *proc_cciss;
  86
  87#include "cciss_cmd.h"
  88#include "cciss.h"
  89#include <linux/cciss_ioctl.h>
  90
  91/* define the PCI info for the cards we can control */
  92static const struct pci_device_id cciss_pci_device_id[] = {
  93        {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISS,  0x0E11, 0x4070},
  94        {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4080},
  95        {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4082},
  96        {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4083},
  97        {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x4091},
  98        {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409A},
  99        {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409B},
 100        {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409C},
 101        {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409D},
 102        {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSA,     0x103C, 0x3225},
 103        {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSC,     0x103C, 0x3223},
 104        {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSC,     0x103C, 0x3234},
 105        {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSC,     0x103C, 0x3235},
 106        {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSD,     0x103C, 0x3211},
 107        {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSD,     0x103C, 0x3212},
 108        {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSD,     0x103C, 0x3213},
 109        {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSD,     0x103C, 0x3214},
 110        {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSD,     0x103C, 0x3215},
 111        {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSC,     0x103C, 0x3237},
 112        {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSC,     0x103C, 0x323D},
 113        {0,}
 114};
 115
 116MODULE_DEVICE_TABLE(pci, cciss_pci_device_id);
 117
 118/*  board_id = Subsystem Device ID & Vendor ID
 119 *  product = Marketing Name for the board
 120 *  access = Address of the struct of function pointers
 121 */
 122static struct board_type products[] = {
 123        {0x40700E11, "Smart Array 5300", &SA5_access},
 124        {0x40800E11, "Smart Array 5i", &SA5B_access},
 125        {0x40820E11, "Smart Array 532", &SA5B_access},
 126        {0x40830E11, "Smart Array 5312", &SA5B_access},
 127        {0x409A0E11, "Smart Array 641", &SA5_access},
 128        {0x409B0E11, "Smart Array 642", &SA5_access},
 129        {0x409C0E11, "Smart Array 6400", &SA5_access},
 130        {0x409D0E11, "Smart Array 6400 EM", &SA5_access},
 131        {0x40910E11, "Smart Array 6i", &SA5_access},
 132        {0x3225103C, "Smart Array P600", &SA5_access},
 133        {0x3223103C, "Smart Array P800", &SA5_access},
 134        {0x3234103C, "Smart Array P400", &SA5_access},
 135        {0x3235103C, "Smart Array P400i", &SA5_access},
 136        {0x3211103C, "Smart Array E200i", &SA5_access},
 137        {0x3212103C, "Smart Array E200", &SA5_access},
 138        {0x3213103C, "Smart Array E200i", &SA5_access},
 139        {0x3214103C, "Smart Array E200i", &SA5_access},
 140        {0x3215103C, "Smart Array E200i", &SA5_access},
 141        {0x3237103C, "Smart Array E500", &SA5_access},
 142        {0x323D103C, "Smart Array P700m", &SA5_access},
 143};
 144
 145/* How long to wait (in milliseconds) for board to go into simple mode */
 146#define MAX_CONFIG_WAIT 30000
 147#define MAX_IOCTL_CONFIG_WAIT 1000
 148
 149/*define how many times we will try a command because of bus resets */
 150#define MAX_CMD_RETRIES 3
 151
 152#define MAX_CTLR        32
 153
 154/* Originally cciss driver only supports 8 major numbers */
 155#define MAX_CTLR_ORIG   8
 156
 157static ctlr_info_t *hba[MAX_CTLR];
 158
 159static struct task_struct *cciss_scan_thread;
 160static DEFINE_MUTEX(scan_mutex);
 161static LIST_HEAD(scan_q);
 162
 163static void do_cciss_request(struct request_queue *q);
 164static irqreturn_t do_cciss_intx(int irq, void *dev_id);
 165static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id);
 166static int cciss_open(struct block_device *bdev, fmode_t mode);
 167static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode);
 168static void cciss_release(struct gendisk *disk, fmode_t mode);
 169static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
 170                       unsigned int cmd, unsigned long arg);
 171static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo);
 172
 173static int cciss_revalidate(struct gendisk *disk);
 174static int rebuild_lun_table(ctlr_info_t *h, int first_time, int via_ioctl);
 175static int deregister_disk(ctlr_info_t *h, int drv_index,
 176                           int clear_all, int via_ioctl);
 177
 178static void cciss_read_capacity(ctlr_info_t *h, int logvol,
 179                        sector_t *total_size, unsigned int *block_size);
 180static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
 181                        sector_t *total_size, unsigned int *block_size);
 182static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
 183                        sector_t total_size,
 184                        unsigned int block_size, InquiryData_struct *inq_buff,
 185                                   drive_info_struct *drv);
 186static void cciss_interrupt_mode(ctlr_info_t *);
 187static int cciss_enter_simple_mode(struct ctlr_info *h);
 188static void start_io(ctlr_info_t *h);
 189static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
 190                        __u8 page_code, unsigned char scsi3addr[],
 191                        int cmd_type);
 192static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
 193        int attempt_retry);
 194static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c);
 195
 196static int add_to_scan_list(struct ctlr_info *h);
 197static int scan_thread(void *data);
 198static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c);
 199static void cciss_hba_release(struct device *dev);
 200static void cciss_device_release(struct device *dev);
 201static void cciss_free_gendisk(ctlr_info_t *h, int drv_index);
 202static void cciss_free_drive_info(ctlr_info_t *h, int drv_index);
 203static inline u32 next_command(ctlr_info_t *h);
 204static int cciss_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
 205                                u32 *cfg_base_addr, u64 *cfg_base_addr_index,
 206                                u64 *cfg_offset);
 207static int cciss_pci_find_memory_BAR(struct pci_dev *pdev,
 208                                     unsigned long *memory_bar);
 209static inline u32 cciss_tag_discard_error_bits(ctlr_info_t *h, u32 tag);
 210static int write_driver_ver_to_cfgtable(CfgTable_struct __iomem *cfgtable);
 211
 212/* performant mode helper functions */
 213static void  calc_bucket_map(int *bucket, int num_buckets, int nsgs,
 214                                int *bucket_map);
 215static void cciss_put_controller_into_performant_mode(ctlr_info_t *h);
 216
 217#ifdef CONFIG_PROC_FS
 218static void cciss_procinit(ctlr_info_t *h);
 219#else
 220static void cciss_procinit(ctlr_info_t *h)
 221{
 222}
 223#endif                          /* CONFIG_PROC_FS */
 224
 225#ifdef CONFIG_COMPAT
 226static int cciss_compat_ioctl(struct block_device *, fmode_t,
 227                              unsigned, unsigned long);
 228#endif
 229
 230static const struct block_device_operations cciss_fops = {
 231        .owner = THIS_MODULE,
 232        .open = cciss_unlocked_open,
 233        .release = cciss_release,
 234        .ioctl = cciss_ioctl,
 235        .getgeo = cciss_getgeo,
 236#ifdef CONFIG_COMPAT
 237        .compat_ioctl = cciss_compat_ioctl,
 238#endif
 239        .revalidate_disk = cciss_revalidate,
 240};
 241
 242/* set_performant_mode: Modify the tag for cciss performant
 243 * set bit 0 for pull model, bits 3-1 for block fetch
 244 * register number
 245 */
 246static void set_performant_mode(ctlr_info_t *h, CommandList_struct *c)
 247{
 248        if (likely(h->transMethod & CFGTBL_Trans_Performant))
 249                c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
 250}
 251
 252/*
 253 * Enqueuing and dequeuing functions for cmdlists.
 254 */
 255static inline void addQ(struct list_head *list, CommandList_struct *c)
 256{
 257        list_add_tail(&c->list, list);
 258}
 259
 260static inline void removeQ(CommandList_struct *c)
 261{
 262        /*
 263         * After kexec/dump some commands might still
 264         * be in flight, which the firmware will try
 265         * to complete. Resetting the firmware doesn't work
 266         * with old fw revisions, so we have to mark
 267         * them off as 'stale' to prevent the driver from
 268         * falling over.
 269         */
 270        if (WARN_ON(list_empty(&c->list))) {
 271                c->cmd_type = CMD_MSG_STALE;
 272                return;
 273        }
 274
 275        list_del_init(&c->list);
 276}
 277
 278static void enqueue_cmd_and_start_io(ctlr_info_t *h,
 279        CommandList_struct *c)
 280{
 281        unsigned long flags;
 282        set_performant_mode(h, c);
 283        spin_lock_irqsave(&h->lock, flags);
 284        addQ(&h->reqQ, c);
 285        h->Qdepth++;
 286        if (h->Qdepth > h->maxQsinceinit)
 287                h->maxQsinceinit = h->Qdepth;
 288        start_io(h);
 289        spin_unlock_irqrestore(&h->lock, flags);
 290}
 291
 292static void cciss_free_sg_chain_blocks(SGDescriptor_struct **cmd_sg_list,
 293        int nr_cmds)
 294{
 295        int i;
 296
 297        if (!cmd_sg_list)
 298                return;
 299        for (i = 0; i < nr_cmds; i++) {
 300                kfree(cmd_sg_list[i]);
 301                cmd_sg_list[i] = NULL;
 302        }
 303        kfree(cmd_sg_list);
 304}
 305
 306static SGDescriptor_struct **cciss_allocate_sg_chain_blocks(
 307        ctlr_info_t *h, int chainsize, int nr_cmds)
 308{
 309        int j;
 310        SGDescriptor_struct **cmd_sg_list;
 311
 312        if (chainsize <= 0)
 313                return NULL;
 314
 315        cmd_sg_list = kmalloc(sizeof(*cmd_sg_list) * nr_cmds, GFP_KERNEL);
 316        if (!cmd_sg_list)
 317                return NULL;
 318
 319        /* Build up chain blocks for each command */
 320        for (j = 0; j < nr_cmds; j++) {
 321                /* Need a block of chainsized s/g elements. */
 322                cmd_sg_list[j] = kmalloc((chainsize *
 323                        sizeof(*cmd_sg_list[j])), GFP_KERNEL);
 324                if (!cmd_sg_list[j]) {
 325                        dev_err(&h->pdev->dev, "Cannot get memory "
 326                                "for s/g chains.\n");
 327                        goto clean;
 328                }
 329        }
 330        return cmd_sg_list;
 331clean:
 332        cciss_free_sg_chain_blocks(cmd_sg_list, nr_cmds);
 333        return NULL;
 334}
 335
 336static void cciss_unmap_sg_chain_block(ctlr_info_t *h, CommandList_struct *c)
 337{
 338        SGDescriptor_struct *chain_sg;
 339        u64bit temp64;
 340
 341        if (c->Header.SGTotal <= h->max_cmd_sgentries)
 342                return;
 343
 344        chain_sg = &c->SG[h->max_cmd_sgentries - 1];
 345        temp64.val32.lower = chain_sg->Addr.lower;
 346        temp64.val32.upper = chain_sg->Addr.upper;
 347        pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
 348}
 349
 350static void cciss_map_sg_chain_block(ctlr_info_t *h, CommandList_struct *c,
 351        SGDescriptor_struct *chain_block, int len)
 352{
 353        SGDescriptor_struct *chain_sg;
 354        u64bit temp64;
 355
 356        chain_sg = &c->SG[h->max_cmd_sgentries - 1];
 357        chain_sg->Ext = CCISS_SG_CHAIN;
 358        chain_sg->Len = len;
 359        temp64.val = pci_map_single(h->pdev, chain_block, len,
 360                                PCI_DMA_TODEVICE);
 361        chain_sg->Addr.lower = temp64.val32.lower;
 362        chain_sg->Addr.upper = temp64.val32.upper;
 363}
 364
 365#include "cciss_scsi.c"         /* For SCSI tape support */
 366
 367static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
 368        "UNKNOWN"
 369};
 370#define RAID_UNKNOWN (ARRAY_SIZE(raid_label)-1)
 371
 372#ifdef CONFIG_PROC_FS
 373
 374/*
 375 * Report information about this controller.
 376 */
 377#define ENG_GIG 1000000000
 378#define ENG_GIG_FACTOR (ENG_GIG/512)
 379#define ENGAGE_SCSI     "engage scsi"
 380
 381static void cciss_seq_show_header(struct seq_file *seq)
 382{
 383        ctlr_info_t *h = seq->private;
 384
 385        seq_printf(seq, "%s: HP %s Controller\n"
 386                "Board ID: 0x%08lx\n"
 387                "Firmware Version: %c%c%c%c\n"
 388                "IRQ: %d\n"
 389                "Logical drives: %d\n"
 390                "Current Q depth: %d\n"
 391                "Current # commands on controller: %d\n"
 392                "Max Q depth since init: %d\n"
 393                "Max # commands on controller since init: %d\n"
 394                "Max SG entries since init: %d\n",
 395                h->devname,
 396                h->product_name,
 397                (unsigned long)h->board_id,
 398                h->firm_ver[0], h->firm_ver[1], h->firm_ver[2],
 399                h->firm_ver[3], (unsigned int)h->intr[h->intr_mode],
 400                h->num_luns,
 401                h->Qdepth, h->commands_outstanding,
 402                h->maxQsinceinit, h->max_outstanding, h->maxSG);
 403
 404#ifdef CONFIG_CISS_SCSI_TAPE
 405        cciss_seq_tape_report(seq, h);
 406#endif /* CONFIG_CISS_SCSI_TAPE */
 407}
 408
 409static void *cciss_seq_start(struct seq_file *seq, loff_t *pos)
 410{
 411        ctlr_info_t *h = seq->private;
 412        unsigned long flags;
 413
 414        /* prevent displaying bogus info during configuration
 415         * or deconfiguration of a logical volume
 416         */
 417        spin_lock_irqsave(&h->lock, flags);
 418        if (h->busy_configuring) {
 419                spin_unlock_irqrestore(&h->lock, flags);
 420                return ERR_PTR(-EBUSY);
 421        }
 422        h->busy_configuring = 1;
 423        spin_unlock_irqrestore(&h->lock, flags);
 424
 425        if (*pos == 0)
 426                cciss_seq_show_header(seq);
 427
 428        return pos;
 429}
 430
 431static int cciss_seq_show(struct seq_file *seq, void *v)
 432{
 433        sector_t vol_sz, vol_sz_frac;
 434        ctlr_info_t *h = seq->private;
 435        unsigned ctlr = h->ctlr;
 436        loff_t *pos = v;
 437        drive_info_struct *drv = h->drv[*pos];
 438
 439        if (*pos > h->highest_lun)
 440                return 0;
 441
 442        if (drv == NULL) /* it's possible for h->drv[] to have holes. */
 443                return 0;
 444
 445        if (drv->heads == 0)
 446                return 0;
 447
 448        vol_sz = drv->nr_blocks;
 449        vol_sz_frac = sector_div(vol_sz, ENG_GIG_FACTOR);
 450        vol_sz_frac *= 100;
 451        sector_div(vol_sz_frac, ENG_GIG_FACTOR);
 452
 453        if (drv->raid_level < 0 || drv->raid_level > RAID_UNKNOWN)
 454                drv->raid_level = RAID_UNKNOWN;
 455        seq_printf(seq, "cciss/c%dd%d:"
 456                        "\t%4u.%02uGB\tRAID %s\n",
 457                        ctlr, (int) *pos, (int)vol_sz, (int)vol_sz_frac,
 458                        raid_label[drv->raid_level]);
 459        return 0;
 460}
 461
 462static void *cciss_seq_next(struct seq_file *seq, void *v, loff_t *pos)
 463{
 464        ctlr_info_t *h = seq->private;
 465
 466        if (*pos > h->highest_lun)
 467                return NULL;
 468        *pos += 1;
 469
 470        return pos;
 471}
 472
 473static void cciss_seq_stop(struct seq_file *seq, void *v)
 474{
 475        ctlr_info_t *h = seq->private;
 476
 477        /* Only reset h->busy_configuring if we succeeded in setting
 478         * it during cciss_seq_start. */
 479        if (v == ERR_PTR(-EBUSY))
 480                return;
 481
 482        h->busy_configuring = 0;
 483}
 484
 485static const struct seq_operations cciss_seq_ops = {
 486        .start = cciss_seq_start,
 487        .show  = cciss_seq_show,
 488        .next  = cciss_seq_next,
 489        .stop  = cciss_seq_stop,
 490};
 491
 492static int cciss_seq_open(struct inode *inode, struct file *file)
 493{
 494        int ret = seq_open(file, &cciss_seq_ops);
 495        struct seq_file *seq = file->private_data;
 496
 497        if (!ret)
 498                seq->private = PDE_DATA(inode);
 499
 500        return ret;
 501}
 502
 503static ssize_t
 504cciss_proc_write(struct file *file, const char __user *buf,
 505                 size_t length, loff_t *ppos)
 506{
 507        int err;
 508        char *buffer;
 509
 510#ifndef CONFIG_CISS_SCSI_TAPE
 511        return -EINVAL;
 512#endif
 513
 514        if (!buf || length > PAGE_SIZE - 1)
 515                return -EINVAL;
 516
 517        buffer = memdup_user_nul(buf, length);
 518        if (IS_ERR(buffer))
 519                return PTR_ERR(buffer);
 520
 521#ifdef CONFIG_CISS_SCSI_TAPE
 522        if (strncmp(ENGAGE_SCSI, buffer, sizeof ENGAGE_SCSI - 1) == 0) {
 523                struct seq_file *seq = file->private_data;
 524                ctlr_info_t *h = seq->private;
 525
 526                err = cciss_engage_scsi(h);
 527                if (err == 0)
 528                        err = length;
 529        } else
 530#endif /* CONFIG_CISS_SCSI_TAPE */
 531                err = -EINVAL;
 532        /* might be nice to have "disengage" too, but it's not
 533           safely possible. (only 1 module use count, lock issues.) */
 534
 535        kfree(buffer);
 536        return err;
 537}
 538
 539static const struct file_operations cciss_proc_fops = {
 540        .owner   = THIS_MODULE,
 541        .open    = cciss_seq_open,
 542        .read    = seq_read,
 543        .llseek  = seq_lseek,
 544        .release = seq_release,
 545        .write   = cciss_proc_write,
 546};
 547
 548static void cciss_procinit(ctlr_info_t *h)
 549{
 550        struct proc_dir_entry *pde;
 551
 552        if (proc_cciss == NULL)
 553                proc_cciss = proc_mkdir("driver/cciss", NULL);
 554        if (!proc_cciss)
 555                return;
 556        pde = proc_create_data(h->devname, S_IWUSR | S_IRUSR | S_IRGRP |
 557                                        S_IROTH, proc_cciss,
 558                                        &cciss_proc_fops, h);
 559}
 560#endif                          /* CONFIG_PROC_FS */
 561
 562#define MAX_PRODUCT_NAME_LEN 19
 563
 564#define to_hba(n) container_of(n, struct ctlr_info, dev)
 565#define to_drv(n) container_of(n, drive_info_struct, dev)
 566
 567/* List of controllers which cannot be hard reset on kexec with reset_devices */
 568static u32 unresettable_controller[] = {
 569        0x3223103C, /* Smart Array P800 */
 570        0x3234103C, /* Smart Array P400 */
 571        0x3235103C, /* Smart Array P400i */
 572        0x3211103C, /* Smart Array E200i */
 573        0x3212103C, /* Smart Array E200 */
 574        0x3213103C, /* Smart Array E200i */
 575        0x3214103C, /* Smart Array E200i */
 576        0x3215103C, /* Smart Array E200i */
 577        0x3237103C, /* Smart Array E500 */
 578        0x323D103C, /* Smart Array P700m */
 579        0x40800E11, /* Smart Array 5i */
 580        0x409C0E11, /* Smart Array 6400 */
 581        0x409D0E11, /* Smart Array 6400 EM */
 582        0x40700E11, /* Smart Array 5300 */
 583        0x40820E11, /* Smart Array 532 */
 584        0x40830E11, /* Smart Array 5312 */
 585        0x409A0E11, /* Smart Array 641 */
 586        0x409B0E11, /* Smart Array 642 */
 587        0x40910E11, /* Smart Array 6i */
 588};
 589
 590/* List of controllers which cannot even be soft reset */
 591static u32 soft_unresettable_controller[] = {
 592        0x40800E11, /* Smart Array 5i */
 593        0x40700E11, /* Smart Array 5300 */
 594        0x40820E11, /* Smart Array 532 */
 595        0x40830E11, /* Smart Array 5312 */
 596        0x409A0E11, /* Smart Array 641 */
 597        0x409B0E11, /* Smart Array 642 */
 598        0x40910E11, /* Smart Array 6i */
 599        /* Exclude 640x boards.  These are two pci devices in one slot
 600         * which share a battery backed cache module.  One controls the
 601         * cache, the other accesses the cache through the one that controls
 602         * it.  If we reset the one controlling the cache, the other will
 603         * likely not be happy.  Just forbid resetting this conjoined mess.
 604         */
 605        0x409C0E11, /* Smart Array 6400 */
 606        0x409D0E11, /* Smart Array 6400 EM */
 607};
 608
 609static int ctlr_is_hard_resettable(u32 board_id)
 610{
 611        int i;
 612
 613        for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
 614                if (unresettable_controller[i] == board_id)
 615                        return 0;
 616        return 1;
 617}
 618
 619static int ctlr_is_soft_resettable(u32 board_id)
 620{
 621        int i;
 622
 623        for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++)
 624                if (soft_unresettable_controller[i] == board_id)
 625                        return 0;
 626        return 1;
 627}
 628
 629static int ctlr_is_resettable(u32 board_id)
 630{
 631        return ctlr_is_hard_resettable(board_id) ||
 632                ctlr_is_soft_resettable(board_id);
 633}
 634
 635static ssize_t host_show_resettable(struct device *dev,
 636                                    struct device_attribute *attr,
 637                                    char *buf)
 638{
 639        struct ctlr_info *h = to_hba(dev);
 640
 641        return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
 642}
 643static DEVICE_ATTR(resettable, S_IRUGO, host_show_resettable, NULL);
 644
 645static ssize_t host_store_rescan(struct device *dev,
 646                                 struct device_attribute *attr,
 647                                 const char *buf, size_t count)
 648{
 649        struct ctlr_info *h = to_hba(dev);
 650
 651        add_to_scan_list(h);
 652        wake_up_process(cciss_scan_thread);
 653        wait_for_completion_interruptible(&h->scan_wait);
 654
 655        return count;
 656}
 657static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
 658
 659static ssize_t host_show_transport_mode(struct device *dev,
 660                                 struct device_attribute *attr,
 661                                 char *buf)
 662{
 663        struct ctlr_info *h = to_hba(dev);
 664
 665        return snprintf(buf, 20, "%s\n",
 666                h->transMethod & CFGTBL_Trans_Performant ?
 667                        "performant" : "simple");
 668}
 669static DEVICE_ATTR(transport_mode, S_IRUGO, host_show_transport_mode, NULL);
 670
 671static ssize_t dev_show_unique_id(struct device *dev,
 672                                 struct device_attribute *attr,
 673                                 char *buf)
 674{
 675        drive_info_struct *drv = to_drv(dev);
 676        struct ctlr_info *h = to_hba(drv->dev.parent);
 677        __u8 sn[16];
 678        unsigned long flags;
 679        int ret = 0;
 680
 681        spin_lock_irqsave(&h->lock, flags);
 682        if (h->busy_configuring)
 683                ret = -EBUSY;
 684        else
 685                memcpy(sn, drv->serial_no, sizeof(sn));
 686        spin_unlock_irqrestore(&h->lock, flags);
 687
 688        if (ret)
 689                return ret;
 690        else
 691                return snprintf(buf, 16 * 2 + 2,
 692                                "%02X%02X%02X%02X%02X%02X%02X%02X"
 693                                "%02X%02X%02X%02X%02X%02X%02X%02X\n",
 694                                sn[0], sn[1], sn[2], sn[3],
 695                                sn[4], sn[5], sn[6], sn[7],
 696                                sn[8], sn[9], sn[10], sn[11],
 697                                sn[12], sn[13], sn[14], sn[15]);
 698}
 699static DEVICE_ATTR(unique_id, S_IRUGO, dev_show_unique_id, NULL);
 700
 701static ssize_t dev_show_vendor(struct device *dev,
 702                               struct device_attribute *attr,
 703                               char *buf)
 704{
 705        drive_info_struct *drv = to_drv(dev);
 706        struct ctlr_info *h = to_hba(drv->dev.parent);
 707        char vendor[VENDOR_LEN + 1];
 708        unsigned long flags;
 709        int ret = 0;
 710
 711        spin_lock_irqsave(&h->lock, flags);
 712        if (h->busy_configuring)
 713                ret = -EBUSY;
 714        else
 715                memcpy(vendor, drv->vendor, VENDOR_LEN + 1);
 716        spin_unlock_irqrestore(&h->lock, flags);
 717
 718        if (ret)
 719                return ret;
 720        else
 721                return snprintf(buf, sizeof(vendor) + 1, "%s\n", drv->vendor);
 722}
 723static DEVICE_ATTR(vendor, S_IRUGO, dev_show_vendor, NULL);
 724
 725static ssize_t dev_show_model(struct device *dev,
 726                              struct device_attribute *attr,
 727                              char *buf)
 728{
 729        drive_info_struct *drv = to_drv(dev);
 730        struct ctlr_info *h = to_hba(drv->dev.parent);
 731        char model[MODEL_LEN + 1];
 732        unsigned long flags;
 733        int ret = 0;
 734
 735        spin_lock_irqsave(&h->lock, flags);
 736        if (h->busy_configuring)
 737                ret = -EBUSY;
 738        else
 739                memcpy(model, drv->model, MODEL_LEN + 1);
 740        spin_unlock_irqrestore(&h->lock, flags);
 741
 742        if (ret)
 743                return ret;
 744        else
 745                return snprintf(buf, sizeof(model) + 1, "%s\n", drv->model);
 746}
 747static DEVICE_ATTR(model, S_IRUGO, dev_show_model, NULL);
 748
 749static ssize_t dev_show_rev(struct device *dev,
 750                            struct device_attribute *attr,
 751                            char *buf)
 752{
 753        drive_info_struct *drv = to_drv(dev);
 754        struct ctlr_info *h = to_hba(drv->dev.parent);
 755        char rev[REV_LEN + 1];
 756        unsigned long flags;
 757        int ret = 0;
 758
 759        spin_lock_irqsave(&h->lock, flags);
 760        if (h->busy_configuring)
 761                ret = -EBUSY;
 762        else
 763                memcpy(rev, drv->rev, REV_LEN + 1);
 764        spin_unlock_irqrestore(&h->lock, flags);
 765
 766        if (ret)
 767                return ret;
 768        else
 769                return snprintf(buf, sizeof(rev) + 1, "%s\n", drv->rev);
 770}
 771static DEVICE_ATTR(rev, S_IRUGO, dev_show_rev, NULL);
 772
 773static ssize_t cciss_show_lunid(struct device *dev,
 774                                struct device_attribute *attr, char *buf)
 775{
 776        drive_info_struct *drv = to_drv(dev);
 777        struct ctlr_info *h = to_hba(drv->dev.parent);
 778        unsigned long flags;
 779        unsigned char lunid[8];
 780
 781        spin_lock_irqsave(&h->lock, flags);
 782        if (h->busy_configuring) {
 783                spin_unlock_irqrestore(&h->lock, flags);
 784                return -EBUSY;
 785        }
 786        if (!drv->heads) {
 787                spin_unlock_irqrestore(&h->lock, flags);
 788                return -ENOTTY;
 789        }
 790        memcpy(lunid, drv->LunID, sizeof(lunid));
 791        spin_unlock_irqrestore(&h->lock, flags);
 792        return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
 793                lunid[0], lunid[1], lunid[2], lunid[3],
 794                lunid[4], lunid[5], lunid[6], lunid[7]);
 795}
 796static DEVICE_ATTR(lunid, S_IRUGO, cciss_show_lunid, NULL);
 797
 798static ssize_t cciss_show_raid_level(struct device *dev,
 799                                     struct device_attribute *attr, char *buf)
 800{
 801        drive_info_struct *drv = to_drv(dev);
 802        struct ctlr_info *h = to_hba(drv->dev.parent);
 803        int raid;
 804        unsigned long flags;
 805
 806        spin_lock_irqsave(&h->lock, flags);
 807        if (h->busy_configuring) {
 808                spin_unlock_irqrestore(&h->lock, flags);
 809                return -EBUSY;
 810        }
 811        raid = drv->raid_level;
 812        spin_unlock_irqrestore(&h->lock, flags);
 813        if (raid < 0 || raid > RAID_UNKNOWN)
 814                raid = RAID_UNKNOWN;
 815
 816        return snprintf(buf, strlen(raid_label[raid]) + 7, "RAID %s\n",
 817                        raid_label[raid]);
 818}
 819static DEVICE_ATTR(raid_level, S_IRUGO, cciss_show_raid_level, NULL);
 820
 821static ssize_t cciss_show_usage_count(struct device *dev,
 822                                      struct device_attribute *attr, char *buf)
 823{
 824        drive_info_struct *drv = to_drv(dev);
 825        struct ctlr_info *h = to_hba(drv->dev.parent);
 826        unsigned long flags;
 827        int count;
 828
 829        spin_lock_irqsave(&h->lock, flags);
 830        if (h->busy_configuring) {
 831                spin_unlock_irqrestore(&h->lock, flags);
 832                return -EBUSY;
 833        }
 834        count = drv->usage_count;
 835        spin_unlock_irqrestore(&h->lock, flags);
 836        return snprintf(buf, 20, "%d\n", count);
 837}
 838static DEVICE_ATTR(usage_count, S_IRUGO, cciss_show_usage_count, NULL);
 839
 840static struct attribute *cciss_host_attrs[] = {
 841        &dev_attr_rescan.attr,
 842        &dev_attr_resettable.attr,
 843        &dev_attr_transport_mode.attr,
 844        NULL
 845};
 846
 847static struct attribute_group cciss_host_attr_group = {
 848        .attrs = cciss_host_attrs,
 849};
 850
 851static const struct attribute_group *cciss_host_attr_groups[] = {
 852        &cciss_host_attr_group,
 853        NULL
 854};
 855
 856static struct device_type cciss_host_type = {
 857        .name           = "cciss_host",
 858        .groups         = cciss_host_attr_groups,
 859        .release        = cciss_hba_release,
 860};
 861
 862static struct attribute *cciss_dev_attrs[] = {
 863        &dev_attr_unique_id.attr,
 864        &dev_attr_model.attr,
 865        &dev_attr_vendor.attr,
 866        &dev_attr_rev.attr,
 867        &dev_attr_lunid.attr,
 868        &dev_attr_raid_level.attr,
 869        &dev_attr_usage_count.attr,
 870        NULL
 871};
 872
 873static struct attribute_group cciss_dev_attr_group = {
 874        .attrs = cciss_dev_attrs,
 875};
 876
 877static const struct attribute_group *cciss_dev_attr_groups[] = {
 878        &cciss_dev_attr_group,
 879        NULL
 880};
 881
 882static struct device_type cciss_dev_type = {
 883        .name           = "cciss_device",
 884        .groups         = cciss_dev_attr_groups,
 885        .release        = cciss_device_release,
 886};
 887
 888static struct bus_type cciss_bus_type = {
 889        .name           = "cciss",
 890};
 891
 892/*
 893 * cciss_hba_release is called when the reference count
 894 * of h->dev goes to zero.
 895 */
 896static void cciss_hba_release(struct device *dev)
 897{
 898        /*
 899         * nothing to do, but need this to avoid a warning
 900         * about not having a release handler from lib/kref.c.
 901         */
 902}
 903
 904/*
 905 * Initialize sysfs entry for each controller.  This sets up and registers
 906 * the 'cciss#' directory for each individual controller under
 907 * /sys/bus/pci/devices/<dev>/.
 908 */
 909static int cciss_create_hba_sysfs_entry(struct ctlr_info *h)
 910{
 911        device_initialize(&h->dev);
 912        h->dev.type = &cciss_host_type;
 913        h->dev.bus = &cciss_bus_type;
 914        dev_set_name(&h->dev, "%s", h->devname);
 915        h->dev.parent = &h->pdev->dev;
 916
 917        return device_add(&h->dev);
 918}
 919
 920/*
 921 * Remove sysfs entries for an hba.
 922 */
 923static void cciss_destroy_hba_sysfs_entry(struct ctlr_info *h)
 924{
 925        device_del(&h->dev);
 926        put_device(&h->dev); /* final put. */
 927}
 928
 929/* cciss_device_release is called when the reference count
 930 * of h->drv[x]dev goes to zero.
 931 */
 932static void cciss_device_release(struct device *dev)
 933{
 934        drive_info_struct *drv = to_drv(dev);
 935        kfree(drv);
 936}
 937
 938/*
 939 * Initialize sysfs for each logical drive.  This sets up and registers
 940 * the 'c#d#' directory for each individual logical drive under
 941 * /sys/bus/pci/devices/<dev/ccis#/. We also create a link from
 942 * /sys/block/cciss!c#d# to this entry.
 943 */
 944static long cciss_create_ld_sysfs_entry(struct ctlr_info *h,
 945                                       int drv_index)
 946{
 947        struct device *dev;
 948
 949        if (h->drv[drv_index]->device_initialized)
 950                return 0;
 951
 952        dev = &h->drv[drv_index]->dev;
 953        device_initialize(dev);
 954        dev->type = &cciss_dev_type;
 955        dev->bus = &cciss_bus_type;
 956        dev_set_name(dev, "c%dd%d", h->ctlr, drv_index);
 957        dev->parent = &h->dev;
 958        h->drv[drv_index]->device_initialized = 1;
 959        return device_add(dev);
 960}
 961
 962/*
 963 * Remove sysfs entries for a logical drive.
 964 */
 965static void cciss_destroy_ld_sysfs_entry(struct ctlr_info *h, int drv_index,
 966        int ctlr_exiting)
 967{
 968        struct device *dev = &h->drv[drv_index]->dev;
 969
 970        /* special case for c*d0, we only destroy it on controller exit */
 971        if (drv_index == 0 && !ctlr_exiting)
 972                return;
 973
 974        device_del(dev);
 975        put_device(dev); /* the "final" put. */
 976        h->drv[drv_index] = NULL;
 977}
 978
 979/*
 980 * For operations that cannot sleep, a command block is allocated at init,
 981 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
 982 * which ones are free or in use.
 983 */
 984static CommandList_struct *cmd_alloc(ctlr_info_t *h)
 985{
 986        CommandList_struct *c;
 987        int i;
 988        u64bit temp64;
 989        dma_addr_t cmd_dma_handle, err_dma_handle;
 990
 991        do {
 992                i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
 993                if (i == h->nr_cmds)
 994                        return NULL;
 995        } while (test_and_set_bit(i, h->cmd_pool_bits) != 0);
 996        c = h->cmd_pool + i;
 997        memset(c, 0, sizeof(CommandList_struct));
 998        cmd_dma_handle = h->cmd_pool_dhandle + i * sizeof(CommandList_struct);
 999        c->err_info = h->errinfo_pool + i;
1000        memset(c->err_info, 0, sizeof(ErrorInfo_struct));
1001        err_dma_handle = h->errinfo_pool_dhandle
1002            + i * sizeof(ErrorInfo_struct);
1003        h->nr_allocs++;
1004
1005        c->cmdindex = i;
1006
1007        INIT_LIST_HEAD(&c->list);
1008        c->busaddr = (__u32) cmd_dma_handle;
1009        temp64.val = (__u64) err_dma_handle;
1010        c->ErrDesc.Addr.lower = temp64.val32.lower;
1011        c->ErrDesc.Addr.upper = temp64.val32.upper;
1012        c->ErrDesc.Len = sizeof(ErrorInfo_struct);
1013
1014        c->ctlr = h->ctlr;
1015        return c;
1016}
1017
1018/* allocate a command using pci_alloc_consistent, used for ioctls,
1019 * etc., not for the main i/o path.
1020 */
1021static CommandList_struct *cmd_special_alloc(ctlr_info_t *h)
1022{
1023        CommandList_struct *c;
1024        u64bit temp64;
1025        dma_addr_t cmd_dma_handle, err_dma_handle;
1026
1027        c = pci_zalloc_consistent(h->pdev, sizeof(CommandList_struct),
1028                                  &cmd_dma_handle);
1029        if (c == NULL)
1030                return NULL;
1031
1032        c->cmdindex = -1;
1033
1034        c->err_info = pci_zalloc_consistent(h->pdev, sizeof(ErrorInfo_struct),
1035                                            &err_dma_handle);
1036
1037        if (c->err_info == NULL) {
1038                pci_free_consistent(h->pdev,
1039                        sizeof(CommandList_struct), c, cmd_dma_handle);
1040                return NULL;
1041        }
1042
1043        INIT_LIST_HEAD(&c->list);
1044        c->busaddr = (__u32) cmd_dma_handle;
1045        temp64.val = (__u64) err_dma_handle;
1046        c->ErrDesc.Addr.lower = temp64.val32.lower;
1047        c->ErrDesc.Addr.upper = temp64.val32.upper;
1048        c->ErrDesc.Len = sizeof(ErrorInfo_struct);
1049
1050        c->ctlr = h->ctlr;
1051        return c;
1052}
1053
1054static void cmd_free(ctlr_info_t *h, CommandList_struct *c)
1055{
1056        int i;
1057
1058        i = c - h->cmd_pool;
1059        clear_bit(i, h->cmd_pool_bits);
1060        h->nr_frees++;
1061}
1062
1063static void cmd_special_free(ctlr_info_t *h, CommandList_struct *c)
1064{
1065        u64bit temp64;
1066
1067        temp64.val32.lower = c->ErrDesc.Addr.lower;
1068        temp64.val32.upper = c->ErrDesc.Addr.upper;
1069        pci_free_consistent(h->pdev, sizeof(ErrorInfo_struct),
1070                            c->err_info, (dma_addr_t) temp64.val);
1071        pci_free_consistent(h->pdev, sizeof(CommandList_struct), c,
1072                (dma_addr_t) cciss_tag_discard_error_bits(h, (u32) c->busaddr));
1073}
1074
1075static inline ctlr_info_t *get_host(struct gendisk *disk)
1076{
1077        return disk->queue->queuedata;
1078}
1079
1080static inline drive_info_struct *get_drv(struct gendisk *disk)
1081{
1082        return disk->private_data;
1083}
1084
1085/*
1086 * Open.  Make sure the device is really there.
1087 */
1088static int cciss_open(struct block_device *bdev, fmode_t mode)
1089{
1090        ctlr_info_t *h = get_host(bdev->bd_disk);
1091        drive_info_struct *drv = get_drv(bdev->bd_disk);
1092
1093        dev_dbg(&h->pdev->dev, "cciss_open %s\n", bdev->bd_disk->disk_name);
1094        if (drv->busy_configuring)
1095                return -EBUSY;
1096        /*
1097         * Root is allowed to open raw volume zero even if it's not configured
1098         * so array config can still work. Root is also allowed to open any
1099         * volume that has a LUN ID, so it can issue IOCTL to reread the
1100         * disk information.  I don't think I really like this
1101         * but I'm already using way to many device nodes to claim another one
1102         * for "raw controller".
1103         */
1104        if (drv->heads == 0) {
1105                if (MINOR(bdev->bd_dev) != 0) { /* not node 0? */
1106                        /* if not node 0 make sure it is a partition = 0 */
1107                        if (MINOR(bdev->bd_dev) & 0x0f) {
1108                                return -ENXIO;
1109                                /* if it is, make sure we have a LUN ID */
1110                        } else if (memcmp(drv->LunID, CTLR_LUNID,
1111                                sizeof(drv->LunID))) {
1112                                return -ENXIO;
1113                        }
1114                }
1115                if (!capable(CAP_SYS_ADMIN))
1116                        return -EPERM;
1117        }
1118        drv->usage_count++;
1119        h->usage_count++;
1120        return 0;
1121}
1122
1123static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode)
1124{
1125        int ret;
1126
1127        mutex_lock(&cciss_mutex);
1128        ret = cciss_open(bdev, mode);
1129        mutex_unlock(&cciss_mutex);
1130
1131        return ret;
1132}
1133
1134/*
1135 * Close.  Sync first.
1136 */
1137static void cciss_release(struct gendisk *disk, fmode_t mode)
1138{
1139        ctlr_info_t *h;
1140        drive_info_struct *drv;
1141
1142        mutex_lock(&cciss_mutex);
1143        h = get_host(disk);
1144        drv = get_drv(disk);
1145        dev_dbg(&h->pdev->dev, "cciss_release %s\n", disk->disk_name);
1146        drv->usage_count--;
1147        h->usage_count--;
1148        mutex_unlock(&cciss_mutex);
1149}
1150
1151#ifdef CONFIG_COMPAT
1152
1153static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
1154                                  unsigned cmd, unsigned long arg);
1155static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
1156                                      unsigned cmd, unsigned long arg);
1157
1158static int cciss_compat_ioctl(struct block_device *bdev, fmode_t mode,
1159                              unsigned cmd, unsigned long arg)
1160{
1161        switch (cmd) {
1162        case CCISS_GETPCIINFO:
1163        case CCISS_GETINTINFO:
1164        case CCISS_SETINTINFO:
1165        case CCISS_GETNODENAME:
1166        case CCISS_SETNODENAME:
1167        case CCISS_GETHEARTBEAT:
1168        case CCISS_GETBUSTYPES:
1169        case CCISS_GETFIRMVER:
1170        case CCISS_GETDRIVVER:
1171        case CCISS_REVALIDVOLS:
1172        case CCISS_DEREGDISK:
1173        case CCISS_REGNEWDISK:
1174        case CCISS_REGNEWD:
1175        case CCISS_RESCANDISK:
1176        case CCISS_GETLUNINFO:
1177                return cciss_ioctl(bdev, mode, cmd, arg);
1178
1179        case CCISS_PASSTHRU32:
1180                return cciss_ioctl32_passthru(bdev, mode, cmd, arg);
1181        case CCISS_BIG_PASSTHRU32:
1182                return cciss_ioctl32_big_passthru(bdev, mode, cmd, arg);
1183
1184        default:
1185                return -ENOIOCTLCMD;
1186        }
1187}
1188
1189static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
1190                                  unsigned cmd, unsigned long arg)
1191{
1192        IOCTL32_Command_struct __user *arg32 =
1193            (IOCTL32_Command_struct __user *) arg;
1194        IOCTL_Command_struct arg64;
1195        IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
1196        int err;
1197        u32 cp;
1198
1199        memset(&arg64, 0, sizeof(arg64));
1200        err = 0;
1201        err |=
1202            copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
1203                           sizeof(arg64.LUN_info));
1204        err |=
1205            copy_from_user(&arg64.Request, &arg32->Request,
1206                           sizeof(arg64.Request));
1207        err |=
1208            copy_from_user(&arg64.error_info, &arg32->error_info,
1209                           sizeof(arg64.error_info));
1210        err |= get_user(arg64.buf_size, &arg32->buf_size);
1211        err |= get_user(cp, &arg32->buf);
1212        arg64.buf = compat_ptr(cp);
1213        err |= copy_to_user(p, &arg64, sizeof(arg64));
1214
1215        if (err)
1216                return -EFAULT;
1217
1218        err = cciss_ioctl(bdev, mode, CCISS_PASSTHRU, (unsigned long)p);
1219        if (err)
1220                return err;
1221        err |=
1222            copy_in_user(&arg32->error_info, &p->error_info,
1223                         sizeof(arg32->error_info));
1224        if (err)
1225                return -EFAULT;
1226        return err;
1227}
1228
1229static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
1230                                      unsigned cmd, unsigned long arg)
1231{
1232        BIG_IOCTL32_Command_struct __user *arg32 =
1233            (BIG_IOCTL32_Command_struct __user *) arg;
1234        BIG_IOCTL_Command_struct arg64;
1235        BIG_IOCTL_Command_struct __user *p =
1236            compat_alloc_user_space(sizeof(arg64));
1237        int err;
1238        u32 cp;
1239
1240        memset(&arg64, 0, sizeof(arg64));
1241        err = 0;
1242        err |=
1243            copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
1244                           sizeof(arg64.LUN_info));
1245        err |=
1246            copy_from_user(&arg64.Request, &arg32->Request,
1247                           sizeof(arg64.Request));
1248        err |=
1249            copy_from_user(&arg64.error_info, &arg32->error_info,
1250                           sizeof(arg64.error_info));
1251        err |= get_user(arg64.buf_size, &arg32->buf_size);
1252        err |= get_user(arg64.malloc_size, &arg32->malloc_size);
1253        err |= get_user(cp, &arg32->buf);
1254        arg64.buf = compat_ptr(cp);
1255        err |= copy_to_user(p, &arg64, sizeof(arg64));
1256
1257        if (err)
1258                return -EFAULT;
1259
1260        err = cciss_ioctl(bdev, mode, CCISS_BIG_PASSTHRU, (unsigned long)p);
1261        if (err)
1262                return err;
1263        err |=
1264            copy_in_user(&arg32->error_info, &p->error_info,
1265                         sizeof(arg32->error_info));
1266        if (err)
1267                return -EFAULT;
1268        return err;
1269}
1270#endif
1271
1272static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1273{
1274        drive_info_struct *drv = get_drv(bdev->bd_disk);
1275
1276        if (!drv->cylinders)
1277                return -ENXIO;
1278
1279        geo->heads = drv->heads;
1280        geo->sectors = drv->sectors;
1281        geo->cylinders = drv->cylinders;
1282        return 0;
1283}
1284
1285static void check_ioctl_unit_attention(ctlr_info_t *h, CommandList_struct *c)
1286{
1287        if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
1288                        c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
1289                (void)check_for_unit_attention(h, c);
1290}
1291
1292static int cciss_getpciinfo(ctlr_info_t *h, void __user *argp)
1293{
1294        cciss_pci_info_struct pciinfo;
1295
1296        if (!argp)
1297                return -EINVAL;
1298        pciinfo.domain = pci_domain_nr(h->pdev->bus);
1299        pciinfo.bus = h->pdev->bus->number;
1300        pciinfo.dev_fn = h->pdev->devfn;
1301        pciinfo.board_id = h->board_id;
1302        if (copy_to_user(argp, &pciinfo, sizeof(cciss_pci_info_struct)))
1303                return -EFAULT;
1304        return 0;
1305}
1306
1307static int cciss_getintinfo(ctlr_info_t *h, void __user *argp)
1308{
1309        cciss_coalint_struct intinfo;
1310        unsigned long flags;
1311
1312        if (!argp)
1313                return -EINVAL;
1314        spin_lock_irqsave(&h->lock, flags);
1315        intinfo.delay = readl(&h->cfgtable->HostWrite.CoalIntDelay);
1316        intinfo.count = readl(&h->cfgtable->HostWrite.CoalIntCount);
1317        spin_unlock_irqrestore(&h->lock, flags);
1318        if (copy_to_user
1319            (argp, &intinfo, sizeof(cciss_coalint_struct)))
1320                return -EFAULT;
1321        return 0;
1322}
1323
1324static int cciss_setintinfo(ctlr_info_t *h, void __user *argp)
1325{
1326        cciss_coalint_struct intinfo;
1327        unsigned long flags;
1328        int i;
1329
1330        if (!argp)
1331                return -EINVAL;
1332        if (!capable(CAP_SYS_ADMIN))
1333                return -EPERM;
1334        if (copy_from_user(&intinfo, argp, sizeof(intinfo)))
1335                return -EFAULT;
1336        if ((intinfo.delay == 0) && (intinfo.count == 0))
1337                return -EINVAL;
1338        spin_lock_irqsave(&h->lock, flags);
1339        /* Update the field, and then ring the doorbell */
1340        writel(intinfo.delay, &(h->cfgtable->HostWrite.CoalIntDelay));
1341        writel(intinfo.count, &(h->cfgtable->HostWrite.CoalIntCount));
1342        writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
1343
1344        for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
1345                if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
1346                        break;
1347                udelay(1000); /* delay and try again */
1348        }
1349        spin_unlock_irqrestore(&h->lock, flags);
1350        if (i >= MAX_IOCTL_CONFIG_WAIT)
1351                return -EAGAIN;
1352        return 0;
1353}
1354
1355static int cciss_getnodename(ctlr_info_t *h, void __user *argp)
1356{
1357        NodeName_type NodeName;
1358        unsigned long flags;
1359        int i;
1360
1361        if (!argp)
1362                return -EINVAL;
1363        spin_lock_irqsave(&h->lock, flags);
1364        for (i = 0; i < 16; i++)
1365                NodeName[i] = readb(&h->cfgtable->ServerName[i]);
1366        spin_unlock_irqrestore(&h->lock, flags);
1367        if (copy_to_user(argp, NodeName, sizeof(NodeName_type)))
1368                return -EFAULT;
1369        return 0;
1370}
1371
1372static int cciss_setnodename(ctlr_info_t *h, void __user *argp)
1373{
1374        NodeName_type NodeName;
1375        unsigned long flags;
1376        int i;
1377
1378        if (!argp)
1379                return -EINVAL;
1380        if (!capable(CAP_SYS_ADMIN))
1381                return -EPERM;
1382        if (copy_from_user(NodeName, argp, sizeof(NodeName_type)))
1383                return -EFAULT;
1384        spin_lock_irqsave(&h->lock, flags);
1385        /* Update the field, and then ring the doorbell */
1386        for (i = 0; i < 16; i++)
1387                writeb(NodeName[i], &h->cfgtable->ServerName[i]);
1388        writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
1389        for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
1390                if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
1391                        break;
1392                udelay(1000); /* delay and try again */
1393        }
1394        spin_unlock_irqrestore(&h->lock, flags);
1395        if (i >= MAX_IOCTL_CONFIG_WAIT)
1396                return -EAGAIN;
1397        return 0;
1398}
1399
1400static int cciss_getheartbeat(ctlr_info_t *h, void __user *argp)
1401{
1402        Heartbeat_type heartbeat;
1403        unsigned long flags;
1404
1405        if (!argp)
1406                return -EINVAL;
1407        spin_lock_irqsave(&h->lock, flags);
1408        heartbeat = readl(&h->cfgtable->HeartBeat);
1409        spin_unlock_irqrestore(&h->lock, flags);
1410        if (copy_to_user(argp, &heartbeat, sizeof(Heartbeat_type)))
1411                return -EFAULT;
1412        return 0;
1413}
1414
1415static int cciss_getbustypes(ctlr_info_t *h, void __user *argp)
1416{
1417        BusTypes_type BusTypes;
1418        unsigned long flags;
1419
1420        if (!argp)
1421                return -EINVAL;
1422        spin_lock_irqsave(&h->lock, flags);
1423        BusTypes = readl(&h->cfgtable->BusTypes);
1424        spin_unlock_irqrestore(&h->lock, flags);
1425        if (copy_to_user(argp, &BusTypes, sizeof(BusTypes_type)))
1426                return -EFAULT;
1427        return 0;
1428}
1429
1430static int cciss_getfirmver(ctlr_info_t *h, void __user *argp)
1431{
1432        FirmwareVer_type firmware;
1433
1434        if (!argp)
1435                return -EINVAL;
1436        memcpy(firmware, h->firm_ver, 4);
1437
1438        if (copy_to_user
1439            (argp, firmware, sizeof(FirmwareVer_type)))
1440                return -EFAULT;
1441        return 0;
1442}
1443
1444static int cciss_getdrivver(ctlr_info_t *h, void __user *argp)
1445{
1446        DriverVer_type DriverVer = DRIVER_VERSION;
1447
1448        if (!argp)
1449                return -EINVAL;
1450        if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
1451                return -EFAULT;
1452        return 0;
1453}
1454
1455static int cciss_getluninfo(ctlr_info_t *h,
1456        struct gendisk *disk, void __user *argp)
1457{
1458        LogvolInfo_struct luninfo;
1459        drive_info_struct *drv = get_drv(disk);
1460
1461        if (!argp)
1462                return -EINVAL;
1463        memcpy(&luninfo.LunID, drv->LunID, sizeof(luninfo.LunID));
1464        luninfo.num_opens = drv->usage_count;
1465        luninfo.num_parts = 0;
1466        if (copy_to_user(argp, &luninfo, sizeof(LogvolInfo_struct)))
1467                return -EFAULT;
1468        return 0;
1469}
1470
1471static int cciss_passthru(ctlr_info_t *h, void __user *argp)
1472{
1473        IOCTL_Command_struct iocommand;
1474        CommandList_struct *c;
1475        char *buff = NULL;
1476        u64bit temp64;
1477        DECLARE_COMPLETION_ONSTACK(wait);
1478
1479        if (!argp)
1480                return -EINVAL;
1481
1482        if (!capable(CAP_SYS_RAWIO))
1483                return -EPERM;
1484
1485        if (copy_from_user
1486            (&iocommand, argp, sizeof(IOCTL_Command_struct)))
1487                return -EFAULT;
1488        if ((iocommand.buf_size < 1) &&
1489            (iocommand.Request.Type.Direction != XFER_NONE)) {
1490                return -EINVAL;
1491        }
1492        if (iocommand.buf_size > 0) {
1493                buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
1494                if (buff == NULL)
1495                        return -EFAULT;
1496        }
1497        if (iocommand.Request.Type.Direction == XFER_WRITE) {
1498                /* Copy the data into the buffer we created */
1499                if (copy_from_user(buff, iocommand.buf, iocommand.buf_size)) {
1500                        kfree(buff);
1501                        return -EFAULT;
1502                }
1503        } else {
1504                memset(buff, 0, iocommand.buf_size);
1505        }
1506        c = cmd_special_alloc(h);
1507        if (!c) {
1508                kfree(buff);
1509                return -ENOMEM;
1510        }
1511        /* Fill in the command type */
1512        c->cmd_type = CMD_IOCTL_PEND;
1513        /* Fill in Command Header */
1514        c->Header.ReplyQueue = 0;   /* unused in simple mode */
1515        if (iocommand.buf_size > 0) { /* buffer to fill */
1516                c->Header.SGList = 1;
1517                c->Header.SGTotal = 1;
1518        } else { /* no buffers to fill */
1519                c->Header.SGList = 0;
1520                c->Header.SGTotal = 0;
1521        }
1522        c->Header.LUN = iocommand.LUN_info;
1523        /* use the kernel address the cmd block for tag */
1524        c->Header.Tag.lower = c->busaddr;
1525
1526        /* Fill in Request block */
1527        c->Request = iocommand.Request;
1528
1529        /* Fill in the scatter gather information */
1530        if (iocommand.buf_size > 0) {
1531                temp64.val = pci_map_single(h->pdev, buff,
1532                        iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
1533                c->SG[0].Addr.lower = temp64.val32.lower;
1534                c->SG[0].Addr.upper = temp64.val32.upper;
1535                c->SG[0].Len = iocommand.buf_size;
1536                c->SG[0].Ext = 0;  /* we are not chaining */
1537        }
1538        c->waiting = &wait;
1539
1540        enqueue_cmd_and_start_io(h, c);
1541        wait_for_completion(&wait);
1542
1543        /* unlock the buffers from DMA */
1544        temp64.val32.lower = c->SG[0].Addr.lower;
1545        temp64.val32.upper = c->SG[0].Addr.upper;
1546        pci_unmap_single(h->pdev, (dma_addr_t) temp64.val, iocommand.buf_size,
1547                         PCI_DMA_BIDIRECTIONAL);
1548        check_ioctl_unit_attention(h, c);
1549
1550        /* Copy the error information out */
1551        iocommand.error_info = *(c->err_info);
1552        if (copy_to_user(argp, &iocommand, sizeof(IOCTL_Command_struct))) {
1553                kfree(buff);
1554                cmd_special_free(h, c);
1555                return -EFAULT;
1556        }
1557
1558        if (iocommand.Request.Type.Direction == XFER_READ) {
1559                /* Copy the data out of the buffer we created */
1560                if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
1561                        kfree(buff);
1562                        cmd_special_free(h, c);
1563                        return -EFAULT;
1564                }
1565        }
1566        kfree(buff);
1567        cmd_special_free(h, c);
1568        return 0;
1569}
1570
1571static int cciss_bigpassthru(ctlr_info_t *h, void __user *argp)
1572{
1573        BIG_IOCTL_Command_struct *ioc;
1574        CommandList_struct *c;
1575        unsigned char **buff = NULL;
1576        int *buff_size = NULL;
1577        u64bit temp64;
1578        BYTE sg_used = 0;
1579        int status = 0;
1580        int i;
1581        DECLARE_COMPLETION_ONSTACK(wait);
1582        __u32 left;
1583        __u32 sz;
1584        BYTE __user *data_ptr;
1585
1586        if (!argp)
1587                return -EINVAL;
1588        if (!capable(CAP_SYS_RAWIO))
1589                return -EPERM;
1590        ioc = kmalloc(sizeof(*ioc), GFP_KERNEL);
1591        if (!ioc) {
1592                status = -ENOMEM;
1593                goto cleanup1;
1594        }
1595        if (copy_from_user(ioc, argp, sizeof(*ioc))) {
1596                status = -EFAULT;
1597                goto cleanup1;
1598        }
1599        if ((ioc->buf_size < 1) &&
1600            (ioc->Request.Type.Direction != XFER_NONE)) {
1601                status = -EINVAL;
1602                goto cleanup1;
1603        }
1604        /* Check kmalloc limits  using all SGs */
1605        if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
1606                status = -EINVAL;
1607                goto cleanup1;
1608        }
1609        if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
1610                status = -EINVAL;
1611                goto cleanup1;
1612        }
1613        buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
1614        if (!buff) {
1615                status = -ENOMEM;
1616                goto cleanup1;
1617        }
1618        buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL);
1619        if (!buff_size) {
1620                status = -ENOMEM;
1621                goto cleanup1;
1622        }
1623        left = ioc->buf_size;
1624        data_ptr = ioc->buf;
1625        while (left) {
1626                sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
1627                buff_size[sg_used] = sz;
1628                buff[sg_used] = kmalloc(sz, GFP_KERNEL);
1629                if (buff[sg_used] == NULL) {
1630                        status = -ENOMEM;
1631                        goto cleanup1;
1632                }
1633                if (ioc->Request.Type.Direction == XFER_WRITE) {
1634                        if (copy_from_user(buff[sg_used], data_ptr, sz)) {
1635                                status = -EFAULT;
1636                                goto cleanup1;
1637                        }
1638                } else {
1639                        memset(buff[sg_used], 0, sz);
1640                }
1641                left -= sz;
1642                data_ptr += sz;
1643                sg_used++;
1644        }
1645        c = cmd_special_alloc(h);
1646        if (!c) {
1647                status = -ENOMEM;
1648                goto cleanup1;
1649        }
1650        c->cmd_type = CMD_IOCTL_PEND;
1651        c->Header.ReplyQueue = 0;
1652        c->Header.SGList = sg_used;
1653        c->Header.SGTotal = sg_used;
1654        c->Header.LUN = ioc->LUN_info;
1655        c->Header.Tag.lower = c->busaddr;
1656
1657        c->Request = ioc->Request;
1658        for (i = 0; i < sg_used; i++) {
1659                temp64.val = pci_map_single(h->pdev, buff[i], buff_size[i],
1660                                    PCI_DMA_BIDIRECTIONAL);
1661                c->SG[i].Addr.lower = temp64.val32.lower;
1662                c->SG[i].Addr.upper = temp64.val32.upper;
1663                c->SG[i].Len = buff_size[i];
1664                c->SG[i].Ext = 0;       /* we are not chaining */
1665        }
1666        c->waiting = &wait;
1667        enqueue_cmd_and_start_io(h, c);
1668        wait_for_completion(&wait);
1669        /* unlock the buffers from DMA */
1670        for (i = 0; i < sg_used; i++) {
1671                temp64.val32.lower = c->SG[i].Addr.lower;
1672                temp64.val32.upper = c->SG[i].Addr.upper;
1673                pci_unmap_single(h->pdev,
1674                        (dma_addr_t) temp64.val, buff_size[i],
1675                        PCI_DMA_BIDIRECTIONAL);
1676        }
1677        check_ioctl_unit_attention(h, c);
1678        /* Copy the error information out */
1679        ioc->error_info = *(c->err_info);
1680        if (copy_to_user(argp, ioc, sizeof(*ioc))) {
1681                cmd_special_free(h, c);
1682                status = -EFAULT;
1683                goto cleanup1;
1684        }
1685        if (ioc->Request.Type.Direction == XFER_READ) {
1686                /* Copy the data out of the buffer we created */
1687                BYTE __user *ptr = ioc->buf;
1688                for (i = 0; i < sg_used; i++) {
1689                        if (copy_to_user(ptr, buff[i], buff_size[i])) {
1690                                cmd_special_free(h, c);
1691                                status = -EFAULT;
1692                                goto cleanup1;
1693                        }
1694                        ptr += buff_size[i];
1695                }
1696        }
1697        cmd_special_free(h, c);
1698        status = 0;
1699cleanup1:
1700        if (buff) {
1701                for (i = 0; i < sg_used; i++)
1702                        kfree(buff[i]);
1703                kfree(buff);
1704        }
1705        kfree(buff_size);
1706        kfree(ioc);
1707        return status;
1708}
1709
1710static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
1711        unsigned int cmd, unsigned long arg)
1712{
1713        struct gendisk *disk = bdev->bd_disk;
1714        ctlr_info_t *h = get_host(disk);
1715        void __user *argp = (void __user *)arg;
1716
1717        dev_dbg(&h->pdev->dev, "cciss_ioctl: Called with cmd=%x %lx\n",
1718                cmd, arg);
1719        switch (cmd) {
1720        case CCISS_GETPCIINFO:
1721                return cciss_getpciinfo(h, argp);
1722        case CCISS_GETINTINFO:
1723                return cciss_getintinfo(h, argp);
1724        case CCISS_SETINTINFO:
1725                return cciss_setintinfo(h, argp);
1726        case CCISS_GETNODENAME:
1727                return cciss_getnodename(h, argp);
1728        case CCISS_SETNODENAME:
1729                return cciss_setnodename(h, argp);
1730        case CCISS_GETHEARTBEAT:
1731                return cciss_getheartbeat(h, argp);
1732        case CCISS_GETBUSTYPES:
1733                return cciss_getbustypes(h, argp);
1734        case CCISS_GETFIRMVER:
1735                return cciss_getfirmver(h, argp);
1736        case CCISS_GETDRIVVER:
1737                return cciss_getdrivver(h, argp);
1738        case CCISS_DEREGDISK:
1739        case CCISS_REGNEWD:
1740        case CCISS_REVALIDVOLS:
1741                return rebuild_lun_table(h, 0, 1);
1742        case CCISS_GETLUNINFO:
1743                return cciss_getluninfo(h, disk, argp);
1744        case CCISS_PASSTHRU:
1745                return cciss_passthru(h, argp);
1746        case CCISS_BIG_PASSTHRU:
1747                return cciss_bigpassthru(h, argp);
1748
1749        /* scsi_cmd_blk_ioctl handles these, below, though some are not */
1750        /* very meaningful for cciss.  SG_IO is the main one people want. */
1751
1752        case SG_GET_VERSION_NUM:
1753        case SG_SET_TIMEOUT:
1754        case SG_GET_TIMEOUT:
1755        case SG_GET_RESERVED_SIZE:
1756        case SG_SET_RESERVED_SIZE:
1757        case SG_EMULATED_HOST:
1758        case SG_IO:
1759        case SCSI_IOCTL_SEND_COMMAND:
1760                return scsi_cmd_blk_ioctl(bdev, mode, cmd, argp);
1761
1762        /* scsi_cmd_blk_ioctl would normally handle these, below, but */
1763        /* they aren't a good fit for cciss, as CD-ROMs are */
1764        /* not supported, and we don't have any bus/target/lun */
1765        /* which we present to the kernel. */
1766
1767        case CDROM_SEND_PACKET:
1768        case CDROMCLOSETRAY:
1769        case CDROMEJECT:
1770        case SCSI_IOCTL_GET_IDLUN:
1771        case SCSI_IOCTL_GET_BUS_NUMBER:
1772        default:
1773                return -ENOTTY;
1774        }
1775}
1776
1777static void cciss_check_queues(ctlr_info_t *h)
1778{
1779        int start_queue = h->next_to_run;
1780        int i;
1781
1782        /* check to see if we have maxed out the number of commands that can
1783         * be placed on the queue.  If so then exit.  We do this check here
1784         * in case the interrupt we serviced was from an ioctl and did not
1785         * free any new commands.
1786         */
1787        if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds)
1788                return;
1789
1790        /* We have room on the queue for more commands.  Now we need to queue
1791         * them up.  We will also keep track of the next queue to run so
1792         * that every queue gets a chance to be started first.
1793         */
1794        for (i = 0; i < h->highest_lun + 1; i++) {
1795                int curr_queue = (start_queue + i) % (h->highest_lun + 1);
1796                /* make sure the disk has been added and the drive is real
1797                 * because this can be called from the middle of init_one.
1798                 */
1799                if (!h->drv[curr_queue])
1800                        continue;
1801                if (!(h->drv[curr_queue]->queue) ||
1802                        !(h->drv[curr_queue]->heads))
1803                        continue;
1804                blk_start_queue(h->gendisk[curr_queue]->queue);
1805
1806                /* check to see if we have maxed out the number of commands
1807                 * that can be placed on the queue.
1808                 */
1809                if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds) {
1810                        if (curr_queue == start_queue) {
1811                                h->next_to_run =
1812                                    (start_queue + 1) % (h->highest_lun + 1);
1813                                break;
1814                        } else {
1815                                h->next_to_run = curr_queue;
1816                                break;
1817                        }
1818                }
1819        }
1820}
1821
1822static void cciss_softirq_done(struct request *rq)
1823{
1824        CommandList_struct *c = rq->completion_data;
1825        ctlr_info_t *h = hba[c->ctlr];
1826        SGDescriptor_struct *curr_sg = c->SG;
1827        u64bit temp64;
1828        unsigned long flags;
1829        int i, ddir;
1830        int sg_index = 0;
1831
1832        if (c->Request.Type.Direction == XFER_READ)
1833                ddir = PCI_DMA_FROMDEVICE;
1834        else
1835                ddir = PCI_DMA_TODEVICE;
1836
1837        /* command did not need to be retried */
1838        /* unmap the DMA mapping for all the scatter gather elements */
1839        for (i = 0; i < c->Header.SGList; i++) {
1840                if (curr_sg[sg_index].Ext == CCISS_SG_CHAIN) {
1841                        cciss_unmap_sg_chain_block(h, c);
1842                        /* Point to the next block */
1843                        curr_sg = h->cmd_sg_list[c->cmdindex];
1844                        sg_index = 0;
1845                }
1846                temp64.val32.lower = curr_sg[sg_index].Addr.lower;
1847                temp64.val32.upper = curr_sg[sg_index].Addr.upper;
1848                pci_unmap_page(h->pdev, temp64.val, curr_sg[sg_index].Len,
1849                                ddir);
1850                ++sg_index;
1851        }
1852
1853        dev_dbg(&h->pdev->dev, "Done with %p\n", rq);
1854
1855        /* set the residual count for pc requests */
1856        if (rq->cmd_type == REQ_TYPE_BLOCK_PC)
1857                rq->resid_len = c->err_info->ResidualCnt;
1858
1859        blk_end_request_all(rq, (rq->errors == 0) ? 0 : -EIO);
1860
1861        spin_lock_irqsave(&h->lock, flags);
1862        cmd_free(h, c);
1863        cciss_check_queues(h);
1864        spin_unlock_irqrestore(&h->lock, flags);
1865}
1866
1867static inline void log_unit_to_scsi3addr(ctlr_info_t *h,
1868        unsigned char scsi3addr[], uint32_t log_unit)
1869{
1870        memcpy(scsi3addr, h->drv[log_unit]->LunID,
1871                sizeof(h->drv[log_unit]->LunID));
1872}
1873
1874/* This function gets the SCSI vendor, model, and revision of a logical drive
1875 * via the inquiry page 0.  Model, vendor, and rev are set to empty strings if
1876 * they cannot be read.
1877 */
1878static void cciss_get_device_descr(ctlr_info_t *h, int logvol,
1879                                   char *vendor, char *model, char *rev)
1880{
1881        int rc;
1882        InquiryData_struct *inq_buf;
1883        unsigned char scsi3addr[8];
1884
1885        *vendor = '\0';
1886        *model = '\0';
1887        *rev = '\0';
1888
1889        inq_buf = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
1890        if (!inq_buf)
1891                return;
1892
1893        log_unit_to_scsi3addr(h, scsi3addr, logvol);
1894        rc = sendcmd_withirq(h, CISS_INQUIRY, inq_buf, sizeof(*inq_buf), 0,
1895                        scsi3addr, TYPE_CMD);
1896        if (rc == IO_OK) {
1897                memcpy(vendor, &inq_buf->data_byte[8], VENDOR_LEN);
1898                vendor[VENDOR_LEN] = '\0';
1899                memcpy(model, &inq_buf->data_byte[16], MODEL_LEN);
1900                model[MODEL_LEN] = '\0';
1901                memcpy(rev, &inq_buf->data_byte[32], REV_LEN);
1902                rev[REV_LEN] = '\0';
1903        }
1904
1905        kfree(inq_buf);
1906        return;
1907}
1908
1909/* This function gets the serial number of a logical drive via
1910 * inquiry page 0x83.  Serial no. is 16 bytes.  If the serial
1911 * number cannot be had, for whatever reason, 16 bytes of 0xff
1912 * are returned instead.
1913 */
1914static void cciss_get_serial_no(ctlr_info_t *h, int logvol,
1915                                unsigned char *serial_no, int buflen)
1916{
1917#define PAGE_83_INQ_BYTES 64
1918        int rc;
1919        unsigned char *buf;
1920        unsigned char scsi3addr[8];
1921
1922        if (buflen > 16)
1923                buflen = 16;
1924        memset(serial_no, 0xff, buflen);
1925        buf = kzalloc(PAGE_83_INQ_BYTES, GFP_KERNEL);
1926        if (!buf)
1927                return;
1928        memset(serial_no, 0, buflen);
1929        log_unit_to_scsi3addr(h, scsi3addr, logvol);
1930        rc = sendcmd_withirq(h, CISS_INQUIRY, buf,
1931                PAGE_83_INQ_BYTES, 0x83, scsi3addr, TYPE_CMD);
1932        if (rc == IO_OK)
1933                memcpy(serial_no, &buf[8], buflen);
1934        kfree(buf);
1935        return;
1936}
1937
1938/*
1939 * cciss_add_disk sets up the block device queue for a logical drive
1940 */
1941static int cciss_add_disk(ctlr_info_t *h, struct gendisk *disk,
1942                                int drv_index)
1943{
1944        disk->queue = blk_init_queue(do_cciss_request, &h->lock);
1945        if (!disk->queue)
1946                goto init_queue_failure;
1947        sprintf(disk->disk_name, "cciss/c%dd%d", h->ctlr, drv_index);
1948        disk->major = h->major;
1949        disk->first_minor = drv_index << NWD_SHIFT;
1950        disk->fops = &cciss_fops;
1951        if (cciss_create_ld_sysfs_entry(h, drv_index))
1952                goto cleanup_queue;
1953        disk->private_data = h->drv[drv_index];
1954        disk->driverfs_dev = &h->drv[drv_index]->dev;
1955
1956        /* Set up queue information */
1957        blk_queue_bounce_limit(disk->queue, h->pdev->dma_mask);
1958
1959        /* This is a hardware imposed limit. */
1960        blk_queue_max_segments(disk->queue, h->maxsgentries);
1961
1962        blk_queue_max_hw_sectors(disk->queue, h->cciss_max_sectors);
1963
1964        blk_queue_softirq_done(disk->queue, cciss_softirq_done);
1965
1966        disk->queue->queuedata = h;
1967
1968        blk_queue_logical_block_size(disk->queue,
1969                                     h->drv[drv_index]->block_size);
1970
1971        /* Make sure all queue data is written out before */
1972        /* setting h->drv[drv_index]->queue, as setting this */
1973        /* allows the interrupt handler to start the queue */
1974        wmb();
1975        h->drv[drv_index]->queue = disk->queue;
1976        add_disk(disk);
1977        return 0;
1978
1979cleanup_queue:
1980        blk_cleanup_queue(disk->queue);
1981        disk->queue = NULL;
1982init_queue_failure:
1983        return -1;
1984}
1985
1986/* This function will check the usage_count of the drive to be updated/added.
1987 * If the usage_count is zero and it is a heretofore unknown drive, or,
1988 * the drive's capacity, geometry, or serial number has changed,
1989 * then the drive information will be updated and the disk will be
1990 * re-registered with the kernel.  If these conditions don't hold,
1991 * then it will be left alone for the next reboot.  The exception to this
1992 * is disk 0 which will always be left registered with the kernel since it
1993 * is also the controller node.  Any changes to disk 0 will show up on
1994 * the next reboot.
1995 */
1996static void cciss_update_drive_info(ctlr_info_t *h, int drv_index,
1997        int first_time, int via_ioctl)
1998{
1999        struct gendisk *disk;
2000        InquiryData_struct *inq_buff = NULL;
2001        unsigned int block_size;
2002        sector_t total_size;
2003        unsigned long flags = 0;
2004        int ret = 0;
2005        drive_info_struct *drvinfo;
2006
2007        /* Get information about the disk and modify the driver structure */
2008        inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
2009        drvinfo = kzalloc(sizeof(*drvinfo), GFP_KERNEL);
2010        if (inq_buff == NULL || drvinfo == NULL)
2011                goto mem_msg;
2012
2013        /* testing to see if 16-byte CDBs are already being used */
2014        if (h->cciss_read == CCISS_READ_16) {
2015                cciss_read_capacity_16(h, drv_index,
2016                        &total_size, &block_size);
2017
2018        } else {
2019                cciss_read_capacity(h, drv_index, &total_size, &block_size);
2020                /* if read_capacity returns all F's this volume is >2TB */
2021                /* in size so we switch to 16-byte CDB's for all */
2022                /* read/write ops */
2023                if (total_size == 0xFFFFFFFFULL) {
2024                        cciss_read_capacity_16(h, drv_index,
2025                        &total_size, &block_size);
2026                        h->cciss_read = CCISS_READ_16;
2027                        h->cciss_write = CCISS_WRITE_16;
2028                } else {
2029                        h->cciss_read = CCISS_READ_10;
2030                        h->cciss_write = CCISS_WRITE_10;
2031                }
2032        }
2033
2034        cciss_geometry_inquiry(h, drv_index, total_size, block_size,
2035                               inq_buff, drvinfo);
2036        drvinfo->block_size = block_size;
2037        drvinfo->nr_blocks = total_size + 1;
2038
2039        cciss_get_device_descr(h, drv_index, drvinfo->vendor,
2040                                drvinfo->model, drvinfo->rev);
2041        cciss_get_serial_no(h, drv_index, drvinfo->serial_no,
2042                        sizeof(drvinfo->serial_no));
2043        /* Save the lunid in case we deregister the disk, below. */
2044        memcpy(drvinfo->LunID, h->drv[drv_index]->LunID,
2045                sizeof(drvinfo->LunID));
2046
2047        /* Is it the same disk we already know, and nothing's changed? */
2048        if (h->drv[drv_index]->raid_level != -1 &&
2049                ((memcmp(drvinfo->serial_no,
2050                                h->drv[drv_index]->serial_no, 16) == 0) &&
2051                drvinfo->block_size == h->drv[drv_index]->block_size &&
2052                drvinfo->nr_blocks == h->drv[drv_index]->nr_blocks &&
2053                drvinfo->heads == h->drv[drv_index]->heads &&
2054                drvinfo->sectors == h->drv[drv_index]->sectors &&
2055                drvinfo->cylinders == h->drv[drv_index]->cylinders))
2056                        /* The disk is unchanged, nothing to update */
2057                        goto freeret;
2058
2059        /* If we get here it's not the same disk, or something's changed,
2060         * so we need to * deregister it, and re-register it, if it's not
2061         * in use.
2062         * If the disk already exists then deregister it before proceeding
2063         * (unless it's the first disk (for the controller node).
2064         */
2065        if (h->drv[drv_index]->raid_level != -1 && drv_index != 0) {
2066                dev_warn(&h->pdev->dev, "disk %d has changed.\n", drv_index);
2067                spin_lock_irqsave(&h->lock, flags);
2068                h->drv[drv_index]->busy_configuring = 1;
2069                spin_unlock_irqrestore(&h->lock, flags);
2070
2071                /* deregister_disk sets h->drv[drv_index]->queue = NULL
2072                 * which keeps the interrupt handler from starting
2073                 * the queue.
2074                 */
2075                ret = deregister_disk(h, drv_index, 0, via_ioctl);
2076        }
2077
2078        /* If the disk is in use return */
2079        if (ret)
2080                goto freeret;
2081
2082        /* Save the new information from cciss_geometry_inquiry
2083         * and serial number inquiry.  If the disk was deregistered
2084         * above, then h->drv[drv_index] will be NULL.
2085         */
2086        if (h->drv[drv_index] == NULL) {
2087                drvinfo->device_initialized = 0;
2088                h->drv[drv_index] = drvinfo;
2089                drvinfo = NULL; /* so it won't be freed below. */
2090        } else {
2091                /* special case for cxd0 */
2092                h->drv[drv_index]->block_size = drvinfo->block_size;
2093                h->drv[drv_index]->nr_blocks = drvinfo->nr_blocks;
2094                h->drv[drv_index]->heads = drvinfo->heads;
2095                h->drv[drv_index]->sectors = drvinfo->sectors;
2096                h->drv[drv_index]->cylinders = drvinfo->cylinders;
2097                h->drv[drv_index]->raid_level = drvinfo->raid_level;
2098                memcpy(h->drv[drv_index]->serial_no, drvinfo->serial_no, 16);
2099                memcpy(h->drv[drv_index]->vendor, drvinfo->vendor,
2100                        VENDOR_LEN + 1);
2101                memcpy(h->drv[drv_index]->model, drvinfo->model, MODEL_LEN + 1);
2102                memcpy(h->drv[drv_index]->rev, drvinfo->rev, REV_LEN + 1);
2103        }
2104
2105        ++h->num_luns;
2106        disk = h->gendisk[drv_index];
2107        set_capacity(disk, h->drv[drv_index]->nr_blocks);
2108
2109        /* If it's not disk 0 (drv_index != 0)
2110         * or if it was disk 0, but there was previously
2111         * no actual corresponding configured logical drive
2112         * (raid_leve == -1) then we want to update the
2113         * logical drive's information.
2114         */
2115        if (drv_index || first_time) {
2116                if (cciss_add_disk(h, disk, drv_index) != 0) {
2117                        cciss_free_gendisk(h, drv_index);
2118                        cciss_free_drive_info(h, drv_index);
2119                        dev_warn(&h->pdev->dev, "could not update disk %d\n",
2120                                drv_index);
2121                        --h->num_luns;
2122                }
2123        }
2124
2125freeret:
2126        kfree(inq_buff);
2127        kfree(drvinfo);
2128        return;
2129mem_msg:
2130        dev_err(&h->pdev->dev, "out of memory\n");
2131        goto freeret;
2132}
2133
2134/* This function will find the first index of the controllers drive array
2135 * that has a null drv pointer and allocate the drive info struct and
2136 * will return that index   This is where new drives will be added.
2137 * If the index to be returned is greater than the highest_lun index for
2138 * the controller then highest_lun is set * to this new index.
2139 * If there are no available indexes or if tha allocation fails, then -1
2140 * is returned.  * "controller_node" is used to know if this is a real
2141 * logical drive, or just the controller node, which determines if this
2142 * counts towards highest_lun.
2143 */
2144static int cciss_alloc_drive_info(ctlr_info_t *h, int controller_node)
2145{
2146        int i;
2147        drive_info_struct *drv;
2148
2149        /* Search for an empty slot for our drive info */
2150        for (i = 0; i < CISS_MAX_LUN; i++) {
2151
2152                /* if not cxd0 case, and it's occupied, skip it. */
2153                if (h->drv[i] && i != 0)
2154                        continue;
2155                /*
2156                 * If it's cxd0 case, and drv is alloc'ed already, and a
2157                 * disk is configured there, skip it.
2158                 */
2159                if (i == 0 && h->drv[i] && h->drv[i]->raid_level != -1)
2160                        continue;
2161
2162                /*
2163                 * We've found an empty slot.  Update highest_lun
2164                 * provided this isn't just the fake cxd0 controller node.
2165                 */
2166                if (i > h->highest_lun && !controller_node)
2167                        h->highest_lun = i;
2168
2169                /* If adding a real disk at cxd0, and it's already alloc'ed */
2170                if (i == 0 && h->drv[i] != NULL)
2171                        return i;
2172
2173                /*
2174                 * Found an empty slot, not already alloc'ed.  Allocate it.
2175                 * Mark it with raid_level == -1, so we know it's new later on.
2176                 */
2177                drv = kzalloc(sizeof(*drv), GFP_KERNEL);
2178                if (!drv)
2179                        return -1;
2180                drv->raid_level = -1; /* so we know it's new */
2181                h->drv[i] = drv;
2182                return i;
2183        }
2184        return -1;
2185}
2186
2187static void cciss_free_drive_info(ctlr_info_t *h, int drv_index)
2188{
2189        kfree(h->drv[drv_index]);
2190        h->drv[drv_index] = NULL;
2191}
2192
2193static void cciss_free_gendisk(ctlr_info_t *h, int drv_index)
2194{
2195        put_disk(h->gendisk[drv_index]);
2196        h->gendisk[drv_index] = NULL;
2197}
2198
2199/* cciss_add_gendisk finds a free hba[]->drv structure
2200 * and allocates a gendisk if needed, and sets the lunid
2201 * in the drvinfo structure.   It returns the index into
2202 * the ->drv[] array, or -1 if none are free.
2203 * is_controller_node indicates whether highest_lun should
2204 * count this disk, or if it's only being added to provide
2205 * a means to talk to the controller in case no logical
2206 * drives have yet been configured.
2207 */
2208static int cciss_add_gendisk(ctlr_info_t *h, unsigned char lunid[],
2209        int controller_node)
2210{
2211        int drv_index;
2212
2213        drv_index = cciss_alloc_drive_info(h, controller_node);
2214        if (drv_index == -1)
2215                return -1;
2216
2217        /*Check if the gendisk needs to be allocated */
2218        if (!h->gendisk[drv_index]) {
2219                h->gendisk[drv_index] =
2220                        alloc_disk(1 << NWD_SHIFT);
2221                if (!h->gendisk[drv_index]) {
2222                        dev_err(&h->pdev->dev,
2223                                "could not allocate a new disk %d\n",
2224                                drv_index);
2225                        goto err_free_drive_info;
2226                }
2227        }
2228        memcpy(h->drv[drv_index]->LunID, lunid,
2229                sizeof(h->drv[drv_index]->LunID));
2230        if (cciss_create_ld_sysfs_entry(h, drv_index))
2231                goto err_free_disk;
2232        /* Don't need to mark this busy because nobody */
2233        /* else knows about this disk yet to contend */
2234        /* for access to it. */
2235        h->drv[drv_index]->busy_configuring = 0;
2236        wmb();
2237        return drv_index;
2238
2239err_free_disk:
2240        cciss_free_gendisk(h, drv_index);
2241err_free_drive_info:
2242        cciss_free_drive_info(h, drv_index);
2243        return -1;
2244}
2245
2246/* This is for the special case of a controller which
2247 * has no logical drives.  In this case, we still need
2248 * to register a disk so the controller can be accessed
2249 * by the Array Config Utility.
2250 */
2251static void cciss_add_controller_node(ctlr_info_t *h)
2252{
2253        struct gendisk *disk;
2254        int drv_index;
2255
2256        if (h->gendisk[0] != NULL) /* already did this? Then bail. */
2257                return;
2258
2259        drv_index = cciss_add_gendisk(h, CTLR_LUNID, 1);
2260        if (drv_index == -1)
2261                goto error;
2262        h->drv[drv_index]->block_size = 512;
2263        h->drv[drv_index]->nr_blocks = 0;
2264        h->drv[drv_index]->heads = 0;
2265        h->drv[drv_index]->sectors = 0;
2266        h->drv[drv_index]->cylinders = 0;
2267        h->drv[drv_index]->raid_level = -1;
2268        memset(h->drv[drv_index]->serial_no, 0, 16);
2269        disk = h->gendisk[drv_index];
2270        if (cciss_add_disk(h, disk, drv_index) == 0)
2271                return;
2272        cciss_free_gendisk(h, drv_index);
2273        cciss_free_drive_info(h, drv_index);
2274error:
2275        dev_warn(&h->pdev->dev, "could not add disk 0.\n");
2276        return;
2277}
2278
2279/* This function will add and remove logical drives from the Logical
2280 * drive array of the controller and maintain persistency of ordering
2281 * so that mount points are preserved until the next reboot.  This allows
2282 * for the removal of logical drives in the middle of the drive array
2283 * without a re-ordering of those drives.
2284 * INPUT
2285 * h            = The controller to perform the operations on
2286 */
2287static int rebuild_lun_table(ctlr_info_t *h, int first_time,
2288        int via_ioctl)
2289{
2290        int num_luns;
2291        ReportLunData_struct *ld_buff = NULL;
2292        int return_code;
2293        int listlength = 0;
2294        int i;
2295        int drv_found;
2296        int drv_index = 0;
2297        unsigned char lunid[8] = CTLR_LUNID;
2298        unsigned long flags;
2299
2300        if (!capable(CAP_SYS_RAWIO))
2301                return -EPERM;
2302
2303        /* Set busy_configuring flag for this operation */
2304        spin_lock_irqsave(&h->lock, flags);
2305        if (h->busy_configuring) {
2306                spin_unlock_irqrestore(&h->lock, flags);
2307                return -EBUSY;
2308        }
2309        h->busy_configuring = 1;
2310        spin_unlock_irqrestore(&h->lock, flags);
2311
2312        ld_buff = kzalloc(sizeof(ReportLunData_struct), GFP_KERNEL);
2313        if (ld_buff == NULL)
2314                goto mem_msg;
2315
2316        return_code = sendcmd_withirq(h, CISS_REPORT_LOG, ld_buff,
2317                                      sizeof(ReportLunData_struct),
2318                                      0, CTLR_LUNID, TYPE_CMD);
2319
2320        if (return_code == IO_OK)
2321                listlength = be32_to_cpu(*(__be32 *) ld_buff->LUNListLength);
2322        else {  /* reading number of logical volumes failed */
2323                dev_warn(&h->pdev->dev,
2324                        "report logical volume command failed\n");
2325                listlength = 0;
2326                goto freeret;
2327        }
2328
2329        num_luns = listlength / 8;      /* 8 bytes per entry */
2330        if (num_luns > CISS_MAX_LUN) {
2331                num_luns = CISS_MAX_LUN;
2332                dev_warn(&h->pdev->dev, "more luns configured"
2333                       " on controller than can be handled by"
2334                       " this driver.\n");
2335        }
2336
2337        if (num_luns == 0)
2338                cciss_add_controller_node(h);
2339
2340        /* Compare controller drive array to driver's drive array
2341         * to see if any drives are missing on the controller due
2342         * to action of Array Config Utility (user deletes drive)
2343         * and deregister logical drives which have disappeared.
2344         */
2345        for (i = 0; i <= h->highest_lun; i++) {
2346                int j;
2347                drv_found = 0;
2348
2349                /* skip holes in the array from already deleted drives */
2350                if (h->drv[i] == NULL)
2351                        continue;
2352
2353                for (j = 0; j < num_luns; j++) {
2354                        memcpy(lunid, &ld_buff->LUN[j][0], sizeof(lunid));
2355                        if (memcmp(h->drv[i]->LunID, lunid,
2356                                sizeof(lunid)) == 0) {
2357                                drv_found = 1;
2358                                break;
2359                        }
2360                }
2361                if (!drv_found) {
2362                        /* Deregister it from the OS, it's gone. */
2363                        spin_lock_irqsave(&h->lock, flags);
2364                        h->drv[i]->busy_configuring = 1;
2365                        spin_unlock_irqrestore(&h->lock, flags);
2366                        return_code = deregister_disk(h, i, 1, via_ioctl);
2367                        if (h->drv[i] != NULL)
2368                                h->drv[i]->busy_configuring = 0;
2369                }
2370        }
2371
2372        /* Compare controller drive array to driver's drive array.
2373         * Check for updates in the drive information and any new drives
2374         * on the controller due to ACU adding logical drives, or changing
2375         * a logical drive's size, etc.  Reregister any new/changed drives
2376         */
2377        for (i = 0; i < num_luns; i++) {
2378                int j;
2379
2380                drv_found = 0;
2381
2382                memcpy(lunid, &ld_buff->LUN[i][0], sizeof(lunid));
2383                /* Find if the LUN is already in the drive array
2384                 * of the driver.  If so then update its info
2385                 * if not in use.  If it does not exist then find
2386                 * the first free index and add it.
2387                 */
2388                for (j = 0; j <= h->highest_lun; j++) {
2389                        if (h->drv[j] != NULL &&
2390                                memcmp(h->drv[j]->LunID, lunid,
2391                                        sizeof(h->drv[j]->LunID)) == 0) {
2392                                drv_index = j;
2393                                drv_found = 1;
2394                                break;
2395                        }
2396                }
2397
2398                /* check if the drive was found already in the array */
2399                if (!drv_found) {
2400                        drv_index = cciss_add_gendisk(h, lunid, 0);
2401                        if (drv_index == -1)
2402                                goto freeret;
2403                }
2404                cciss_update_drive_info(h, drv_index, first_time, via_ioctl);
2405        }               /* end for */
2406
2407freeret:
2408        kfree(ld_buff);
2409        h->busy_configuring = 0;
2410        /* We return -1 here to tell the ACU that we have registered/updated
2411         * all of the drives that we can and to keep it from calling us
2412         * additional times.
2413         */
2414        return -1;
2415mem_msg:
2416        dev_err(&h->pdev->dev, "out of memory\n");
2417        h->busy_configuring = 0;
2418        goto freeret;
2419}
2420
2421static void cciss_clear_drive_info(drive_info_struct *drive_info)
2422{
2423        /* zero out the disk size info */
2424        drive_info->nr_blocks = 0;
2425        drive_info->block_size = 0;
2426        drive_info->heads = 0;
2427        drive_info->sectors = 0;
2428        drive_info->cylinders = 0;
2429        drive_info->raid_level = -1;
2430        memset(drive_info->serial_no, 0, sizeof(drive_info->serial_no));
2431        memset(drive_info->model, 0, sizeof(drive_info->model));
2432        memset(drive_info->rev, 0, sizeof(drive_info->rev));
2433        memset(drive_info->vendor, 0, sizeof(drive_info->vendor));
2434        /*
2435         * don't clear the LUNID though, we need to remember which
2436         * one this one is.
2437         */
2438}
2439
2440/* This function will deregister the disk and it's queue from the
2441 * kernel.  It must be called with the controller lock held and the
2442 * drv structures busy_configuring flag set.  It's parameters are:
2443 *
2444 * disk = This is the disk to be deregistered
2445 * drv  = This is the drive_info_struct associated with the disk to be
2446 *        deregistered.  It contains information about the disk used
2447 *        by the driver.
2448 * clear_all = This flag determines whether or not the disk information
2449 *             is going to be completely cleared out and the highest_lun
2450 *             reset.  Sometimes we want to clear out information about
2451 *             the disk in preparation for re-adding it.  In this case
2452 *             the highest_lun should be left unchanged and the LunID
2453 *             should not be cleared.
2454 * via_ioctl
2455 *    This indicates whether we've reached this path via ioctl.
2456 *    This affects the maximum usage count allowed for c0d0 to be messed with.
2457 *    If this path is reached via ioctl(), then the max_usage_count will
2458 *    be 1, as the process calling ioctl() has got to have the device open.
2459 *    If we get here via sysfs, then the max usage count will be zero.
2460*/
2461static int deregister_disk(ctlr_info_t *h, int drv_index,
2462                           int clear_all, int via_ioctl)
2463{
2464        int i;
2465        struct gendisk *disk;
2466        drive_info_struct *drv;
2467        int recalculate_highest_lun;
2468
2469        if (!capable(CAP_SYS_RAWIO))
2470                return -EPERM;
2471
2472        drv = h->drv[drv_index];
2473        disk = h->gendisk[drv_index];
2474
2475        /* make sure logical volume is NOT is use */
2476        if (clear_all || (h->gendisk[0] == disk)) {
2477                if (drv->usage_count > via_ioctl)
2478                        return -EBUSY;
2479        } else if (drv->usage_count > 0)
2480                return -EBUSY;
2481
2482        recalculate_highest_lun = (drv == h->drv[h->highest_lun]);
2483
2484        /* invalidate the devices and deregister the disk.  If it is disk
2485         * zero do not deregister it but just zero out it's values.  This
2486         * allows us to delete disk zero but keep the controller registered.
2487         */
2488        if (h->gendisk[0] != disk) {
2489                struct request_queue *q = disk->queue;
2490                if (disk->flags & GENHD_FL_UP) {
2491                        cciss_destroy_ld_sysfs_entry(h, drv_index, 0);
2492                        del_gendisk(disk);
2493                }
2494                if (q)
2495                        blk_cleanup_queue(q);
2496                /* If clear_all is set then we are deleting the logical
2497                 * drive, not just refreshing its info.  For drives
2498                 * other than disk 0 we will call put_disk.  We do not
2499                 * do this for disk 0 as we need it to be able to
2500                 * configure the controller.
2501                 */
2502                if (clear_all){
2503                        /* This isn't pretty, but we need to find the
2504                         * disk in our array and NULL our the pointer.
2505                         * This is so that we will call alloc_disk if
2506                         * this index is used again later.
2507                         */
2508                        for (i=0; i < CISS_MAX_LUN; i++){
2509                                if (h->gendisk[i] == disk) {
2510                                        h->gendisk[i] = NULL;
2511                                        break;
2512                                }
2513                        }
2514                        put_disk(disk);
2515                }
2516        } else {
2517                set_capacity(disk, 0);
2518                cciss_clear_drive_info(drv);
2519        }
2520
2521        --h->num_luns;
2522
2523        /* if it was the last disk, find the new hightest lun */
2524        if (clear_all && recalculate_highest_lun) {
2525                int newhighest = -1;
2526                for (i = 0; i <= h->highest_lun; i++) {
2527                        /* if the disk has size > 0, it is available */
2528                        if (h->drv[i] && h->drv[i]->heads)
2529                                newhighest = i;
2530                }
2531                h->highest_lun = newhighest;
2532        }
2533        return 0;
2534}
2535
2536static int fill_cmd(ctlr_info_t *h, CommandList_struct *c, __u8 cmd, void *buff,
2537                size_t size, __u8 page_code, unsigned char *scsi3addr,
2538                int cmd_type)
2539{
2540        u64bit buff_dma_handle;
2541        int status = IO_OK;
2542
2543        c->cmd_type = CMD_IOCTL_PEND;
2544        c->Header.ReplyQueue = 0;
2545        if (buff != NULL) {
2546                c->Header.SGList = 1;
2547                c->Header.SGTotal = 1;
2548        } else {
2549                c->Header.SGList = 0;
2550                c->Header.SGTotal = 0;
2551        }
2552        c->Header.Tag.lower = c->busaddr;
2553        memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
2554
2555        c->Request.Type.Type = cmd_type;
2556        if (cmd_type == TYPE_CMD) {
2557                switch (cmd) {
2558                case CISS_INQUIRY:
2559                        /* are we trying to read a vital product page */
2560                        if (page_code != 0) {
2561                                c->Request.CDB[1] = 0x01;
2562                                c->Request.CDB[2] = page_code;
2563                        }
2564                        c->Request.CDBLen = 6;
2565                        c->Request.Type.Attribute = ATTR_SIMPLE;
2566                        c->Request.Type.Direction = XFER_READ;
2567                        c->Request.Timeout = 0;
2568                        c->Request.CDB[0] = CISS_INQUIRY;
2569                        c->Request.CDB[4] = size & 0xFF;
2570                        break;
2571                case CISS_REPORT_LOG:
2572                case CISS_REPORT_PHYS:
2573                        /* Talking to controller so It's a physical command
2574                           mode = 00 target = 0.  Nothing to write.
2575                         */
2576                        c->Request.CDBLen = 12;
2577                        c->Request.Type.Attribute = ATTR_SIMPLE;
2578                        c->Request.Type.Direction = XFER_READ;
2579                        c->Request.Timeout = 0;
2580                        c->Request.CDB[0] = cmd;
2581                        c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
2582                        c->Request.CDB[7] = (size >> 16) & 0xFF;
2583                        c->Request.CDB[8] = (size >> 8) & 0xFF;
2584                        c->Request.CDB[9] = size & 0xFF;
2585                        break;
2586
2587                case CCISS_READ_CAPACITY:
2588                        c->Request.CDBLen = 10;
2589                        c->Request.Type.Attribute = ATTR_SIMPLE;
2590                        c->Request.Type.Direction = XFER_READ;
2591                        c->Request.Timeout = 0;
2592                        c->Request.CDB[0] = cmd;
2593                        break;
2594                case CCISS_READ_CAPACITY_16:
2595                        c->Request.CDBLen = 16;
2596                        c->Request.Type.Attribute = ATTR_SIMPLE;
2597                        c->Request.Type.Direction = XFER_READ;
2598                        c->Request.Timeout = 0;
2599                        c->Request.CDB[0] = cmd;
2600                        c->Request.CDB[1] = 0x10;
2601                        c->Request.CDB[10] = (size >> 24) & 0xFF;
2602                        c->Request.CDB[11] = (size >> 16) & 0xFF;
2603                        c->Request.CDB[12] = (size >> 8) & 0xFF;
2604                        c->Request.CDB[13] = size & 0xFF;
2605                        c->Request.Timeout = 0;
2606                        c->Request.CDB[0] = cmd;
2607                        break;
2608                case CCISS_CACHE_FLUSH:
2609                        c->Request.CDBLen = 12;
2610                        c->Request.Type.Attribute = ATTR_SIMPLE;
2611                        c->Request.Type.Direction = XFER_WRITE;
2612                        c->Request.Timeout = 0;
2613                        c->Request.CDB[0] = BMIC_WRITE;
2614                        c->Request.CDB[6] = BMIC_CACHE_FLUSH;
2615                        c->Request.CDB[7] = (size >> 8) & 0xFF;
2616                        c->Request.CDB[8] = size & 0xFF;
2617                        break;
2618                case TEST_UNIT_READY:
2619                        c->Request.CDBLen = 6;
2620                        c->Request.Type.Attribute = ATTR_SIMPLE;
2621                        c->Request.Type.Direction = XFER_NONE;
2622                        c->Request.Timeout = 0;
2623                        break;
2624                default:
2625                        dev_warn(&h->pdev->dev, "Unknown Command 0x%c\n", cmd);
2626                        return IO_ERROR;
2627                }
2628        } else if (cmd_type == TYPE_MSG) {
2629                switch (cmd) {
2630                case CCISS_ABORT_MSG:
2631                        c->Request.CDBLen = 12;
2632                        c->Request.Type.Attribute = ATTR_SIMPLE;
2633                        c->Request.Type.Direction = XFER_WRITE;
2634                        c->Request.Timeout = 0;
2635                        c->Request.CDB[0] = cmd;        /* abort */
2636                        c->Request.CDB[1] = 0;  /* abort a command */
2637                        /* buff contains the tag of the command to abort */
2638                        memcpy(&c->Request.CDB[4], buff, 8);
2639                        break;
2640                case CCISS_RESET_MSG:
2641                        c->Request.CDBLen = 16;
2642                        c->Request.Type.Attribute = ATTR_SIMPLE;
2643                        c->Request.Type.Direction = XFER_NONE;
2644                        c->Request.Timeout = 0;
2645                        memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
2646                        c->Request.CDB[0] = cmd;        /* reset */
2647                        c->Request.CDB[1] = CCISS_RESET_TYPE_TARGET;
2648                        break;
2649                case CCISS_NOOP_MSG:
2650                        c->Request.CDBLen = 1;
2651                        c->Request.Type.Attribute = ATTR_SIMPLE;
2652                        c->Request.Type.Direction = XFER_WRITE;
2653                        c->Request.Timeout = 0;
2654                        c->Request.CDB[0] = cmd;
2655                        break;
2656                default:
2657                        dev_warn(&h->pdev->dev,
2658                                "unknown message type %d\n", cmd);
2659                        return IO_ERROR;
2660                }
2661        } else {
2662                dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
2663                return IO_ERROR;
2664        }
2665        /* Fill in the scatter gather information */
2666        if (size > 0) {
2667                buff_dma_handle.val = (__u64) pci_map_single(h->pdev,
2668                                                             buff, size,
2669                                                             PCI_DMA_BIDIRECTIONAL);
2670                c->SG[0].Addr.lower = buff_dma_handle.val32.lower;
2671                c->SG[0].Addr.upper = buff_dma_handle.val32.upper;
2672                c->SG[0].Len = size;
2673                c->SG[0].Ext = 0;       /* we are not chaining */
2674        }
2675        return status;
2676}
2677
2678static int cciss_send_reset(ctlr_info_t *h, unsigned char *scsi3addr,
2679                            u8 reset_type)
2680{
2681        CommandList_struct *c;
2682        int return_status;
2683
2684        c = cmd_alloc(h);
2685        if (!c)
2686                return -ENOMEM;
2687        return_status = fill_cmd(h, c, CCISS_RESET_MSG, NULL, 0, 0,
2688                CTLR_LUNID, TYPE_MSG);
2689        c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
2690        if (return_status != IO_OK) {
2691                cmd_special_free(h, c);
2692                return return_status;
2693        }
2694        c->waiting = NULL;
2695        enqueue_cmd_and_start_io(h, c);
2696        /* Don't wait for completion, the reset won't complete.  Don't free
2697         * the command either.  This is the last command we will send before
2698         * re-initializing everything, so it doesn't matter and won't leak.
2699         */
2700        return 0;
2701}
2702
2703static int check_target_status(ctlr_info_t *h, CommandList_struct *c)
2704{
2705        switch (c->err_info->ScsiStatus) {
2706        case SAM_STAT_GOOD:
2707                return IO_OK;
2708        case SAM_STAT_CHECK_CONDITION:
2709                switch (0xf & c->err_info->SenseInfo[2]) {
2710                case 0: return IO_OK; /* no sense */
2711                case 1: return IO_OK; /* recovered error */
2712                default:
2713                        if (check_for_unit_attention(h, c))
2714                                return IO_NEEDS_RETRY;
2715                        dev_warn(&h->pdev->dev, "cmd 0x%02x "
2716                                "check condition, sense key = 0x%02x\n",
2717                                c->Request.CDB[0], c->err_info->SenseInfo[2]);
2718                }
2719                break;
2720        default:
2721                dev_warn(&h->pdev->dev, "cmd 0x%02x"
2722                        "scsi status = 0x%02x\n",
2723                        c->Request.CDB[0], c->err_info->ScsiStatus);
2724                break;
2725        }
2726        return IO_ERROR;
2727}
2728
2729static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c)
2730{
2731        int return_status = IO_OK;
2732
2733        if (c->err_info->CommandStatus == CMD_SUCCESS)
2734                return IO_OK;
2735
2736        switch (c->err_info->CommandStatus) {
2737        case CMD_TARGET_STATUS:
2738                return_status = check_target_status(h, c);
2739                break;
2740        case CMD_DATA_UNDERRUN:
2741        case CMD_DATA_OVERRUN:
2742                /* expected for inquiry and report lun commands */
2743                break;
2744        case CMD_INVALID:
2745                dev_warn(&h->pdev->dev, "cmd 0x%02x is "
2746                       "reported invalid\n", c->Request.CDB[0]);
2747                return_status = IO_ERROR;
2748                break;
2749        case CMD_PROTOCOL_ERR:
2750                dev_warn(&h->pdev->dev, "cmd 0x%02x has "
2751                       "protocol error\n", c->Request.CDB[0]);
2752                return_status = IO_ERROR;
2753                break;
2754        case CMD_HARDWARE_ERR:
2755                dev_warn(&h->pdev->dev, "cmd 0x%02x had "
2756                       " hardware error\n", c->Request.CDB[0]);
2757                return_status = IO_ERROR;
2758                break;
2759        case CMD_CONNECTION_LOST:
2760                dev_warn(&h->pdev->dev, "cmd 0x%02x had "
2761                       "connection lost\n", c->Request.CDB[0]);
2762                return_status = IO_ERROR;
2763                break;
2764        case CMD_ABORTED:
2765                dev_warn(&h->pdev->dev, "cmd 0x%02x was "
2766                       "aborted\n", c->Request.CDB[0]);
2767                return_status = IO_ERROR;
2768                break;
2769        case CMD_ABORT_FAILED:
2770                dev_warn(&h->pdev->dev, "cmd 0x%02x reports "
2771                       "abort failed\n", c->Request.CDB[0]);
2772                return_status = IO_ERROR;
2773                break;
2774        case CMD_UNSOLICITED_ABORT:
2775                dev_warn(&h->pdev->dev, "unsolicited abort 0x%02x\n",
2776                        c->Request.CDB[0]);
2777                return_status = IO_NEEDS_RETRY;
2778                break;
2779        case CMD_UNABORTABLE:
2780                dev_warn(&h->pdev->dev, "cmd unabortable\n");
2781                return_status = IO_ERROR;
2782                break;
2783        default:
2784                dev_warn(&h->pdev->dev, "cmd 0x%02x returned "
2785                       "unknown status %x\n", c->Request.CDB[0],
2786                       c->err_info->CommandStatus);
2787                return_status = IO_ERROR;
2788        }
2789        return return_status;
2790}
2791
2792static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
2793        int attempt_retry)
2794{
2795        DECLARE_COMPLETION_ONSTACK(wait);
2796        u64bit buff_dma_handle;
2797        int return_status = IO_OK;
2798
2799resend_cmd2:
2800        c->waiting = &wait;
2801        enqueue_cmd_and_start_io(h, c);
2802
2803        wait_for_completion(&wait);
2804
2805        if (c->err_info->CommandStatus == 0 || !attempt_retry)
2806                goto command_done;
2807
2808        return_status = process_sendcmd_error(h, c);
2809
2810        if (return_status == IO_NEEDS_RETRY &&
2811                c->retry_count < MAX_CMD_RETRIES) {
2812                dev_warn(&h->pdev->dev, "retrying 0x%02x\n",
2813                        c->Request.CDB[0]);
2814                c->retry_count++;
2815                /* erase the old error information */
2816                memset(c->err_info, 0, sizeof(ErrorInfo_struct));
2817                return_status = IO_OK;
2818                reinit_completion(&wait);
2819                goto resend_cmd2;
2820        }
2821
2822command_done:
2823        /* unlock the buffers from DMA */
2824        buff_dma_handle.val32.lower = c->SG[0].Addr.lower;
2825        buff_dma_handle.val32.upper = c->SG[0].Addr.upper;
2826        pci_unmap_single(h->pdev, (dma_addr_t) buff_dma_handle.val,
2827                         c->SG[0].Len, PCI_DMA_BIDIRECTIONAL);
2828        return return_status;
2829}
2830
2831static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
2832                           __u8 page_code, unsigned char scsi3addr[],
2833                        int cmd_type)
2834{
2835        CommandList_struct *c;
2836        int return_status;
2837
2838        c = cmd_special_alloc(h);
2839        if (!c)
2840                return -ENOMEM;
2841        return_status = fill_cmd(h, c, cmd, buff, size, page_code,
2842                scsi3addr, cmd_type);
2843        if (return_status == IO_OK)
2844                return_status = sendcmd_withirq_core(h, c, 1);
2845
2846        cmd_special_free(h, c);
2847        return return_status;
2848}
2849
2850static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
2851                                   sector_t total_size,
2852                                   unsigned int block_size,
2853                                   InquiryData_struct *inq_buff,
2854                                   drive_info_struct *drv)
2855{
2856        int return_code;
2857        unsigned long t;
2858        unsigned char scsi3addr[8];
2859
2860        memset(inq_buff, 0, sizeof(InquiryData_struct));
2861        log_unit_to_scsi3addr(h, scsi3addr, logvol);
2862        return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
2863                        sizeof(*inq_buff), 0xC1, scsi3addr, TYPE_CMD);
2864        if (return_code == IO_OK) {
2865                if (inq_buff->data_byte[8] == 0xFF) {
2866                        dev_warn(&h->pdev->dev,
2867                               "reading geometry failed, volume "
2868                               "does not support reading geometry\n");
2869                        drv->heads = 255;
2870                        drv->sectors = 32;      /* Sectors per track */
2871                        drv->cylinders = total_size + 1;
2872                        drv->raid_level = RAID_UNKNOWN;
2873                } else {
2874                        drv->heads = inq_buff->data_byte[6];
2875                        drv->sectors = inq_buff->data_byte[7];
2876                        drv->cylinders = (inq_buff->data_byte[4] & 0xff) << 8;
2877                        drv->cylinders += inq_buff->data_byte[5];
2878                        drv->raid_level = inq_buff->data_byte[8];
2879                }
2880                drv->block_size = block_size;
2881                drv->nr_blocks = total_size + 1;
2882                t = drv->heads * drv->sectors;
2883                if (t > 1) {
2884                        sector_t real_size = total_size + 1;
2885                        unsigned long rem = sector_div(real_size, t);
2886                        if (rem)
2887                                real_size++;
2888                        drv->cylinders = real_size;
2889                }
2890        } else {                /* Get geometry failed */
2891                dev_warn(&h->pdev->dev, "reading geometry failed\n");
2892        }
2893}
2894
2895static void
2896cciss_read_capacity(ctlr_info_t *h, int logvol, sector_t *total_size,
2897                    unsigned int *block_size)
2898{
2899        ReadCapdata_struct *buf;
2900        int return_code;
2901        unsigned char scsi3addr[8];
2902
2903        buf = kzalloc(sizeof(ReadCapdata_struct), GFP_KERNEL);
2904        if (!buf) {
2905                dev_warn(&h->pdev->dev, "out of memory\n");
2906                return;
2907        }
2908
2909        log_unit_to_scsi3addr(h, scsi3addr, logvol);
2910        return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY, buf,
2911                sizeof(ReadCapdata_struct), 0, scsi3addr, TYPE_CMD);
2912        if (return_code == IO_OK) {
2913                *total_size = be32_to_cpu(*(__be32 *) buf->total_size);
2914                *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
2915        } else {                /* read capacity command failed */
2916                dev_warn(&h->pdev->dev, "read capacity failed\n");
2917                *total_size = 0;
2918                *block_size = BLOCK_SIZE;
2919        }
2920        kfree(buf);
2921}
2922
2923static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
2924        sector_t *total_size, unsigned int *block_size)
2925{
2926        ReadCapdata_struct_16 *buf;
2927        int return_code;
2928        unsigned char scsi3addr[8];
2929
2930        buf = kzalloc(sizeof(ReadCapdata_struct_16), GFP_KERNEL);
2931        if (!buf) {
2932                dev_warn(&h->pdev->dev, "out of memory\n");
2933                return;
2934        }
2935
2936        log_unit_to_scsi3addr(h, scsi3addr, logvol);
2937        return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY_16,
2938                buf, sizeof(ReadCapdata_struct_16),
2939                        0, scsi3addr, TYPE_CMD);
2940        if (return_code == IO_OK) {
2941                *total_size = be64_to_cpu(*(__be64 *) buf->total_size);
2942                *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
2943        } else {                /* read capacity command failed */
2944                dev_warn(&h->pdev->dev, "read capacity failed\n");
2945                *total_size = 0;
2946                *block_size = BLOCK_SIZE;
2947        }
2948        dev_info(&h->pdev->dev, "      blocks= %llu block_size= %d\n",
2949               (unsigned long long)*total_size+1, *block_size);
2950        kfree(buf);
2951}
2952
2953static int cciss_revalidate(struct gendisk *disk)
2954{
2955        ctlr_info_t *h = get_host(disk);
2956        drive_info_struct *drv = get_drv(disk);
2957        int logvol;
2958        int FOUND = 0;
2959        unsigned int block_size;
2960        sector_t total_size;
2961        InquiryData_struct *inq_buff = NULL;
2962
2963        for (logvol = 0; logvol <= h->highest_lun; logvol++) {
2964                if (!h->drv[logvol])
2965                        continue;
2966                if (memcmp(h->drv[logvol]->LunID, drv->LunID,
2967                        sizeof(drv->LunID)) == 0) {
2968                        FOUND = 1;
2969                        break;
2970                }
2971        }
2972
2973        if (!FOUND)
2974                return 1;
2975
2976        inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
2977        if (inq_buff == NULL) {
2978                dev_warn(&h->pdev->dev, "out of memory\n");
2979                return 1;
2980        }
2981        if (h->cciss_read == CCISS_READ_10) {
2982                cciss_read_capacity(h, logvol,
2983                                        &total_size, &block_size);
2984        } else {
2985                cciss_read_capacity_16(h, logvol,
2986                                        &total_size, &block_size);
2987        }
2988        cciss_geometry_inquiry(h, logvol, total_size, block_size,
2989                               inq_buff, drv);
2990
2991        blk_queue_logical_block_size(drv->queue, drv->block_size);
2992        set_capacity(disk, drv->nr_blocks);
2993
2994        kfree(inq_buff);
2995        return 0;
2996}
2997
2998/*
2999 * Map (physical) PCI mem into (virtual) kernel space
3000 */
3001static void __iomem *remap_pci_mem(ulong base, ulong size)
3002{
3003        ulong page_base = ((ulong) base) & PAGE_MASK;
3004        ulong page_offs = ((ulong) base) - page_base;
3005        void __iomem *page_remapped = ioremap(page_base, page_offs + size);
3006
3007        return page_remapped ? (page_remapped + page_offs) : NULL;
3008}
3009
3010/*
3011 * Takes jobs of the Q and sends them to the hardware, then puts it on
3012 * the Q to wait for completion.
3013 */
3014static void start_io(ctlr_info_t *h)
3015{
3016        CommandList_struct *c;
3017
3018        while (!list_empty(&h->reqQ)) {
3019                c = list_entry(h->reqQ.next, CommandList_struct, list);
3020                /* can't do anything if fifo is full */
3021                if ((h->access.fifo_full(h))) {
3022                        dev_warn(&h->pdev->dev, "fifo full\n");
3023                        break;
3024                }
3025
3026                /* Get the first entry from the Request Q */
3027                removeQ(c);
3028                h->Qdepth--;
3029
3030                /* Tell the controller execute command */
3031                h->access.submit_command(h, c);
3032
3033                /* Put job onto the completed Q */
3034                addQ(&h->cmpQ, c);
3035        }
3036}
3037
3038/* Assumes that h->lock is held. */
3039/* Zeros out the error record and then resends the command back */
3040/* to the controller */
3041static inline void resend_cciss_cmd(ctlr_info_t *h, CommandList_struct *c)
3042{
3043        /* erase the old error information */
3044        memset(c->err_info, 0, sizeof(ErrorInfo_struct));
3045
3046        /* add it to software queue and then send it to the controller */
3047        addQ(&h->reqQ, c);
3048        h->Qdepth++;
3049        if (h->Qdepth > h->maxQsinceinit)
3050                h->maxQsinceinit = h->Qdepth;
3051
3052        start_io(h);
3053}
3054
3055static inline unsigned int make_status_bytes(unsigned int scsi_status_byte,
3056        unsigned int msg_byte, unsigned int host_byte,
3057        unsigned int driver_byte)
3058{
3059        /* inverse of macros in scsi.h */
3060        return (scsi_status_byte & 0xff) |
3061                ((msg_byte & 0xff) << 8) |
3062                ((host_byte & 0xff) << 16) |
3063                ((driver_byte & 0xff) << 24);
3064}
3065
3066static inline int evaluate_target_status(ctlr_info_t *h,
3067                        CommandList_struct *cmd, int *retry_cmd)
3068{
3069        unsigned char sense_key;
3070        unsigned char status_byte, msg_byte, host_byte, driver_byte;
3071        int error_value;
3072
3073        *retry_cmd = 0;
3074        /* If we get in here, it means we got "target status", that is, scsi status */
3075        status_byte = cmd->err_info->ScsiStatus;
3076        driver_byte = DRIVER_OK;
3077        msg_byte = cmd->err_info->CommandStatus; /* correct?  seems too device specific */
3078
3079        if (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC)
3080                host_byte = DID_PASSTHROUGH;
3081        else
3082                host_byte = DID_OK;
3083
3084        error_value = make_status_bytes(status_byte, msg_byte,
3085                host_byte, driver_byte);
3086
3087        if (cmd->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) {
3088                if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC)
3089                        dev_warn(&h->pdev->dev, "cmd %p "
3090                               "has SCSI Status 0x%x\n",
3091                               cmd, cmd->err_info->ScsiStatus);
3092                return error_value;
3093        }
3094
3095        /* check the sense key */
3096        sense_key = 0xf & cmd->err_info->SenseInfo[2];
3097        /* no status or recovered error */
3098        if (((sense_key == 0x0) || (sense_key == 0x1)) &&
3099            (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC))
3100                error_value = 0;
3101
3102        if (check_for_unit_attention(h, cmd)) {
3103                *retry_cmd = !(cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC);
3104                return 0;
3105        }
3106
3107        /* Not SG_IO or similar? */
3108        if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC) {
3109                if (error_value != 0)
3110                        dev_warn(&h->pdev->dev, "cmd %p has CHECK CONDITION"
3111                               " sense key = 0x%x\n", cmd, sense_key);
3112                return error_value;
3113        }
3114
3115        /* SG_IO or similar, copy sense data back */
3116        if (cmd->rq->sense) {
3117                if (cmd->rq->sense_len > cmd->err_info->SenseLen)
3118                        cmd->rq->sense_len = cmd->err_info->SenseLen;
3119                memcpy(cmd->rq->sense, cmd->err_info->SenseInfo,
3120                        cmd->rq->sense_len);
3121        } else
3122                cmd->rq->sense_len = 0;
3123
3124        return error_value;
3125}
3126
3127/* checks the status of the job and calls complete buffers to mark all
3128 * buffers for the completed job. Note that this function does not need
3129 * to hold the hba/queue lock.
3130 */
3131static inline void complete_command(ctlr_info_t *h, CommandList_struct *cmd,
3132                                    int timeout)
3133{
3134        int retry_cmd = 0;
3135        struct request *rq = cmd->rq;
3136
3137        rq->errors = 0;
3138
3139        if (timeout)
3140                rq->errors = make_status_bytes(0, 0, 0, DRIVER_TIMEOUT);
3141
3142        if (cmd->err_info->CommandStatus == 0)  /* no error has occurred */
3143                goto after_error_processing;
3144
3145        switch (cmd->err_info->CommandStatus) {
3146        case CMD_TARGET_STATUS:
3147                rq->errors = evaluate_target_status(h, cmd, &retry_cmd);
3148                break;
3149        case CMD_DATA_UNDERRUN:
3150                if (cmd->rq->cmd_type == REQ_TYPE_FS) {
3151                        dev_warn(&h->pdev->dev, "cmd %p has"
3152                               " completed with data underrun "
3153                               "reported\n", cmd);
3154                        cmd->rq->resid_len = cmd->err_info->ResidualCnt;
3155                }
3156                break;
3157        case CMD_DATA_OVERRUN:
3158                if (cmd->rq->cmd_type == REQ_TYPE_FS)
3159                        dev_warn(&h->pdev->dev, "cciss: cmd %p has"
3160                               " completed with data overrun "
3161                               "reported\n", cmd);
3162                break;
3163        case CMD_INVALID:
3164                dev_warn(&h->pdev->dev, "cciss: cmd %p is "
3165                       "reported invalid\n", cmd);
3166                rq->errors = make_status_bytes(SAM_STAT_GOOD,
3167                        cmd->err_info->CommandStatus, DRIVER_OK,
3168                        (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3169                                DID_PASSTHROUGH : DID_ERROR);
3170                break;
3171        case CMD_PROTOCOL_ERR:
3172                dev_warn(&h->pdev->dev, "cciss: cmd %p has "
3173                       "protocol error\n", cmd);
3174                rq->errors = make_status_bytes(SAM_STAT_GOOD,
3175                        cmd->err_info->CommandStatus, DRIVER_OK,
3176                        (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3177                                DID_PASSTHROUGH : DID_ERROR);
3178                break;
3179        case CMD_HARDWARE_ERR:
3180                dev_warn(&h->pdev->dev, "cciss: cmd %p had "
3181                       " hardware error\n", cmd);
3182                rq->errors = make_status_bytes(SAM_STAT_GOOD,
3183                        cmd->err_info->CommandStatus, DRIVER_OK,
3184                        (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3185                                DID_PASSTHROUGH : DID_ERROR);
3186                break;
3187        case CMD_CONNECTION_LOST:
3188                dev_warn(&h->pdev->dev, "cciss: cmd %p had "
3189                       "connection lost\n", cmd);
3190                rq->errors = make_status_bytes(SAM_STAT_GOOD,
3191                        cmd->err_info->CommandStatus, DRIVER_OK,
3192                        (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3193                                DID_PASSTHROUGH : DID_ERROR);
3194                break;
3195        case CMD_ABORTED:
3196                dev_warn(&h->pdev->dev, "cciss: cmd %p was "
3197                       "aborted\n", cmd);
3198                rq->errors = make_status_bytes(SAM_STAT_GOOD,
3199                        cmd->err_info->CommandStatus, DRIVER_OK,
3200                        (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3201                                DID_PASSTHROUGH : DID_ABORT);
3202                break;
3203        case CMD_ABORT_FAILED:
3204                dev_warn(&h->pdev->dev, "cciss: cmd %p reports "
3205                       "abort failed\n", cmd);
3206                rq->errors = make_status_bytes(SAM_STAT_GOOD,
3207                        cmd->err_info->CommandStatus, DRIVER_OK,
3208                        (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3209                                DID_PASSTHROUGH : DID_ERROR);
3210                break;
3211        case CMD_UNSOLICITED_ABORT:
3212                dev_warn(&h->pdev->dev, "cciss%d: unsolicited "
3213                       "abort %p\n", h->ctlr, cmd);
3214                if (cmd->retry_count < MAX_CMD_RETRIES) {
3215                        retry_cmd = 1;
3216                        dev_warn(&h->pdev->dev, "retrying %p\n", cmd);
3217                        cmd->retry_count++;
3218                } else
3219                        dev_warn(&h->pdev->dev,
3220                                "%p retried too many times\n", cmd);
3221                rq->errors = make_status_bytes(SAM_STAT_GOOD,
3222                        cmd->err_info->CommandStatus, DRIVER_OK,
3223                        (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3224                                DID_PASSTHROUGH : DID_ABORT);
3225                break;
3226        case CMD_TIMEOUT:
3227                dev_warn(&h->pdev->dev, "cmd %p timedout\n", cmd);
3228                rq->errors = make_status_bytes(SAM_STAT_GOOD,
3229                        cmd->err_info->CommandStatus, DRIVER_OK,
3230                        (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3231                                DID_PASSTHROUGH : DID_ERROR);
3232                break;
3233        case CMD_UNABORTABLE:
3234                dev_warn(&h->pdev->dev, "cmd %p unabortable\n", cmd);
3235                rq->errors = make_status_bytes(SAM_STAT_GOOD,
3236                        cmd->err_info->CommandStatus, DRIVER_OK,
3237                        cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC ?
3238                                DID_PASSTHROUGH : DID_ERROR);
3239                break;
3240        default:
3241                dev_warn(&h->pdev->dev, "cmd %p returned "
3242                       "unknown status %x\n", cmd,
3243                       cmd->err_info->CommandStatus);
3244                rq->errors = make_status_bytes(SAM_STAT_GOOD,
3245                        cmd->err_info->CommandStatus, DRIVER_OK,
3246                        (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3247                                DID_PASSTHROUGH : DID_ERROR);
3248        }
3249
3250after_error_processing:
3251
3252        /* We need to return this command */
3253        if (retry_cmd) {
3254                resend_cciss_cmd(h, cmd);
3255                return;
3256        }
3257        cmd->rq->completion_data = cmd;
3258        blk_complete_request(cmd->rq);
3259}
3260
3261static inline u32 cciss_tag_contains_index(u32 tag)
3262{
3263#define DIRECT_LOOKUP_BIT 0x10
3264        return tag & DIRECT_LOOKUP_BIT;
3265}
3266
3267static inline u32 cciss_tag_to_index(u32 tag)
3268{
3269#define DIRECT_LOOKUP_SHIFT 5
3270        return tag >> DIRECT_LOOKUP_SHIFT;
3271}
3272
3273static inline u32 cciss_tag_discard_error_bits(ctlr_info_t *h, u32 tag)
3274{
3275#define CCISS_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
3276#define CCISS_SIMPLE_ERROR_BITS 0x03
3277        if (likely(h->transMethod & CFGTBL_Trans_Performant))
3278                return tag & ~CCISS_PERF_ERROR_BITS;
3279        return tag & ~CCISS_SIMPLE_ERROR_BITS;
3280}
3281
3282static inline void cciss_mark_tag_indexed(u32 *tag)
3283{
3284        *tag |= DIRECT_LOOKUP_BIT;
3285}
3286
3287static inline void cciss_set_tag_index(u32 *tag, u32 index)
3288{
3289        *tag |= (index << DIRECT_LOOKUP_SHIFT);
3290}
3291
3292/*
3293 * Get a request and submit it to the controller.
3294 */
3295static void do_cciss_request(struct request_queue *q)
3296{
3297        ctlr_info_t *h = q->queuedata;
3298        CommandList_struct *c;
3299        sector_t start_blk;
3300        int seg;
3301        struct request *creq;
3302        u64bit temp64;
3303        struct scatterlist *tmp_sg;
3304        SGDescriptor_struct *curr_sg;
3305        drive_info_struct *drv;
3306        int i, dir;
3307        int sg_index = 0;
3308        int chained = 0;
3309
3310      queue:
3311        creq = blk_peek_request(q);
3312        if (!creq)
3313                goto startio;
3314
3315        BUG_ON(creq->nr_phys_segments > h->maxsgentries);
3316
3317        c = cmd_alloc(h);
3318        if (!c)
3319                goto full;
3320
3321        blk_start_request(creq);
3322
3323        tmp_sg = h->scatter_list[c->cmdindex];
3324        spin_unlock_irq(q->queue_lock);
3325
3326        c->cmd_type = CMD_RWREQ;
3327        c->rq = creq;
3328
3329        /* fill in the request */
3330        drv = creq->rq_disk->private_data;
3331        c->Header.ReplyQueue = 0;       /* unused in simple mode */
3332        /* got command from pool, so use the command block index instead */
3333        /* for direct lookups. */
3334        /* The first 2 bits are reserved for controller error reporting. */
3335        cciss_set_tag_index(&c->Header.Tag.lower, c->cmdindex);
3336        cciss_mark_tag_indexed(&c->Header.Tag.lower);
3337        memcpy(&c->Header.LUN, drv->LunID, sizeof(drv->LunID));
3338        c->Request.CDBLen = 10; /* 12 byte commands not in FW yet; */
3339        c->Request.Type.Type = TYPE_CMD;        /* It is a command. */
3340        c->Request.Type.Attribute = ATTR_SIMPLE;
3341        c->Request.Type.Direction =
3342            (rq_data_dir(creq) == READ) ? XFER_READ : XFER_WRITE;
3343        c->Request.Timeout = 0; /* Don't time out */
3344        c->Request.CDB[0] =
3345            (rq_data_dir(creq) == READ) ? h->cciss_read : h->cciss_write;
3346        start_blk = blk_rq_pos(creq);
3347        dev_dbg(&h->pdev->dev, "sector =%d nr_sectors=%d\n",
3348               (int)blk_rq_pos(creq), (int)blk_rq_sectors(creq));
3349        sg_init_table(tmp_sg, h->maxsgentries);
3350        seg = blk_rq_map_sg(q, creq, tmp_sg);
3351
3352        /* get the DMA records for the setup */
3353        if (c->Request.Type.Direction == XFER_READ)
3354                dir = PCI_DMA_FROMDEVICE;
3355        else
3356                dir = PCI_DMA_TODEVICE;
3357
3358        curr_sg = c->SG;
3359        sg_index = 0;
3360        chained = 0;
3361
3362        for (i = 0; i < seg; i++) {
3363                if (((sg_index+1) == (h->max_cmd_sgentries)) &&
3364                        !chained && ((seg - i) > 1)) {
3365                        /* Point to next chain block. */
3366                        curr_sg = h->cmd_sg_list[c->cmdindex];
3367                        sg_index = 0;
3368                        chained = 1;
3369                }
3370                curr_sg[sg_index].Len = tmp_sg[i].length;
3371                temp64.val = (__u64) pci_map_page(h->pdev, sg_page(&tmp_sg[i]),
3372                                                tmp_sg[i].offset,
3373                                                tmp_sg[i].length, dir);
3374                curr_sg[sg_index].Addr.lower = temp64.val32.lower;
3375                curr_sg[sg_index].Addr.upper = temp64.val32.upper;
3376                curr_sg[sg_index].Ext = 0;  /* we are not chaining */
3377                ++sg_index;
3378        }
3379        if (chained)
3380                cciss_map_sg_chain_block(h, c, h->cmd_sg_list[c->cmdindex],
3381                        (seg - (h->max_cmd_sgentries - 1)) *
3382                                sizeof(SGDescriptor_struct));
3383
3384        /* track how many SG entries we are using */
3385        if (seg > h->maxSG)
3386                h->maxSG = seg;
3387
3388        dev_dbg(&h->pdev->dev, "Submitting %u sectors in %d segments "
3389                        "chained[%d]\n",
3390                        blk_rq_sectors(creq), seg, chained);
3391
3392        c->Header.SGTotal = seg + chained;
3393        if (seg <= h->max_cmd_sgentries)
3394                c->Header.SGList = c->Header.SGTotal;
3395        else
3396                c->Header.SGList = h->max_cmd_sgentries;
3397        set_performant_mode(h, c);
3398
3399        if (likely(creq->cmd_type == REQ_TYPE_FS)) {
3400                if(h->cciss_read == CCISS_READ_10) {
3401                        c->Request.CDB[1] = 0;
3402                        c->Request.CDB[2] = (start_blk >> 24) & 0xff; /* MSB */
3403                        c->Request.CDB[3] = (start_blk >> 16) & 0xff;
3404                        c->Request.CDB[4] = (start_blk >> 8) & 0xff;
3405                        c->Request.CDB[5] = start_blk & 0xff;
3406                        c->Request.CDB[6] = 0; /* (sect >> 24) & 0xff; MSB */
3407                        c->Request.CDB[7] = (blk_rq_sectors(creq) >> 8) & 0xff;
3408                        c->Request.CDB[8] = blk_rq_sectors(creq) & 0xff;
3409                        c->Request.CDB[9] = c->Request.CDB[11] = c->Request.CDB[12] = 0;
3410                } else {
3411                        u32 upper32 = upper_32_bits(start_blk);
3412
3413                        c->Request.CDBLen = 16;
3414                        c->Request.CDB[1]= 0;
3415                        c->Request.CDB[2]= (upper32 >> 24) & 0xff; /* MSB */
3416                        c->Request.CDB[3]= (upper32 >> 16) & 0xff;
3417                        c->Request.CDB[4]= (upper32 >>  8) & 0xff;
3418                        c->Request.CDB[5]= upper32 & 0xff;
3419                        c->Request.CDB[6]= (start_blk >> 24) & 0xff;
3420                        c->Request.CDB[7]= (start_blk >> 16) & 0xff;
3421                        c->Request.CDB[8]= (start_blk >>  8) & 0xff;
3422                        c->Request.CDB[9]= start_blk & 0xff;
3423                        c->Request.CDB[10]= (blk_rq_sectors(creq) >> 24) & 0xff;
3424                        c->Request.CDB[11]= (blk_rq_sectors(creq) >> 16) & 0xff;
3425                        c->Request.CDB[12]= (blk_rq_sectors(creq) >>  8) & 0xff;
3426                        c->Request.CDB[13]= blk_rq_sectors(creq) & 0xff;
3427                        c->Request.CDB[14] = c->Request.CDB[15] = 0;
3428                }
3429        } else if (creq->cmd_type == REQ_TYPE_BLOCK_PC) {
3430                c->Request.CDBLen = creq->cmd_len;
3431                memcpy(c->Request.CDB, creq->cmd, BLK_MAX_CDB);
3432        } else {
3433                dev_warn(&h->pdev->dev, "bad request type %d\n",
3434                        creq->cmd_type);
3435                BUG();
3436        }
3437
3438        spin_lock_irq(q->queue_lock);
3439
3440        addQ(&h->reqQ, c);
3441        h->Qdepth++;
3442        if (h->Qdepth > h->maxQsinceinit)
3443                h->maxQsinceinit = h->Qdepth;
3444
3445        goto queue;
3446full:
3447        blk_stop_queue(q);
3448startio:
3449        /* We will already have the driver lock here so not need
3450         * to lock it.
3451         */
3452        start_io(h);
3453}
3454
3455static inline unsigned long get_next_completion(ctlr_info_t *h)
3456{
3457        return h->access.command_completed(h);
3458}
3459
3460static inline int interrupt_pending(ctlr_info_t *h)
3461{
3462        return h->access.intr_pending(h);
3463}
3464
3465static inline long interrupt_not_for_us(ctlr_info_t *h)
3466{
3467        return ((h->access.intr_pending(h) == 0) ||
3468                (h->interrupts_enabled == 0));
3469}
3470
3471static inline int bad_tag(ctlr_info_t *h, u32 tag_index,
3472                        u32 raw_tag)
3473{
3474        if (unlikely(tag_index >= h->nr_cmds)) {
3475                dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
3476                return 1;
3477        }
3478        return 0;
3479}
3480
3481static inline void finish_cmd(ctlr_info_t *h, CommandList_struct *c,
3482                                u32 raw_tag)
3483{
3484        removeQ(c);
3485        if (likely(c->cmd_type == CMD_RWREQ))
3486                complete_command(h, c, 0);
3487        else if (c->cmd_type == CMD_IOCTL_PEND)
3488                complete(c->waiting);
3489#ifdef CONFIG_CISS_SCSI_TAPE
3490        else if (c->cmd_type == CMD_SCSI)
3491                complete_scsi_command(c, 0, raw_tag);
3492#endif
3493}
3494
3495static inline u32 next_command(ctlr_info_t *h)
3496{
3497        u32 a;
3498
3499        if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
3500                return h->access.command_completed(h);
3501
3502        if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
3503                a = *(h->reply_pool_head); /* Next cmd in ring buffer */
3504                (h->reply_pool_head)++;
3505                h->commands_outstanding--;
3506        } else {
3507                a = FIFO_EMPTY;
3508        }
3509        /* Check for wraparound */
3510        if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
3511                h->reply_pool_head = h->reply_pool;
3512                h->reply_pool_wraparound ^= 1;
3513        }
3514        return a;
3515}
3516
3517/* process completion of an indexed ("direct lookup") command */
3518static inline u32 process_indexed_cmd(ctlr_info_t *h, u32 raw_tag)
3519{
3520        u32 tag_index;
3521        CommandList_struct *c;
3522
3523        tag_index = cciss_tag_to_index(raw_tag);
3524        if (bad_tag(h, tag_index, raw_tag))
3525                return next_command(h);
3526        c = h->cmd_pool + tag_index;
3527        finish_cmd(h, c, raw_tag);
3528        return next_command(h);
3529}
3530
3531/* process completion of a non-indexed command */
3532static inline u32 process_nonindexed_cmd(ctlr_info_t *h, u32 raw_tag)
3533{
3534        CommandList_struct *c = NULL;
3535        __u32 busaddr_masked, tag_masked;
3536
3537        tag_masked = cciss_tag_discard_error_bits(h, raw_tag);
3538        list_for_each_entry(c, &h->cmpQ, list) {
3539                busaddr_masked = cciss_tag_discard_error_bits(h, c->busaddr);
3540                if (busaddr_masked == tag_masked) {
3541                        finish_cmd(h, c, raw_tag);
3542                        return next_command(h);
3543                }
3544        }
3545        bad_tag(h, h->nr_cmds + 1, raw_tag);
3546        return next_command(h);
3547}
3548
3549/* Some controllers, like p400, will give us one interrupt
3550 * after a soft reset, even if we turned interrupts off.
3551 * Only need to check for this in the cciss_xxx_discard_completions
3552 * functions.
3553 */
3554static int ignore_bogus_interrupt(ctlr_info_t *h)
3555{
3556        if (likely(!reset_devices))
3557                return 0;
3558
3559        if (likely(h->interrupts_enabled))
3560                return 0;
3561
3562        dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
3563                "(known firmware bug.)  Ignoring.\n");
3564
3565        return 1;
3566}
3567
3568static irqreturn_t cciss_intx_discard_completions(int irq, void *dev_id)
3569{
3570        ctlr_info_t *h = dev_id;
3571        unsigned long flags;
3572        u32 raw_tag;
3573
3574        if (ignore_bogus_interrupt(h))
3575                return IRQ_NONE;
3576
3577        if (interrupt_not_for_us(h))
3578                return IRQ_NONE;
3579        spin_lock_irqsave(&h->lock, flags);
3580        while (interrupt_pending(h)) {
3581                raw_tag = get_next_completion(h);
3582                while (raw_tag != FIFO_EMPTY)
3583                        raw_tag = next_command(h);
3584        }
3585        spin_unlock_irqrestore(&h->lock, flags);
3586        return IRQ_HANDLED;
3587}
3588
3589static irqreturn_t cciss_msix_discard_completions(int irq, void *dev_id)
3590{
3591        ctlr_info_t *h = dev_id;
3592        unsigned long flags;
3593        u32 raw_tag;
3594
3595        if (ignore_bogus_interrupt(h))
3596                return IRQ_NONE;
3597
3598        spin_lock_irqsave(&h->lock, flags);
3599        raw_tag = get_next_completion(h);
3600        while (raw_tag != FIFO_EMPTY)
3601                raw_tag = next_command(h);
3602        spin_unlock_irqrestore(&h->lock, flags);
3603        return IRQ_HANDLED;
3604}
3605
3606static irqreturn_t do_cciss_intx(int irq, void *dev_id)
3607{
3608        ctlr_info_t *h = dev_id;
3609        unsigned long flags;
3610        u32 raw_tag;
3611
3612        if (interrupt_not_for_us(h))
3613                return IRQ_NONE;
3614        spin_lock_irqsave(&h->lock, flags);
3615        while (interrupt_pending(h)) {
3616                raw_tag = get_next_completion(h);
3617                while (raw_tag != FIFO_EMPTY) {
3618                        if (cciss_tag_contains_index(raw_tag))
3619                                raw_tag = process_indexed_cmd(h, raw_tag);
3620                        else
3621                                raw_tag = process_nonindexed_cmd(h, raw_tag);
3622                }
3623        }
3624        spin_unlock_irqrestore(&h->lock, flags);
3625        return IRQ_HANDLED;
3626}
3627
3628/* Add a second interrupt handler for MSI/MSI-X mode. In this mode we never
3629 * check the interrupt pending register because it is not set.
3630 */
3631static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id)
3632{
3633        ctlr_info_t *h = dev_id;
3634        unsigned long flags;
3635        u32 raw_tag;
3636
3637        spin_lock_irqsave(&h->lock, flags);
3638        raw_tag = get_next_completion(h);
3639        while (raw_tag != FIFO_EMPTY) {
3640                if (cciss_tag_contains_index(raw_tag))
3641                        raw_tag = process_indexed_cmd(h, raw_tag);
3642                else
3643                        raw_tag = process_nonindexed_cmd(h, raw_tag);
3644        }
3645        spin_unlock_irqrestore(&h->lock, flags);
3646        return IRQ_HANDLED;
3647}
3648
3649/**
3650 * add_to_scan_list() - add controller to rescan queue
3651 * @h:                Pointer to the controller.
3652 *
3653 * Adds the controller to the rescan queue if not already on the queue.
3654 *
3655 * returns 1 if added to the queue, 0 if skipped (could be on the
3656 * queue already, or the controller could be initializing or shutting
3657 * down).
3658 **/
3659static int add_to_scan_list(struct ctlr_info *h)
3660{
3661        struct ctlr_info *test_h;
3662        int found = 0;
3663        int ret = 0;
3664
3665        if (h->busy_initializing)
3666                return 0;
3667
3668        if (!mutex_trylock(&h->busy_shutting_down))
3669                return 0;
3670
3671        mutex_lock(&scan_mutex);
3672        list_for_each_entry(test_h, &scan_q, scan_list) {
3673                if (test_h == h) {
3674                        found = 1;
3675                        break;
3676                }
3677        }
3678        if (!found && !h->busy_scanning) {
3679                reinit_completion(&h->scan_wait);
3680                list_add_tail(&h->scan_list, &scan_q);
3681                ret = 1;
3682        }
3683        mutex_unlock(&scan_mutex);
3684        mutex_unlock(&h->busy_shutting_down);
3685
3686        return ret;
3687}
3688
3689/**
3690 * remove_from_scan_list() - remove controller from rescan queue
3691 * @h:                     Pointer to the controller.
3692 *
3693 * Removes the controller from the rescan queue if present. Blocks if
3694 * the controller is currently conducting a rescan.  The controller
3695 * can be in one of three states:
3696 * 1. Doesn't need a scan
3697 * 2. On the scan list, but not scanning yet (we remove it)
3698 * 3. Busy scanning (and not on the list). In this case we want to wait for
3699 *    the scan to complete to make sure the scanning thread for this
3700 *    controller is completely idle.
3701 **/
3702static void remove_from_scan_list(struct ctlr_info *h)
3703{
3704        struct ctlr_info *test_h, *tmp_h;
3705
3706        mutex_lock(&scan_mutex);
3707        list_for_each_entry_safe(test_h, tmp_h, &scan_q, scan_list) {
3708                if (test_h == h) { /* state 2. */
3709                        list_del(&h->scan_list);
3710                        complete_all(&h->scan_wait);
3711                        mutex_unlock(&scan_mutex);
3712                        return;
3713                }
3714        }
3715        if (h->busy_scanning) { /* state 3. */
3716                mutex_unlock(&scan_mutex);
3717                wait_for_completion(&h->scan_wait);
3718        } else { /* state 1, nothing to do. */
3719                mutex_unlock(&scan_mutex);
3720        }
3721}
3722
3723/**
3724 * scan_thread() - kernel thread used to rescan controllers
3725 * @data:        Ignored.
3726 *
3727 * A kernel thread used scan for drive topology changes on
3728 * controllers. The thread processes only one controller at a time
3729 * using a queue.  Controllers are added to the queue using
3730 * add_to_scan_list() and removed from the queue either after done
3731 * processing or using remove_from_scan_list().
3732 *
3733 * returns 0.
3734 **/
3735static int scan_thread(void *data)
3736{
3737        struct ctlr_info *h;
3738
3739        while (1) {
3740                set_current_state(TASK_INTERRUPTIBLE);
3741                schedule();
3742                if (kthread_should_stop())
3743                        break;
3744
3745                while (1) {
3746                        mutex_lock(&scan_mutex);
3747                        if (list_empty(&scan_q)) {
3748                                mutex_unlock(&scan_mutex);
3749                                break;
3750                        }
3751
3752                        h = list_entry(scan_q.next,
3753                                       struct ctlr_info,
3754                                       scan_list);
3755                        list_del(&h->scan_list);
3756                        h->busy_scanning = 1;
3757                        mutex_unlock(&scan_mutex);
3758
3759                        rebuild_lun_table(h, 0, 0);
3760                        complete_all(&h->scan_wait);
3761                        mutex_lock(&scan_mutex);
3762                        h->busy_scanning = 0;
3763                        mutex_unlock(&scan_mutex);
3764                }
3765        }
3766
3767        return 0;
3768}
3769
3770static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c)
3771{
3772        if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
3773                return 0;
3774
3775        switch (c->err_info->SenseInfo[12]) {
3776        case STATE_CHANGED:
3777                dev_warn(&h->pdev->dev, "a state change "
3778                        "detected, command retried\n");
3779                return 1;
3780        break;
3781        case LUN_FAILED:
3782                dev_warn(&h->pdev->dev, "LUN failure "
3783                        "detected, action required\n");
3784                return 1;
3785        break;
3786        case REPORT_LUNS_CHANGED:
3787                dev_warn(&h->pdev->dev, "report LUN data changed\n");
3788        /*
3789         * Here, we could call add_to_scan_list and wake up the scan thread,
3790         * except that it's quite likely that we will get more than one
3791         * REPORT_LUNS_CHANGED condition in quick succession, which means
3792         * that those which occur after the first one will likely happen
3793         * *during* the scan_thread's rescan.  And the rescan code is not
3794         * robust enough to restart in the middle, undoing what it has already
3795         * done, and it's not clear that it's even possible to do this, since
3796         * part of what it does is notify the block layer, which starts
3797         * doing it's own i/o to read partition tables and so on, and the
3798         * driver doesn't have visibility to know what might need undoing.
3799         * In any event, if possible, it is horribly complicated to get right
3800         * so we just don't do it for now.
3801         *
3802         * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
3803         */
3804                return 1;
3805        break;
3806        case POWER_OR_RESET:
3807                dev_warn(&h->pdev->dev,
3808                        "a power on or device reset detected\n");
3809                return 1;
3810        break;
3811        case UNIT_ATTENTION_CLEARED:
3812                dev_warn(&h->pdev->dev,
3813                        "unit attention cleared by another initiator\n");
3814                return 1;
3815        break;
3816        default:
3817                dev_warn(&h->pdev->dev, "unknown unit attention detected\n");
3818                return 1;
3819        }
3820}
3821
3822/*
3823 *  We cannot read the structure directly, for portability we must use
3824 *   the io functions.
3825 *   This is for debug only.
3826 */
3827static void print_cfg_table(ctlr_info_t *h)
3828{
3829        int i;
3830        char temp_name[17];
3831        CfgTable_struct *tb = h->cfgtable;
3832
3833        dev_dbg(&h->pdev->dev, "Controller Configuration information\n");
3834        dev_dbg(&h->pdev->dev, "------------------------------------\n");
3835        for (i = 0; i < 4; i++)
3836                temp_name[i] = readb(&(tb->Signature[i]));
3837        temp_name[4] = '\0';
3838        dev_dbg(&h->pdev->dev, "   Signature = %s\n", temp_name);
3839        dev_dbg(&h->pdev->dev, "   Spec Number = %d\n",
3840                readl(&(tb->SpecValence)));
3841        dev_dbg(&h->pdev->dev, "   Transport methods supported = 0x%x\n",
3842               readl(&(tb->TransportSupport)));
3843        dev_dbg(&h->pdev->dev, "   Transport methods active = 0x%x\n",
3844               readl(&(tb->TransportActive)));
3845        dev_dbg(&h->pdev->dev, "   Requested transport Method = 0x%x\n",
3846               readl(&(tb->HostWrite.TransportRequest)));
3847        dev_dbg(&h->pdev->dev, "   Coalesce Interrupt Delay = 0x%x\n",
3848               readl(&(tb->HostWrite.CoalIntDelay)));
3849        dev_dbg(&h->pdev->dev, "   Coalesce Interrupt Count = 0x%x\n",
3850               readl(&(tb->HostWrite.CoalIntCount)));
3851        dev_dbg(&h->pdev->dev, "   Max outstanding commands = 0x%x\n",
3852               readl(&(tb->CmdsOutMax)));
3853        dev_dbg(&h->pdev->dev, "   Bus Types = 0x%x\n",
3854                readl(&(tb->BusTypes)));
3855        for (i = 0; i < 16; i++)
3856                temp_name[i] = readb(&(tb->ServerName[i]));
3857        temp_name[16] = '\0';
3858        dev_dbg(&h->pdev->dev, "   Server Name = %s\n", temp_name);
3859        dev_dbg(&h->pdev->dev, "   Heartbeat Counter = 0x%x\n\n\n",
3860                readl(&(tb->HeartBeat)));
3861}
3862
3863static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
3864{
3865        int i, offset, mem_type, bar_type;
3866        if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
3867                return 0;
3868        offset = 0;
3869        for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
3870                bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
3871                if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
3872                        offset += 4;
3873                else {
3874                        mem_type = pci_resource_flags(pdev, i) &
3875                            PCI_BASE_ADDRESS_MEM_TYPE_MASK;
3876                        switch (mem_type) {
3877                        case PCI_BASE_ADDRESS_MEM_TYPE_32:
3878                        case PCI_BASE_ADDRESS_MEM_TYPE_1M:
3879                                offset += 4;    /* 32 bit */
3880                                break;
3881                        case PCI_BASE_ADDRESS_MEM_TYPE_64:
3882                                offset += 8;
3883                                break;
3884                        default:        /* reserved in PCI 2.2 */
3885                                dev_warn(&pdev->dev,
3886                                       "Base address is invalid\n");
3887                                return -1;
3888                                break;
3889                        }
3890                }
3891                if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
3892                        return i + 1;
3893        }
3894        return -1;
3895}
3896
3897/* Fill in bucket_map[], given nsgs (the max number of
3898 * scatter gather elements supported) and bucket[],
3899 * which is an array of 8 integers.  The bucket[] array
3900 * contains 8 different DMA transfer sizes (in 16
3901 * byte increments) which the controller uses to fetch
3902 * commands.  This function fills in bucket_map[], which
3903 * maps a given number of scatter gather elements to one of
3904 * the 8 DMA transfer sizes.  The point of it is to allow the
3905 * controller to only do as much DMA as needed to fetch the
3906 * command, with the DMA transfer size encoded in the lower
3907 * bits of the command address.
3908 */
3909static void  calc_bucket_map(int bucket[], int num_buckets,
3910        int nsgs, int *bucket_map)
3911{
3912        int i, j, b, size;
3913
3914        /* even a command with 0 SGs requires 4 blocks */
3915#define MINIMUM_TRANSFER_BLOCKS 4
3916#define NUM_BUCKETS 8
3917        /* Note, bucket_map must have nsgs+1 entries. */
3918        for (i = 0; i <= nsgs; i++) {
3919                /* Compute size of a command with i SG entries */
3920                size = i + MINIMUM_TRANSFER_BLOCKS;
3921                b = num_buckets; /* Assume the biggest bucket */
3922                /* Find the bucket that is just big enough */
3923                for (j = 0; j < 8; j++) {
3924                        if (bucket[j] >= size) {
3925                                b = j;
3926                                break;
3927                        }
3928                }
3929                /* for a command with i SG entries, use bucket b. */
3930                bucket_map[i] = b;
3931        }
3932}
3933
3934static void cciss_wait_for_mode_change_ack(ctlr_info_t *h)
3935{
3936        int i;
3937
3938        /* under certain very rare conditions, this can take awhile.
3939         * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
3940         * as we enter this code.) */
3941        for (i = 0; i < MAX_CONFIG_WAIT; i++) {
3942                if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
3943                        break;
3944                usleep_range(10000, 20000);
3945        }
3946}
3947
3948static void cciss_enter_performant_mode(ctlr_info_t *h, u32 use_short_tags)
3949{
3950        /* This is a bit complicated.  There are 8 registers on
3951         * the controller which we write to to tell it 8 different
3952         * sizes of commands which there may be.  It's a way of
3953         * reducing the DMA done to fetch each command.  Encoded into
3954         * each command's tag are 3 bits which communicate to the controller
3955         * which of the eight sizes that command fits within.  The size of
3956         * each command depends on how many scatter gather entries there are.
3957         * Each SG entry requires 16 bytes.  The eight registers are programmed
3958         * with the number of 16-byte blocks a command of that size requires.
3959         * The smallest command possible requires 5 such 16 byte blocks.
3960         * the largest command possible requires MAXSGENTRIES + 4 16-byte
3961         * blocks.  Note, this only extends to the SG entries contained
3962         * within the command block, and does not extend to chained blocks
3963         * of SG elements.   bft[] contains the eight values we write to
3964         * the registers.  They are not evenly distributed, but have more
3965         * sizes for small commands, and fewer sizes for larger commands.
3966         */
3967        __u32 trans_offset;
3968        int bft[8] = { 5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
3969                        /*
3970                         *  5 = 1 s/g entry or 4k
3971                         *  6 = 2 s/g entry or 8k
3972                         *  8 = 4 s/g entry or 16k
3973                         * 10 = 6 s/g entry or 24k
3974                         */
3975        unsigned long register_value;
3976        BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
3977
3978        h->reply_pool_wraparound = 1; /* spec: init to 1 */
3979
3980        /* Controller spec: zero out this buffer. */
3981        memset(h->reply_pool, 0, h->max_commands * sizeof(__u64));
3982        h->reply_pool_head = h->reply_pool;
3983
3984        trans_offset = readl(&(h->cfgtable->TransMethodOffset));
3985        calc_bucket_map(bft, ARRAY_SIZE(bft), h->maxsgentries,
3986                                h->blockFetchTable);
3987        writel(bft[0], &h->transtable->BlockFetch0);
3988        writel(bft[1], &h->transtable->BlockFetch1);
3989        writel(bft[2], &h->transtable->BlockFetch2);
3990        writel(bft[3], &h->transtable->BlockFetch3);
3991        writel(bft[4], &h->transtable->BlockFetch4);
3992        writel(bft[5], &h->transtable->BlockFetch5);
3993        writel(bft[6], &h->transtable->BlockFetch6);
3994        writel(bft[7], &h->transtable->BlockFetch7);
3995
3996        /* size of controller ring buffer */
3997        writel(h->max_commands, &h->transtable->RepQSize);
3998        writel(1, &h->transtable->RepQCount);
3999        writel(0, &h->transtable->RepQCtrAddrLow32);
4000        writel(0, &h->transtable->RepQCtrAddrHigh32);
4001        writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
4002        writel(0, &h->transtable->RepQAddr0High32);
4003        writel(CFGTBL_Trans_Performant | use_short_tags,
4004                        &(h->cfgtable->HostWrite.TransportRequest));
4005
4006        writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
4007        cciss_wait_for_mode_change_ack(h);
4008        register_value = readl(&(h->cfgtable->TransportActive));
4009        if (!(register_value & CFGTBL_Trans_Performant))
4010                dev_warn(&h->pdev->dev, "cciss: unable to get board into"
4011                                        " performant mode\n");
4012}
4013
4014static void cciss_put_controller_into_performant_mode(ctlr_info_t *h)
4015{
4016        __u32 trans_support;
4017
4018        if (cciss_simple_mode)
4019                return;
4020
4021        dev_dbg(&h->pdev->dev, "Trying to put board into Performant mode\n");
4022        /* Attempt to put controller into performant mode if supported */
4023        /* Does board support performant mode? */
4024        trans_support = readl(&(h->cfgtable->TransportSupport));
4025        if (!(trans_support & PERFORMANT_MODE))
4026                return;
4027
4028        dev_dbg(&h->pdev->dev, "Placing controller into performant mode\n");
4029        /* Performant mode demands commands on a 32 byte boundary
4030         * pci_alloc_consistent aligns on page boundarys already.
4031         * Just need to check if divisible by 32
4032         */
4033        if ((sizeof(CommandList_struct) % 32) != 0) {
4034                dev_warn(&h->pdev->dev, "%s %d %s\n",
4035                        "cciss info: command size[",
4036                        (int)sizeof(CommandList_struct),
4037                        "] not divisible by 32, no performant mode..\n");
4038                return;
4039        }
4040
4041        /* Performant mode ring buffer and supporting data structures */
4042        h->reply_pool = (__u64 *)pci_alloc_consistent(
4043                h->pdev, h->max_commands * sizeof(__u64),
4044                &(h->reply_pool_dhandle));
4045
4046        /* Need a block fetch table for performant mode */
4047        h->blockFetchTable = kmalloc(((h->maxsgentries+1) *
4048                sizeof(__u32)), GFP_KERNEL);
4049
4050        if ((h->reply_pool == NULL) || (h->blockFetchTable == NULL))
4051                goto clean_up;
4052
4053        cciss_enter_performant_mode(h,
4054                trans_support & CFGTBL_Trans_use_short_tags);
4055
4056        /* Change the access methods to the performant access methods */
4057        h->access = SA5_performant_access;
4058        h->transMethod = CFGTBL_Trans_Performant;
4059
4060        return;
4061clean_up:
4062        kfree(h->blockFetchTable);
4063        if (h->reply_pool)
4064                pci_free_consistent(h->pdev,
4065                                h->max_commands * sizeof(__u64),
4066                                h->reply_pool,
4067                                h->reply_pool_dhandle);
4068        return;
4069
4070} /* cciss_put_controller_into_performant_mode */
4071
4072/* If MSI/MSI-X is supported by the kernel we will try to enable it on
4073 * controllers that are capable. If not, we use IO-APIC mode.
4074 */
4075
4076static void cciss_interrupt_mode(ctlr_info_t *h)
4077{
4078#ifdef CONFIG_PCI_MSI
4079        int err;
4080        struct msix_entry cciss_msix_entries[4] = { {0, 0}, {0, 1},
4081        {0, 2}, {0, 3}
4082        };
4083
4084        /* Some boards advertise MSI but don't really support it */
4085        if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
4086            (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
4087                goto default_int_mode;
4088
4089        if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
4090                err = pci_enable_msix_exact(h->pdev, cciss_msix_entries, 4);
4091                if (!err) {
4092                        h->intr[0] = cciss_msix_entries[0].vector;
4093                        h->intr[1] = cciss_msix_entries[1].vector;
4094                        h->intr[2] = cciss_msix_entries[2].vector;
4095                        h->intr[3] = cciss_msix_entries[3].vector;
4096                        h->msix_vector = 1;
4097                        return;
4098                } else {
4099                        dev_warn(&h->pdev->dev,
4100                                "MSI-X init failed %d\n", err);
4101                }
4102        }
4103        if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
4104                if (!pci_enable_msi(h->pdev))
4105                        h->msi_vector = 1;
4106                else
4107                        dev_warn(&h->pdev->dev, "MSI init failed\n");
4108        }
4109default_int_mode:
4110#endif                          /* CONFIG_PCI_MSI */
4111        /* if we get here we're going to use the default interrupt mode */
4112        h->intr[h->intr_mode] = h->pdev->irq;
4113        return;
4114}
4115
4116static int cciss_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
4117{
4118        int i;
4119        u32 subsystem_vendor_id, subsystem_device_id;
4120
4121        subsystem_vendor_id = pdev->subsystem_vendor;
4122        subsystem_device_id = pdev->subsystem_device;
4123        *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
4124                        subsystem_vendor_id;
4125
4126        for (i = 0; i < ARRAY_SIZE(products); i++) {
4127                /* Stand aside for hpsa driver on request */
4128                if (cciss_allow_hpsa)
4129                        return -ENODEV;
4130                if (*board_id == products[i].board_id)
4131                        return i;
4132        }
4133        dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x, ignoring.\n",
4134                *board_id);
4135        return -ENODEV;
4136}
4137
4138static inline bool cciss_board_disabled(ctlr_info_t *h)
4139{
4140        u16 command;
4141
4142        (void) pci_read_config_word(h->pdev, PCI_COMMAND, &command);
4143        return ((command & PCI_COMMAND_MEMORY) == 0);
4144}
4145
4146static int cciss_pci_find_memory_BAR(struct pci_dev *pdev,
4147                                     unsigned long *memory_bar)
4148{
4149        int i;
4150
4151        for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
4152                if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
4153                        /* addressing mode bits already removed */
4154                        *memory_bar = pci_resource_start(pdev, i);
4155                        dev_dbg(&pdev->dev, "memory BAR = %lx\n",
4156                                *memory_bar);
4157                        return 0;
4158                }
4159        dev_warn(&pdev->dev, "no memory BAR found\n");
4160        return -ENODEV;
4161}
4162
4163static int cciss_wait_for_board_state(struct pci_dev *pdev,
4164                                      void __iomem *vaddr, int wait_for_ready)
4165#define BOARD_READY 1
4166#define BOARD_NOT_READY 0
4167{
4168        int i, iterations;
4169        u32 scratchpad;
4170
4171        if (wait_for_ready)
4172                iterations = CCISS_BOARD_READY_ITERATIONS;
4173        else
4174                iterations = CCISS_BOARD_NOT_READY_ITERATIONS;
4175
4176        for (i = 0; i < iterations; i++) {
4177                scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
4178                if (wait_for_ready) {
4179                        if (scratchpad == CCISS_FIRMWARE_READY)
4180                                return 0;
4181                } else {
4182                        if (scratchpad != CCISS_FIRMWARE_READY)
4183                                return 0;
4184                }
4185                msleep(CCISS_BOARD_READY_POLL_INTERVAL_MSECS);
4186        }
4187        dev_warn(&pdev->dev, "board not ready, timed out.\n");
4188        return -ENODEV;
4189}
4190
4191static int cciss_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
4192                                u32 *cfg_base_addr, u64 *cfg_base_addr_index,
4193                                u64 *cfg_offset)
4194{
4195        *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
4196        *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
4197        *cfg_base_addr &= (u32) 0x0000ffff;
4198        *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
4199        if (*cfg_base_addr_index == -1) {
4200                dev_warn(&pdev->dev, "cannot find cfg_base_addr_index, "
4201                        "*cfg_base_addr = 0x%08x\n", *cfg_base_addr);
4202                return -ENODEV;
4203        }
4204        return 0;
4205}
4206
4207static int cciss_find_cfgtables(ctlr_info_t *h)
4208{
4209        u64 cfg_offset;
4210        u32 cfg_base_addr;
4211        u64 cfg_base_addr_index;
4212        u32 trans_offset;
4213        int rc;
4214
4215        rc = cciss_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
4216                &cfg_base_addr_index, &cfg_offset);
4217        if (rc)
4218                return rc;
4219        h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
4220                cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
4221        if (!h->cfgtable)
4222                return -ENOMEM;
4223        rc = write_driver_ver_to_cfgtable(h->cfgtable);
4224        if (rc)
4225                return rc;
4226        /* Find performant mode table. */
4227        trans_offset = readl(&h->cfgtable->TransMethodOffset);
4228        h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
4229                                cfg_base_addr_index)+cfg_offset+trans_offset,
4230                                sizeof(*h->transtable));
4231        if (!h->transtable)
4232                return -ENOMEM;
4233        return 0;
4234}
4235
4236static void cciss_get_max_perf_mode_cmds(struct ctlr_info *h)
4237{
4238        h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
4239
4240        /* Limit commands in memory limited kdump scenario. */
4241        if (reset_devices && h->max_commands > 32)
4242                h->max_commands = 32;
4243
4244        if (h->max_commands < 16) {
4245                dev_warn(&h->pdev->dev, "Controller reports "
4246                        "max supported commands of %d, an obvious lie. "
4247                        "Using 16.  Ensure that firmware is up to date.\n",
4248                        h->max_commands);
4249                h->max_commands = 16;
4250        }
4251}
4252
4253/* Interrogate the hardware for some limits:
4254 * max commands, max SG elements without chaining, and with chaining,
4255 * SG chain block size, etc.
4256 */
4257static void cciss_find_board_params(ctlr_info_t *h)
4258{
4259        cciss_get_max_perf_mode_cmds(h);
4260        h->nr_cmds = h->max_commands - 4 - cciss_tape_cmds;
4261        h->maxsgentries = readl(&(h->cfgtable->MaxSGElements));
4262        /*
4263         * The P600 may exhibit poor performnace under some workloads
4264         * if we use the value in the configuration table. Limit this
4265         * controller to MAXSGENTRIES (32) instead.
4266         */
4267        if (h->board_id == 0x3225103C)
4268                h->maxsgentries = MAXSGENTRIES;
4269        /*
4270         * Limit in-command s/g elements to 32 save dma'able memory.
4271         * Howvever spec says if 0, use 31
4272         */
4273        h->max_cmd_sgentries = 31;
4274        if (h->maxsgentries > 512) {
4275                h->max_cmd_sgentries = 32;
4276                h->chainsize = h->maxsgentries - h->max_cmd_sgentries + 1;
4277                h->maxsgentries--; /* save one for chain pointer */
4278        } else {
4279                h->maxsgentries = 31; /* default to traditional values */
4280                h->chainsize = 0;
4281        }
4282}
4283
4284static inline bool CISS_signature_present(ctlr_info_t *h)
4285{
4286        if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
4287                dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
4288                return false;
4289        }
4290        return true;
4291}
4292
4293/* Need to enable prefetch in the SCSI core for 6400 in x86 */
4294static inline void cciss_enable_scsi_prefetch(ctlr_info_t *h)
4295{
4296#ifdef CONFIG_X86
4297        u32 prefetch;
4298
4299        prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
4300        prefetch |= 0x100;
4301        writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
4302#endif
4303}
4304
4305/* Disable DMA prefetch for the P600.  Otherwise an ASIC bug may result
4306 * in a prefetch beyond physical memory.
4307 */
4308static inline void cciss_p600_dma_prefetch_quirk(ctlr_info_t *h)
4309{
4310        u32 dma_prefetch;
4311        __u32 dma_refetch;
4312
4313        if (h->board_id != 0x3225103C)
4314                return;
4315        dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
4316        dma_prefetch |= 0x8000;
4317        writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
4318        pci_read_config_dword(h->pdev, PCI_COMMAND_PARITY, &dma_refetch);
4319        dma_refetch |= 0x1;
4320        pci_write_config_dword(h->pdev, PCI_COMMAND_PARITY, dma_refetch);
4321}
4322
4323static int cciss_pci_init(ctlr_info_t *h)
4324{
4325        int prod_index, err;
4326
4327        prod_index = cciss_lookup_board_id(h->pdev, &h->board_id);
4328        if (prod_index < 0)
4329                return -ENODEV;
4330        h->product_name = products[prod_index].product_name;
4331        h->access = *(products[prod_index].access);
4332
4333        if (cciss_board_disabled(h)) {
4334                dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
4335                return -ENODEV;
4336        }
4337
4338        pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
4339                                PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
4340
4341        err = pci_enable_device(h->pdev);
4342        if (err) {
4343                dev_warn(&h->pdev->dev, "Unable to Enable PCI device\n");
4344                return err;
4345        }
4346
4347        err = pci_request_regions(h->pdev, "cciss");
4348        if (err) {
4349                dev_warn(&h->pdev->dev,
4350                        "Cannot obtain PCI resources, aborting\n");
4351                return err;
4352        }
4353
4354        dev_dbg(&h->pdev->dev, "irq = %x\n", h->pdev->irq);
4355        dev_dbg(&h->pdev->dev, "board_id = %x\n", h->board_id);
4356
4357/* If the kernel supports MSI/MSI-X we will try to enable that functionality,
4358 * else we use the IO-APIC interrupt assigned to us by system ROM.
4359 */
4360        cciss_interrupt_mode(h);
4361        err = cciss_pci_find_memory_BAR(h->pdev, &h->paddr);
4362        if (err)
4363                goto err_out_free_res;
4364        h->vaddr = remap_pci_mem(h->paddr, 0x250);
4365        if (!h->vaddr) {
4366                err = -ENOMEM;
4367                goto err_out_free_res;
4368        }
4369        err = cciss_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
4370        if (err)
4371                goto err_out_free_res;
4372        err = cciss_find_cfgtables(h);
4373        if (err)
4374                goto err_out_free_res;
4375        print_cfg_table(h);
4376        cciss_find_board_params(h);
4377
4378        if (!CISS_signature_present(h)) {
4379                err = -ENODEV;
4380                goto err_out_free_res;
4381        }
4382        cciss_enable_scsi_prefetch(h);
4383        cciss_p600_dma_prefetch_quirk(h);
4384        err = cciss_enter_simple_mode(h);
4385        if (err)
4386                goto err_out_free_res;
4387        cciss_put_controller_into_performant_mode(h);
4388        return 0;
4389
4390err_out_free_res:
4391        /*
4392         * Deliberately omit pci_disable_device(): it does something nasty to
4393         * Smart Array controllers that pci_enable_device does not undo
4394         */
4395        if (h->transtable)
4396                iounmap(h->transtable);
4397        if (h->cfgtable)
4398                iounmap(h->cfgtable);
4399        if (h->vaddr)
4400                iounmap(h->vaddr);
4401        pci_release_regions(h->pdev);
4402        return err;
4403}
4404
4405/* Function to find the first free pointer into our hba[] array
4406 * Returns -1 if no free entries are left.
4407 */
4408static int alloc_cciss_hba(struct pci_dev *pdev)
4409{
4410        int i;
4411
4412        for (i = 0; i < MAX_CTLR; i++) {
4413                if (!hba[i]) {
4414                        ctlr_info_t *h;
4415
4416                        h = kzalloc(sizeof(ctlr_info_t), GFP_KERNEL);
4417                        if (!h)
4418                                goto Enomem;
4419                        hba[i] = h;
4420                        return i;
4421                }
4422        }
4423        dev_warn(&pdev->dev, "This driver supports a maximum"
4424               " of %d controllers.\n", MAX_CTLR);
4425        return -1;
4426Enomem:
4427        dev_warn(&pdev->dev, "out of memory.\n");
4428        return -1;
4429}
4430
4431static void free_hba(ctlr_info_t *h)
4432{
4433        int i;
4434
4435        hba[h->ctlr] = NULL;
4436        for (i = 0; i < h->highest_lun + 1; i++)
4437                if (h->gendisk[i] != NULL)
4438                        put_disk(h->gendisk[i]);
4439        kfree(h);
4440}
4441
4442/* Send a message CDB to the firmware. */
4443static int cciss_message(struct pci_dev *pdev, unsigned char opcode,
4444                         unsigned char type)
4445{
4446        typedef struct {
4447                CommandListHeader_struct CommandHeader;
4448                RequestBlock_struct Request;
4449                ErrDescriptor_struct ErrorDescriptor;
4450        } Command;
4451        static const size_t cmd_sz = sizeof(Command) + sizeof(ErrorInfo_struct);
4452        Command *cmd;
4453        dma_addr_t paddr64;
4454        uint32_t paddr32, tag;
4455        void __iomem *vaddr;
4456        int i, err;
4457
4458        vaddr = ioremap_nocache(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
4459        if (vaddr == NULL)
4460                return -ENOMEM;
4461
4462        /* The Inbound Post Queue only accepts 32-bit physical addresses for the
4463           CCISS commands, so they must be allocated from the lower 4GiB of
4464           memory. */
4465        err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
4466        if (err) {
4467                iounmap(vaddr);
4468                return -ENOMEM;
4469        }
4470
4471        cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
4472        if (cmd == NULL) {
4473                iounmap(vaddr);
4474                return -ENOMEM;
4475        }
4476
4477        /* This must fit, because of the 32-bit consistent DMA mask.  Also,
4478           although there's no guarantee, we assume that the address is at
4479           least 4-byte aligned (most likely, it's page-aligned). */
4480        paddr32 = paddr64;
4481
4482        cmd->CommandHeader.ReplyQueue = 0;
4483        cmd->CommandHeader.SGList = 0;
4484        cmd->CommandHeader.SGTotal = 0;
4485        cmd->CommandHeader.Tag.lower = paddr32;
4486        cmd->CommandHeader.Tag.upper = 0;
4487        memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
4488
4489        cmd->Request.CDBLen = 16;
4490        cmd->Request.Type.Type = TYPE_MSG;
4491        cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
4492        cmd->Request.Type.Direction = XFER_NONE;
4493        cmd->Request.Timeout = 0; /* Don't time out */
4494        cmd->Request.CDB[0] = opcode;
4495        cmd->Request.CDB[1] = type;
4496        memset(&cmd->Request.CDB[2], 0, 14); /* the rest of the CDB is reserved */
4497
4498        cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(Command);
4499        cmd->ErrorDescriptor.Addr.upper = 0;
4500        cmd->ErrorDescriptor.Len = sizeof(ErrorInfo_struct);
4501
4502        writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
4503
4504        for (i = 0; i < 10; i++) {
4505                tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
4506                if ((tag & ~3) == paddr32)
4507                        break;
4508                msleep(CCISS_POST_RESET_NOOP_TIMEOUT_MSECS);
4509        }
4510
4511        iounmap(vaddr);
4512
4513        /* we leak the DMA buffer here ... no choice since the controller could
4514           still complete the command. */
4515        if (i == 10) {
4516                dev_err(&pdev->dev,
4517                        "controller message %02x:%02x timed out\n",
4518                        opcode, type);
4519                return -ETIMEDOUT;
4520        }
4521
4522        pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
4523
4524        if (tag & 2) {
4525                dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
4526                        opcode, type);
4527                return -EIO;
4528        }
4529
4530        dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
4531                opcode, type);
4532        return 0;
4533}
4534
4535#define cciss_noop(p) cciss_message(p, 3, 0)
4536
4537static int cciss_controller_hard_reset(struct pci_dev *pdev,
4538        void * __iomem vaddr, u32 use_doorbell)
4539{
4540        u16 pmcsr;
4541        int pos;
4542
4543        if (use_doorbell) {
4544                /* For everything after the P600, the PCI power state method
4545                 * of resetting the controller doesn't work, so we have this
4546                 * other way using the doorbell register.
4547                 */
4548                dev_info(&pdev->dev, "using doorbell to reset controller\n");
4549                writel(use_doorbell, vaddr + SA5_DOORBELL);
4550        } else { /* Try to do it the PCI power state way */
4551
4552                /* Quoting from the Open CISS Specification: "The Power
4553                 * Management Control/Status Register (CSR) controls the power
4554                 * state of the device.  The normal operating state is D0,
4555                 * CSR=00h.  The software off state is D3, CSR=03h.  To reset
4556                 * the controller, place the interface device in D3 then to D0,
4557                 * this causes a secondary PCI reset which will reset the
4558                 * controller." */
4559
4560                pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
4561                if (pos == 0) {
4562                        dev_err(&pdev->dev,
4563                                "cciss_controller_hard_reset: "
4564                                "PCI PM not supported\n");
4565                        return -ENODEV;
4566                }
4567                dev_info(&pdev->dev, "using PCI PM to reset controller\n");
4568                /* enter the D3hot power management state */
4569                pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
4570                pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
4571                pmcsr |= PCI_D3hot;
4572                pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
4573
4574                msleep(500);
4575
4576                /* enter the D0 power management state */
4577                pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
4578                pmcsr |= PCI_D0;
4579                pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
4580
4581                /*
4582                 * The P600 requires a small delay when changing states.
4583                 * Otherwise we may think the board did not reset and we bail.
4584                 * This for kdump only and is particular to the P600.
4585                 */
4586                msleep(500);
4587        }
4588        return 0;
4589}
4590
4591static void init_driver_version(char *driver_version, int len)
4592{
4593        memset(driver_version, 0, len);
4594        strncpy(driver_version, "cciss " DRIVER_NAME, len - 1);
4595}
4596
4597static int write_driver_ver_to_cfgtable(CfgTable_struct __iomem *cfgtable)
4598{
4599        char *driver_version;
4600        int i, size = sizeof(cfgtable->driver_version);
4601
4602        driver_version = kmalloc(size, GFP_KERNEL);
4603        if (!driver_version)
4604                return -ENOMEM;
4605
4606        init_driver_version(driver_version, size);
4607        for (i = 0; i < size; i++)
4608                writeb(driver_version[i], &cfgtable->driver_version[i]);
4609        kfree(driver_version);
4610        return 0;
4611}
4612
4613static void read_driver_ver_from_cfgtable(CfgTable_struct __iomem *cfgtable,
4614                                          unsigned char *driver_ver)
4615{
4616        int i;
4617
4618        for (i = 0; i < sizeof(cfgtable->driver_version); i++)
4619                driver_ver[i] = readb(&cfgtable->driver_version[i]);
4620}
4621
4622static int controller_reset_failed(CfgTable_struct __iomem *cfgtable)
4623{
4624
4625        char *driver_ver, *old_driver_ver;
4626        int rc, size = sizeof(cfgtable->driver_version);
4627
4628        old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
4629        if (!old_driver_ver)
4630                return -ENOMEM;
4631        driver_ver = old_driver_ver + size;
4632
4633        /* After a reset, the 32 bytes of "driver version" in the cfgtable
4634         * should have been changed, otherwise we know the reset failed.
4635         */
4636        init_driver_version(old_driver_ver, size);
4637        read_driver_ver_from_cfgtable(cfgtable, driver_ver);
4638        rc = !memcmp(driver_ver, old_driver_ver, size);
4639        kfree(old_driver_ver);
4640        return rc;
4641}
4642
4643/* This does a hard reset of the controller using PCI power management
4644 * states or using the doorbell register. */
4645static int cciss_kdump_hard_reset_controller(struct pci_dev *pdev)
4646{
4647        u64 cfg_offset;
4648        u32 cfg_base_addr;
4649        u64 cfg_base_addr_index;
4650        void __iomem *vaddr;
4651        unsigned long paddr;
4652        u32 misc_fw_support;
4653        int rc;
4654        CfgTable_struct __iomem *cfgtable;
4655        u32 use_doorbell;
4656        u32 board_id;
4657        u16 command_register;
4658
4659        /* For controllers as old a the p600, this is very nearly
4660         * the same thing as
4661         *
4662         * pci_save_state(pci_dev);
4663         * pci_set_power_state(pci_dev, PCI_D3hot);
4664         * pci_set_power_state(pci_dev, PCI_D0);
4665         * pci_restore_state(pci_dev);
4666         *
4667         * For controllers newer than the P600, the pci power state
4668         * method of resetting doesn't work so we have another way
4669         * using the doorbell register.
4670         */
4671
4672        /* Exclude 640x boards.  These are two pci devices in one slot
4673         * which share a battery backed cache module.  One controls the
4674         * cache, the other accesses the cache through the one that controls
4675         * it.  If we reset the one controlling the cache, the other will
4676         * likely not be happy.  Just forbid resetting this conjoined mess.
4677         */
4678        cciss_lookup_board_id(pdev, &board_id);
4679        if (!ctlr_is_resettable(board_id)) {
4680                dev_warn(&pdev->dev, "Controller not resettable\n");
4681                return -ENODEV;
4682        }
4683
4684        /* if controller is soft- but not hard resettable... */
4685        if (!ctlr_is_hard_resettable(board_id))
4686                return -ENOTSUPP; /* try soft reset later. */
4687
4688        /* Save the PCI command register */
4689        pci_read_config_word(pdev, 4, &command_register);
4690        /* Turn the board off.  This is so that later pci_restore_state()
4691         * won't turn the board on before the rest of config space is ready.
4692         */
4693        pci_disable_device(pdev);
4694        pci_save_state(pdev);
4695
4696        /* find the first memory BAR, so we can find the cfg table */
4697        rc = cciss_pci_find_memory_BAR(pdev, &paddr);
4698        if (rc)
4699                return rc;
4700        vaddr = remap_pci_mem(paddr, 0x250);
4701        if (!vaddr)
4702                return -ENOMEM;
4703
4704        /* find cfgtable in order to check if reset via doorbell is supported */
4705        rc = cciss_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
4706                                        &cfg_base_addr_index, &cfg_offset);
4707        if (rc)
4708                goto unmap_vaddr;
4709        cfgtable = remap_pci_mem(pci_resource_start(pdev,
4710                       cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
4711        if (!cfgtable) {
4712                rc = -ENOMEM;
4713                goto unmap_vaddr;
4714        }
4715        rc = write_driver_ver_to_cfgtable(cfgtable);
4716        if (rc)
4717                goto unmap_vaddr;
4718
4719        /* If reset via doorbell register is supported, use that.
4720         * There are two such methods.  Favor the newest method.
4721         */
4722        misc_fw_support = readl(&cfgtable->misc_fw_support);
4723        use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
4724        if (use_doorbell) {
4725                use_doorbell = DOORBELL_CTLR_RESET2;
4726        } else {
4727                use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
4728                if (use_doorbell) {
4729                        dev_warn(&pdev->dev, "Controller claims that "
4730                                "'Bit 2 doorbell reset' is "
4731                                "supported, but not 'bit 5 doorbell reset'.  "
4732                                "Firmware update is recommended.\n");
4733                        rc = -ENOTSUPP; /* use the soft reset */
4734                        goto unmap_cfgtable;
4735                }
4736        }
4737
4738        rc = cciss_controller_hard_reset(pdev, vaddr, use_doorbell);
4739        if (rc)
4740                goto unmap_cfgtable;
4741        pci_restore_state(pdev);
4742        rc = pci_enable_device(pdev);
4743        if (rc) {
4744                dev_warn(&pdev->dev, "failed to enable device.\n");
4745                goto unmap_cfgtable;
4746        }
4747        pci_write_config_word(pdev, 4, command_register);
4748
4749        /* Some devices (notably the HP Smart Array 5i Controller)
4750           need a little pause here */
4751        msleep(CCISS_POST_RESET_PAUSE_MSECS);
4752
4753        /* Wait for board to become not ready, then ready. */
4754        dev_info(&pdev->dev, "Waiting for board to reset.\n");
4755        rc = cciss_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
4756        if (rc) {
4757                dev_warn(&pdev->dev, "Failed waiting for board to hard reset."
4758                                "  Will try soft reset.\n");
4759                rc = -ENOTSUPP; /* Not expected, but try soft reset later */
4760                goto unmap_cfgtable;
4761        }
4762        rc = cciss_wait_for_board_state(pdev, vaddr, BOARD_READY);
4763        if (rc) {
4764                dev_warn(&pdev->dev,
4765                        "failed waiting for board to become ready "
4766                        "after hard reset\n");
4767                goto unmap_cfgtable;
4768        }
4769
4770        rc = controller_reset_failed(vaddr);
4771        if (rc < 0)
4772                goto unmap_cfgtable;
4773        if (rc) {
4774                dev_warn(&pdev->dev, "Unable to successfully hard reset "
4775                        "controller. Will try soft reset.\n");
4776                rc = -ENOTSUPP; /* Not expected, but try soft reset later */
4777        } else {
4778                dev_info(&pdev->dev, "Board ready after hard reset.\n");
4779        }
4780
4781unmap_cfgtable:
4782        iounmap(cfgtable);
4783
4784unmap_vaddr:
4785        iounmap(vaddr);
4786        return rc;
4787}
4788
4789static int cciss_init_reset_devices(struct pci_dev *pdev)
4790{
4791        int rc, i;
4792
4793        if (!reset_devices)
4794                return 0;
4795
4796        /* Reset the controller with a PCI power-cycle or via doorbell */
4797        rc = cciss_kdump_hard_reset_controller(pdev);
4798
4799        /* -ENOTSUPP here means we cannot reset the controller
4800         * but it's already (and still) up and running in
4801         * "performant mode".  Or, it might be 640x, which can't reset
4802         * due to concerns about shared bbwc between 6402/6404 pair.
4803         */
4804        if (rc == -ENOTSUPP)
4805                return rc; /* just try to do the kdump anyhow. */
4806        if (rc)
4807                return -ENODEV;
4808
4809        /* Now try to get the controller to respond to a no-op */
4810        dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n");
4811        for (i = 0; i < CCISS_POST_RESET_NOOP_RETRIES; i++) {
4812                if (cciss_noop(pdev) == 0)
4813                        break;
4814                else
4815                        dev_warn(&pdev->dev, "no-op failed%s\n",
4816                                (i < CCISS_POST_RESET_NOOP_RETRIES - 1 ?
4817                                        "; re-trying" : ""));
4818                msleep(CCISS_POST_RESET_NOOP_INTERVAL_MSECS);
4819        }
4820        return 0;
4821}
4822
4823static int cciss_allocate_cmd_pool(ctlr_info_t *h)
4824{
4825        h->cmd_pool_bits = kmalloc(BITS_TO_LONGS(h->nr_cmds) *
4826                sizeof(unsigned long), GFP_KERNEL);
4827        h->cmd_pool = pci_alloc_consistent(h->pdev,
4828                h->nr_cmds * sizeof(CommandList_struct),
4829                &(h->cmd_pool_dhandle));
4830        h->errinfo_pool = pci_alloc_consistent(h->pdev,
4831                h->nr_cmds * sizeof(ErrorInfo_struct),
4832                &(h->errinfo_pool_dhandle));
4833        if ((h->cmd_pool_bits == NULL)
4834                || (h->cmd_pool == NULL)
4835                || (h->errinfo_pool == NULL)) {
4836                dev_err(&h->pdev->dev, "out of memory");
4837                return -ENOMEM;
4838        }
4839        return 0;
4840}
4841
4842static int cciss_allocate_scatterlists(ctlr_info_t *h)
4843{
4844        int i;
4845
4846        /* zero it, so that on free we need not know how many were alloc'ed */
4847        h->scatter_list = kzalloc(h->max_commands *
4848                                sizeof(struct scatterlist *), GFP_KERNEL);
4849        if (!h->scatter_list)
4850                return -ENOMEM;
4851
4852        for (i = 0; i < h->nr_cmds; i++) {
4853                h->scatter_list[i] = kmalloc(sizeof(struct scatterlist) *
4854                                                h->maxsgentries, GFP_KERNEL);
4855                if (h->scatter_list[i] == NULL) {
4856                        dev_err(&h->pdev->dev, "could not allocate "
4857                                "s/g lists\n");
4858                        return -ENOMEM;
4859                }
4860        }
4861        return 0;
4862}
4863
4864static void cciss_free_scatterlists(ctlr_info_t *h)
4865{
4866        int i;
4867
4868        if (h->scatter_list) {
4869                for (i = 0; i < h->nr_cmds; i++)
4870                        kfree(h->scatter_list[i]);
4871                kfree(h->scatter_list);
4872        }
4873}
4874
4875static void cciss_free_cmd_pool(ctlr_info_t *h)
4876{
4877        kfree(h->cmd_pool_bits);
4878        if (h->cmd_pool)
4879                pci_free_consistent(h->pdev,
4880                        h->nr_cmds * sizeof(CommandList_struct),
4881                        h->cmd_pool, h->cmd_pool_dhandle);
4882        if (h->errinfo_pool)
4883                pci_free_consistent(h->pdev,
4884                        h->nr_cmds * sizeof(ErrorInfo_struct),
4885                        h->errinfo_pool, h->errinfo_pool_dhandle);
4886}
4887
4888static int cciss_request_irq(ctlr_info_t *h,
4889        irqreturn_t (*msixhandler)(int, void *),
4890        irqreturn_t (*intxhandler)(int, void *))
4891{
4892        if (h->msix_vector || h->msi_vector) {
4893                if (!request_irq(h->intr[h->intr_mode], msixhandler,
4894                                0, h->devname, h))
4895                        return 0;
4896                dev_err(&h->pdev->dev, "Unable to get msi irq %d"
4897                        " for %s\n", h->intr[h->intr_mode],
4898                        h->devname);
4899                return -1;
4900        }
4901
4902        if (!request_irq(h->intr[h->intr_mode], intxhandler,
4903                        IRQF_SHARED, h->devname, h))
4904                return 0;
4905        dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n",
4906                h->intr[h->intr_mode], h->devname);
4907        return -1;
4908}
4909
4910static int cciss_kdump_soft_reset(ctlr_info_t *h)
4911{
4912        if (cciss_send_reset(h, CTLR_LUNID, CCISS_RESET_TYPE_CONTROLLER)) {
4913                dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
4914                return -EIO;
4915        }
4916
4917        dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
4918        if (cciss_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
4919                dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
4920                return -1;
4921        }
4922
4923        dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
4924        if (cciss_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
4925                dev_warn(&h->pdev->dev, "Board failed to become ready "
4926                        "after soft reset.\n");
4927                return -1;
4928        }
4929
4930        return 0;
4931}
4932
4933static void cciss_undo_allocations_after_kdump_soft_reset(ctlr_info_t *h)
4934{
4935        int ctlr = h->ctlr;
4936
4937        free_irq(h->intr[h->intr_mode], h);
4938#ifdef CONFIG_PCI_MSI
4939        if (h->msix_vector)
4940                pci_disable_msix(h->pdev);
4941        else if (h->msi_vector)
4942                pci_disable_msi(h->pdev);
4943#endif /* CONFIG_PCI_MSI */
4944        cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
4945        cciss_free_scatterlists(h);
4946        cciss_free_cmd_pool(h);
4947        kfree(h->blockFetchTable);
4948        if (h->reply_pool)
4949                pci_free_consistent(h->pdev, h->max_commands * sizeof(__u64),
4950                                h->reply_pool, h->reply_pool_dhandle);
4951        if (h->transtable)
4952                iounmap(h->transtable);
4953        if (h->cfgtable)
4954                iounmap(h->cfgtable);
4955        if (h->vaddr)
4956                iounmap(h->vaddr);
4957        unregister_blkdev(h->major, h->devname);
4958        cciss_destroy_hba_sysfs_entry(h);
4959        pci_release_regions(h->pdev);
4960        kfree(h);
4961        hba[ctlr] = NULL;
4962}
4963
4964/*
4965 *  This is it.  Find all the controllers and register them.  I really hate
4966 *  stealing all these major device numbers.
4967 *  returns the number of block devices registered.
4968 */
4969static int cciss_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
4970{
4971        int i;
4972        int j = 0;
4973        int rc;
4974        int try_soft_reset = 0;
4975        int dac, return_code;
4976        InquiryData_struct *inq_buff;
4977        ctlr_info_t *h;
4978        unsigned long flags;
4979
4980        /*
4981         * By default the cciss driver is used for all older HP Smart Array
4982         * controllers. There are module paramaters that allow a user to
4983         * override this behavior and instead use the hpsa SCSI driver. If
4984         * this is the case cciss may be loaded first from the kdump initrd
4985         * image and cause a kernel panic. So if reset_devices is true and
4986         * cciss_allow_hpsa is set just bail.
4987         */
4988        if ((reset_devices) && (cciss_allow_hpsa == 1))
4989                return -ENODEV;
4990        rc = cciss_init_reset_devices(pdev);
4991        if (rc) {
4992                if (rc != -ENOTSUPP)
4993                        return rc;
4994                /* If the reset fails in a particular way (it has no way to do
4995                 * a proper hard reset, so returns -ENOTSUPP) we can try to do
4996                 * a soft reset once we get the controller configured up to the
4997                 * point that it can accept a command.
4998                 */
4999                try_soft_reset = 1;
5000                rc = 0;
5001        }
5002
5003reinit_after_soft_reset:
5004
5005        i = alloc_cciss_hba(pdev);
5006        if (i < 0)
5007                return -ENOMEM;
5008
5009        h = hba[i];
5010        h->pdev = pdev;
5011        h->busy_initializing = 1;
5012        h->intr_mode = cciss_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
5013        INIT_LIST_HEAD(&h->cmpQ);
5014        INIT_LIST_HEAD(&h->reqQ);
5015        mutex_init(&h->busy_shutting_down);
5016
5017        if (cciss_pci_init(h) != 0)
5018                goto clean_no_release_regions;
5019
5020        sprintf(h->devname, "cciss%d", i);
5021        h->ctlr = i;
5022
5023        if (cciss_tape_cmds < 2)
5024                cciss_tape_cmds = 2;
5025        if (cciss_tape_cmds > 16)
5026                cciss_tape_cmds = 16;
5027
5028        init_completion(&h->scan_wait);
5029
5030        if (cciss_create_hba_sysfs_entry(h))
5031                goto clean0;
5032
5033        /* configure PCI DMA stuff */
5034        if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
5035                dac = 1;
5036        else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
5037                dac = 0;
5038        else {
5039                dev_err(&h->pdev->dev, "no suitable DMA available\n");
5040                goto clean1;
5041        }
5042
5043        /*
5044         * register with the major number, or get a dynamic major number
5045         * by passing 0 as argument.  This is done for greater than
5046         * 8 controller support.
5047         */
5048        if (i < MAX_CTLR_ORIG)
5049                h->major = COMPAQ_CISS_MAJOR + i;
5050        rc = register_blkdev(h->major, h->devname);
5051        if (rc == -EBUSY || rc == -EINVAL) {
5052                dev_err(&h->pdev->dev,
5053                       "Unable to get major number %d for %s "
5054                       "on hba %d\n", h->major, h->devname, i);
5055                goto clean1;
5056        } else {
5057                if (i >= MAX_CTLR_ORIG)
5058                        h->major = rc;
5059        }
5060
5061        /* make sure the board interrupts are off */
5062        h->access.set_intr_mask(h, CCISS_INTR_OFF);
5063        rc = cciss_request_irq(h, do_cciss_msix_intr, do_cciss_intx);
5064        if (rc)
5065                goto clean2;
5066
5067        dev_info(&h->pdev->dev, "%s: <0x%x> at PCI %s IRQ %d%s using DAC\n",
5068               h->devname, pdev->device, pci_name(pdev),
5069               h->intr[h->intr_mode], dac ? "" : " not");
5070
5071        if (cciss_allocate_cmd_pool(h))
5072                goto clean4;
5073
5074        if (cciss_allocate_scatterlists(h))
5075                goto clean4;
5076
5077        h->cmd_sg_list = cciss_allocate_sg_chain_blocks(h,
5078                h->chainsize, h->nr_cmds);
5079        if (!h->cmd_sg_list && h->chainsize > 0)
5080                goto clean4;
5081
5082        spin_lock_init(&h->lock);
5083
5084        /* Initialize the pdev driver private data.
5085           have it point to h.  */
5086        pci_set_drvdata(pdev, h);
5087        /* command and error info recs zeroed out before
5088           they are used */
5089        bitmap_zero(h->cmd_pool_bits, h->nr_cmds);
5090
5091        h->num_luns = 0;
5092        h->highest_lun = -1;
5093        for (j = 0; j < CISS_MAX_LUN; j++) {
5094                h->drv[j] = NULL;
5095                h->gendisk[j] = NULL;
5096        }
5097
5098        /* At this point, the controller is ready to take commands.
5099         * Now, if reset_devices and the hard reset didn't work, try
5100         * the soft reset and see if that works.
5101         */
5102        if (try_soft_reset) {
5103
5104                /* This is kind of gross.  We may or may not get a completion
5105                 * from the soft reset command, and if we do, then the value
5106                 * from the fifo may or may not be valid.  So, we wait 10 secs
5107                 * after the reset throwing away any completions we get during
5108                 * that time.  Unregister the interrupt handler and register
5109                 * fake ones to scoop up any residual completions.
5110                 */
5111                spin_lock_irqsave(&h->lock, flags);
5112                h->access.set_intr_mask(h, CCISS_INTR_OFF);
5113                spin_unlock_irqrestore(&h->lock, flags);
5114                free_irq(h->intr[h->intr_mode], h);
5115                rc = cciss_request_irq(h, cciss_msix_discard_completions,
5116                                        cciss_intx_discard_completions);
5117                if (rc) {
5118                        dev_warn(&h->pdev->dev, "Failed to request_irq after "
5119                                "soft reset.\n");
5120                        goto clean4;
5121                }
5122
5123                rc = cciss_kdump_soft_reset(h);
5124                if (rc) {
5125                        dev_warn(&h->pdev->dev, "Soft reset failed.\n");
5126                        goto clean4;
5127                }
5128
5129                dev_info(&h->pdev->dev, "Board READY.\n");
5130                dev_info(&h->pdev->dev,
5131                        "Waiting for stale completions to drain.\n");
5132                h->access.set_intr_mask(h, CCISS_INTR_ON);
5133                msleep(10000);
5134                h->access.set_intr_mask(h, CCISS_INTR_OFF);
5135
5136                rc = controller_reset_failed(h->cfgtable);
5137                if (rc)
5138                        dev_info(&h->pdev->dev,
5139                                "Soft reset appears to have failed.\n");
5140
5141                /* since the controller's reset, we have to go back and re-init
5142                 * everything.  Easiest to just forget what we've done and do it
5143                 * all over again.
5144                 */
5145                cciss_undo_allocations_after_kdump_soft_reset(h);
5146                try_soft_reset = 0;
5147                if (rc)
5148                        /* don't go to clean4, we already unallocated */
5149                        return -ENODEV;
5150
5151                goto reinit_after_soft_reset;
5152        }
5153
5154        cciss_scsi_setup(h);
5155
5156        /* Turn the interrupts on so we can service requests */
5157        h->access.set_intr_mask(h, CCISS_INTR_ON);
5158
5159        /* Get the firmware version */
5160        inq_buff = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
5161        if (inq_buff == NULL) {
5162                dev_err(&h->pdev->dev, "out of memory\n");
5163                goto clean4;
5164        }
5165
5166        return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
5167                sizeof(InquiryData_struct), 0, CTLR_LUNID, TYPE_CMD);
5168        if (return_code == IO_OK) {
5169                h->firm_ver[0] = inq_buff->data_byte[32];
5170                h->firm_ver[1] = inq_buff->data_byte[33];
5171                h->firm_ver[2] = inq_buff->data_byte[34];
5172                h->firm_ver[3] = inq_buff->data_byte[35];
5173        } else {         /* send command failed */
5174                dev_warn(&h->pdev->dev, "unable to determine firmware"
5175                        " version of controller\n");
5176        }
5177        kfree(inq_buff);
5178
5179        cciss_procinit(h);
5180
5181        h->cciss_max_sectors = 8192;
5182
5183        rebuild_lun_table(h, 1, 0);
5184        cciss_engage_scsi(h);
5185        h->busy_initializing = 0;
5186        return 0;
5187
5188clean4:
5189        cciss_free_cmd_pool(h);
5190        cciss_free_scatterlists(h);
5191        cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
5192        free_irq(h->intr[h->intr_mode], h);
5193clean2:
5194        unregister_blkdev(h->major, h->devname);
5195clean1:
5196        cciss_destroy_hba_sysfs_entry(h);
5197clean0:
5198        pci_release_regions(pdev);
5199clean_no_release_regions:
5200        h->busy_initializing = 0;
5201
5202        /*
5203         * Deliberately omit pci_disable_device(): it does something nasty to
5204         * Smart Array controllers that pci_enable_device does not undo
5205         */
5206        pci_set_drvdata(pdev, NULL);
5207        free_hba(h);
5208        return -ENODEV;
5209}
5210
5211static void cciss_shutdown(struct pci_dev *pdev)
5212{
5213        ctlr_info_t *h;
5214        char *flush_buf;
5215        int return_code;
5216
5217        h = pci_get_drvdata(pdev);
5218        flush_buf = kzalloc(4, GFP_KERNEL);
5219        if (!flush_buf) {
5220                dev_warn(&h->pdev->dev, "cache not flushed, out of memory.\n");
5221                return;
5222        }
5223        /* write all data in the battery backed cache to disk */
5224        return_code = sendcmd_withirq(h, CCISS_CACHE_FLUSH, flush_buf,
5225                4, 0, CTLR_LUNID, TYPE_CMD);
5226        kfree(flush_buf);
5227        if (return_code != IO_OK)
5228                dev_warn(&h->pdev->dev, "Error flushing cache\n");
5229        h->access.set_intr_mask(h, CCISS_INTR_OFF);
5230        free_irq(h->intr[h->intr_mode], h);
5231}
5232
5233static int cciss_enter_simple_mode(struct ctlr_info *h)
5234{
5235        u32 trans_support;
5236
5237        trans_support = readl(&(h->cfgtable->TransportSupport));
5238        if (!(trans_support & SIMPLE_MODE))
5239                return -ENOTSUPP;
5240
5241        h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
5242        writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
5243        writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
5244        cciss_wait_for_mode_change_ack(h);
5245        print_cfg_table(h);
5246        if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
5247                dev_warn(&h->pdev->dev, "unable to get board into simple mode\n");
5248                return -ENODEV;
5249        }
5250        h->transMethod = CFGTBL_Trans_Simple;
5251        return 0;
5252}
5253
5254
5255static void cciss_remove_one(struct pci_dev *pdev)
5256{
5257        ctlr_info_t *h;
5258        int i, j;
5259
5260        if (pci_get_drvdata(pdev) == NULL) {
5261                dev_err(&pdev->dev, "Unable to remove device\n");
5262                return;
5263        }
5264
5265        h = pci_get_drvdata(pdev);
5266        i = h->ctlr;
5267        if (hba[i] == NULL) {
5268                dev_err(&pdev->dev, "device appears to already be removed\n");
5269                return;
5270        }
5271
5272        mutex_lock(&h->busy_shutting_down);
5273
5274        remove_from_scan_list(h);
5275        remove_proc_entry(h->devname, proc_cciss);
5276        unregister_blkdev(h->major, h->devname);
5277
5278        /* remove it from the disk list */
5279        for (j = 0; j < CISS_MAX_LUN; j++) {
5280                struct gendisk *disk = h->gendisk[j];
5281                if (disk) {
5282                        struct request_queue *q = disk->queue;
5283
5284                        if (disk->flags & GENHD_FL_UP) {
5285                                cciss_destroy_ld_sysfs_entry(h, j, 1);
5286                                del_gendisk(disk);
5287                        }
5288                        if (q)
5289                                blk_cleanup_queue(q);
5290                }
5291        }
5292
5293#ifdef CONFIG_CISS_SCSI_TAPE
5294        cciss_unregister_scsi(h);       /* unhook from SCSI subsystem */
5295#endif
5296
5297        cciss_shutdown(pdev);
5298
5299#ifdef CONFIG_PCI_MSI
5300        if (h->msix_vector)
5301                pci_disable_msix(h->pdev);
5302        else if (h->msi_vector)
5303                pci_disable_msi(h->pdev);
5304#endif                          /* CONFIG_PCI_MSI */
5305
5306        iounmap(h->transtable);
5307        iounmap(h->cfgtable);
5308        iounmap(h->vaddr);
5309
5310        cciss_free_cmd_pool(h);
5311        /* Free up sg elements */
5312        for (j = 0; j < h->nr_cmds; j++)
5313                kfree(h->scatter_list[j]);
5314        kfree(h->scatter_list);
5315        cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
5316        kfree(h->blockFetchTable);
5317        if (h->reply_pool)
5318                pci_free_consistent(h->pdev, h->max_commands * sizeof(__u64),
5319                                h->reply_pool, h->reply_pool_dhandle);
5320        /*
5321         * Deliberately omit pci_disable_device(): it does something nasty to
5322         * Smart Array controllers that pci_enable_device does not undo
5323         */
5324        pci_release_regions(pdev);
5325        pci_set_drvdata(pdev, NULL);
5326        cciss_destroy_hba_sysfs_entry(h);
5327        mutex_unlock(&h->busy_shutting_down);
5328        free_hba(h);
5329}
5330
5331static struct pci_driver cciss_pci_driver = {
5332        .name = "cciss",
5333        .probe = cciss_init_one,
5334        .remove = cciss_remove_one,
5335        .id_table = cciss_pci_device_id,        /* id_table */
5336        .shutdown = cciss_shutdown,
5337};
5338
5339/*
5340 *  This is it.  Register the PCI driver information for the cards we control
5341 *  the OS will call our registered routines when it finds one of our cards.
5342 */
5343static int __init cciss_init(void)
5344{
5345        int err;
5346
5347        /*
5348         * The hardware requires that commands are aligned on a 64-bit
5349         * boundary. Given that we use pci_alloc_consistent() to allocate an
5350         * array of them, the size must be a multiple of 8 bytes.
5351         */
5352        BUILD_BUG_ON(sizeof(CommandList_struct) % COMMANDLIST_ALIGNMENT);
5353        printk(KERN_INFO DRIVER_NAME "\n");
5354
5355        err = bus_register(&cciss_bus_type);
5356        if (err)
5357                return err;
5358
5359        /* Start the scan thread */
5360        cciss_scan_thread = kthread_run(scan_thread, NULL, "cciss_scan");
5361        if (IS_ERR(cciss_scan_thread)) {
5362                err = PTR_ERR(cciss_scan_thread);
5363                goto err_bus_unregister;
5364        }
5365
5366        /* Register for our PCI devices */
5367        err = pci_register_driver(&cciss_pci_driver);
5368        if (err)
5369                goto err_thread_stop;
5370
5371        return err;
5372
5373err_thread_stop:
5374        kthread_stop(cciss_scan_thread);
5375err_bus_unregister:
5376        bus_unregister(&cciss_bus_type);
5377
5378        return err;
5379}
5380
5381static void __exit cciss_cleanup(void)
5382{
5383        int i;
5384
5385        pci_unregister_driver(&cciss_pci_driver);
5386        /* double check that all controller entrys have been removed */
5387        for (i = 0; i < MAX_CTLR; i++) {
5388                if (hba[i] != NULL) {
5389                        dev_warn(&hba[i]->pdev->dev,
5390                                "had to remove controller\n");
5391                        cciss_remove_one(hba[i]->pdev);
5392                }
5393        }
5394        kthread_stop(cciss_scan_thread);
5395        if (proc_cciss)
5396                remove_proc_entry("driver/cciss", NULL);
5397        bus_unregister(&cciss_bus_type);
5398}
5399
5400module_init(cciss_init);
5401module_exit(cciss_cleanup);
5402