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23#include <linux/i2c.h>
24#include <drm/drmP.h>
25
26#include "intel_bios.h"
27#include "psb_drv.h"
28#include "psb_intel_drv.h"
29#include "psb_intel_reg.h"
30#include "power.h"
31#include <linux/pm_runtime.h>
32
33
34
35
36#define BRIGHTNESS_MAX_LEVEL 100
37#define BRIGHTNESS_MASK 0xFF
38#define BLC_I2C_TYPE 0x01
39#define BLC_PWM_TYPT 0x02
40
41#define BLC_POLARITY_NORMAL 0
42#define BLC_POLARITY_INVERSE 1
43
44#define PSB_BLC_MAX_PWM_REG_FREQ (0xFFFE)
45#define PSB_BLC_MIN_PWM_REG_FREQ (0x2)
46#define PSB_BLC_PWM_PRECISION_FACTOR (10)
47#define PSB_BACKLIGHT_PWM_CTL_SHIFT (16)
48#define PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR (0xFFFE)
49
50struct psb_intel_lvds_priv {
51
52
53
54 uint32_t savePP_ON;
55 uint32_t savePP_OFF;
56 uint32_t saveLVDS;
57 uint32_t savePP_CONTROL;
58 uint32_t savePP_CYCLE;
59 uint32_t savePFIT_CONTROL;
60 uint32_t savePFIT_PGM_RATIOS;
61 uint32_t saveBLC_PWM_CTL;
62
63 struct psb_intel_i2c_chan *i2c_bus;
64 struct psb_intel_i2c_chan *ddc_bus;
65};
66
67
68
69
70
71static u32 psb_intel_lvds_get_max_backlight(struct drm_device *dev)
72{
73 struct drm_psb_private *dev_priv = dev->dev_private;
74 u32 ret;
75
76 if (gma_power_begin(dev, false)) {
77 ret = REG_READ(BLC_PWM_CTL);
78 gma_power_end(dev);
79 } else
80 ret = dev_priv->regs.saveBLC_PWM_CTL;
81
82
83 ret = (ret & BACKLIGHT_MODULATION_FREQ_MASK) >>
84 BACKLIGHT_MODULATION_FREQ_SHIFT;
85
86 ret *= 2;
87 if (ret == 0)
88 dev_err(dev->dev, "BL bug: Reg %08x save %08X\n",
89 REG_READ(BLC_PWM_CTL), dev_priv->regs.saveBLC_PWM_CTL);
90 return ret;
91}
92
93
94
95
96
97
98
99static int psb_lvds_i2c_set_brightness(struct drm_device *dev,
100 unsigned int level)
101{
102 struct drm_psb_private *dev_priv =
103 (struct drm_psb_private *)dev->dev_private;
104
105 struct psb_intel_i2c_chan *lvds_i2c_bus = dev_priv->lvds_i2c_bus;
106 u8 out_buf[2];
107 unsigned int blc_i2c_brightness;
108
109 struct i2c_msg msgs[] = {
110 {
111 .addr = lvds_i2c_bus->slave_addr,
112 .flags = 0,
113 .len = 2,
114 .buf = out_buf,
115 }
116 };
117
118 blc_i2c_brightness = BRIGHTNESS_MASK & ((unsigned int)level *
119 BRIGHTNESS_MASK /
120 BRIGHTNESS_MAX_LEVEL);
121
122 if (dev_priv->lvds_bl->pol == BLC_POLARITY_INVERSE)
123 blc_i2c_brightness = BRIGHTNESS_MASK - blc_i2c_brightness;
124
125 out_buf[0] = dev_priv->lvds_bl->brightnesscmd;
126 out_buf[1] = (u8)blc_i2c_brightness;
127
128 if (i2c_transfer(&lvds_i2c_bus->adapter, msgs, 1) == 1) {
129 dev_dbg(dev->dev, "I2C set brightness.(command, value) (%d, %d)\n",
130 dev_priv->lvds_bl->brightnesscmd,
131 blc_i2c_brightness);
132 return 0;
133 }
134
135 dev_err(dev->dev, "I2C transfer error\n");
136 return -1;
137}
138
139
140static int psb_lvds_pwm_set_brightness(struct drm_device *dev, int level)
141{
142 struct drm_psb_private *dev_priv =
143 (struct drm_psb_private *)dev->dev_private;
144
145 u32 max_pwm_blc;
146 u32 blc_pwm_duty_cycle;
147
148 max_pwm_blc = psb_intel_lvds_get_max_backlight(dev);
149
150
151 BUG_ON(max_pwm_blc == 0);
152
153 blc_pwm_duty_cycle = level * max_pwm_blc / BRIGHTNESS_MAX_LEVEL;
154
155 if (dev_priv->lvds_bl->pol == BLC_POLARITY_INVERSE)
156 blc_pwm_duty_cycle = max_pwm_blc - blc_pwm_duty_cycle;
157
158 blc_pwm_duty_cycle &= PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR;
159 REG_WRITE(BLC_PWM_CTL,
160 (max_pwm_blc << PSB_BACKLIGHT_PWM_CTL_SHIFT) |
161 (blc_pwm_duty_cycle));
162
163 dev_info(dev->dev, "Backlight lvds set brightness %08x\n",
164 (max_pwm_blc << PSB_BACKLIGHT_PWM_CTL_SHIFT) |
165 (blc_pwm_duty_cycle));
166
167 return 0;
168}
169
170
171
172
173void psb_intel_lvds_set_brightness(struct drm_device *dev, int level)
174{
175 struct drm_psb_private *dev_priv = dev->dev_private;
176
177 dev_dbg(dev->dev, "backlight level is %d\n", level);
178
179 if (!dev_priv->lvds_bl) {
180 dev_err(dev->dev, "NO LVDS backlight info\n");
181 return;
182 }
183
184 if (dev_priv->lvds_bl->type == BLC_I2C_TYPE)
185 psb_lvds_i2c_set_brightness(dev, level);
186 else
187 psb_lvds_pwm_set_brightness(dev, level);
188}
189
190
191
192
193
194
195static void psb_intel_lvds_set_backlight(struct drm_device *dev, int level)
196{
197 struct drm_psb_private *dev_priv = dev->dev_private;
198 u32 blc_pwm_ctl;
199
200 if (gma_power_begin(dev, false)) {
201 blc_pwm_ctl = REG_READ(BLC_PWM_CTL);
202 blc_pwm_ctl &= ~BACKLIGHT_DUTY_CYCLE_MASK;
203 REG_WRITE(BLC_PWM_CTL,
204 (blc_pwm_ctl |
205 (level << BACKLIGHT_DUTY_CYCLE_SHIFT)));
206 dev_priv->regs.saveBLC_PWM_CTL = (blc_pwm_ctl |
207 (level << BACKLIGHT_DUTY_CYCLE_SHIFT));
208 gma_power_end(dev);
209 } else {
210 blc_pwm_ctl = dev_priv->regs.saveBLC_PWM_CTL &
211 ~BACKLIGHT_DUTY_CYCLE_MASK;
212 dev_priv->regs.saveBLC_PWM_CTL = (blc_pwm_ctl |
213 (level << BACKLIGHT_DUTY_CYCLE_SHIFT));
214 }
215}
216
217
218
219
220static void psb_intel_lvds_set_power(struct drm_device *dev, bool on)
221{
222 struct drm_psb_private *dev_priv = dev->dev_private;
223 struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
224 u32 pp_status;
225
226 if (!gma_power_begin(dev, true)) {
227 dev_err(dev->dev, "set power, chip off!\n");
228 return;
229 }
230
231 if (on) {
232 REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) |
233 POWER_TARGET_ON);
234 do {
235 pp_status = REG_READ(PP_STATUS);
236 } while ((pp_status & PP_ON) == 0);
237
238 psb_intel_lvds_set_backlight(dev,
239 mode_dev->backlight_duty_cycle);
240 } else {
241 psb_intel_lvds_set_backlight(dev, 0);
242
243 REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) &
244 ~POWER_TARGET_ON);
245 do {
246 pp_status = REG_READ(PP_STATUS);
247 } while (pp_status & PP_ON);
248 }
249
250 gma_power_end(dev);
251}
252
253static void psb_intel_lvds_encoder_dpms(struct drm_encoder *encoder, int mode)
254{
255 struct drm_device *dev = encoder->dev;
256
257 if (mode == DRM_MODE_DPMS_ON)
258 psb_intel_lvds_set_power(dev, true);
259 else
260 psb_intel_lvds_set_power(dev, false);
261
262
263}
264
265static void psb_intel_lvds_save(struct drm_connector *connector)
266{
267 struct drm_device *dev = connector->dev;
268 struct drm_psb_private *dev_priv =
269 (struct drm_psb_private *)dev->dev_private;
270 struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
271 struct psb_intel_lvds_priv *lvds_priv =
272 (struct psb_intel_lvds_priv *)gma_encoder->dev_priv;
273
274 lvds_priv->savePP_ON = REG_READ(LVDSPP_ON);
275 lvds_priv->savePP_OFF = REG_READ(LVDSPP_OFF);
276 lvds_priv->saveLVDS = REG_READ(LVDS);
277 lvds_priv->savePP_CONTROL = REG_READ(PP_CONTROL);
278 lvds_priv->savePP_CYCLE = REG_READ(PP_CYCLE);
279
280 lvds_priv->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL);
281 lvds_priv->savePFIT_CONTROL = REG_READ(PFIT_CONTROL);
282 lvds_priv->savePFIT_PGM_RATIOS = REG_READ(PFIT_PGM_RATIOS);
283
284
285 dev_priv->backlight_duty_cycle = (dev_priv->regs.saveBLC_PWM_CTL &
286 BACKLIGHT_DUTY_CYCLE_MASK);
287
288
289
290
291
292 if (dev_priv->backlight_duty_cycle == 0)
293 dev_priv->backlight_duty_cycle =
294 psb_intel_lvds_get_max_backlight(dev);
295
296 dev_dbg(dev->dev, "(0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x)\n",
297 lvds_priv->savePP_ON,
298 lvds_priv->savePP_OFF,
299 lvds_priv->saveLVDS,
300 lvds_priv->savePP_CONTROL,
301 lvds_priv->savePP_CYCLE,
302 lvds_priv->saveBLC_PWM_CTL);
303}
304
305static void psb_intel_lvds_restore(struct drm_connector *connector)
306{
307 struct drm_device *dev = connector->dev;
308 u32 pp_status;
309 struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
310 struct psb_intel_lvds_priv *lvds_priv =
311 (struct psb_intel_lvds_priv *)gma_encoder->dev_priv;
312
313 dev_dbg(dev->dev, "(0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x)\n",
314 lvds_priv->savePP_ON,
315 lvds_priv->savePP_OFF,
316 lvds_priv->saveLVDS,
317 lvds_priv->savePP_CONTROL,
318 lvds_priv->savePP_CYCLE,
319 lvds_priv->saveBLC_PWM_CTL);
320
321 REG_WRITE(BLC_PWM_CTL, lvds_priv->saveBLC_PWM_CTL);
322 REG_WRITE(PFIT_CONTROL, lvds_priv->savePFIT_CONTROL);
323 REG_WRITE(PFIT_PGM_RATIOS, lvds_priv->savePFIT_PGM_RATIOS);
324 REG_WRITE(LVDSPP_ON, lvds_priv->savePP_ON);
325 REG_WRITE(LVDSPP_OFF, lvds_priv->savePP_OFF);
326
327 REG_WRITE(PP_CYCLE, lvds_priv->savePP_CYCLE);
328 REG_WRITE(PP_CONTROL, lvds_priv->savePP_CONTROL);
329 REG_WRITE(LVDS, lvds_priv->saveLVDS);
330
331 if (lvds_priv->savePP_CONTROL & POWER_TARGET_ON) {
332 REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) |
333 POWER_TARGET_ON);
334 do {
335 pp_status = REG_READ(PP_STATUS);
336 } while ((pp_status & PP_ON) == 0);
337 } else {
338 REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) &
339 ~POWER_TARGET_ON);
340 do {
341 pp_status = REG_READ(PP_STATUS);
342 } while (pp_status & PP_ON);
343 }
344}
345
346int psb_intel_lvds_mode_valid(struct drm_connector *connector,
347 struct drm_display_mode *mode)
348{
349 struct drm_psb_private *dev_priv = connector->dev->dev_private;
350 struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
351 struct drm_display_mode *fixed_mode =
352 dev_priv->mode_dev.panel_fixed_mode;
353
354 if (gma_encoder->type == INTEL_OUTPUT_MIPI2)
355 fixed_mode = dev_priv->mode_dev.panel_fixed_mode2;
356
357
358 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
359 return MODE_NO_DBLESCAN;
360
361
362 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
363 return MODE_NO_INTERLACE;
364
365 if (fixed_mode) {
366 if (mode->hdisplay > fixed_mode->hdisplay)
367 return MODE_PANEL;
368 if (mode->vdisplay > fixed_mode->vdisplay)
369 return MODE_PANEL;
370 }
371 return MODE_OK;
372}
373
374bool psb_intel_lvds_mode_fixup(struct drm_encoder *encoder,
375 const struct drm_display_mode *mode,
376 struct drm_display_mode *adjusted_mode)
377{
378 struct drm_device *dev = encoder->dev;
379 struct drm_psb_private *dev_priv = dev->dev_private;
380 struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
381 struct gma_crtc *gma_crtc = to_gma_crtc(encoder->crtc);
382 struct drm_encoder *tmp_encoder;
383 struct drm_display_mode *panel_fixed_mode = mode_dev->panel_fixed_mode;
384 struct gma_encoder *gma_encoder = to_gma_encoder(encoder);
385
386 if (gma_encoder->type == INTEL_OUTPUT_MIPI2)
387 panel_fixed_mode = mode_dev->panel_fixed_mode2;
388
389
390 if (!IS_MRST(dev) && gma_crtc->pipe == 0) {
391 printk(KERN_ERR "Can't support LVDS on pipe A\n");
392 return false;
393 }
394 if (IS_MRST(dev) && gma_crtc->pipe != 0) {
395 printk(KERN_ERR "Must use PIPE A\n");
396 return false;
397 }
398
399 list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list,
400 head) {
401 if (tmp_encoder != encoder
402 && tmp_encoder->crtc == encoder->crtc) {
403 printk(KERN_ERR "Can't enable LVDS and another "
404 "encoder on the same pipe\n");
405 return false;
406 }
407 }
408
409
410
411
412
413
414
415 if (panel_fixed_mode != NULL) {
416 adjusted_mode->hdisplay = panel_fixed_mode->hdisplay;
417 adjusted_mode->hsync_start = panel_fixed_mode->hsync_start;
418 adjusted_mode->hsync_end = panel_fixed_mode->hsync_end;
419 adjusted_mode->htotal = panel_fixed_mode->htotal;
420 adjusted_mode->vdisplay = panel_fixed_mode->vdisplay;
421 adjusted_mode->vsync_start = panel_fixed_mode->vsync_start;
422 adjusted_mode->vsync_end = panel_fixed_mode->vsync_end;
423 adjusted_mode->vtotal = panel_fixed_mode->vtotal;
424 adjusted_mode->clock = panel_fixed_mode->clock;
425 drm_mode_set_crtcinfo(adjusted_mode,
426 CRTC_INTERLACE_HALVE_V);
427 }
428
429
430
431
432
433
434
435 return true;
436}
437
438static void psb_intel_lvds_prepare(struct drm_encoder *encoder)
439{
440 struct drm_device *dev = encoder->dev;
441 struct drm_psb_private *dev_priv = dev->dev_private;
442 struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
443
444 if (!gma_power_begin(dev, true))
445 return;
446
447 mode_dev->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL);
448 mode_dev->backlight_duty_cycle = (mode_dev->saveBLC_PWM_CTL &
449 BACKLIGHT_DUTY_CYCLE_MASK);
450
451 psb_intel_lvds_set_power(dev, false);
452
453 gma_power_end(dev);
454}
455
456static void psb_intel_lvds_commit(struct drm_encoder *encoder)
457{
458 struct drm_device *dev = encoder->dev;
459 struct drm_psb_private *dev_priv = dev->dev_private;
460 struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
461
462 if (mode_dev->backlight_duty_cycle == 0)
463 mode_dev->backlight_duty_cycle =
464 psb_intel_lvds_get_max_backlight(dev);
465
466 psb_intel_lvds_set_power(dev, true);
467}
468
469static void psb_intel_lvds_mode_set(struct drm_encoder *encoder,
470 struct drm_display_mode *mode,
471 struct drm_display_mode *adjusted_mode)
472{
473 struct drm_device *dev = encoder->dev;
474 struct drm_psb_private *dev_priv = dev->dev_private;
475 u32 pfit_control;
476
477
478
479
480
481
482
483
484
485
486
487
488 if (mode->hdisplay != adjusted_mode->hdisplay ||
489 mode->vdisplay != adjusted_mode->vdisplay)
490 pfit_control = (PFIT_ENABLE | VERT_AUTO_SCALE |
491 HORIZ_AUTO_SCALE | VERT_INTERP_BILINEAR |
492 HORIZ_INTERP_BILINEAR);
493 else
494 pfit_control = 0;
495
496 if (dev_priv->lvds_dither)
497 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
498
499 REG_WRITE(PFIT_CONTROL, pfit_control);
500}
501
502
503
504
505
506
507
508
509static enum drm_connector_status psb_intel_lvds_detect(struct drm_connector
510 *connector, bool force)
511{
512 return connector_status_connected;
513}
514
515
516
517
518static int psb_intel_lvds_get_modes(struct drm_connector *connector)
519{
520 struct drm_device *dev = connector->dev;
521 struct drm_psb_private *dev_priv = dev->dev_private;
522 struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
523 struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
524 struct psb_intel_lvds_priv *lvds_priv = gma_encoder->dev_priv;
525 int ret = 0;
526
527 if (!IS_MRST(dev))
528 ret = psb_intel_ddc_get_modes(connector, &lvds_priv->i2c_bus->adapter);
529
530 if (ret)
531 return ret;
532
533
534
535
536
537 connector->display_info.min_vfreq = 0;
538 connector->display_info.max_vfreq = 200;
539 connector->display_info.min_hfreq = 0;
540 connector->display_info.max_hfreq = 200;
541
542 if (mode_dev->panel_fixed_mode != NULL) {
543 struct drm_display_mode *mode =
544 drm_mode_duplicate(dev, mode_dev->panel_fixed_mode);
545 drm_mode_probed_add(connector, mode);
546 return 1;
547 }
548
549 return 0;
550}
551
552
553
554
555
556
557
558
559void psb_intel_lvds_destroy(struct drm_connector *connector)
560{
561 struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
562 struct psb_intel_lvds_priv *lvds_priv = gma_encoder->dev_priv;
563
564 if (lvds_priv->ddc_bus)
565 psb_intel_i2c_destroy(lvds_priv->ddc_bus);
566 drm_connector_unregister(connector);
567 drm_connector_cleanup(connector);
568 kfree(connector);
569}
570
571int psb_intel_lvds_set_property(struct drm_connector *connector,
572 struct drm_property *property,
573 uint64_t value)
574{
575 struct drm_encoder *encoder = connector->encoder;
576
577 if (!encoder)
578 return -1;
579
580 if (!strcmp(property->name, "scaling mode")) {
581 struct gma_crtc *crtc = to_gma_crtc(encoder->crtc);
582 uint64_t curval;
583
584 if (!crtc)
585 goto set_prop_error;
586
587 switch (value) {
588 case DRM_MODE_SCALE_FULLSCREEN:
589 break;
590 case DRM_MODE_SCALE_NO_SCALE:
591 break;
592 case DRM_MODE_SCALE_ASPECT:
593 break;
594 default:
595 goto set_prop_error;
596 }
597
598 if (drm_object_property_get_value(&connector->base,
599 property,
600 &curval))
601 goto set_prop_error;
602
603 if (curval == value)
604 goto set_prop_done;
605
606 if (drm_object_property_set_value(&connector->base,
607 property,
608 value))
609 goto set_prop_error;
610
611 if (crtc->saved_mode.hdisplay != 0 &&
612 crtc->saved_mode.vdisplay != 0) {
613 if (!drm_crtc_helper_set_mode(encoder->crtc,
614 &crtc->saved_mode,
615 encoder->crtc->x,
616 encoder->crtc->y,
617 encoder->crtc->primary->fb))
618 goto set_prop_error;
619 }
620 } else if (!strcmp(property->name, "backlight")) {
621 if (drm_object_property_set_value(&connector->base,
622 property,
623 value))
624 goto set_prop_error;
625 else
626 gma_backlight_set(encoder->dev, value);
627 } else if (!strcmp(property->name, "DPMS")) {
628 const struct drm_encoder_helper_funcs *hfuncs
629 = encoder->helper_private;
630 hfuncs->dpms(encoder, value);
631 }
632
633set_prop_done:
634 return 0;
635set_prop_error:
636 return -1;
637}
638
639static const struct drm_encoder_helper_funcs psb_intel_lvds_helper_funcs = {
640 .dpms = psb_intel_lvds_encoder_dpms,
641 .mode_fixup = psb_intel_lvds_mode_fixup,
642 .prepare = psb_intel_lvds_prepare,
643 .mode_set = psb_intel_lvds_mode_set,
644 .commit = psb_intel_lvds_commit,
645};
646
647const struct drm_connector_helper_funcs
648 psb_intel_lvds_connector_helper_funcs = {
649 .get_modes = psb_intel_lvds_get_modes,
650 .mode_valid = psb_intel_lvds_mode_valid,
651 .best_encoder = gma_best_encoder,
652};
653
654const struct drm_connector_funcs psb_intel_lvds_connector_funcs = {
655 .dpms = drm_helper_connector_dpms,
656 .detect = psb_intel_lvds_detect,
657 .fill_modes = drm_helper_probe_single_connector_modes,
658 .set_property = psb_intel_lvds_set_property,
659 .destroy = psb_intel_lvds_destroy,
660};
661
662
663static void psb_intel_lvds_enc_destroy(struct drm_encoder *encoder)
664{
665 drm_encoder_cleanup(encoder);
666}
667
668const struct drm_encoder_funcs psb_intel_lvds_enc_funcs = {
669 .destroy = psb_intel_lvds_enc_destroy,
670};
671
672
673
674
675
676
677
678
679
680
681void psb_intel_lvds_init(struct drm_device *dev,
682 struct psb_intel_mode_device *mode_dev)
683{
684 struct gma_encoder *gma_encoder;
685 struct gma_connector *gma_connector;
686 struct psb_intel_lvds_priv *lvds_priv;
687 struct drm_connector *connector;
688 struct drm_encoder *encoder;
689 struct drm_display_mode *scan;
690 struct drm_crtc *crtc;
691 struct drm_psb_private *dev_priv = dev->dev_private;
692 u32 lvds;
693 int pipe;
694
695 gma_encoder = kzalloc(sizeof(struct gma_encoder), GFP_KERNEL);
696 if (!gma_encoder) {
697 dev_err(dev->dev, "gma_encoder allocation error\n");
698 return;
699 }
700
701 gma_connector = kzalloc(sizeof(struct gma_connector), GFP_KERNEL);
702 if (!gma_connector) {
703 dev_err(dev->dev, "gma_connector allocation error\n");
704 goto failed_encoder;
705 }
706
707 lvds_priv = kzalloc(sizeof(struct psb_intel_lvds_priv), GFP_KERNEL);
708 if (!lvds_priv) {
709 dev_err(dev->dev, "LVDS private allocation error\n");
710 goto failed_connector;
711 }
712
713 gma_encoder->dev_priv = lvds_priv;
714
715 connector = &gma_connector->base;
716 gma_connector->save = psb_intel_lvds_save;
717 gma_connector->restore = psb_intel_lvds_restore;
718
719 encoder = &gma_encoder->base;
720 drm_connector_init(dev, connector,
721 &psb_intel_lvds_connector_funcs,
722 DRM_MODE_CONNECTOR_LVDS);
723
724 drm_encoder_init(dev, encoder,
725 &psb_intel_lvds_enc_funcs,
726 DRM_MODE_ENCODER_LVDS, NULL);
727
728 gma_connector_attach_encoder(gma_connector, gma_encoder);
729 gma_encoder->type = INTEL_OUTPUT_LVDS;
730
731 drm_encoder_helper_add(encoder, &psb_intel_lvds_helper_funcs);
732 drm_connector_helper_add(connector,
733 &psb_intel_lvds_connector_helper_funcs);
734 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
735 connector->interlace_allowed = false;
736 connector->doublescan_allowed = false;
737
738
739 drm_object_attach_property(&connector->base,
740 dev->mode_config.scaling_mode_property,
741 DRM_MODE_SCALE_FULLSCREEN);
742 drm_object_attach_property(&connector->base,
743 dev_priv->backlight_property,
744 BRIGHTNESS_MAX_LEVEL);
745
746
747
748
749
750 lvds_priv->i2c_bus = psb_intel_i2c_create(dev, GPIOB, "LVDSBLC_B");
751 if (!lvds_priv->i2c_bus) {
752 dev_printk(KERN_ERR,
753 &dev->pdev->dev, "I2C bus registration failed.\n");
754 goto failed_blc_i2c;
755 }
756 lvds_priv->i2c_bus->slave_addr = 0x2C;
757 dev_priv->lvds_i2c_bus = lvds_priv->i2c_bus;
758
759
760
761
762
763
764
765
766
767
768
769
770 lvds_priv->ddc_bus = psb_intel_i2c_create(dev, GPIOC, "LVDSDDC_C");
771 if (!lvds_priv->ddc_bus) {
772 dev_printk(KERN_ERR, &dev->pdev->dev,
773 "DDC bus registration " "failed.\n");
774 goto failed_ddc;
775 }
776
777
778
779
780
781 mutex_lock(&dev->mode_config.mutex);
782 psb_intel_ddc_get_modes(connector, &lvds_priv->ddc_bus->adapter);
783 list_for_each_entry(scan, &connector->probed_modes, head) {
784 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
785 mode_dev->panel_fixed_mode =
786 drm_mode_duplicate(dev, scan);
787 goto out;
788 }
789 }
790
791
792 if (mode_dev->vbt_mode)
793 mode_dev->panel_fixed_mode =
794 drm_mode_duplicate(dev, mode_dev->vbt_mode);
795
796 if (!mode_dev->panel_fixed_mode)
797 if (dev_priv->lfp_lvds_vbt_mode)
798 mode_dev->panel_fixed_mode =
799 drm_mode_duplicate(dev,
800 dev_priv->lfp_lvds_vbt_mode);
801
802
803
804
805
806
807 lvds = REG_READ(LVDS);
808 pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
809 crtc = psb_intel_get_crtc_from_pipe(dev, pipe);
810
811 if (crtc && (lvds & LVDS_PORT_EN)) {
812 mode_dev->panel_fixed_mode =
813 psb_intel_crtc_mode_get(dev, crtc);
814 if (mode_dev->panel_fixed_mode) {
815 mode_dev->panel_fixed_mode->type |=
816 DRM_MODE_TYPE_PREFERRED;
817 goto out;
818 }
819 }
820
821
822 if (!mode_dev->panel_fixed_mode) {
823 dev_err(dev->dev, "Found no modes on the lvds, ignoring the LVDS\n");
824 goto failed_find;
825 }
826
827
828
829
830
831out:
832 mutex_unlock(&dev->mode_config.mutex);
833 drm_connector_register(connector);
834 return;
835
836failed_find:
837 mutex_unlock(&dev->mode_config.mutex);
838 if (lvds_priv->ddc_bus)
839 psb_intel_i2c_destroy(lvds_priv->ddc_bus);
840failed_ddc:
841 if (lvds_priv->i2c_bus)
842 psb_intel_i2c_destroy(lvds_priv->i2c_bus);
843failed_blc_i2c:
844 drm_encoder_cleanup(encoder);
845 drm_connector_cleanup(connector);
846failed_connector:
847 kfree(gma_connector);
848failed_encoder:
849 kfree(gma_encoder);
850}
851
852