LXR linux/drivers/gpu/drm/msm/mdp/mdp5/mdp5

   1/*
   2 * Copyright (c) 2014 The Linux Foundation. All rights reserved.
   3 *
   4 * This program is free software; you can redistribute it and/or modify
   5 * it under the terms of the GNU General Public License version 2 and
   6 * only version 2 as published by the Free Software Foundation.
   7 *
   8 * This program is distributed in the hope that it will be useful,
   9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  11 * GNU General Public License for more details.
  12 */
  13
  14#ifndef __MDP5_CFG_H__
  15#define __MDP5_CFG_H__
  16
  17#include "msm_drv.h"
  18
  19/*
  20 * mdp5_cfg
  21 *
  22 * This module configures the dynamic offsets used by mdp5.xml.h
  23 * (initialized in mdp5_cfg.c)
  24 */
  25extern const struct mdp5_cfg_hw *mdp5_cfg;
  26
  27#define MAX_CTL                 8
  28#define MAX_BASES               8
  29#define MAX_SMP_BLOCKS          44
  30#define MAX_CLIENTS             32
  31
  32typedef DECLARE_BITMAP(mdp5_smp_state_t, MAX_SMP_BLOCKS);
  33
  34#define MDP5_SUB_BLOCK_DEFINITION \
  35        int count; \
  36        uint32_t base[MAX_BASES]
  37
  38struct mdp5_sub_block {
  39        MDP5_SUB_BLOCK_DEFINITION;
  40};
  41
  42struct mdp5_lm_block {
  43        MDP5_SUB_BLOCK_DEFINITION;
  44        uint32_t nb_stages;             /* number of stages per blender */
  45        uint32_t max_width;             /* Maximum output resolution */
  46        uint32_t max_height;
  47};
  48
  49struct mdp5_pipe_block {
  50        MDP5_SUB_BLOCK_DEFINITION;
  51        uint32_t caps;                  /* pipe capabilities */
  52};
  53
  54struct mdp5_ctl_block {
  55        MDP5_SUB_BLOCK_DEFINITION;
  56        uint32_t flush_hw_mask;         /* FLUSH register's hardware mask */
  57};
  58
  59struct mdp5_smp_block {
  60        int mmb_count;                  /* number of SMP MMBs */
  61        int mmb_size;                   /* MMB: size in bytes */
  62        uint32_t clients[MAX_CLIENTS];  /* SMP port allocation /pipe */
  63        mdp5_smp_state_t reserved_state;/* SMP MMBs statically allocated */
  64        uint8_t reserved[MAX_CLIENTS];  /* # of MMBs allocated per client */
  65};
  66
  67struct mdp5_mdp_block {
  68        MDP5_SUB_BLOCK_DEFINITION;
  69        uint32_t caps;                  /* MDP capabilities: MDP_CAP_xxx bits */
  70};
  71
  72#define MDP5_INTF_NUM_MAX       5
  73
  74struct mdp5_intf_block {
  75        uint32_t base[MAX_BASES];
  76        u32 connect[MDP5_INTF_NUM_MAX]; /* array of enum mdp5_intf_type */
  77};
  78
  79struct mdp5_cfg_hw {
  80        char  *name;
  81
  82        struct mdp5_mdp_block mdp;
  83        struct mdp5_smp_block smp;
  84        struct mdp5_ctl_block ctl;
  85        struct mdp5_pipe_block pipe_vig;
  86        struct mdp5_pipe_block pipe_rgb;
  87        struct mdp5_pipe_block pipe_dma;
  88        struct mdp5_lm_block  lm;
  89        struct mdp5_sub_block dspp;
  90        struct mdp5_sub_block ad;
  91        struct mdp5_sub_block pp;
  92        struct mdp5_sub_block dsc;
  93        struct mdp5_sub_block cdm;
  94        struct mdp5_intf_block intf;
  95
  96        uint32_t max_clk;
  97};
  98
  99/* platform config data (ie. from DT, or pdata) */
 100struct mdp5_cfg_platform {
 101        struct iommu_domain *iommu;
 102};
 103
 104struct mdp5_cfg {
 105        const struct mdp5_cfg_hw *hw;
 106        struct mdp5_cfg_platform platform;
 107};
 108
 109struct mdp5_kms;
 110struct mdp5_cfg_handler;
 111
 112const struct mdp5_cfg_hw *mdp5_cfg_get_hw_config(struct mdp5_cfg_handler *cfg_hnd);
 113struct mdp5_cfg *mdp5_cfg_get_config(struct mdp5_cfg_handler *cfg_hnd);
 114int mdp5_cfg_get_hw_rev(struct mdp5_cfg_handler *cfg_hnd);
 115
 116#define mdp5_cfg_intf_is_virtual(intf_type) ({  \
 117        typeof(intf_type) __val = (intf_type);  \
 118        (__val) >= INTF_VIRTUAL ? true : false; })
 119
 120struct mdp5_cfg_handler *mdp5_cfg_init(struct mdp5_kms *mdp5_kms,
 121                uint32_t major, uint32_t minor);
 122void mdp5_cfg_destroy(struct mdp5_cfg_handler *cfg_hnd);
 123
 124#endif /* __MDP5_CFG_H__ */
 125