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27
28#include "vmwgfx_kms.h"
29
30
31
32#define VMWGFX_PRESENT_RATE ((HZ / 60 > 0) ? HZ / 60 : 1)
33
34void vmw_du_cleanup(struct vmw_display_unit *du)
35{
36 if (du->cursor_surface)
37 vmw_surface_unreference(&du->cursor_surface);
38 if (du->cursor_dmabuf)
39 vmw_dmabuf_unreference(&du->cursor_dmabuf);
40 drm_connector_unregister(&du->connector);
41 drm_crtc_cleanup(&du->crtc);
42 drm_encoder_cleanup(&du->encoder);
43 drm_connector_cleanup(&du->connector);
44}
45
46
47
48
49
50int vmw_cursor_update_image(struct vmw_private *dev_priv,
51 u32 *image, u32 width, u32 height,
52 u32 hotspotX, u32 hotspotY)
53{
54 struct {
55 u32 cmd;
56 SVGAFifoCmdDefineAlphaCursor cursor;
57 } *cmd;
58 u32 image_size = width * height * 4;
59 u32 cmd_size = sizeof(*cmd) + image_size;
60
61 if (!image)
62 return -EINVAL;
63
64 cmd = vmw_fifo_reserve(dev_priv, cmd_size);
65 if (unlikely(cmd == NULL)) {
66 DRM_ERROR("Fifo reserve failed.\n");
67 return -ENOMEM;
68 }
69
70 memset(cmd, 0, sizeof(*cmd));
71
72 memcpy(&cmd[1], image, image_size);
73
74 cmd->cmd = SVGA_CMD_DEFINE_ALPHA_CURSOR;
75 cmd->cursor.id = 0;
76 cmd->cursor.width = width;
77 cmd->cursor.height = height;
78 cmd->cursor.hotspotX = hotspotX;
79 cmd->cursor.hotspotY = hotspotY;
80
81 vmw_fifo_commit_flush(dev_priv, cmd_size);
82
83 return 0;
84}
85
86int vmw_cursor_update_dmabuf(struct vmw_private *dev_priv,
87 struct vmw_dma_buffer *dmabuf,
88 u32 width, u32 height,
89 u32 hotspotX, u32 hotspotY)
90{
91 struct ttm_bo_kmap_obj map;
92 unsigned long kmap_offset;
93 unsigned long kmap_num;
94 void *virtual;
95 bool dummy;
96 int ret;
97
98 kmap_offset = 0;
99 kmap_num = (width*height*4 + PAGE_SIZE - 1) >> PAGE_SHIFT;
100
101 ret = ttm_bo_reserve(&dmabuf->base, true, false, false, NULL);
102 if (unlikely(ret != 0)) {
103 DRM_ERROR("reserve failed\n");
104 return -EINVAL;
105 }
106
107 ret = ttm_bo_kmap(&dmabuf->base, kmap_offset, kmap_num, &map);
108 if (unlikely(ret != 0))
109 goto err_unreserve;
110
111 virtual = ttm_kmap_obj_virtual(&map, &dummy);
112 ret = vmw_cursor_update_image(dev_priv, virtual, width, height,
113 hotspotX, hotspotY);
114
115 ttm_bo_kunmap(&map);
116err_unreserve:
117 ttm_bo_unreserve(&dmabuf->base);
118
119 return ret;
120}
121
122
123void vmw_cursor_update_position(struct vmw_private *dev_priv,
124 bool show, int x, int y)
125{
126 u32 *fifo_mem = dev_priv->mmio_virt;
127 uint32_t count;
128
129 vmw_mmio_write(show ? 1 : 0, fifo_mem + SVGA_FIFO_CURSOR_ON);
130 vmw_mmio_write(x, fifo_mem + SVGA_FIFO_CURSOR_X);
131 vmw_mmio_write(y, fifo_mem + SVGA_FIFO_CURSOR_Y);
132 count = vmw_mmio_read(fifo_mem + SVGA_FIFO_CURSOR_COUNT);
133 vmw_mmio_write(++count, fifo_mem + SVGA_FIFO_CURSOR_COUNT);
134}
135
136
137
138
139
140int vmw_du_crtc_cursor_set2(struct drm_crtc *crtc, struct drm_file *file_priv,
141 uint32_t handle, uint32_t width, uint32_t height,
142 int32_t hot_x, int32_t hot_y)
143{
144 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
145 struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
146 struct vmw_surface *surface = NULL;
147 struct vmw_dma_buffer *dmabuf = NULL;
148 s32 hotspot_x, hotspot_y;
149 int ret;
150
151
152
153
154
155
156
157
158 drm_modeset_unlock_crtc(crtc);
159 drm_modeset_lock_all(dev_priv->dev);
160 hotspot_x = hot_x + du->hotspot_x;
161 hotspot_y = hot_y + du->hotspot_y;
162
163
164 if (handle && (width != 64 || height != 64)) {
165 ret = -EINVAL;
166 goto out;
167 }
168
169 if (handle) {
170 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
171
172 ret = vmw_user_lookup_handle(dev_priv, tfile,
173 handle, &surface, &dmabuf);
174 if (ret) {
175 DRM_ERROR("failed to find surface or dmabuf: %i\n", ret);
176 ret = -EINVAL;
177 goto out;
178 }
179 }
180
181
182 if (surface && !surface->snooper.image) {
183 DRM_ERROR("surface not suitable for cursor\n");
184 vmw_surface_unreference(&surface);
185 ret = -EINVAL;
186 goto out;
187 }
188
189
190 if (du->cursor_surface) {
191 du->cursor_surface->snooper.crtc = NULL;
192 vmw_surface_unreference(&du->cursor_surface);
193 }
194 if (du->cursor_dmabuf)
195 vmw_dmabuf_unreference(&du->cursor_dmabuf);
196
197
198 ret = 0;
199 if (surface) {
200
201 du->cursor_surface = surface;
202
203 du->cursor_surface->snooper.crtc = crtc;
204 du->cursor_age = du->cursor_surface->snooper.age;
205 ret = vmw_cursor_update_image(dev_priv, surface->snooper.image,
206 64, 64, hotspot_x, hotspot_y);
207 } else if (dmabuf) {
208
209 du->cursor_dmabuf = dmabuf;
210
211 ret = vmw_cursor_update_dmabuf(dev_priv, dmabuf, width, height,
212 hotspot_x, hotspot_y);
213 } else {
214 vmw_cursor_update_position(dev_priv, false, 0, 0);
215 goto out;
216 }
217
218 if (!ret) {
219 vmw_cursor_update_position(dev_priv, true,
220 du->cursor_x + hotspot_x,
221 du->cursor_y + hotspot_y);
222 du->core_hotspot_x = hot_x;
223 du->core_hotspot_y = hot_y;
224 }
225
226out:
227 drm_modeset_unlock_all(dev_priv->dev);
228 drm_modeset_lock_crtc(crtc, crtc->cursor);
229
230 return ret;
231}
232
233int vmw_du_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
234{
235 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
236 struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
237 bool shown = du->cursor_surface || du->cursor_dmabuf ? true : false;
238
239 du->cursor_x = x + du->set_gui_x;
240 du->cursor_y = y + du->set_gui_y;
241
242
243
244
245
246
247
248
249 drm_modeset_unlock_crtc(crtc);
250 drm_modeset_lock_all(dev_priv->dev);
251
252 vmw_cursor_update_position(dev_priv, shown,
253 du->cursor_x + du->hotspot_x +
254 du->core_hotspot_x,
255 du->cursor_y + du->hotspot_y +
256 du->core_hotspot_y);
257
258 drm_modeset_unlock_all(dev_priv->dev);
259 drm_modeset_lock_crtc(crtc, crtc->cursor);
260
261 return 0;
262}
263
264void vmw_kms_cursor_snoop(struct vmw_surface *srf,
265 struct ttm_object_file *tfile,
266 struct ttm_buffer_object *bo,
267 SVGA3dCmdHeader *header)
268{
269 struct ttm_bo_kmap_obj map;
270 unsigned long kmap_offset;
271 unsigned long kmap_num;
272 SVGA3dCopyBox *box;
273 unsigned box_count;
274 void *virtual;
275 bool dummy;
276 struct vmw_dma_cmd {
277 SVGA3dCmdHeader header;
278 SVGA3dCmdSurfaceDMA dma;
279 } *cmd;
280 int i, ret;
281
282 cmd = container_of(header, struct vmw_dma_cmd, header);
283
284
285 if (!srf->snooper.image)
286 return;
287
288 if (cmd->dma.host.face != 0 || cmd->dma.host.mipmap != 0) {
289 DRM_ERROR("face and mipmap for cursors should never != 0\n");
290 return;
291 }
292
293 if (cmd->header.size < 64) {
294 DRM_ERROR("at least one full copy box must be given\n");
295 return;
296 }
297
298 box = (SVGA3dCopyBox *)&cmd[1];
299 box_count = (cmd->header.size - sizeof(SVGA3dCmdSurfaceDMA)) /
300 sizeof(SVGA3dCopyBox);
301
302 if (cmd->dma.guest.ptr.offset % PAGE_SIZE ||
303 box->x != 0 || box->y != 0 || box->z != 0 ||
304 box->srcx != 0 || box->srcy != 0 || box->srcz != 0 ||
305 box->d != 1 || box_count != 1) {
306
307
308
309 DRM_ERROR("Cant snoop dma request for cursor!\n");
310 DRM_ERROR("(%u, %u, %u) (%u, %u, %u) (%ux%ux%u) %u %u\n",
311 box->srcx, box->srcy, box->srcz,
312 box->x, box->y, box->z,
313 box->w, box->h, box->d, box_count,
314 cmd->dma.guest.ptr.offset);
315 return;
316 }
317
318 kmap_offset = cmd->dma.guest.ptr.offset >> PAGE_SHIFT;
319 kmap_num = (64*64*4) >> PAGE_SHIFT;
320
321 ret = ttm_bo_reserve(bo, true, false, false, NULL);
322 if (unlikely(ret != 0)) {
323 DRM_ERROR("reserve failed\n");
324 return;
325 }
326
327 ret = ttm_bo_kmap(bo, kmap_offset, kmap_num, &map);
328 if (unlikely(ret != 0))
329 goto err_unreserve;
330
331 virtual = ttm_kmap_obj_virtual(&map, &dummy);
332
333 if (box->w == 64 && cmd->dma.guest.pitch == 64*4) {
334 memcpy(srf->snooper.image, virtual, 64*64*4);
335 } else {
336
337 for (i = 0; i < box->h; i++)
338 memcpy(srf->snooper.image + i * 64,
339 virtual + i * cmd->dma.guest.pitch,
340 box->w * 4);
341 }
342
343 srf->snooper.age++;
344
345 ttm_bo_kunmap(&map);
346err_unreserve:
347 ttm_bo_unreserve(bo);
348}
349
350
351
352
353
354
355
356
357void vmw_kms_legacy_hotspot_clear(struct vmw_private *dev_priv)
358{
359 struct drm_device *dev = dev_priv->dev;
360 struct vmw_display_unit *du;
361 struct drm_crtc *crtc;
362
363 drm_modeset_lock_all(dev);
364 drm_for_each_crtc(crtc, dev) {
365 du = vmw_crtc_to_du(crtc);
366
367 du->hotspot_x = 0;
368 du->hotspot_y = 0;
369 }
370 drm_modeset_unlock_all(dev);
371}
372
373void vmw_kms_cursor_post_execbuf(struct vmw_private *dev_priv)
374{
375 struct drm_device *dev = dev_priv->dev;
376 struct vmw_display_unit *du;
377 struct drm_crtc *crtc;
378
379 mutex_lock(&dev->mode_config.mutex);
380
381 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
382 du = vmw_crtc_to_du(crtc);
383 if (!du->cursor_surface ||
384 du->cursor_age == du->cursor_surface->snooper.age)
385 continue;
386
387 du->cursor_age = du->cursor_surface->snooper.age;
388 vmw_cursor_update_image(dev_priv,
389 du->cursor_surface->snooper.image,
390 64, 64,
391 du->hotspot_x + du->core_hotspot_x,
392 du->hotspot_y + du->core_hotspot_y);
393 }
394
395 mutex_unlock(&dev->mode_config.mutex);
396}
397
398
399
400
401
402
403
404
405
406static void vmw_framebuffer_surface_destroy(struct drm_framebuffer *framebuffer)
407{
408 struct vmw_framebuffer_surface *vfbs =
409 vmw_framebuffer_to_vfbs(framebuffer);
410
411 drm_framebuffer_cleanup(framebuffer);
412 vmw_surface_unreference(&vfbs->surface);
413 if (vfbs->base.user_obj)
414 ttm_base_object_unref(&vfbs->base.user_obj);
415
416 kfree(vfbs);
417}
418
419static int vmw_framebuffer_surface_dirty(struct drm_framebuffer *framebuffer,
420 struct drm_file *file_priv,
421 unsigned flags, unsigned color,
422 struct drm_clip_rect *clips,
423 unsigned num_clips)
424{
425 struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
426 struct vmw_framebuffer_surface *vfbs =
427 vmw_framebuffer_to_vfbs(framebuffer);
428 struct drm_clip_rect norect;
429 int ret, inc = 1;
430
431
432 if (dev_priv->active_display_unit == vmw_du_legacy)
433 return -EINVAL;
434
435 drm_modeset_lock_all(dev_priv->dev);
436
437 ret = ttm_read_lock(&dev_priv->reservation_sem, true);
438 if (unlikely(ret != 0)) {
439 drm_modeset_unlock_all(dev_priv->dev);
440 return ret;
441 }
442
443 if (!num_clips) {
444 num_clips = 1;
445 clips = &norect;
446 norect.x1 = norect.y1 = 0;
447 norect.x2 = framebuffer->width;
448 norect.y2 = framebuffer->height;
449 } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
450 num_clips /= 2;
451 inc = 2;
452 }
453
454 if (dev_priv->active_display_unit == vmw_du_screen_object)
455 ret = vmw_kms_sou_do_surface_dirty(dev_priv, &vfbs->base,
456 clips, NULL, NULL, 0, 0,
457 num_clips, inc, NULL);
458 else
459 ret = vmw_kms_stdu_surface_dirty(dev_priv, &vfbs->base,
460 clips, NULL, NULL, 0, 0,
461 num_clips, inc, NULL);
462
463 vmw_fifo_flush(dev_priv, false);
464 ttm_read_unlock(&dev_priv->reservation_sem);
465
466 drm_modeset_unlock_all(dev_priv->dev);
467
468 return 0;
469}
470
471
472
473
474
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477
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485
486
487int vmw_kms_readback(struct vmw_private *dev_priv,
488 struct drm_file *file_priv,
489 struct vmw_framebuffer *vfb,
490 struct drm_vmw_fence_rep __user *user_fence_rep,
491 struct drm_vmw_rect *vclips,
492 uint32_t num_clips)
493{
494 switch (dev_priv->active_display_unit) {
495 case vmw_du_screen_object:
496 return vmw_kms_sou_readback(dev_priv, file_priv, vfb,
497 user_fence_rep, vclips, num_clips);
498 case vmw_du_screen_target:
499 return vmw_kms_stdu_dma(dev_priv, file_priv, vfb,
500 user_fence_rep, NULL, vclips, num_clips,
501 1, false, true);
502 default:
503 WARN_ONCE(true,
504 "Readback called with invalid display system.\n");
505}
506
507 return -ENOSYS;
508}
509
510
511static const struct drm_framebuffer_funcs vmw_framebuffer_surface_funcs = {
512 .destroy = vmw_framebuffer_surface_destroy,
513 .dirty = vmw_framebuffer_surface_dirty,
514};
515
516static int vmw_kms_new_framebuffer_surface(struct vmw_private *dev_priv,
517 struct vmw_surface *surface,
518 struct vmw_framebuffer **out,
519 const struct drm_mode_fb_cmd
520 *mode_cmd,
521 bool is_dmabuf_proxy)
522
523{
524 struct drm_device *dev = dev_priv->dev;
525 struct vmw_framebuffer_surface *vfbs;
526 enum SVGA3dSurfaceFormat format;
527 int ret;
528
529
530 if (dev_priv->active_display_unit == vmw_du_legacy)
531 return -ENOSYS;
532
533
534
535
536
537
538 if (unlikely(!surface->scanout))
539 return -EINVAL;
540
541 if (unlikely(surface->mip_levels[0] != 1 ||
542 surface->num_sizes != 1 ||
543 surface->base_size.width < mode_cmd->width ||
544 surface->base_size.height < mode_cmd->height ||
545 surface->base_size.depth != 1)) {
546 DRM_ERROR("Incompatible surface dimensions "
547 "for requested mode.\n");
548 return -EINVAL;
549 }
550
551 switch (mode_cmd->depth) {
552 case 32:
553 format = SVGA3D_A8R8G8B8;
554 break;
555 case 24:
556 format = SVGA3D_X8R8G8B8;
557 break;
558 case 16:
559 format = SVGA3D_R5G6B5;
560 break;
561 case 15:
562 format = SVGA3D_A1R5G5B5;
563 break;
564 default:
565 DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth);
566 return -EINVAL;
567 }
568
569
570
571
572
573 if (!dev_priv->has_dx && format != surface->format) {
574 DRM_ERROR("Invalid surface format for requested mode.\n");
575 return -EINVAL;
576 }
577
578 vfbs = kzalloc(sizeof(*vfbs), GFP_KERNEL);
579 if (!vfbs) {
580 ret = -ENOMEM;
581 goto out_err1;
582 }
583
584
585 vfbs->base.base.bits_per_pixel = mode_cmd->bpp;
586 vfbs->base.base.pitches[0] = mode_cmd->pitch;
587 vfbs->base.base.depth = mode_cmd->depth;
588 vfbs->base.base.width = mode_cmd->width;
589 vfbs->base.base.height = mode_cmd->height;
590 vfbs->surface = vmw_surface_reference(surface);
591 vfbs->base.user_handle = mode_cmd->handle;
592 vfbs->is_dmabuf_proxy = is_dmabuf_proxy;
593
594 *out = &vfbs->base;
595
596 ret = drm_framebuffer_init(dev, &vfbs->base.base,
597 &vmw_framebuffer_surface_funcs);
598 if (ret)
599 goto out_err2;
600
601 return 0;
602
603out_err2:
604 vmw_surface_unreference(&surface);
605 kfree(vfbs);
606out_err1:
607 return ret;
608}
609
610
611
612
613
614static void vmw_framebuffer_dmabuf_destroy(struct drm_framebuffer *framebuffer)
615{
616 struct vmw_framebuffer_dmabuf *vfbd =
617 vmw_framebuffer_to_vfbd(framebuffer);
618
619 drm_framebuffer_cleanup(framebuffer);
620 vmw_dmabuf_unreference(&vfbd->buffer);
621 if (vfbd->base.user_obj)
622 ttm_base_object_unref(&vfbd->base.user_obj);
623
624 kfree(vfbd);
625}
626
627static int vmw_framebuffer_dmabuf_dirty(struct drm_framebuffer *framebuffer,
628 struct drm_file *file_priv,
629 unsigned flags, unsigned color,
630 struct drm_clip_rect *clips,
631 unsigned num_clips)
632{
633 struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
634 struct vmw_framebuffer_dmabuf *vfbd =
635 vmw_framebuffer_to_vfbd(framebuffer);
636 struct drm_clip_rect norect;
637 int ret, increment = 1;
638
639 drm_modeset_lock_all(dev_priv->dev);
640
641 ret = ttm_read_lock(&dev_priv->reservation_sem, true);
642 if (unlikely(ret != 0)) {
643 drm_modeset_unlock_all(dev_priv->dev);
644 return ret;
645 }
646
647 if (!num_clips) {
648 num_clips = 1;
649 clips = &norect;
650 norect.x1 = norect.y1 = 0;
651 norect.x2 = framebuffer->width;
652 norect.y2 = framebuffer->height;
653 } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
654 num_clips /= 2;
655 increment = 2;
656 }
657
658 switch (dev_priv->active_display_unit) {
659 case vmw_du_screen_target:
660 ret = vmw_kms_stdu_dma(dev_priv, NULL, &vfbd->base, NULL,
661 clips, NULL, num_clips, increment,
662 true, true);
663 break;
664 case vmw_du_screen_object:
665 ret = vmw_kms_sou_do_dmabuf_dirty(dev_priv, &vfbd->base,
666 clips, NULL, num_clips,
667 increment, true, NULL);
668 break;
669 case vmw_du_legacy:
670 ret = vmw_kms_ldu_do_dmabuf_dirty(dev_priv, &vfbd->base, 0, 0,
671 clips, num_clips, increment);
672 break;
673 default:
674 ret = -EINVAL;
675 WARN_ONCE(true, "Dirty called with invalid display system.\n");
676 break;
677 }
678
679 vmw_fifo_flush(dev_priv, false);
680 ttm_read_unlock(&dev_priv->reservation_sem);
681
682 drm_modeset_unlock_all(dev_priv->dev);
683
684 return ret;
685}
686
687static const struct drm_framebuffer_funcs vmw_framebuffer_dmabuf_funcs = {
688 .destroy = vmw_framebuffer_dmabuf_destroy,
689 .dirty = vmw_framebuffer_dmabuf_dirty,
690};
691
692
693
694
695static int vmw_framebuffer_pin(struct vmw_framebuffer *vfb)
696{
697 struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
698 struct vmw_dma_buffer *buf;
699 int ret;
700
701 buf = vfb->dmabuf ? vmw_framebuffer_to_vfbd(&vfb->base)->buffer :
702 vmw_framebuffer_to_vfbs(&vfb->base)->surface->res.backup;
703
704 if (!buf)
705 return 0;
706
707 switch (dev_priv->active_display_unit) {
708 case vmw_du_legacy:
709 vmw_overlay_pause_all(dev_priv);
710 ret = vmw_dmabuf_pin_in_start_of_vram(dev_priv, buf, false);
711 vmw_overlay_resume_all(dev_priv);
712 break;
713 case vmw_du_screen_object:
714 case vmw_du_screen_target:
715 if (vfb->dmabuf)
716 return vmw_dmabuf_pin_in_vram_or_gmr(dev_priv, buf,
717 false);
718
719 return vmw_dmabuf_pin_in_placement(dev_priv, buf,
720 &vmw_mob_placement, false);
721 default:
722 return -EINVAL;
723 }
724
725 return ret;
726}
727
728static int vmw_framebuffer_unpin(struct vmw_framebuffer *vfb)
729{
730 struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
731 struct vmw_dma_buffer *buf;
732
733 buf = vfb->dmabuf ? vmw_framebuffer_to_vfbd(&vfb->base)->buffer :
734 vmw_framebuffer_to_vfbs(&vfb->base)->surface->res.backup;
735
736 if (WARN_ON(!buf))
737 return 0;
738
739 return vmw_dmabuf_unpin(dev_priv, buf, false);
740}
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757static int vmw_create_dmabuf_proxy(struct drm_device *dev,
758 const struct drm_mode_fb_cmd *mode_cmd,
759 struct vmw_dma_buffer *dmabuf_mob,
760 struct vmw_surface **srf_out)
761{
762 uint32_t format;
763 struct drm_vmw_size content_base_size;
764 struct vmw_resource *res;
765 unsigned int bytes_pp;
766 int ret;
767
768 switch (mode_cmd->depth) {
769 case 32:
770 case 24:
771 format = SVGA3D_X8R8G8B8;
772 bytes_pp = 4;
773 break;
774
775 case 16:
776 case 15:
777 format = SVGA3D_R5G6B5;
778 bytes_pp = 2;
779 break;
780
781 case 8:
782 format = SVGA3D_P8;
783 bytes_pp = 1;
784 break;
785
786 default:
787 DRM_ERROR("Invalid framebuffer format %d\n", mode_cmd->depth);
788 return -EINVAL;
789 }
790
791 content_base_size.width = mode_cmd->pitch / bytes_pp;
792 content_base_size.height = mode_cmd->height;
793 content_base_size.depth = 1;
794
795 ret = vmw_surface_gb_priv_define(dev,
796 0,
797 0,
798 format,
799 true,
800 1,
801 0,
802 0,
803 content_base_size,
804 srf_out);
805 if (ret) {
806 DRM_ERROR("Failed to allocate proxy content buffer\n");
807 return ret;
808 }
809
810 res = &(*srf_out)->res;
811
812
813 mutex_lock(&res->dev_priv->cmdbuf_mutex);
814 (void) vmw_resource_reserve(res, false, true);
815 vmw_dmabuf_unreference(&res->backup);
816 res->backup = vmw_dmabuf_reference(dmabuf_mob);
817 res->backup_offset = 0;
818 vmw_resource_unreserve(res, false, NULL, 0);
819 mutex_unlock(&res->dev_priv->cmdbuf_mutex);
820
821 return 0;
822}
823
824
825
826static int vmw_kms_new_framebuffer_dmabuf(struct vmw_private *dev_priv,
827 struct vmw_dma_buffer *dmabuf,
828 struct vmw_framebuffer **out,
829 const struct drm_mode_fb_cmd
830 *mode_cmd)
831
832{
833 struct drm_device *dev = dev_priv->dev;
834 struct vmw_framebuffer_dmabuf *vfbd;
835 unsigned int requested_size;
836 int ret;
837
838 requested_size = mode_cmd->height * mode_cmd->pitch;
839 if (unlikely(requested_size > dmabuf->base.num_pages * PAGE_SIZE)) {
840 DRM_ERROR("Screen buffer object size is too small "
841 "for requested mode.\n");
842 return -EINVAL;
843 }
844
845
846 if (dev_priv->active_display_unit == vmw_du_screen_object) {
847 switch (mode_cmd->depth) {
848 case 32:
849 case 24:
850
851 if (mode_cmd->bpp == 32)
852 break;
853
854 DRM_ERROR("Invalid color depth/bbp: %d %d\n",
855 mode_cmd->depth, mode_cmd->bpp);
856 return -EINVAL;
857 case 16:
858 case 15:
859
860 if (mode_cmd->bpp == 16)
861 break;
862
863 DRM_ERROR("Invalid color depth/bbp: %d %d\n",
864 mode_cmd->depth, mode_cmd->bpp);
865 return -EINVAL;
866 default:
867 DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth);
868 return -EINVAL;
869 }
870 }
871
872 vfbd = kzalloc(sizeof(*vfbd), GFP_KERNEL);
873 if (!vfbd) {
874 ret = -ENOMEM;
875 goto out_err1;
876 }
877
878 vfbd->base.base.bits_per_pixel = mode_cmd->bpp;
879 vfbd->base.base.pitches[0] = mode_cmd->pitch;
880 vfbd->base.base.depth = mode_cmd->depth;
881 vfbd->base.base.width = mode_cmd->width;
882 vfbd->base.base.height = mode_cmd->height;
883 vfbd->base.dmabuf = true;
884 vfbd->buffer = vmw_dmabuf_reference(dmabuf);
885 vfbd->base.user_handle = mode_cmd->handle;
886 *out = &vfbd->base;
887
888 ret = drm_framebuffer_init(dev, &vfbd->base.base,
889 &vmw_framebuffer_dmabuf_funcs);
890 if (ret)
891 goto out_err2;
892
893 return 0;
894
895out_err2:
896 vmw_dmabuf_unreference(&dmabuf);
897 kfree(vfbd);
898out_err1:
899 return ret;
900}
901
902
903
904
905
906
907
908
909
910
911
912
913
914struct vmw_framebuffer *
915vmw_kms_new_framebuffer(struct vmw_private *dev_priv,
916 struct vmw_dma_buffer *dmabuf,
917 struct vmw_surface *surface,
918 bool only_2d,
919 const struct drm_mode_fb_cmd *mode_cmd)
920{
921 struct vmw_framebuffer *vfb = NULL;
922 bool is_dmabuf_proxy = false;
923 int ret;
924
925
926
927
928
929
930 if (dmabuf && only_2d &&
931 dev_priv->active_display_unit == vmw_du_screen_target) {
932 ret = vmw_create_dmabuf_proxy(dev_priv->dev, mode_cmd,
933 dmabuf, &surface);
934 if (ret)
935 return ERR_PTR(ret);
936
937 is_dmabuf_proxy = true;
938 }
939
940
941 if (surface) {
942 ret = vmw_kms_new_framebuffer_surface(dev_priv, surface, &vfb,
943 mode_cmd,
944 is_dmabuf_proxy);
945
946
947
948
949
950 if (is_dmabuf_proxy)
951 vmw_surface_unreference(&surface);
952 } else if (dmabuf) {
953 ret = vmw_kms_new_framebuffer_dmabuf(dev_priv, dmabuf, &vfb,
954 mode_cmd);
955 } else {
956 BUG();
957 }
958
959 if (ret)
960 return ERR_PTR(ret);
961
962 vfb->pin = vmw_framebuffer_pin;
963 vfb->unpin = vmw_framebuffer_unpin;
964
965 return vfb;
966}
967
968
969
970
971
972static struct drm_framebuffer *vmw_kms_fb_create(struct drm_device *dev,
973 struct drm_file *file_priv,
974 const struct drm_mode_fb_cmd2 *mode_cmd2)
975{
976 struct vmw_private *dev_priv = vmw_priv(dev);
977 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
978 struct vmw_framebuffer *vfb = NULL;
979 struct vmw_surface *surface = NULL;
980 struct vmw_dma_buffer *bo = NULL;
981 struct ttm_base_object *user_obj;
982 struct drm_mode_fb_cmd mode_cmd;
983 int ret;
984
985 mode_cmd.width = mode_cmd2->width;
986 mode_cmd.height = mode_cmd2->height;
987 mode_cmd.pitch = mode_cmd2->pitches[0];
988 mode_cmd.handle = mode_cmd2->handles[0];
989 drm_fb_get_bpp_depth(mode_cmd2->pixel_format, &mode_cmd.depth,
990 &mode_cmd.bpp);
991
992
993
994
995
996
997
998 if (!vmw_kms_validate_mode_vram(dev_priv,
999 mode_cmd.pitch,
1000 mode_cmd.height)) {
1001 DRM_ERROR("Requested mode exceed bounding box limit.\n");
1002 return ERR_PTR(-ENOMEM);
1003 }
1004
1005
1006
1007
1008
1009
1010
1011
1012
1013
1014 user_obj = ttm_base_object_lookup(tfile, mode_cmd.handle);
1015 if (unlikely(user_obj == NULL)) {
1016 DRM_ERROR("Could not locate requested kms frame buffer.\n");
1017 return ERR_PTR(-ENOENT);
1018 }
1019
1020
1021
1022
1023
1024
1025 ret = vmw_user_lookup_handle(dev_priv, tfile,
1026 mode_cmd.handle,
1027 &surface, &bo);
1028 if (ret)
1029 goto err_out;
1030
1031 vfb = vmw_kms_new_framebuffer(dev_priv, bo, surface,
1032 !(dev_priv->capabilities & SVGA_CAP_3D),
1033 &mode_cmd);
1034 if (IS_ERR(vfb)) {
1035 ret = PTR_ERR(vfb);
1036 goto err_out;
1037 }
1038
1039err_out:
1040
1041 if (bo)
1042 vmw_dmabuf_unreference(&bo);
1043 if (surface)
1044 vmw_surface_unreference(&surface);
1045
1046 if (ret) {
1047 DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret);
1048 ttm_base_object_unref(&user_obj);
1049 return ERR_PTR(ret);
1050 } else
1051 vfb->user_obj = user_obj;
1052
1053 return &vfb->base;
1054}
1055
1056static const struct drm_mode_config_funcs vmw_kms_funcs = {
1057 .fb_create = vmw_kms_fb_create,
1058};
1059
1060static int vmw_kms_generic_present(struct vmw_private *dev_priv,
1061 struct drm_file *file_priv,
1062 struct vmw_framebuffer *vfb,
1063 struct vmw_surface *surface,
1064 uint32_t sid,
1065 int32_t destX, int32_t destY,
1066 struct drm_vmw_rect *clips,
1067 uint32_t num_clips)
1068{
1069 return vmw_kms_sou_do_surface_dirty(dev_priv, vfb, NULL, clips,
1070 &surface->res, destX, destY,
1071 num_clips, 1, NULL);
1072}
1073
1074
1075int vmw_kms_present(struct vmw_private *dev_priv,
1076 struct drm_file *file_priv,
1077 struct vmw_framebuffer *vfb,
1078 struct vmw_surface *surface,
1079 uint32_t sid,
1080 int32_t destX, int32_t destY,
1081 struct drm_vmw_rect *clips,
1082 uint32_t num_clips)
1083{
1084 int ret;
1085
1086 switch (dev_priv->active_display_unit) {
1087 case vmw_du_screen_target:
1088 ret = vmw_kms_stdu_surface_dirty(dev_priv, vfb, NULL, clips,
1089 &surface->res, destX, destY,
1090 num_clips, 1, NULL);
1091 break;
1092 case vmw_du_screen_object:
1093 ret = vmw_kms_generic_present(dev_priv, file_priv, vfb, surface,
1094 sid, destX, destY, clips,
1095 num_clips);
1096 break;
1097 default:
1098 WARN_ONCE(true,
1099 "Present called with invalid display system.\n");
1100 ret = -ENOSYS;
1101 break;
1102 }
1103 if (ret)
1104 return ret;
1105
1106 vmw_fifo_flush(dev_priv, false);
1107
1108 return 0;
1109}
1110
1111static void
1112vmw_kms_create_hotplug_mode_update_property(struct vmw_private *dev_priv)
1113{
1114 if (dev_priv->hotplug_mode_update_property)
1115 return;
1116
1117 dev_priv->hotplug_mode_update_property =
1118 drm_property_create_range(dev_priv->dev,
1119 DRM_MODE_PROP_IMMUTABLE,
1120 "hotplug_mode_update", 0, 1);
1121
1122 if (!dev_priv->hotplug_mode_update_property)
1123 return;
1124
1125}
1126
1127int vmw_kms_init(struct vmw_private *dev_priv)
1128{
1129 struct drm_device *dev = dev_priv->dev;
1130 int ret;
1131
1132 drm_mode_config_init(dev);
1133 dev->mode_config.funcs = &vmw_kms_funcs;
1134 dev->mode_config.min_width = 1;
1135 dev->mode_config.min_height = 1;
1136 dev->mode_config.max_width = dev_priv->texture_max_width;
1137 dev->mode_config.max_height = dev_priv->texture_max_height;
1138
1139 drm_mode_create_suggested_offset_properties(dev);
1140 vmw_kms_create_hotplug_mode_update_property(dev_priv);
1141
1142 ret = vmw_kms_stdu_init_display(dev_priv);
1143 if (ret) {
1144 ret = vmw_kms_sou_init_display(dev_priv);
1145 if (ret)
1146 ret = vmw_kms_ldu_init_display(dev_priv);
1147 }
1148
1149 return ret;
1150}
1151
1152int vmw_kms_close(struct vmw_private *dev_priv)
1153{
1154 int ret;
1155
1156
1157
1158
1159
1160
1161 drm_mode_config_cleanup(dev_priv->dev);
1162 if (dev_priv->active_display_unit == vmw_du_screen_object)
1163 ret = vmw_kms_sou_close_display(dev_priv);
1164 else if (dev_priv->active_display_unit == vmw_du_screen_target)
1165 ret = vmw_kms_stdu_close_display(dev_priv);
1166 else
1167 ret = vmw_kms_ldu_close_display(dev_priv);
1168
1169 return ret;
1170}
1171
1172int vmw_kms_cursor_bypass_ioctl(struct drm_device *dev, void *data,
1173 struct drm_file *file_priv)
1174{
1175 struct drm_vmw_cursor_bypass_arg *arg = data;
1176 struct vmw_display_unit *du;
1177 struct drm_crtc *crtc;
1178 int ret = 0;
1179
1180
1181 mutex_lock(&dev->mode_config.mutex);
1182 if (arg->flags & DRM_VMW_CURSOR_BYPASS_ALL) {
1183
1184 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
1185 du = vmw_crtc_to_du(crtc);
1186 du->hotspot_x = arg->xhot;
1187 du->hotspot_y = arg->yhot;
1188 }
1189
1190 mutex_unlock(&dev->mode_config.mutex);
1191 return 0;
1192 }
1193
1194 crtc = drm_crtc_find(dev, arg->crtc_id);
1195 if (!crtc) {
1196 ret = -ENOENT;
1197 goto out;
1198 }
1199
1200 du = vmw_crtc_to_du(crtc);
1201
1202 du->hotspot_x = arg->xhot;
1203 du->hotspot_y = arg->yhot;
1204
1205out:
1206 mutex_unlock(&dev->mode_config.mutex);
1207
1208 return ret;
1209}
1210
1211int vmw_kms_write_svga(struct vmw_private *vmw_priv,
1212 unsigned width, unsigned height, unsigned pitch,
1213 unsigned bpp, unsigned depth)
1214{
1215 if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1216 vmw_write(vmw_priv, SVGA_REG_PITCHLOCK, pitch);
1217 else if (vmw_fifo_have_pitchlock(vmw_priv))
1218 vmw_mmio_write(pitch, vmw_priv->mmio_virt +
1219 SVGA_FIFO_PITCHLOCK);
1220 vmw_write(vmw_priv, SVGA_REG_WIDTH, width);
1221 vmw_write(vmw_priv, SVGA_REG_HEIGHT, height);
1222 vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, bpp);
1223
1224 if (vmw_read(vmw_priv, SVGA_REG_DEPTH) != depth) {
1225 DRM_ERROR("Invalid depth %u for %u bpp, host expects %u\n",
1226 depth, bpp, vmw_read(vmw_priv, SVGA_REG_DEPTH));
1227 return -EINVAL;
1228 }
1229
1230 return 0;
1231}
1232
1233int vmw_kms_save_vga(struct vmw_private *vmw_priv)
1234{
1235 struct vmw_vga_topology_state *save;
1236 uint32_t i;
1237
1238 vmw_priv->vga_width = vmw_read(vmw_priv, SVGA_REG_WIDTH);
1239 vmw_priv->vga_height = vmw_read(vmw_priv, SVGA_REG_HEIGHT);
1240 vmw_priv->vga_bpp = vmw_read(vmw_priv, SVGA_REG_BITS_PER_PIXEL);
1241 if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1242 vmw_priv->vga_pitchlock =
1243 vmw_read(vmw_priv, SVGA_REG_PITCHLOCK);
1244 else if (vmw_fifo_have_pitchlock(vmw_priv))
1245 vmw_priv->vga_pitchlock = vmw_mmio_read(vmw_priv->mmio_virt +
1246 SVGA_FIFO_PITCHLOCK);
1247
1248 if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
1249 return 0;
1250
1251 vmw_priv->num_displays = vmw_read(vmw_priv,
1252 SVGA_REG_NUM_GUEST_DISPLAYS);
1253
1254 if (vmw_priv->num_displays == 0)
1255 vmw_priv->num_displays = 1;
1256
1257 for (i = 0; i < vmw_priv->num_displays; ++i) {
1258 save = &vmw_priv->vga_save[i];
1259 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
1260 save->primary = vmw_read(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY);
1261 save->pos_x = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_X);
1262 save->pos_y = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y);
1263 save->width = vmw_read(vmw_priv, SVGA_REG_DISPLAY_WIDTH);
1264 save->height = vmw_read(vmw_priv, SVGA_REG_DISPLAY_HEIGHT);
1265 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
1266 if (i == 0 && vmw_priv->num_displays == 1 &&
1267 save->width == 0 && save->height == 0) {
1268
1269
1270
1271
1272
1273
1274 save->width = vmw_priv->vga_width - save->pos_x;
1275 save->height = vmw_priv->vga_height - save->pos_y;
1276 }
1277 }
1278
1279 return 0;
1280}
1281
1282int vmw_kms_restore_vga(struct vmw_private *vmw_priv)
1283{
1284 struct vmw_vga_topology_state *save;
1285 uint32_t i;
1286
1287 vmw_write(vmw_priv, SVGA_REG_WIDTH, vmw_priv->vga_width);
1288 vmw_write(vmw_priv, SVGA_REG_HEIGHT, vmw_priv->vga_height);
1289 vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, vmw_priv->vga_bpp);
1290 if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1291 vmw_write(vmw_priv, SVGA_REG_PITCHLOCK,
1292 vmw_priv->vga_pitchlock);
1293 else if (vmw_fifo_have_pitchlock(vmw_priv))
1294 vmw_mmio_write(vmw_priv->vga_pitchlock,
1295 vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
1296
1297 if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
1298 return 0;
1299
1300 for (i = 0; i < vmw_priv->num_displays; ++i) {
1301 save = &vmw_priv->vga_save[i];
1302 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
1303 vmw_write(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY, save->primary);
1304 vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_X, save->pos_x);
1305 vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y, save->pos_y);
1306 vmw_write(vmw_priv, SVGA_REG_DISPLAY_WIDTH, save->width);
1307 vmw_write(vmw_priv, SVGA_REG_DISPLAY_HEIGHT, save->height);
1308 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
1309 }
1310
1311 return 0;
1312}
1313
1314bool vmw_kms_validate_mode_vram(struct vmw_private *dev_priv,
1315 uint32_t pitch,
1316 uint32_t height)
1317{
1318 return ((u64) pitch * (u64) height) < (u64)
1319 ((dev_priv->active_display_unit == vmw_du_screen_target) ?
1320 dev_priv->prim_bb_mem : dev_priv->vram_size);
1321}
1322
1323
1324
1325
1326
1327u32 vmw_get_vblank_counter(struct drm_device *dev, unsigned int pipe)
1328{
1329 return 0;
1330}
1331
1332
1333
1334
1335int vmw_enable_vblank(struct drm_device *dev, unsigned int pipe)
1336{
1337 return -ENOSYS;
1338}
1339
1340
1341
1342
1343void vmw_disable_vblank(struct drm_device *dev, unsigned int pipe)
1344{
1345}
1346
1347
1348
1349
1350
1351
1352static int vmw_du_update_layout(struct vmw_private *dev_priv, unsigned num,
1353 struct drm_vmw_rect *rects)
1354{
1355 struct drm_device *dev = dev_priv->dev;
1356 struct vmw_display_unit *du;
1357 struct drm_connector *con;
1358
1359 mutex_lock(&dev->mode_config.mutex);
1360
1361#if 0
1362 {
1363 unsigned int i;
1364
1365 DRM_INFO("%s: new layout ", __func__);
1366 for (i = 0; i < num; i++)
1367 DRM_INFO("(%i, %i %ux%u) ", rects[i].x, rects[i].y,
1368 rects[i].w, rects[i].h);
1369 DRM_INFO("\n");
1370 }
1371#endif
1372
1373 list_for_each_entry(con, &dev->mode_config.connector_list, head) {
1374 du = vmw_connector_to_du(con);
1375 if (num > du->unit) {
1376 du->pref_width = rects[du->unit].w;
1377 du->pref_height = rects[du->unit].h;
1378 du->pref_active = true;
1379 du->gui_x = rects[du->unit].x;
1380 du->gui_y = rects[du->unit].y;
1381 drm_object_property_set_value
1382 (&con->base, dev->mode_config.suggested_x_property,
1383 du->gui_x);
1384 drm_object_property_set_value
1385 (&con->base, dev->mode_config.suggested_y_property,
1386 du->gui_y);
1387 } else {
1388 du->pref_width = 800;
1389 du->pref_height = 600;
1390 du->pref_active = false;
1391 drm_object_property_set_value
1392 (&con->base, dev->mode_config.suggested_x_property,
1393 0);
1394 drm_object_property_set_value
1395 (&con->base, dev->mode_config.suggested_y_property,
1396 0);
1397 }
1398 con->status = vmw_du_connector_detect(con, true);
1399 }
1400
1401 mutex_unlock(&dev->mode_config.mutex);
1402 drm_sysfs_hotplug_event(dev);
1403
1404 return 0;
1405}
1406
1407void vmw_du_crtc_gamma_set(struct drm_crtc *crtc,
1408 u16 *r, u16 *g, u16 *b,
1409 uint32_t start, uint32_t size)
1410{
1411 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
1412 int i;
1413
1414 for (i = 0; i < size; i++) {
1415 DRM_DEBUG("%d r/g/b = 0x%04x / 0x%04x / 0x%04x\n", i,
1416 r[i], g[i], b[i]);
1417 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 0, r[i] >> 8);
1418 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 1, g[i] >> 8);
1419 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 2, b[i] >> 8);
1420 }
1421}
1422
1423int vmw_du_connector_dpms(struct drm_connector *connector, int mode)
1424{
1425 return 0;
1426}
1427
1428enum drm_connector_status
1429vmw_du_connector_detect(struct drm_connector *connector, bool force)
1430{
1431 uint32_t num_displays;
1432 struct drm_device *dev = connector->dev;
1433 struct vmw_private *dev_priv = vmw_priv(dev);
1434 struct vmw_display_unit *du = vmw_connector_to_du(connector);
1435
1436 num_displays = vmw_read(dev_priv, SVGA_REG_NUM_DISPLAYS);
1437
1438 return ((vmw_connector_to_du(connector)->unit < num_displays &&
1439 du->pref_active) ?
1440 connector_status_connected : connector_status_disconnected);
1441}
1442
1443static struct drm_display_mode vmw_kms_connector_builtin[] = {
1444
1445 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
1446 752, 800, 0, 480, 489, 492, 525, 0,
1447 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
1448
1449 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
1450 968, 1056, 0, 600, 601, 605, 628, 0,
1451 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1452
1453 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
1454 1184, 1344, 0, 768, 771, 777, 806, 0,
1455 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
1456
1457 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
1458 1344, 1600, 0, 864, 865, 868, 900, 0,
1459 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1460
1461 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
1462 1472, 1664, 0, 768, 771, 778, 798, 0,
1463 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1464
1465 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
1466 1480, 1680, 0, 800, 803, 809, 831, 0,
1467 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
1468
1469 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
1470 1488, 1800, 0, 960, 961, 964, 1000, 0,
1471 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1472
1473 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
1474 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
1475 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1476
1477 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
1478 1536, 1792, 0, 768, 771, 777, 795, 0,
1479 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1480
1481 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
1482 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
1483 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1484
1485 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
1486 1672, 1904, 0, 900, 903, 909, 934, 0,
1487 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1488
1489 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
1490 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
1491 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1492
1493 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
1494 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
1495 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1496
1497 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
1498 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
1499 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1500
1501 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
1502 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
1503 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1504
1505 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
1506 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
1507 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1508
1509 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
1510 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
1511 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1512
1513 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
1514 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
1515 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1516
1517 { DRM_MODE("", 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) },
1518};
1519
1520
1521
1522
1523
1524
1525
1526
1527void vmw_guess_mode_timing(struct drm_display_mode *mode)
1528{
1529 mode->hsync_start = mode->hdisplay + 50;
1530 mode->hsync_end = mode->hsync_start + 50;
1531 mode->htotal = mode->hsync_end + 50;
1532
1533 mode->vsync_start = mode->vdisplay + 50;
1534 mode->vsync_end = mode->vsync_start + 50;
1535 mode->vtotal = mode->vsync_end + 50;
1536
1537 mode->clock = (u32)mode->htotal * (u32)mode->vtotal / 100 * 6;
1538 mode->vrefresh = drm_mode_vrefresh(mode);
1539}
1540
1541
1542int vmw_du_connector_fill_modes(struct drm_connector *connector,
1543 uint32_t max_width, uint32_t max_height)
1544{
1545 struct vmw_display_unit *du = vmw_connector_to_du(connector);
1546 struct drm_device *dev = connector->dev;
1547 struct vmw_private *dev_priv = vmw_priv(dev);
1548 struct drm_display_mode *mode = NULL;
1549 struct drm_display_mode *bmode;
1550 struct drm_display_mode prefmode = { DRM_MODE("preferred",
1551 DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
1552 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1553 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC)
1554 };
1555 int i;
1556 u32 assumed_bpp = 2;
1557
1558
1559
1560
1561
1562 if (dev_priv->active_display_unit == vmw_du_screen_object)
1563 assumed_bpp = 4;
1564
1565 if (dev_priv->active_display_unit == vmw_du_screen_target) {
1566 max_width = min(max_width, dev_priv->stdu_max_width);
1567 max_height = min(max_height, dev_priv->stdu_max_height);
1568 }
1569
1570
1571 mode = drm_mode_duplicate(dev, &prefmode);
1572 if (!mode)
1573 return 0;
1574 mode->hdisplay = du->pref_width;
1575 mode->vdisplay = du->pref_height;
1576 vmw_guess_mode_timing(mode);
1577
1578 if (vmw_kms_validate_mode_vram(dev_priv,
1579 mode->hdisplay * assumed_bpp,
1580 mode->vdisplay)) {
1581 drm_mode_probed_add(connector, mode);
1582 } else {
1583 drm_mode_destroy(dev, mode);
1584 mode = NULL;
1585 }
1586
1587 if (du->pref_mode) {
1588 list_del_init(&du->pref_mode->head);
1589 drm_mode_destroy(dev, du->pref_mode);
1590 }
1591
1592
1593 du->pref_mode = mode;
1594
1595 for (i = 0; vmw_kms_connector_builtin[i].type != 0; i++) {
1596 bmode = &vmw_kms_connector_builtin[i];
1597 if (bmode->hdisplay > max_width ||
1598 bmode->vdisplay > max_height)
1599 continue;
1600
1601 if (!vmw_kms_validate_mode_vram(dev_priv,
1602 bmode->hdisplay * assumed_bpp,
1603 bmode->vdisplay))
1604 continue;
1605
1606 mode = drm_mode_duplicate(dev, bmode);
1607 if (!mode)
1608 return 0;
1609 mode->vrefresh = drm_mode_vrefresh(mode);
1610
1611 drm_mode_probed_add(connector, mode);
1612 }
1613
1614 drm_mode_connector_list_update(connector);
1615
1616 drm_mode_sort(&connector->modes);
1617
1618 return 1;
1619}
1620
1621int vmw_du_connector_set_property(struct drm_connector *connector,
1622 struct drm_property *property,
1623 uint64_t val)
1624{
1625 struct vmw_display_unit *du = vmw_connector_to_du(connector);
1626 struct vmw_private *dev_priv = vmw_priv(connector->dev);
1627
1628 if (property == dev_priv->implicit_placement_property)
1629 du->is_implicit = val;
1630
1631 return 0;
1632}
1633
1634
1635int vmw_kms_update_layout_ioctl(struct drm_device *dev, void *data,
1636 struct drm_file *file_priv)
1637{
1638 struct vmw_private *dev_priv = vmw_priv(dev);
1639 struct drm_vmw_update_layout_arg *arg =
1640 (struct drm_vmw_update_layout_arg *)data;
1641 void __user *user_rects;
1642 struct drm_vmw_rect *rects;
1643 unsigned rects_size;
1644 int ret;
1645 int i;
1646 u64 total_pixels = 0;
1647 struct drm_mode_config *mode_config = &dev->mode_config;
1648 struct drm_vmw_rect bounding_box = {0};
1649
1650 if (!arg->num_outputs) {
1651 struct drm_vmw_rect def_rect = {0, 0, 800, 600};
1652 vmw_du_update_layout(dev_priv, 1, &def_rect);
1653 return 0;
1654 }
1655
1656 rects_size = arg->num_outputs * sizeof(struct drm_vmw_rect);
1657 rects = kcalloc(arg->num_outputs, sizeof(struct drm_vmw_rect),
1658 GFP_KERNEL);
1659 if (unlikely(!rects))
1660 return -ENOMEM;
1661
1662 user_rects = (void __user *)(unsigned long)arg->rects;
1663 ret = copy_from_user(rects, user_rects, rects_size);
1664 if (unlikely(ret != 0)) {
1665 DRM_ERROR("Failed to get rects.\n");
1666 ret = -EFAULT;
1667 goto out_free;
1668 }
1669
1670 for (i = 0; i < arg->num_outputs; ++i) {
1671 if (rects[i].x < 0 ||
1672 rects[i].y < 0 ||
1673 rects[i].x + rects[i].w > mode_config->max_width ||
1674 rects[i].y + rects[i].h > mode_config->max_height) {
1675 DRM_ERROR("Invalid GUI layout.\n");
1676 ret = -EINVAL;
1677 goto out_free;
1678 }
1679
1680
1681
1682
1683
1684 if (rects[i].x + rects[i].w > bounding_box.w)
1685 bounding_box.w = rects[i].x + rects[i].w;
1686
1687 if (rects[i].y + rects[i].h > bounding_box.h)
1688 bounding_box.h = rects[i].y + rects[i].h;
1689
1690 total_pixels += (u64) rects[i].w * (u64) rects[i].h;
1691 }
1692
1693 if (dev_priv->active_display_unit == vmw_du_screen_target) {
1694
1695
1696
1697
1698
1699 u64 bb_mem = bounding_box.w * bounding_box.h * 4;
1700 u64 pixel_mem = total_pixels * 4;
1701
1702 if (bb_mem > dev_priv->prim_bb_mem) {
1703 DRM_ERROR("Topology is beyond supported limits.\n");
1704 ret = -EINVAL;
1705 goto out_free;
1706 }
1707
1708 if (pixel_mem > dev_priv->prim_bb_mem) {
1709 DRM_ERROR("Combined output size too large\n");
1710 ret = -EINVAL;
1711 goto out_free;
1712 }
1713 }
1714
1715 vmw_du_update_layout(dev_priv, arg->num_outputs, rects);
1716
1717out_free:
1718 kfree(rects);
1719 return ret;
1720}
1721
1722
1723
1724
1725
1726
1727
1728
1729
1730
1731
1732
1733
1734
1735
1736
1737
1738
1739int vmw_kms_helper_dirty(struct vmw_private *dev_priv,
1740 struct vmw_framebuffer *framebuffer,
1741 const struct drm_clip_rect *clips,
1742 const struct drm_vmw_rect *vclips,
1743 s32 dest_x, s32 dest_y,
1744 int num_clips,
1745 int increment,
1746 struct vmw_kms_dirty *dirty)
1747{
1748 struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
1749 struct drm_crtc *crtc;
1750 u32 num_units = 0;
1751 u32 i, k;
1752
1753 dirty->dev_priv = dev_priv;
1754
1755 list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
1756 if (crtc->primary->fb != &framebuffer->base)
1757 continue;
1758 units[num_units++] = vmw_crtc_to_du(crtc);
1759 }
1760
1761 for (k = 0; k < num_units; k++) {
1762 struct vmw_display_unit *unit = units[k];
1763 s32 crtc_x = unit->crtc.x;
1764 s32 crtc_y = unit->crtc.y;
1765 s32 crtc_width = unit->crtc.mode.hdisplay;
1766 s32 crtc_height = unit->crtc.mode.vdisplay;
1767 const struct drm_clip_rect *clips_ptr = clips;
1768 const struct drm_vmw_rect *vclips_ptr = vclips;
1769
1770 dirty->unit = unit;
1771 if (dirty->fifo_reserve_size > 0) {
1772 dirty->cmd = vmw_fifo_reserve(dev_priv,
1773 dirty->fifo_reserve_size);
1774 if (!dirty->cmd) {
1775 DRM_ERROR("Couldn't reserve fifo space "
1776 "for dirty blits.\n");
1777 return -ENOMEM;
1778 }
1779 memset(dirty->cmd, 0, dirty->fifo_reserve_size);
1780 }
1781 dirty->num_hits = 0;
1782 for (i = 0; i < num_clips; i++, clips_ptr += increment,
1783 vclips_ptr += increment) {
1784 s32 clip_left;
1785 s32 clip_top;
1786
1787
1788
1789
1790
1791
1792 if (clips) {
1793 dirty->fb_x = (s32) clips_ptr->x1;
1794 dirty->fb_y = (s32) clips_ptr->y1;
1795 dirty->unit_x2 = (s32) clips_ptr->x2 + dest_x -
1796 crtc_x;
1797 dirty->unit_y2 = (s32) clips_ptr->y2 + dest_y -
1798 crtc_y;
1799 } else {
1800 dirty->fb_x = vclips_ptr->x;
1801 dirty->fb_y = vclips_ptr->y;
1802 dirty->unit_x2 = dirty->fb_x + vclips_ptr->w +
1803 dest_x - crtc_x;
1804 dirty->unit_y2 = dirty->fb_y + vclips_ptr->h +
1805 dest_y - crtc_y;
1806 }
1807
1808 dirty->unit_x1 = dirty->fb_x + dest_x - crtc_x;
1809 dirty->unit_y1 = dirty->fb_y + dest_y - crtc_y;
1810
1811
1812 if (dirty->unit_x1 >= crtc_width ||
1813 dirty->unit_y1 >= crtc_height ||
1814 dirty->unit_x2 <= 0 || dirty->unit_y2 <= 0)
1815 continue;
1816
1817
1818 dirty->unit_x2 = min_t(s32, dirty->unit_x2,
1819 crtc_width);
1820 dirty->unit_y2 = min_t(s32, dirty->unit_y2,
1821 crtc_height);
1822
1823
1824 clip_left = min_t(s32, dirty->unit_x1, 0);
1825 clip_top = min_t(s32, dirty->unit_y1, 0);
1826 dirty->unit_x1 -= clip_left;
1827 dirty->unit_y1 -= clip_top;
1828 dirty->fb_x -= clip_left;
1829 dirty->fb_y -= clip_top;
1830
1831 dirty->clip(dirty);
1832 }
1833
1834 dirty->fifo_commit(dirty);
1835 }
1836
1837 return 0;
1838}
1839
1840
1841
1842
1843
1844
1845
1846
1847
1848
1849
1850
1851
1852
1853
1854int vmw_kms_helper_buffer_prepare(struct vmw_private *dev_priv,
1855 struct vmw_dma_buffer *buf,
1856 bool interruptible,
1857 bool validate_as_mob)
1858{
1859 struct ttm_buffer_object *bo = &buf->base;
1860 int ret;
1861
1862 ttm_bo_reserve(bo, false, false, interruptible, NULL);
1863 ret = vmw_validate_single_buffer(dev_priv, bo, interruptible,
1864 validate_as_mob);
1865 if (ret)
1866 ttm_bo_unreserve(bo);
1867
1868 return ret;
1869}
1870
1871
1872
1873
1874
1875
1876
1877
1878
1879
1880void vmw_kms_helper_buffer_revert(struct vmw_dma_buffer *buf)
1881{
1882 if (buf)
1883 ttm_bo_unreserve(&buf->base);
1884}
1885
1886
1887
1888
1889
1890
1891
1892
1893
1894
1895
1896
1897
1898
1899
1900
1901void vmw_kms_helper_buffer_finish(struct vmw_private *dev_priv,
1902 struct drm_file *file_priv,
1903 struct vmw_dma_buffer *buf,
1904 struct vmw_fence_obj **out_fence,
1905 struct drm_vmw_fence_rep __user *
1906 user_fence_rep)
1907{
1908 struct vmw_fence_obj *fence;
1909 uint32_t handle;
1910 int ret;
1911
1912 ret = vmw_execbuf_fence_commands(file_priv, dev_priv, &fence,
1913 file_priv ? &handle : NULL);
1914 if (buf)
1915 vmw_fence_single_bo(&buf->base, fence);
1916 if (file_priv)
1917 vmw_execbuf_copy_fence_user(dev_priv, vmw_fpriv(file_priv),
1918 ret, user_fence_rep, fence,
1919 handle);
1920 if (out_fence)
1921 *out_fence = fence;
1922 else
1923 vmw_fence_obj_unreference(&fence);
1924
1925 vmw_kms_helper_buffer_revert(buf);
1926}
1927
1928
1929
1930
1931
1932
1933
1934
1935
1936
1937
1938void vmw_kms_helper_resource_revert(struct vmw_resource *res)
1939{
1940 vmw_kms_helper_buffer_revert(res->backup);
1941 vmw_resource_unreserve(res, false, NULL, 0);
1942 mutex_unlock(&res->dev_priv->cmdbuf_mutex);
1943}
1944
1945
1946
1947
1948
1949
1950
1951
1952
1953
1954
1955
1956int vmw_kms_helper_resource_prepare(struct vmw_resource *res,
1957 bool interruptible)
1958{
1959 int ret = 0;
1960
1961 if (interruptible)
1962 ret = mutex_lock_interruptible(&res->dev_priv->cmdbuf_mutex);
1963 else
1964 mutex_lock(&res->dev_priv->cmdbuf_mutex);
1965
1966 if (unlikely(ret != 0))
1967 return -ERESTARTSYS;
1968
1969 ret = vmw_resource_reserve(res, interruptible, false);
1970 if (ret)
1971 goto out_unlock;
1972
1973 if (res->backup) {
1974 ret = vmw_kms_helper_buffer_prepare(res->dev_priv, res->backup,
1975 interruptible,
1976 res->dev_priv->has_mob);
1977 if (ret)
1978 goto out_unreserve;
1979 }
1980 ret = vmw_resource_validate(res);
1981 if (ret)
1982 goto out_revert;
1983 return 0;
1984
1985out_revert:
1986 vmw_kms_helper_buffer_revert(res->backup);
1987out_unreserve:
1988 vmw_resource_unreserve(res, false, NULL, 0);
1989out_unlock:
1990 mutex_unlock(&res->dev_priv->cmdbuf_mutex);
1991 return ret;
1992}
1993
1994
1995
1996
1997
1998
1999
2000
2001
2002void vmw_kms_helper_resource_finish(struct vmw_resource *res,
2003 struct vmw_fence_obj **out_fence)
2004{
2005 if (res->backup || out_fence)
2006 vmw_kms_helper_buffer_finish(res->dev_priv, NULL, res->backup,
2007 out_fence, NULL);
2008
2009 vmw_resource_unreserve(res, false, NULL, 0);
2010 mutex_unlock(&res->dev_priv->cmdbuf_mutex);
2011}
2012
2013
2014
2015
2016
2017
2018
2019
2020
2021
2022
2023
2024
2025
2026
2027int vmw_kms_update_proxy(struct vmw_resource *res,
2028 const struct drm_clip_rect *clips,
2029 unsigned num_clips,
2030 int increment)
2031{
2032 struct vmw_private *dev_priv = res->dev_priv;
2033 struct drm_vmw_size *size = &vmw_res_to_srf(res)->base_size;
2034 struct {
2035 SVGA3dCmdHeader header;
2036 SVGA3dCmdUpdateGBImage body;
2037 } *cmd;
2038 SVGA3dBox *box;
2039 size_t copy_size = 0;
2040 int i;
2041
2042 if (!clips)
2043 return 0;
2044
2045 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd) * num_clips);
2046 if (!cmd) {
2047 DRM_ERROR("Couldn't reserve fifo space for proxy surface "
2048 "update.\n");
2049 return -ENOMEM;
2050 }
2051
2052 for (i = 0; i < num_clips; ++i, clips += increment, ++cmd) {
2053 box = &cmd->body.box;
2054
2055 cmd->header.id = SVGA_3D_CMD_UPDATE_GB_IMAGE;
2056 cmd->header.size = sizeof(cmd->body);
2057 cmd->body.image.sid = res->id;
2058 cmd->body.image.face = 0;
2059 cmd->body.image.mipmap = 0;
2060
2061 if (clips->x1 > size->width || clips->x2 > size->width ||
2062 clips->y1 > size->height || clips->y2 > size->height) {
2063 DRM_ERROR("Invalid clips outsize of framebuffer.\n");
2064 return -EINVAL;
2065 }
2066
2067 box->x = clips->x1;
2068 box->y = clips->y1;
2069 box->z = 0;
2070 box->w = clips->x2 - clips->x1;
2071 box->h = clips->y2 - clips->y1;
2072 box->d = 1;
2073
2074 copy_size += sizeof(*cmd);
2075 }
2076
2077 vmw_fifo_commit(dev_priv, copy_size);
2078
2079 return 0;
2080}
2081
2082int vmw_kms_fbdev_init_data(struct vmw_private *dev_priv,
2083 unsigned unit,
2084 u32 max_width,
2085 u32 max_height,
2086 struct drm_connector **p_con,
2087 struct drm_crtc **p_crtc,
2088 struct drm_display_mode **p_mode)
2089{
2090 struct drm_connector *con;
2091 struct vmw_display_unit *du;
2092 struct drm_display_mode *mode;
2093 int i = 0;
2094
2095 list_for_each_entry(con, &dev_priv->dev->mode_config.connector_list,
2096 head) {
2097 if (i == unit)
2098 break;
2099
2100 ++i;
2101 }
2102
2103 if (i != unit) {
2104 DRM_ERROR("Could not find initial display unit.\n");
2105 return -EINVAL;
2106 }
2107
2108 if (list_empty(&con->modes))
2109 (void) vmw_du_connector_fill_modes(con, max_width, max_height);
2110
2111 if (list_empty(&con->modes)) {
2112 DRM_ERROR("Could not find initial display mode.\n");
2113 return -EINVAL;
2114 }
2115
2116 du = vmw_connector_to_du(con);
2117 *p_con = con;
2118 *p_crtc = &du->crtc;
2119
2120 list_for_each_entry(mode, &con->modes, head) {
2121 if (mode->type & DRM_MODE_TYPE_PREFERRED)
2122 break;
2123 }
2124
2125 if (mode->type & DRM_MODE_TYPE_PREFERRED)
2126 *p_mode = mode;
2127 else {
2128 WARN_ONCE(true, "Could not find initial preferred mode.\n");
2129 *p_mode = list_first_entry(&con->modes,
2130 struct drm_display_mode,
2131 head);
2132 }
2133
2134 return 0;
2135}
2136
2137
2138
2139
2140
2141
2142
2143void vmw_kms_del_active(struct vmw_private *dev_priv,
2144 struct vmw_display_unit *du)
2145{
2146 lockdep_assert_held_once(&dev_priv->dev->mode_config.mutex);
2147
2148 if (du->active_implicit) {
2149 if (--(dev_priv->num_implicit) == 0)
2150 dev_priv->implicit_fb = NULL;
2151 du->active_implicit = false;
2152 }
2153}
2154
2155
2156
2157
2158
2159
2160
2161
2162
2163
2164void vmw_kms_add_active(struct vmw_private *dev_priv,
2165 struct vmw_display_unit *du,
2166 struct vmw_framebuffer *vfb)
2167{
2168 lockdep_assert_held_once(&dev_priv->dev->mode_config.mutex);
2169
2170 WARN_ON_ONCE(!dev_priv->num_implicit && dev_priv->implicit_fb);
2171
2172 if (!du->active_implicit && du->is_implicit) {
2173 dev_priv->implicit_fb = vfb;
2174 du->active_implicit = true;
2175 dev_priv->num_implicit++;
2176 }
2177}
2178
2179
2180
2181
2182
2183
2184
2185
2186
2187
2188
2189bool vmw_kms_crtc_flippable(struct vmw_private *dev_priv,
2190 struct drm_crtc *crtc)
2191{
2192 struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
2193
2194 lockdep_assert_held_once(&dev_priv->dev->mode_config.mutex);
2195
2196 if (!du->is_implicit)
2197 return true;
2198
2199 if (dev_priv->num_implicit != 1)
2200 return false;
2201
2202 return true;
2203}
2204
2205
2206
2207
2208
2209
2210
2211void vmw_kms_update_implicit_fb(struct vmw_private *dev_priv,
2212 struct drm_crtc *crtc)
2213{
2214 struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
2215 struct vmw_framebuffer *vfb;
2216
2217 lockdep_assert_held_once(&dev_priv->dev->mode_config.mutex);
2218
2219 if (!du->is_implicit)
2220 return;
2221
2222 vfb = vmw_framebuffer_to_vfb(crtc->primary->fb);
2223 WARN_ON_ONCE(dev_priv->num_implicit != 1 &&
2224 dev_priv->implicit_fb != vfb);
2225
2226 dev_priv->implicit_fb = vfb;
2227}
2228
2229
2230
2231
2232
2233
2234
2235
2236
2237
2238void
2239vmw_kms_create_implicit_placement_property(struct vmw_private *dev_priv,
2240 bool immutable)
2241{
2242 if (dev_priv->implicit_placement_property)
2243 return;
2244
2245 dev_priv->implicit_placement_property =
2246 drm_property_create_range(dev_priv->dev,
2247 immutable ?
2248 DRM_MODE_PROP_IMMUTABLE : 0,
2249 "implicit_placement", 0, 1);
2250
2251}
2252