1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28#include "vmwgfx_kms.h"
29#include <drm/drm_plane_helper.h>
30
31
32#define vmw_crtc_to_sou(x) \
33 container_of(x, struct vmw_screen_object_unit, base.crtc)
34#define vmw_encoder_to_sou(x) \
35 container_of(x, struct vmw_screen_object_unit, base.encoder)
36#define vmw_connector_to_sou(x) \
37 container_of(x, struct vmw_screen_object_unit, base.connector)
38
39
40
41
42
43
44
45
46
47
48
49
50
51struct vmw_kms_sou_surface_dirty {
52 struct vmw_kms_dirty base;
53 s32 left, right, top, bottom;
54 s32 dst_x, dst_y;
55 u32 sid;
56};
57
58
59
60
61
62struct vmw_kms_sou_readback_blit {
63 uint32 header;
64 SVGAFifoCmdBlitScreenToGMRFB body;
65};
66
67struct vmw_kms_sou_dmabuf_blit {
68 uint32 header;
69 SVGAFifoCmdBlitGMRFBToScreen body;
70};
71
72struct vmw_kms_sou_dirty_cmd {
73 SVGA3dCmdHeader header;
74 SVGA3dCmdBlitSurfaceToScreen body;
75};
76
77
78
79
80struct vmw_screen_object_unit {
81 struct vmw_display_unit base;
82
83 unsigned long buffer_size;
84 struct vmw_dma_buffer *buffer;
85
86 bool defined;
87};
88
89static void vmw_sou_destroy(struct vmw_screen_object_unit *sou)
90{
91 vmw_du_cleanup(&sou->base);
92 kfree(sou);
93}
94
95
96
97
98
99
100static void vmw_sou_crtc_destroy(struct drm_crtc *crtc)
101{
102 vmw_sou_destroy(vmw_crtc_to_sou(crtc));
103}
104
105
106
107
108static int vmw_sou_fifo_create(struct vmw_private *dev_priv,
109 struct vmw_screen_object_unit *sou,
110 uint32_t x, uint32_t y,
111 struct drm_display_mode *mode)
112{
113 size_t fifo_size;
114
115 struct {
116 struct {
117 uint32_t cmdType;
118 } header;
119 SVGAScreenObject obj;
120 } *cmd;
121
122 BUG_ON(!sou->buffer);
123
124 fifo_size = sizeof(*cmd);
125 cmd = vmw_fifo_reserve(dev_priv, fifo_size);
126
127 if (unlikely(cmd == NULL)) {
128 DRM_ERROR("Fifo reserve failed.\n");
129 return -ENOMEM;
130 }
131
132 memset(cmd, 0, fifo_size);
133 cmd->header.cmdType = SVGA_CMD_DEFINE_SCREEN;
134 cmd->obj.structSize = sizeof(SVGAScreenObject);
135 cmd->obj.id = sou->base.unit;
136 cmd->obj.flags = SVGA_SCREEN_HAS_ROOT |
137 (sou->base.unit == 0 ? SVGA_SCREEN_IS_PRIMARY : 0);
138 cmd->obj.size.width = mode->hdisplay;
139 cmd->obj.size.height = mode->vdisplay;
140 if (sou->base.is_implicit) {
141 cmd->obj.root.x = x;
142 cmd->obj.root.y = y;
143 } else {
144 cmd->obj.root.x = sou->base.gui_x;
145 cmd->obj.root.y = sou->base.gui_y;
146 }
147 sou->base.set_gui_x = cmd->obj.root.x;
148 sou->base.set_gui_y = cmd->obj.root.y;
149
150
151 vmw_bo_get_guest_ptr(&sou->buffer->base, &cmd->obj.backingStore.ptr);
152 cmd->obj.backingStore.pitch = mode->hdisplay * 4;
153
154 vmw_fifo_commit(dev_priv, fifo_size);
155
156 sou->defined = true;
157
158 return 0;
159}
160
161
162
163
164static int vmw_sou_fifo_destroy(struct vmw_private *dev_priv,
165 struct vmw_screen_object_unit *sou)
166{
167 size_t fifo_size;
168 int ret;
169
170 struct {
171 struct {
172 uint32_t cmdType;
173 } header;
174 SVGAFifoCmdDestroyScreen body;
175 } *cmd;
176
177
178 if (unlikely(!sou->defined))
179 return 0;
180
181 fifo_size = sizeof(*cmd);
182 cmd = vmw_fifo_reserve(dev_priv, fifo_size);
183
184 if (unlikely(cmd == NULL)) {
185 DRM_ERROR("Fifo reserve failed.\n");
186 return -ENOMEM;
187 }
188
189 memset(cmd, 0, fifo_size);
190 cmd->header.cmdType = SVGA_CMD_DESTROY_SCREEN;
191 cmd->body.screenId = sou->base.unit;
192
193 vmw_fifo_commit(dev_priv, fifo_size);
194
195
196 ret = vmw_fallback_wait(dev_priv, false, true, 0, false, 3*HZ);
197 if (unlikely(ret != 0))
198 DRM_ERROR("Failed to sync with HW");
199 else
200 sou->defined = false;
201
202 return ret;
203}
204
205
206
207
208static void vmw_sou_backing_free(struct vmw_private *dev_priv,
209 struct vmw_screen_object_unit *sou)
210{
211 vmw_dmabuf_unreference(&sou->buffer);
212 sou->buffer_size = 0;
213}
214
215
216
217
218static int vmw_sou_backing_alloc(struct vmw_private *dev_priv,
219 struct vmw_screen_object_unit *sou,
220 unsigned long size)
221{
222 int ret;
223
224 if (sou->buffer_size == size)
225 return 0;
226
227 if (sou->buffer)
228 vmw_sou_backing_free(dev_priv, sou);
229
230 sou->buffer = kzalloc(sizeof(*sou->buffer), GFP_KERNEL);
231 if (unlikely(sou->buffer == NULL))
232 return -ENOMEM;
233
234
235
236
237 vmw_overlay_pause_all(dev_priv);
238 ret = vmw_dmabuf_init(dev_priv, sou->buffer, size,
239 &vmw_vram_ne_placement,
240 false, &vmw_dmabuf_bo_free);
241 vmw_overlay_resume_all(dev_priv);
242
243 if (unlikely(ret != 0))
244 sou->buffer = NULL;
245 else
246 sou->buffer_size = size;
247
248 return ret;
249}
250
251static int vmw_sou_crtc_set_config(struct drm_mode_set *set)
252{
253 struct vmw_private *dev_priv;
254 struct vmw_screen_object_unit *sou;
255 struct drm_connector *connector;
256 struct drm_display_mode *mode;
257 struct drm_encoder *encoder;
258 struct vmw_framebuffer *vfb;
259 struct drm_framebuffer *fb;
260 struct drm_crtc *crtc;
261 int ret = 0;
262
263 if (!set)
264 return -EINVAL;
265
266 if (!set->crtc)
267 return -EINVAL;
268
269
270 crtc = set->crtc;
271 sou = vmw_crtc_to_sou(crtc);
272 vfb = set->fb ? vmw_framebuffer_to_vfb(set->fb) : NULL;
273 dev_priv = vmw_priv(crtc->dev);
274
275 if (set->num_connectors > 1) {
276 DRM_ERROR("Too many connectors\n");
277 return -EINVAL;
278 }
279
280 if (set->num_connectors == 1 &&
281 set->connectors[0] != &sou->base.connector) {
282 DRM_ERROR("Connector doesn't match %p %p\n",
283 set->connectors[0], &sou->base.connector);
284 return -EINVAL;
285 }
286
287
288 if (sou->base.is_implicit &&
289 dev_priv->implicit_fb && vfb &&
290 !(dev_priv->num_implicit == 1 &&
291 sou->base.active_implicit) &&
292 dev_priv->implicit_fb != vfb) {
293 DRM_ERROR("Multiple implicit framebuffers not supported.\n");
294 return -EINVAL;
295 }
296
297
298 connector = &sou->base.connector;
299 encoder = &sou->base.encoder;
300
301
302 if (set->num_connectors == 0 || !set->mode || !set->fb) {
303 ret = vmw_sou_fifo_destroy(dev_priv, sou);
304
305 if (unlikely(ret != 0))
306 return ret;
307
308 connector->encoder = NULL;
309 encoder->crtc = NULL;
310 crtc->primary->fb = NULL;
311 crtc->x = 0;
312 crtc->y = 0;
313 crtc->enabled = false;
314
315 vmw_kms_del_active(dev_priv, &sou->base);
316
317 vmw_sou_backing_free(dev_priv, sou);
318
319 return 0;
320 }
321
322
323
324 mode = set->mode;
325 fb = set->fb;
326
327 if (set->x + mode->hdisplay > fb->width ||
328 set->y + mode->vdisplay > fb->height) {
329 DRM_ERROR("set outside of framebuffer\n");
330 return -EINVAL;
331 }
332
333 vmw_svga_enable(dev_priv);
334
335 if (mode->hdisplay != crtc->mode.hdisplay ||
336 mode->vdisplay != crtc->mode.vdisplay) {
337
338
339
340
341 ret = vmw_sou_fifo_destroy(dev_priv, sou);
342
343 if (unlikely(ret != 0))
344 return ret;
345
346 vmw_sou_backing_free(dev_priv, sou);
347 }
348
349 if (!sou->buffer) {
350
351 size_t size = mode->hdisplay * mode->vdisplay * 4;
352 ret = vmw_sou_backing_alloc(dev_priv, sou, size);
353 if (unlikely(ret != 0))
354 return ret;
355 }
356
357 ret = vmw_sou_fifo_create(dev_priv, sou, set->x, set->y, mode);
358 if (unlikely(ret != 0)) {
359
360
361
362
363
364
365
366 if (sou->defined)
367 return ret;
368
369 connector->encoder = NULL;
370 encoder->crtc = NULL;
371 crtc->primary->fb = NULL;
372 crtc->x = 0;
373 crtc->y = 0;
374 crtc->enabled = false;
375
376 return ret;
377 }
378
379 vmw_kms_add_active(dev_priv, &sou->base, vfb);
380
381 connector->encoder = encoder;
382 encoder->crtc = crtc;
383 crtc->mode = *mode;
384 crtc->primary->fb = fb;
385 crtc->x = set->x;
386 crtc->y = set->y;
387 crtc->enabled = true;
388
389 return 0;
390}
391
392static int vmw_sou_crtc_page_flip(struct drm_crtc *crtc,
393 struct drm_framebuffer *fb,
394 struct drm_pending_vblank_event *event,
395 uint32_t flags)
396{
397 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
398 struct drm_framebuffer *old_fb = crtc->primary->fb;
399 struct vmw_framebuffer *vfb = vmw_framebuffer_to_vfb(fb);
400 struct vmw_fence_obj *fence = NULL;
401 struct drm_vmw_rect vclips;
402 int ret;
403
404 if (!vmw_kms_crtc_flippable(dev_priv, crtc))
405 return -EINVAL;
406
407 crtc->primary->fb = fb;
408
409
410 vclips.x = crtc->x;
411 vclips.y = crtc->y;
412 vclips.w = crtc->mode.hdisplay;
413 vclips.h = crtc->mode.vdisplay;
414
415 if (vfb->dmabuf)
416 ret = vmw_kms_sou_do_dmabuf_dirty(dev_priv, vfb,
417 NULL, &vclips, 1, 1,
418 true, &fence);
419 else
420 ret = vmw_kms_sou_do_surface_dirty(dev_priv, vfb,
421 NULL, &vclips, NULL,
422 0, 0, 1, 1, &fence);
423
424
425 if (ret != 0)
426 goto out_no_fence;
427 if (!fence) {
428 ret = -EINVAL;
429 goto out_no_fence;
430 }
431
432 if (event) {
433 struct drm_file *file_priv = event->base.file_priv;
434
435 ret = vmw_event_fence_action_queue(file_priv, fence,
436 &event->base,
437 &event->event.tv_sec,
438 &event->event.tv_usec,
439 true);
440 }
441
442
443
444
445
446 vmw_fence_obj_unreference(&fence);
447
448 if (vmw_crtc_to_du(crtc)->is_implicit)
449 vmw_kms_update_implicit_fb(dev_priv, crtc);
450
451 return ret;
452
453out_no_fence:
454 crtc->primary->fb = old_fb;
455 return ret;
456}
457
458static const struct drm_crtc_funcs vmw_screen_object_crtc_funcs = {
459 .cursor_set2 = vmw_du_crtc_cursor_set2,
460 .cursor_move = vmw_du_crtc_cursor_move,
461 .gamma_set = vmw_du_crtc_gamma_set,
462 .destroy = vmw_sou_crtc_destroy,
463 .set_config = vmw_sou_crtc_set_config,
464 .page_flip = vmw_sou_crtc_page_flip,
465};
466
467
468
469
470
471static void vmw_sou_encoder_destroy(struct drm_encoder *encoder)
472{
473 vmw_sou_destroy(vmw_encoder_to_sou(encoder));
474}
475
476static const struct drm_encoder_funcs vmw_screen_object_encoder_funcs = {
477 .destroy = vmw_sou_encoder_destroy,
478};
479
480
481
482
483
484static void vmw_sou_connector_destroy(struct drm_connector *connector)
485{
486 vmw_sou_destroy(vmw_connector_to_sou(connector));
487}
488
489static const struct drm_connector_funcs vmw_sou_connector_funcs = {
490 .dpms = vmw_du_connector_dpms,
491 .detect = vmw_du_connector_detect,
492 .fill_modes = vmw_du_connector_fill_modes,
493 .set_property = vmw_du_connector_set_property,
494 .destroy = vmw_sou_connector_destroy,
495};
496
497static int vmw_sou_init(struct vmw_private *dev_priv, unsigned unit)
498{
499 struct vmw_screen_object_unit *sou;
500 struct drm_device *dev = dev_priv->dev;
501 struct drm_connector *connector;
502 struct drm_encoder *encoder;
503 struct drm_crtc *crtc;
504
505 sou = kzalloc(sizeof(*sou), GFP_KERNEL);
506 if (!sou)
507 return -ENOMEM;
508
509 sou->base.unit = unit;
510 crtc = &sou->base.crtc;
511 encoder = &sou->base.encoder;
512 connector = &sou->base.connector;
513
514 sou->base.active_implicit = false;
515 sou->base.pref_active = (unit == 0);
516 sou->base.pref_width = dev_priv->initial_width;
517 sou->base.pref_height = dev_priv->initial_height;
518 sou->base.pref_mode = NULL;
519 sou->base.is_implicit = false;
520
521 drm_connector_init(dev, connector, &vmw_sou_connector_funcs,
522 DRM_MODE_CONNECTOR_VIRTUAL);
523 connector->status = vmw_du_connector_detect(connector, true);
524
525 drm_encoder_init(dev, encoder, &vmw_screen_object_encoder_funcs,
526 DRM_MODE_ENCODER_VIRTUAL, NULL);
527 drm_mode_connector_attach_encoder(connector, encoder);
528 encoder->possible_crtcs = (1 << unit);
529 encoder->possible_clones = 0;
530
531 (void) drm_connector_register(connector);
532
533 drm_crtc_init(dev, crtc, &vmw_screen_object_crtc_funcs);
534
535 drm_mode_crtc_set_gamma_size(crtc, 256);
536
537 drm_object_attach_property(&connector->base,
538 dev->mode_config.dirty_info_property,
539 1);
540 drm_object_attach_property(&connector->base,
541 dev_priv->hotplug_mode_update_property, 1);
542 drm_object_attach_property(&connector->base,
543 dev->mode_config.suggested_x_property, 0);
544 drm_object_attach_property(&connector->base,
545 dev->mode_config.suggested_y_property, 0);
546 if (dev_priv->implicit_placement_property)
547 drm_object_attach_property
548 (&connector->base,
549 dev_priv->implicit_placement_property,
550 sou->base.is_implicit);
551
552 return 0;
553}
554
555int vmw_kms_sou_init_display(struct vmw_private *dev_priv)
556{
557 struct drm_device *dev = dev_priv->dev;
558 int i, ret;
559
560 if (!(dev_priv->capabilities & SVGA_CAP_SCREEN_OBJECT_2)) {
561 DRM_INFO("Not using screen objects,"
562 " missing cap SCREEN_OBJECT_2\n");
563 return -ENOSYS;
564 }
565
566 ret = -ENOMEM;
567 dev_priv->num_implicit = 0;
568 dev_priv->implicit_fb = NULL;
569
570 ret = drm_vblank_init(dev, VMWGFX_NUM_DISPLAY_UNITS);
571 if (unlikely(ret != 0))
572 return ret;
573
574 ret = drm_mode_create_dirty_info_property(dev);
575 if (unlikely(ret != 0))
576 goto err_vblank_cleanup;
577
578 vmw_kms_create_implicit_placement_property(dev_priv, false);
579
580 for (i = 0; i < VMWGFX_NUM_DISPLAY_UNITS; ++i)
581 vmw_sou_init(dev_priv, i);
582
583 dev_priv->active_display_unit = vmw_du_screen_object;
584
585 DRM_INFO("Screen Objects Display Unit initialized\n");
586
587 return 0;
588
589err_vblank_cleanup:
590 drm_vblank_cleanup(dev);
591 return ret;
592}
593
594int vmw_kms_sou_close_display(struct vmw_private *dev_priv)
595{
596 struct drm_device *dev = dev_priv->dev;
597
598 drm_vblank_cleanup(dev);
599
600 return 0;
601}
602
603static int do_dmabuf_define_gmrfb(struct vmw_private *dev_priv,
604 struct vmw_framebuffer *framebuffer)
605{
606 struct vmw_dma_buffer *buf =
607 container_of(framebuffer, struct vmw_framebuffer_dmabuf,
608 base)->buffer;
609 int depth = framebuffer->base.depth;
610 struct {
611 uint32_t header;
612 SVGAFifoCmdDefineGMRFB body;
613 } *cmd;
614
615
616
617
618
619 if (depth == 32)
620 depth = 24;
621
622 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
623 if (!cmd) {
624 DRM_ERROR("Out of fifo space for dirty framebuffer command.\n");
625 return -ENOMEM;
626 }
627
628 cmd->header = SVGA_CMD_DEFINE_GMRFB;
629 cmd->body.format.bitsPerPixel = framebuffer->base.bits_per_pixel;
630 cmd->body.format.colorDepth = depth;
631 cmd->body.format.reserved = 0;
632 cmd->body.bytesPerLine = framebuffer->base.pitches[0];
633
634 vmw_bo_get_guest_ptr(&buf->base, &cmd->body.ptr);
635 vmw_fifo_commit(dev_priv, sizeof(*cmd));
636
637 return 0;
638}
639
640
641
642
643
644
645
646
647
648
649static void vmw_sou_surface_fifo_commit(struct vmw_kms_dirty *dirty)
650{
651 struct vmw_kms_sou_surface_dirty *sdirty =
652 container_of(dirty, typeof(*sdirty), base);
653 struct vmw_kms_sou_dirty_cmd *cmd = dirty->cmd;
654 s32 trans_x = dirty->unit->crtc.x - sdirty->dst_x;
655 s32 trans_y = dirty->unit->crtc.y - sdirty->dst_y;
656 size_t region_size = dirty->num_hits * sizeof(SVGASignedRect);
657 SVGASignedRect *blit = (SVGASignedRect *) &cmd[1];
658 int i;
659
660 if (!dirty->num_hits) {
661 vmw_fifo_commit(dirty->dev_priv, 0);
662 return;
663 }
664
665 cmd->header.id = SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN;
666 cmd->header.size = sizeof(cmd->body) + region_size;
667
668
669
670
671
672 cmd->body.destRect.left = sdirty->left;
673 cmd->body.destRect.right = sdirty->right;
674 cmd->body.destRect.top = sdirty->top;
675 cmd->body.destRect.bottom = sdirty->bottom;
676
677 cmd->body.srcRect.left = sdirty->left + trans_x;
678 cmd->body.srcRect.right = sdirty->right + trans_x;
679 cmd->body.srcRect.top = sdirty->top + trans_y;
680 cmd->body.srcRect.bottom = sdirty->bottom + trans_y;
681
682 cmd->body.srcImage.sid = sdirty->sid;
683 cmd->body.destScreenId = dirty->unit->unit;
684
685
686 for (i = 0; i < dirty->num_hits; ++i, ++blit) {
687 blit->left -= sdirty->left;
688 blit->right -= sdirty->left;
689 blit->top -= sdirty->top;
690 blit->bottom -= sdirty->top;
691 }
692
693 vmw_fifo_commit(dirty->dev_priv, region_size + sizeof(*cmd));
694
695 sdirty->left = sdirty->top = S32_MAX;
696 sdirty->right = sdirty->bottom = S32_MIN;
697}
698
699
700
701
702
703
704
705
706
707static void vmw_sou_surface_clip(struct vmw_kms_dirty *dirty)
708{
709 struct vmw_kms_sou_surface_dirty *sdirty =
710 container_of(dirty, typeof(*sdirty), base);
711 struct vmw_kms_sou_dirty_cmd *cmd = dirty->cmd;
712 SVGASignedRect *blit = (SVGASignedRect *) &cmd[1];
713
714
715 blit += dirty->num_hits;
716 blit->left = dirty->unit_x1;
717 blit->top = dirty->unit_y1;
718 blit->right = dirty->unit_x2;
719 blit->bottom = dirty->unit_y2;
720
721
722 sdirty->left = min_t(s32, sdirty->left, dirty->unit_x1);
723 sdirty->top = min_t(s32, sdirty->top, dirty->unit_y1);
724 sdirty->right = max_t(s32, sdirty->right, dirty->unit_x2);
725 sdirty->bottom = max_t(s32, sdirty->bottom, dirty->unit_y2);
726
727 dirty->num_hits++;
728}
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751int vmw_kms_sou_do_surface_dirty(struct vmw_private *dev_priv,
752 struct vmw_framebuffer *framebuffer,
753 struct drm_clip_rect *clips,
754 struct drm_vmw_rect *vclips,
755 struct vmw_resource *srf,
756 s32 dest_x,
757 s32 dest_y,
758 unsigned num_clips, int inc,
759 struct vmw_fence_obj **out_fence)
760{
761 struct vmw_framebuffer_surface *vfbs =
762 container_of(framebuffer, typeof(*vfbs), base);
763 struct vmw_kms_sou_surface_dirty sdirty;
764 int ret;
765
766 if (!srf)
767 srf = &vfbs->surface->res;
768
769 ret = vmw_kms_helper_resource_prepare(srf, true);
770 if (ret)
771 return ret;
772
773 sdirty.base.fifo_commit = vmw_sou_surface_fifo_commit;
774 sdirty.base.clip = vmw_sou_surface_clip;
775 sdirty.base.dev_priv = dev_priv;
776 sdirty.base.fifo_reserve_size = sizeof(struct vmw_kms_sou_dirty_cmd) +
777 sizeof(SVGASignedRect) * num_clips;
778
779 sdirty.sid = srf->id;
780 sdirty.left = sdirty.top = S32_MAX;
781 sdirty.right = sdirty.bottom = S32_MIN;
782 sdirty.dst_x = dest_x;
783 sdirty.dst_y = dest_y;
784
785 ret = vmw_kms_helper_dirty(dev_priv, framebuffer, clips, vclips,
786 dest_x, dest_y, num_clips, inc,
787 &sdirty.base);
788 vmw_kms_helper_resource_finish(srf, out_fence);
789
790 return ret;
791}
792
793
794
795
796
797
798
799
800static void vmw_sou_dmabuf_fifo_commit(struct vmw_kms_dirty *dirty)
801{
802 if (!dirty->num_hits) {
803 vmw_fifo_commit(dirty->dev_priv, 0);
804 return;
805 }
806
807 vmw_fifo_commit(dirty->dev_priv,
808 sizeof(struct vmw_kms_sou_dmabuf_blit) *
809 dirty->num_hits);
810}
811
812
813
814
815
816
817
818
819static void vmw_sou_dmabuf_clip(struct vmw_kms_dirty *dirty)
820{
821 struct vmw_kms_sou_dmabuf_blit *blit = dirty->cmd;
822
823 blit += dirty->num_hits;
824 blit->header = SVGA_CMD_BLIT_GMRFB_TO_SCREEN;
825 blit->body.destScreenId = dirty->unit->unit;
826 blit->body.srcOrigin.x = dirty->fb_x;
827 blit->body.srcOrigin.y = dirty->fb_y;
828 blit->body.destRect.left = dirty->unit_x1;
829 blit->body.destRect.top = dirty->unit_y1;
830 blit->body.destRect.right = dirty->unit_x2;
831 blit->body.destRect.bottom = dirty->unit_y2;
832 dirty->num_hits++;
833}
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853int vmw_kms_sou_do_dmabuf_dirty(struct vmw_private *dev_priv,
854 struct vmw_framebuffer *framebuffer,
855 struct drm_clip_rect *clips,
856 struct drm_vmw_rect *vclips,
857 unsigned num_clips, int increment,
858 bool interruptible,
859 struct vmw_fence_obj **out_fence)
860{
861 struct vmw_dma_buffer *buf =
862 container_of(framebuffer, struct vmw_framebuffer_dmabuf,
863 base)->buffer;
864 struct vmw_kms_dirty dirty;
865 int ret;
866
867 ret = vmw_kms_helper_buffer_prepare(dev_priv, buf, interruptible,
868 false);
869 if (ret)
870 return ret;
871
872 ret = do_dmabuf_define_gmrfb(dev_priv, framebuffer);
873 if (unlikely(ret != 0))
874 goto out_revert;
875
876 dirty.fifo_commit = vmw_sou_dmabuf_fifo_commit;
877 dirty.clip = vmw_sou_dmabuf_clip;
878 dirty.fifo_reserve_size = sizeof(struct vmw_kms_sou_dmabuf_blit) *
879 num_clips;
880 ret = vmw_kms_helper_dirty(dev_priv, framebuffer, clips, vclips,
881 0, 0, num_clips, increment, &dirty);
882 vmw_kms_helper_buffer_finish(dev_priv, NULL, buf, out_fence, NULL);
883
884 return ret;
885
886out_revert:
887 vmw_kms_helper_buffer_revert(buf);
888
889 return ret;
890}
891
892
893
894
895
896
897
898
899
900static void vmw_sou_readback_fifo_commit(struct vmw_kms_dirty *dirty)
901{
902 if (!dirty->num_hits) {
903 vmw_fifo_commit(dirty->dev_priv, 0);
904 return;
905 }
906
907 vmw_fifo_commit(dirty->dev_priv,
908 sizeof(struct vmw_kms_sou_readback_blit) *
909 dirty->num_hits);
910}
911
912
913
914
915
916
917
918
919static void vmw_sou_readback_clip(struct vmw_kms_dirty *dirty)
920{
921 struct vmw_kms_sou_readback_blit *blit = dirty->cmd;
922
923 blit += dirty->num_hits;
924 blit->header = SVGA_CMD_BLIT_SCREEN_TO_GMRFB;
925 blit->body.srcScreenId = dirty->unit->unit;
926 blit->body.destOrigin.x = dirty->fb_x;
927 blit->body.destOrigin.y = dirty->fb_y;
928 blit->body.srcRect.left = dirty->unit_x1;
929 blit->body.srcRect.top = dirty->unit_y1;
930 blit->body.srcRect.right = dirty->unit_x2;
931 blit->body.srcRect.bottom = dirty->unit_y2;
932 dirty->num_hits++;
933}
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951int vmw_kms_sou_readback(struct vmw_private *dev_priv,
952 struct drm_file *file_priv,
953 struct vmw_framebuffer *vfb,
954 struct drm_vmw_fence_rep __user *user_fence_rep,
955 struct drm_vmw_rect *vclips,
956 uint32_t num_clips)
957{
958 struct vmw_dma_buffer *buf =
959 container_of(vfb, struct vmw_framebuffer_dmabuf, base)->buffer;
960 struct vmw_kms_dirty dirty;
961 int ret;
962
963 ret = vmw_kms_helper_buffer_prepare(dev_priv, buf, true, false);
964 if (ret)
965 return ret;
966
967 ret = do_dmabuf_define_gmrfb(dev_priv, vfb);
968 if (unlikely(ret != 0))
969 goto out_revert;
970
971 dirty.fifo_commit = vmw_sou_readback_fifo_commit;
972 dirty.clip = vmw_sou_readback_clip;
973 dirty.fifo_reserve_size = sizeof(struct vmw_kms_sou_readback_blit) *
974 num_clips;
975 ret = vmw_kms_helper_dirty(dev_priv, vfb, NULL, vclips,
976 0, 0, num_clips, 1, &dirty);
977 vmw_kms_helper_buffer_finish(dev_priv, file_priv, buf, NULL,
978 user_fence_rep);
979
980 return ret;
981
982out_revert:
983 vmw_kms_helper_buffer_revert(buf);
984
985 return ret;
986}
987