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10#include <linux/interrupt.h>
11#include <linux/device.h>
12#include <linux/kernel.h>
13#include <linux/slab.h>
14#include <linux/sysfs.h>
15#include <linux/spi/spi.h>
16#include <linux/regulator/consumer.h>
17#include <linux/err.h>
18#include <linux/sched.h>
19#include <linux/delay.h>
20#include <linux/module.h>
21
22#include <linux/iio/iio.h>
23#include <linux/iio/sysfs.h>
24#include <linux/iio/buffer.h>
25#include <linux/iio/trigger.h>
26#include <linux/iio/trigger_consumer.h>
27#include <linux/iio/triggered_buffer.h>
28#include <linux/iio/adc/ad_sigma_delta.h>
29
30#include <linux/platform_data/ad7791.h>
31
32#define AD7791_REG_COMM 0x0
33#define AD7791_REG_STATUS 0x0
34#define AD7791_REG_MODE 0x1
35#define AD7791_REG_FILTER 0x2
36#define AD7791_REG_DATA 0x3
37
38#define AD7791_MODE_CONTINUOUS 0x00
39#define AD7791_MODE_SINGLE 0x02
40#define AD7791_MODE_POWERDOWN 0x03
41
42#define AD7791_CH_AIN1P_AIN1N 0x00
43#define AD7791_CH_AIN2 0x01
44#define AD7791_CH_AIN1N_AIN1N 0x02
45#define AD7791_CH_AVDD_MONITOR 0x03
46
47#define AD7791_FILTER_CLK_DIV_1 (0x0 << 4)
48#define AD7791_FILTER_CLK_DIV_2 (0x1 << 4)
49#define AD7791_FILTER_CLK_DIV_4 (0x2 << 4)
50#define AD7791_FILTER_CLK_DIV_8 (0x3 << 4)
51#define AD7791_FILTER_CLK_MASK (0x3 << 4)
52#define AD7791_FILTER_RATE_120 0x0
53#define AD7791_FILTER_RATE_100 0x1
54#define AD7791_FILTER_RATE_33_3 0x2
55#define AD7791_FILTER_RATE_20 0x3
56#define AD7791_FILTER_RATE_16_6 0x4
57#define AD7791_FILTER_RATE_16_7 0x5
58#define AD7791_FILTER_RATE_13_3 0x6
59#define AD7791_FILTER_RATE_9_5 0x7
60#define AD7791_FILTER_RATE_MASK 0x7
61
62#define AD7791_MODE_BUFFER BIT(1)
63#define AD7791_MODE_UNIPOLAR BIT(2)
64#define AD7791_MODE_BURNOUT BIT(3)
65#define AD7791_MODE_SEL_MASK (0x3 << 6)
66#define AD7791_MODE_SEL(x) ((x) << 6)
67
68#define DECLARE_AD7787_CHANNELS(name, bits, storagebits) \
69const struct iio_chan_spec name[] = { \
70 AD_SD_DIFF_CHANNEL(0, 0, 0, AD7791_CH_AIN1P_AIN1N, \
71 (bits), (storagebits), 0), \
72 AD_SD_CHANNEL(1, 1, AD7791_CH_AIN2, (bits), (storagebits), 0), \
73 AD_SD_SHORTED_CHANNEL(2, 0, AD7791_CH_AIN1N_AIN1N, \
74 (bits), (storagebits), 0), \
75 AD_SD_SUPPLY_CHANNEL(3, 2, AD7791_CH_AVDD_MONITOR, \
76 (bits), (storagebits), 0), \
77 IIO_CHAN_SOFT_TIMESTAMP(4), \
78}
79
80#define DECLARE_AD7791_CHANNELS(name, bits, storagebits) \
81const struct iio_chan_spec name[] = { \
82 AD_SD_DIFF_CHANNEL(0, 0, 0, AD7791_CH_AIN1P_AIN1N, \
83 (bits), (storagebits), 0), \
84 AD_SD_SHORTED_CHANNEL(1, 0, AD7791_CH_AIN1N_AIN1N, \
85 (bits), (storagebits), 0), \
86 AD_SD_SUPPLY_CHANNEL(2, 1, AD7791_CH_AVDD_MONITOR, \
87 (bits), (storagebits), 0), \
88 IIO_CHAN_SOFT_TIMESTAMP(3), \
89}
90
91static DECLARE_AD7787_CHANNELS(ad7787_channels, 24, 32);
92static DECLARE_AD7791_CHANNELS(ad7790_channels, 16, 16);
93static DECLARE_AD7791_CHANNELS(ad7791_channels, 24, 32);
94
95enum {
96 AD7787,
97 AD7788,
98 AD7789,
99 AD7790,
100 AD7791,
101};
102
103enum ad7791_chip_info_flags {
104 AD7791_FLAG_HAS_FILTER = (1 << 0),
105 AD7791_FLAG_HAS_BUFFER = (1 << 1),
106 AD7791_FLAG_HAS_UNIPOLAR = (1 << 2),
107 AD7791_FLAG_HAS_BURNOUT = (1 << 3),
108};
109
110struct ad7791_chip_info {
111 const struct iio_chan_spec *channels;
112 unsigned int num_channels;
113 enum ad7791_chip_info_flags flags;
114};
115
116static const struct ad7791_chip_info ad7791_chip_infos[] = {
117 [AD7787] = {
118 .channels = ad7787_channels,
119 .num_channels = ARRAY_SIZE(ad7787_channels),
120 .flags = AD7791_FLAG_HAS_FILTER | AD7791_FLAG_HAS_BUFFER |
121 AD7791_FLAG_HAS_UNIPOLAR | AD7791_FLAG_HAS_BURNOUT,
122 },
123 [AD7788] = {
124 .channels = ad7790_channels,
125 .num_channels = ARRAY_SIZE(ad7790_channels),
126 .flags = AD7791_FLAG_HAS_UNIPOLAR,
127 },
128 [AD7789] = {
129 .channels = ad7791_channels,
130 .num_channels = ARRAY_SIZE(ad7791_channels),
131 .flags = AD7791_FLAG_HAS_UNIPOLAR,
132 },
133 [AD7790] = {
134 .channels = ad7790_channels,
135 .num_channels = ARRAY_SIZE(ad7790_channels),
136 .flags = AD7791_FLAG_HAS_FILTER | AD7791_FLAG_HAS_BUFFER |
137 AD7791_FLAG_HAS_BURNOUT,
138 },
139 [AD7791] = {
140 .channels = ad7791_channels,
141 .num_channels = ARRAY_SIZE(ad7791_channels),
142 .flags = AD7791_FLAG_HAS_FILTER | AD7791_FLAG_HAS_BUFFER |
143 AD7791_FLAG_HAS_UNIPOLAR | AD7791_FLAG_HAS_BURNOUT,
144 },
145};
146
147struct ad7791_state {
148 struct ad_sigma_delta sd;
149 uint8_t mode;
150 uint8_t filter;
151
152 struct regulator *reg;
153 const struct ad7791_chip_info *info;
154};
155
156static struct ad7791_state *ad_sigma_delta_to_ad7791(struct ad_sigma_delta *sd)
157{
158 return container_of(sd, struct ad7791_state, sd);
159}
160
161static int ad7791_set_channel(struct ad_sigma_delta *sd, unsigned int channel)
162{
163 ad_sd_set_comm(sd, channel);
164
165 return 0;
166}
167
168static int ad7791_set_mode(struct ad_sigma_delta *sd,
169 enum ad_sigma_delta_mode mode)
170{
171 struct ad7791_state *st = ad_sigma_delta_to_ad7791(sd);
172
173 switch (mode) {
174 case AD_SD_MODE_CONTINUOUS:
175 mode = AD7791_MODE_CONTINUOUS;
176 break;
177 case AD_SD_MODE_SINGLE:
178 mode = AD7791_MODE_SINGLE;
179 break;
180 case AD_SD_MODE_IDLE:
181 case AD_SD_MODE_POWERDOWN:
182 mode = AD7791_MODE_POWERDOWN;
183 break;
184 }
185
186 st->mode &= ~AD7791_MODE_SEL_MASK;
187 st->mode |= AD7791_MODE_SEL(mode);
188
189 return ad_sd_write_reg(sd, AD7791_REG_MODE, sizeof(st->mode), st->mode);
190}
191
192static const struct ad_sigma_delta_info ad7791_sigma_delta_info = {
193 .set_channel = ad7791_set_channel,
194 .set_mode = ad7791_set_mode,
195 .has_registers = true,
196 .addr_shift = 4,
197 .read_mask = BIT(3),
198};
199
200static int ad7791_read_raw(struct iio_dev *indio_dev,
201 const struct iio_chan_spec *chan, int *val, int *val2, long info)
202{
203 struct ad7791_state *st = iio_priv(indio_dev);
204 bool unipolar = !!(st->mode & AD7791_MODE_UNIPOLAR);
205
206 switch (info) {
207 case IIO_CHAN_INFO_RAW:
208 return ad_sigma_delta_single_conversion(indio_dev, chan, val);
209 case IIO_CHAN_INFO_OFFSET:
210
211
212
213
214 if (unipolar)
215 *val = 0;
216 else
217 *val = -(1 << (chan->scan_type.realbits - 1));
218 return IIO_VAL_INT;
219 case IIO_CHAN_INFO_SCALE:
220
221 if (chan->address == AD7791_CH_AVDD_MONITOR) {
222
223
224
225
226 *val = 1170 * 5;
227 } else {
228 int voltage_uv;
229
230 voltage_uv = regulator_get_voltage(st->reg);
231 if (voltage_uv < 0)
232 return voltage_uv;
233
234 *val = voltage_uv / 1000;
235 }
236 if (unipolar)
237 *val2 = chan->scan_type.realbits;
238 else
239 *val2 = chan->scan_type.realbits - 1;
240
241 return IIO_VAL_FRACTIONAL_LOG2;
242 }
243
244 return -EINVAL;
245}
246
247static const char * const ad7791_sample_freq_avail[] = {
248 [AD7791_FILTER_RATE_120] = "120",
249 [AD7791_FILTER_RATE_100] = "100",
250 [AD7791_FILTER_RATE_33_3] = "33.3",
251 [AD7791_FILTER_RATE_20] = "20",
252 [AD7791_FILTER_RATE_16_6] = "16.6",
253 [AD7791_FILTER_RATE_16_7] = "16.7",
254 [AD7791_FILTER_RATE_13_3] = "13.3",
255 [AD7791_FILTER_RATE_9_5] = "9.5",
256};
257
258static ssize_t ad7791_read_frequency(struct device *dev,
259 struct device_attribute *attr, char *buf)
260{
261 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
262 struct ad7791_state *st = iio_priv(indio_dev);
263 unsigned int rate = st->filter & AD7791_FILTER_RATE_MASK;
264
265 return sprintf(buf, "%s\n", ad7791_sample_freq_avail[rate]);
266}
267
268static ssize_t ad7791_write_frequency(struct device *dev,
269 struct device_attribute *attr, const char *buf, size_t len)
270{
271 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
272 struct ad7791_state *st = iio_priv(indio_dev);
273 int i, ret;
274
275 mutex_lock(&indio_dev->mlock);
276 if (iio_buffer_enabled(indio_dev)) {
277 mutex_unlock(&indio_dev->mlock);
278 return -EBUSY;
279 }
280 mutex_unlock(&indio_dev->mlock);
281
282 ret = -EINVAL;
283
284 for (i = 0; i < ARRAY_SIZE(ad7791_sample_freq_avail); i++) {
285 if (sysfs_streq(ad7791_sample_freq_avail[i], buf)) {
286
287 mutex_lock(&indio_dev->mlock);
288 st->filter &= ~AD7791_FILTER_RATE_MASK;
289 st->filter |= i;
290 ad_sd_write_reg(&st->sd, AD7791_REG_FILTER,
291 sizeof(st->filter), st->filter);
292 mutex_unlock(&indio_dev->mlock);
293 ret = 0;
294 break;
295 }
296 }
297
298 return ret ? ret : len;
299}
300
301static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
302 ad7791_read_frequency,
303 ad7791_write_frequency);
304
305static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("120 100 33.3 20 16.7 16.6 13.3 9.5");
306
307static struct attribute *ad7791_attributes[] = {
308 &iio_dev_attr_sampling_frequency.dev_attr.attr,
309 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
310 NULL
311};
312
313static const struct attribute_group ad7791_attribute_group = {
314 .attrs = ad7791_attributes,
315};
316
317static const struct iio_info ad7791_info = {
318 .read_raw = &ad7791_read_raw,
319 .attrs = &ad7791_attribute_group,
320 .validate_trigger = ad_sd_validate_trigger,
321 .driver_module = THIS_MODULE,
322};
323
324static const struct iio_info ad7791_no_filter_info = {
325 .read_raw = &ad7791_read_raw,
326 .validate_trigger = ad_sd_validate_trigger,
327 .driver_module = THIS_MODULE,
328};
329
330static int ad7791_setup(struct ad7791_state *st,
331 struct ad7791_platform_data *pdata)
332{
333
334 st->mode = AD7791_MODE_BUFFER;
335 st->filter = AD7791_FILTER_RATE_16_6;
336
337 if (!pdata)
338 return 0;
339
340 if ((st->info->flags & AD7791_FLAG_HAS_BUFFER) && !pdata->buffered)
341 st->mode &= ~AD7791_MODE_BUFFER;
342
343 if ((st->info->flags & AD7791_FLAG_HAS_BURNOUT) &&
344 pdata->burnout_current)
345 st->mode |= AD7791_MODE_BURNOUT;
346
347 if ((st->info->flags & AD7791_FLAG_HAS_UNIPOLAR) && pdata->unipolar)
348 st->mode |= AD7791_MODE_UNIPOLAR;
349
350 return ad_sd_write_reg(&st->sd, AD7791_REG_MODE, sizeof(st->mode),
351 st->mode);
352}
353
354static int ad7791_probe(struct spi_device *spi)
355{
356 struct ad7791_platform_data *pdata = spi->dev.platform_data;
357 struct iio_dev *indio_dev;
358 struct ad7791_state *st;
359 int ret;
360
361 if (!spi->irq) {
362 dev_err(&spi->dev, "Missing IRQ.\n");
363 return -ENXIO;
364 }
365
366 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
367 if (!indio_dev)
368 return -ENOMEM;
369
370 st = iio_priv(indio_dev);
371
372 st->reg = devm_regulator_get(&spi->dev, "refin");
373 if (IS_ERR(st->reg))
374 return PTR_ERR(st->reg);
375
376 ret = regulator_enable(st->reg);
377 if (ret)
378 return ret;
379
380 st->info = &ad7791_chip_infos[spi_get_device_id(spi)->driver_data];
381 ad_sd_init(&st->sd, indio_dev, spi, &ad7791_sigma_delta_info);
382
383 spi_set_drvdata(spi, indio_dev);
384
385 indio_dev->dev.parent = &spi->dev;
386 indio_dev->name = spi_get_device_id(spi)->name;
387 indio_dev->modes = INDIO_DIRECT_MODE;
388 indio_dev->channels = st->info->channels;
389 indio_dev->num_channels = st->info->num_channels;
390 if (st->info->flags & AD7791_FLAG_HAS_FILTER)
391 indio_dev->info = &ad7791_info;
392 else
393 indio_dev->info = &ad7791_no_filter_info;
394
395 ret = ad_sd_setup_buffer_and_trigger(indio_dev);
396 if (ret)
397 goto error_disable_reg;
398
399 ret = ad7791_setup(st, pdata);
400 if (ret)
401 goto error_remove_trigger;
402
403 ret = iio_device_register(indio_dev);
404 if (ret)
405 goto error_remove_trigger;
406
407 return 0;
408
409error_remove_trigger:
410 ad_sd_cleanup_buffer_and_trigger(indio_dev);
411error_disable_reg:
412 regulator_disable(st->reg);
413
414 return ret;
415}
416
417static int ad7791_remove(struct spi_device *spi)
418{
419 struct iio_dev *indio_dev = spi_get_drvdata(spi);
420 struct ad7791_state *st = iio_priv(indio_dev);
421
422 iio_device_unregister(indio_dev);
423 ad_sd_cleanup_buffer_and_trigger(indio_dev);
424
425 regulator_disable(st->reg);
426
427 return 0;
428}
429
430static const struct spi_device_id ad7791_spi_ids[] = {
431 { "ad7787", AD7787 },
432 { "ad7788", AD7788 },
433 { "ad7789", AD7789 },
434 { "ad7790", AD7790 },
435 { "ad7791", AD7791 },
436 {}
437};
438MODULE_DEVICE_TABLE(spi, ad7791_spi_ids);
439
440static struct spi_driver ad7791_driver = {
441 .driver = {
442 .name = "ad7791",
443 },
444 .probe = ad7791_probe,
445 .remove = ad7791_remove,
446 .id_table = ad7791_spi_ids,
447};
448module_spi_driver(ad7791_driver);
449
450MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
451MODULE_DESCRIPTION("Analog Device AD7787/AD7788/AD7789/AD7790/AD7791 ADC driver");
452MODULE_LICENSE("GPL v2");
453
