LXR linux/drivers/irqchip/irq-xtensa-pic.c

   1/*
   2 * Xtensa built-in interrupt controller
   3 *
   4 * Copyright (C) 2002 - 2013 Tensilica, Inc.
   5 * Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar
   6 *
   7 * This file is subject to the terms and conditions of the GNU General Public
   8 * License.  See the file "COPYING" in the main directory of this archive
   9 * for more details.
  10 *
  11 * Chris Zankel <chris@zankel.net>
  12 * Kevin Chea
  13 */
  14
  15#include <linux/interrupt.h>
  16#include <linux/irqdomain.h>
  17#include <linux/irq.h>
  18#include <linux/irqchip.h>
  19#include <linux/of.h>
  20
  21unsigned int cached_irq_mask;
  22
  23/*
  24 * Device Tree IRQ specifier translation function which works with one or
  25 * two cell bindings. First cell value maps directly to the hwirq number.
  26 * Second cell if present specifies whether hwirq number is external (1) or
  27 * internal (0).
  28 */
  29static int xtensa_pic_irq_domain_xlate(struct irq_domain *d,
  30                struct device_node *ctrlr,
  31                const u32 *intspec, unsigned int intsize,
  32                unsigned long *out_hwirq, unsigned int *out_type)
  33{
  34        return xtensa_irq_domain_xlate(intspec, intsize,
  35                        intspec[0], intspec[0],
  36                        out_hwirq, out_type);
  37}
  38
  39static const struct irq_domain_ops xtensa_irq_domain_ops = {
  40        .xlate = xtensa_pic_irq_domain_xlate,
  41        .map = xtensa_irq_map,
  42};
  43
  44static void xtensa_irq_mask(struct irq_data *d)
  45{
  46        cached_irq_mask &= ~(1 << d->hwirq);
  47        set_sr(cached_irq_mask, intenable);
  48}
  49
  50static void xtensa_irq_unmask(struct irq_data *d)
  51{
  52        cached_irq_mask |= 1 << d->hwirq;
  53        set_sr(cached_irq_mask, intenable);
  54}
  55
  56static void xtensa_irq_enable(struct irq_data *d)
  57{
  58        variant_irq_enable(d->hwirq);
  59        xtensa_irq_unmask(d);
  60}
  61
  62static void xtensa_irq_disable(struct irq_data *d)
  63{
  64        xtensa_irq_mask(d);
  65        variant_irq_disable(d->hwirq);
  66}
  67
  68static void xtensa_irq_ack(struct irq_data *d)
  69{
  70        set_sr(1 << d->hwirq, intclear);
  71}
  72
  73static int xtensa_irq_retrigger(struct irq_data *d)
  74{
  75        set_sr(1 << d->hwirq, intset);
  76        return 1;
  77}
  78
  79static struct irq_chip xtensa_irq_chip = {
  80        .name           = "xtensa",
  81        .irq_enable     = xtensa_irq_enable,
  82        .irq_disable    = xtensa_irq_disable,
  83        .irq_mask       = xtensa_irq_mask,
  84        .irq_unmask     = xtensa_irq_unmask,
  85        .irq_ack        = xtensa_irq_ack,
  86        .irq_retrigger  = xtensa_irq_retrigger,
  87};
  88
  89int __init xtensa_pic_init_legacy(struct device_node *interrupt_parent)
  90{
  91        struct irq_domain *root_domain =
  92                irq_domain_add_legacy(NULL, NR_IRQS, 0, 0,
  93                                &xtensa_irq_domain_ops, &xtensa_irq_chip);
  94        irq_set_default_host(root_domain);
  95        return 0;
  96}
  97
  98static int __init xtensa_pic_init(struct device_node *np,
  99                struct device_node *interrupt_parent)
 100{
 101        struct irq_domain *root_domain =
 102                irq_domain_add_linear(np, NR_IRQS, &xtensa_irq_domain_ops,
 103                                &xtensa_irq_chip);
 104        irq_set_default_host(root_domain);
 105        return 0;
 106}
 107IRQCHIP_DECLARE(xtensa_irq_chip, "cdns,xtensa-pic", xtensa_pic_init);
 108