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28#include <linux/init.h>
29#include <linux/list.h>
30#include <linux/module.h>
31#include <linux/kmod.h>
32#include <linux/kernel.h>
33#include <linux/slab.h>
34#include <linux/interrupt.h>
35#include <linux/dma-mapping.h>
36#include <linux/delay.h>
37#include <linux/kthread.h>
38#include <asm/div64.h>
39
40#include "cx88.h"
41#include <media/v4l2-common.h>
42#include <media/v4l2-ioctl.h>
43#include <media/v4l2-event.h>
44#include <media/i2c/wm8775.h>
45
46MODULE_DESCRIPTION("v4l2 driver module for cx2388x based TV cards");
47MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
48MODULE_LICENSE("GPL");
49MODULE_VERSION(CX88_VERSION);
50
51
52
53static unsigned int video_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
54static unsigned int vbi_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
55static unsigned int radio_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
56
57module_param_array(video_nr, int, NULL, 0444);
58module_param_array(vbi_nr, int, NULL, 0444);
59module_param_array(radio_nr, int, NULL, 0444);
60
61MODULE_PARM_DESC(video_nr,"video device numbers");
62MODULE_PARM_DESC(vbi_nr,"vbi device numbers");
63MODULE_PARM_DESC(radio_nr,"radio device numbers");
64
65static unsigned int video_debug;
66module_param(video_debug,int,0644);
67MODULE_PARM_DESC(video_debug,"enable debug messages [video]");
68
69static unsigned int irq_debug;
70module_param(irq_debug,int,0644);
71MODULE_PARM_DESC(irq_debug,"enable debug messages [IRQ handler]");
72
73#define dprintk(level,fmt, arg...) if (video_debug >= level) \
74 printk(KERN_DEBUG "%s/0: " fmt, core->name , ## arg)
75
76
77
78
79static const struct cx8800_fmt formats[] = {
80 {
81 .name = "8 bpp, gray",
82 .fourcc = V4L2_PIX_FMT_GREY,
83 .cxformat = ColorFormatY8,
84 .depth = 8,
85 .flags = FORMAT_FLAGS_PACKED,
86 },{
87 .name = "15 bpp RGB, le",
88 .fourcc = V4L2_PIX_FMT_RGB555,
89 .cxformat = ColorFormatRGB15,
90 .depth = 16,
91 .flags = FORMAT_FLAGS_PACKED,
92 },{
93 .name = "15 bpp RGB, be",
94 .fourcc = V4L2_PIX_FMT_RGB555X,
95 .cxformat = ColorFormatRGB15 | ColorFormatBSWAP,
96 .depth = 16,
97 .flags = FORMAT_FLAGS_PACKED,
98 },{
99 .name = "16 bpp RGB, le",
100 .fourcc = V4L2_PIX_FMT_RGB565,
101 .cxformat = ColorFormatRGB16,
102 .depth = 16,
103 .flags = FORMAT_FLAGS_PACKED,
104 },{
105 .name = "16 bpp RGB, be",
106 .fourcc = V4L2_PIX_FMT_RGB565X,
107 .cxformat = ColorFormatRGB16 | ColorFormatBSWAP,
108 .depth = 16,
109 .flags = FORMAT_FLAGS_PACKED,
110 },{
111 .name = "24 bpp RGB, le",
112 .fourcc = V4L2_PIX_FMT_BGR24,
113 .cxformat = ColorFormatRGB24,
114 .depth = 24,
115 .flags = FORMAT_FLAGS_PACKED,
116 },{
117 .name = "32 bpp RGB, le",
118 .fourcc = V4L2_PIX_FMT_BGR32,
119 .cxformat = ColorFormatRGB32,
120 .depth = 32,
121 .flags = FORMAT_FLAGS_PACKED,
122 },{
123 .name = "32 bpp RGB, be",
124 .fourcc = V4L2_PIX_FMT_RGB32,
125 .cxformat = ColorFormatRGB32 | ColorFormatBSWAP | ColorFormatWSWAP,
126 .depth = 32,
127 .flags = FORMAT_FLAGS_PACKED,
128 },{
129 .name = "4:2:2, packed, YUYV",
130 .fourcc = V4L2_PIX_FMT_YUYV,
131 .cxformat = ColorFormatYUY2,
132 .depth = 16,
133 .flags = FORMAT_FLAGS_PACKED,
134 },{
135 .name = "4:2:2, packed, UYVY",
136 .fourcc = V4L2_PIX_FMT_UYVY,
137 .cxformat = ColorFormatYUY2 | ColorFormatBSWAP,
138 .depth = 16,
139 .flags = FORMAT_FLAGS_PACKED,
140 },
141};
142
143static const struct cx8800_fmt* format_by_fourcc(unsigned int fourcc)
144{
145 unsigned int i;
146
147 for (i = 0; i < ARRAY_SIZE(formats); i++)
148 if (formats[i].fourcc == fourcc)
149 return formats+i;
150 return NULL;
151}
152
153
154
155struct cx88_ctrl {
156
157 u32 id;
158 s32 minimum;
159 s32 maximum;
160 u32 step;
161 s32 default_value;
162
163
164 u32 off;
165 u32 reg;
166 u32 sreg;
167 u32 mask;
168 u32 shift;
169};
170
171static const struct cx88_ctrl cx8800_vid_ctls[] = {
172
173 {
174 .id = V4L2_CID_BRIGHTNESS,
175 .minimum = 0x00,
176 .maximum = 0xff,
177 .step = 1,
178 .default_value = 0x7f,
179 .off = 128,
180 .reg = MO_CONTR_BRIGHT,
181 .mask = 0x00ff,
182 .shift = 0,
183 },{
184 .id = V4L2_CID_CONTRAST,
185 .minimum = 0,
186 .maximum = 0xff,
187 .step = 1,
188 .default_value = 0x3f,
189 .off = 0,
190 .reg = MO_CONTR_BRIGHT,
191 .mask = 0xff00,
192 .shift = 8,
193 },{
194 .id = V4L2_CID_HUE,
195 .minimum = 0,
196 .maximum = 0xff,
197 .step = 1,
198 .default_value = 0x7f,
199 .off = 128,
200 .reg = MO_HUE,
201 .mask = 0x00ff,
202 .shift = 0,
203 },{
204
205
206
207 .id = V4L2_CID_SATURATION,
208 .minimum = 0,
209 .maximum = 0xff,
210 .step = 1,
211 .default_value = 0x7f,
212 .off = 0,
213 .reg = MO_UV_SATURATION,
214 .mask = 0x00ff,
215 .shift = 0,
216 }, {
217 .id = V4L2_CID_SHARPNESS,
218 .minimum = 0,
219 .maximum = 4,
220 .step = 1,
221 .default_value = 0x0,
222 .off = 0,
223
224
225 .reg = MO_FILTER_ODD,
226 .mask = 7 << 7,
227 .shift = 7,
228 }, {
229 .id = V4L2_CID_CHROMA_AGC,
230 .minimum = 0,
231 .maximum = 1,
232 .default_value = 0x1,
233 .reg = MO_INPUT_FORMAT,
234 .mask = 1 << 10,
235 .shift = 10,
236 }, {
237 .id = V4L2_CID_COLOR_KILLER,
238 .minimum = 0,
239 .maximum = 1,
240 .default_value = 0x1,
241 .reg = MO_INPUT_FORMAT,
242 .mask = 1 << 9,
243 .shift = 9,
244 }, {
245 .id = V4L2_CID_BAND_STOP_FILTER,
246 .minimum = 0,
247 .maximum = 1,
248 .step = 1,
249 .default_value = 0x0,
250 .off = 0,
251 .reg = MO_HTOTAL,
252 .mask = 3 << 11,
253 .shift = 11,
254 }
255};
256
257static const struct cx88_ctrl cx8800_aud_ctls[] = {
258 {
259
260 .id = V4L2_CID_AUDIO_MUTE,
261 .minimum = 0,
262 .maximum = 1,
263 .default_value = 1,
264 .reg = AUD_VOL_CTL,
265 .sreg = SHADOW_AUD_VOL_CTL,
266 .mask = (1 << 6),
267 .shift = 6,
268 },{
269 .id = V4L2_CID_AUDIO_VOLUME,
270 .minimum = 0,
271 .maximum = 0x3f,
272 .step = 1,
273 .default_value = 0x3f,
274 .reg = AUD_VOL_CTL,
275 .sreg = SHADOW_AUD_VOL_CTL,
276 .mask = 0x3f,
277 .shift = 0,
278 },{
279 .id = V4L2_CID_AUDIO_BALANCE,
280 .minimum = 0,
281 .maximum = 0x7f,
282 .step = 1,
283 .default_value = 0x40,
284 .reg = AUD_BAL_CTL,
285 .sreg = SHADOW_AUD_BAL_CTL,
286 .mask = 0x7f,
287 .shift = 0,
288 }
289};
290
291enum {
292 CX8800_VID_CTLS = ARRAY_SIZE(cx8800_vid_ctls),
293 CX8800_AUD_CTLS = ARRAY_SIZE(cx8800_aud_ctls),
294};
295
296
297
298int cx88_video_mux(struct cx88_core *core, unsigned int input)
299{
300
301
302 dprintk(1,"video_mux: %d [vmux=%d,gpio=0x%x,0x%x,0x%x,0x%x]\n",
303 input, INPUT(input).vmux,
304 INPUT(input).gpio0,INPUT(input).gpio1,
305 INPUT(input).gpio2,INPUT(input).gpio3);
306 core->input = input;
307 cx_andor(MO_INPUT_FORMAT, 0x03 << 14, INPUT(input).vmux << 14);
308 cx_write(MO_GP3_IO, INPUT(input).gpio3);
309 cx_write(MO_GP0_IO, INPUT(input).gpio0);
310 cx_write(MO_GP1_IO, INPUT(input).gpio1);
311 cx_write(MO_GP2_IO, INPUT(input).gpio2);
312
313 switch (INPUT(input).type) {
314 case CX88_VMUX_SVIDEO:
315 cx_set(MO_AFECFG_IO, 0x00000001);
316 cx_set(MO_INPUT_FORMAT, 0x00010010);
317 cx_set(MO_FILTER_EVEN, 0x00002020);
318 cx_set(MO_FILTER_ODD, 0x00002020);
319 break;
320 default:
321 cx_clear(MO_AFECFG_IO, 0x00000001);
322 cx_clear(MO_INPUT_FORMAT, 0x00010010);
323 cx_clear(MO_FILTER_EVEN, 0x00002020);
324 cx_clear(MO_FILTER_ODD, 0x00002020);
325 break;
326 }
327
328
329
330 if (INPUT(input).audioroute) {
331
332
333
334 if (core->sd_wm8775) {
335 call_all(core, audio, s_routing,
336 INPUT(input).audioroute, 0, 0);
337 }
338
339
340
341 if (INPUT(input).type != CX88_VMUX_TELEVISION &&
342 INPUT(input).type != CX88_VMUX_CABLE) {
343
344 core->tvaudio = WW_I2SADC;
345 cx88_set_tvaudio(core);
346 } else {
347
348 cx_write(AUD_I2SCNTL, 0x0);
349 cx_clear(AUD_CTL, EN_I2SIN_ENABLE);
350 }
351 }
352
353 return 0;
354}
355EXPORT_SYMBOL(cx88_video_mux);
356
357
358
359static int start_video_dma(struct cx8800_dev *dev,
360 struct cx88_dmaqueue *q,
361 struct cx88_buffer *buf)
362{
363 struct cx88_core *core = dev->core;
364
365
366 cx88_sram_channel_setup(core, &cx88_sram_channels[SRAM_CH21],
367 buf->bpl, buf->risc.dma);
368 cx88_set_scale(core, core->width, core->height, core->field);
369 cx_write(MO_COLOR_CTRL, dev->fmt->cxformat | ColorFormatGamma);
370
371
372 cx_write(MO_VIDY_GPCNTRL,GP_COUNT_CONTROL_RESET);
373 q->count = 0;
374
375
376 cx_set(MO_PCI_INTMSK, core->pci_irqmask | PCI_INT_VIDINT);
377
378
379
380
381
382
383
384
385 cx_set(MO_VID_INTMSK, 0x0f0011);
386
387
388 cx_set(VID_CAPTURE_CONTROL,0x06);
389
390
391 cx_set(MO_DEV_CNTRL2, (1<<5));
392 cx_set(MO_VID_DMACNTRL, 0x11);
393
394 return 0;
395}
396
397#ifdef CONFIG_PM
398static int stop_video_dma(struct cx8800_dev *dev)
399{
400 struct cx88_core *core = dev->core;
401
402
403 cx_clear(MO_VID_DMACNTRL, 0x11);
404
405
406 cx_clear(VID_CAPTURE_CONTROL,0x06);
407
408
409 cx_clear(MO_PCI_INTMSK, PCI_INT_VIDINT);
410 cx_clear(MO_VID_INTMSK, 0x0f0011);
411 return 0;
412}
413
414static int restart_video_queue(struct cx8800_dev *dev,
415 struct cx88_dmaqueue *q)
416{
417 struct cx88_core *core = dev->core;
418 struct cx88_buffer *buf;
419
420 if (!list_empty(&q->active)) {
421 buf = list_entry(q->active.next, struct cx88_buffer, list);
422 dprintk(2,"restart_queue [%p/%d]: restart dma\n",
423 buf, buf->vb.vb2_buf.index);
424 start_video_dma(dev, q, buf);
425 }
426 return 0;
427}
428#endif
429
430
431
432static int queue_setup(struct vb2_queue *q,
433 unsigned int *num_buffers, unsigned int *num_planes,
434 unsigned int sizes[], void *alloc_ctxs[])
435{
436 struct cx8800_dev *dev = q->drv_priv;
437 struct cx88_core *core = dev->core;
438
439 *num_planes = 1;
440 sizes[0] = (dev->fmt->depth * core->width * core->height) >> 3;
441 alloc_ctxs[0] = dev->alloc_ctx;
442 return 0;
443}
444
445static int buffer_prepare(struct vb2_buffer *vb)
446{
447 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
448 struct cx8800_dev *dev = vb->vb2_queue->drv_priv;
449 struct cx88_core *core = dev->core;
450 struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb);
451 struct sg_table *sgt = vb2_dma_sg_plane_desc(vb, 0);
452
453 buf->bpl = core->width * dev->fmt->depth >> 3;
454
455 if (vb2_plane_size(vb, 0) < core->height * buf->bpl)
456 return -EINVAL;
457 vb2_set_plane_payload(vb, 0, core->height * buf->bpl);
458
459 switch (core->field) {
460 case V4L2_FIELD_TOP:
461 cx88_risc_buffer(dev->pci, &buf->risc,
462 sgt->sgl, 0, UNSET,
463 buf->bpl, 0, core->height);
464 break;
465 case V4L2_FIELD_BOTTOM:
466 cx88_risc_buffer(dev->pci, &buf->risc,
467 sgt->sgl, UNSET, 0,
468 buf->bpl, 0, core->height);
469 break;
470 case V4L2_FIELD_SEQ_TB:
471 cx88_risc_buffer(dev->pci, &buf->risc,
472 sgt->sgl,
473 0, buf->bpl * (core->height >> 1),
474 buf->bpl, 0,
475 core->height >> 1);
476 break;
477 case V4L2_FIELD_SEQ_BT:
478 cx88_risc_buffer(dev->pci, &buf->risc,
479 sgt->sgl,
480 buf->bpl * (core->height >> 1), 0,
481 buf->bpl, 0,
482 core->height >> 1);
483 break;
484 case V4L2_FIELD_INTERLACED:
485 default:
486 cx88_risc_buffer(dev->pci, &buf->risc,
487 sgt->sgl, 0, buf->bpl,
488 buf->bpl, buf->bpl,
489 core->height >> 1);
490 break;
491 }
492 dprintk(2,"[%p/%d] buffer_prepare - %dx%d %dbpp \"%s\" - dma=0x%08lx\n",
493 buf, buf->vb.vb2_buf.index,
494 core->width, core->height, dev->fmt->depth, dev->fmt->name,
495 (unsigned long)buf->risc.dma);
496 return 0;
497}
498
499static void buffer_finish(struct vb2_buffer *vb)
500{
501 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
502 struct cx8800_dev *dev = vb->vb2_queue->drv_priv;
503 struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb);
504 struct cx88_riscmem *risc = &buf->risc;
505
506 if (risc->cpu)
507 pci_free_consistent(dev->pci, risc->size, risc->cpu, risc->dma);
508 memset(risc, 0, sizeof(*risc));
509}
510
511static void buffer_queue(struct vb2_buffer *vb)
512{
513 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
514 struct cx8800_dev *dev = vb->vb2_queue->drv_priv;
515 struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb);
516 struct cx88_buffer *prev;
517 struct cx88_core *core = dev->core;
518 struct cx88_dmaqueue *q = &dev->vidq;
519
520
521 buf->risc.cpu[1] = cpu_to_le32(buf->risc.dma + 8);
522 buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_CNT_INC);
523 buf->risc.jmp[1] = cpu_to_le32(buf->risc.dma + 8);
524
525 if (list_empty(&q->active)) {
526 list_add_tail(&buf->list, &q->active);
527 dprintk(2,"[%p/%d] buffer_queue - first active\n",
528 buf, buf->vb.vb2_buf.index);
529
530 } else {
531 buf->risc.cpu[0] |= cpu_to_le32(RISC_IRQ1);
532 prev = list_entry(q->active.prev, struct cx88_buffer, list);
533 list_add_tail(&buf->list, &q->active);
534 prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
535 dprintk(2, "[%p/%d] buffer_queue - append to active\n",
536 buf, buf->vb.vb2_buf.index);
537 }
538}
539
540static int start_streaming(struct vb2_queue *q, unsigned int count)
541{
542 struct cx8800_dev *dev = q->drv_priv;
543 struct cx88_dmaqueue *dmaq = &dev->vidq;
544 struct cx88_buffer *buf = list_entry(dmaq->active.next,
545 struct cx88_buffer, list);
546
547 start_video_dma(dev, dmaq, buf);
548 return 0;
549}
550
551static void stop_streaming(struct vb2_queue *q)
552{
553 struct cx8800_dev *dev = q->drv_priv;
554 struct cx88_core *core = dev->core;
555 struct cx88_dmaqueue *dmaq = &dev->vidq;
556 unsigned long flags;
557
558 cx_clear(MO_VID_DMACNTRL, 0x11);
559 cx_clear(VID_CAPTURE_CONTROL, 0x06);
560 spin_lock_irqsave(&dev->slock, flags);
561 while (!list_empty(&dmaq->active)) {
562 struct cx88_buffer *buf = list_entry(dmaq->active.next,
563 struct cx88_buffer, list);
564
565 list_del(&buf->list);
566 vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
567 }
568 spin_unlock_irqrestore(&dev->slock, flags);
569}
570
571static struct vb2_ops cx8800_video_qops = {
572 .queue_setup = queue_setup,
573 .buf_prepare = buffer_prepare,
574 .buf_finish = buffer_finish,
575 .buf_queue = buffer_queue,
576 .wait_prepare = vb2_ops_wait_prepare,
577 .wait_finish = vb2_ops_wait_finish,
578 .start_streaming = start_streaming,
579 .stop_streaming = stop_streaming,
580};
581
582
583
584static int radio_open(struct file *file)
585{
586 struct cx8800_dev *dev = video_drvdata(file);
587 struct cx88_core *core = dev->core;
588 int ret = v4l2_fh_open(file);
589
590 if (ret)
591 return ret;
592
593 cx_write(MO_GP3_IO, core->board.radio.gpio3);
594 cx_write(MO_GP0_IO, core->board.radio.gpio0);
595 cx_write(MO_GP1_IO, core->board.radio.gpio1);
596 cx_write(MO_GP2_IO, core->board.radio.gpio2);
597 if (core->board.radio.audioroute) {
598 if (core->sd_wm8775) {
599 call_all(core, audio, s_routing,
600 core->board.radio.audioroute, 0, 0);
601 }
602
603 core->tvaudio = WW_I2SADC;
604 cx88_set_tvaudio(core);
605 } else {
606
607 core->tvaudio = WW_FM;
608 cx88_set_tvaudio(core);
609 cx88_set_stereo(core, V4L2_TUNER_MODE_STEREO, 1);
610 }
611 call_all(core, tuner, s_radio);
612 return 0;
613}
614
615
616
617
618static int cx8800_s_vid_ctrl(struct v4l2_ctrl *ctrl)
619{
620 struct cx88_core *core =
621 container_of(ctrl->handler, struct cx88_core, video_hdl);
622 const struct cx88_ctrl *cc = ctrl->priv;
623 u32 value, mask;
624
625 mask = cc->mask;
626 switch (ctrl->id) {
627 case V4L2_CID_SATURATION:
628
629
630 value = ((ctrl->val - cc->off) << cc->shift) & cc->mask;
631
632 if (core->tvnorm & V4L2_STD_SECAM) {
633
634 value = value << 8 | value;
635 } else {
636
637 value = (value * 0x5a) / 0x7f << 8 | value;
638 }
639 mask = 0xffff;
640 break;
641 case V4L2_CID_SHARPNESS:
642
643 value = (ctrl->val < 1 ? 0 : ((ctrl->val + 3) << 7));
644
645 cx_andor(MO_FILTER_EVEN, mask, value);
646 break;
647 case V4L2_CID_CHROMA_AGC:
648 value = ((ctrl->val - cc->off) << cc->shift) & cc->mask;
649 break;
650 default:
651 value = ((ctrl->val - cc->off) << cc->shift) & cc->mask;
652 break;
653 }
654 dprintk(1, "set_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n",
655 ctrl->id, ctrl->name, ctrl->val, cc->reg, value,
656 mask, cc->sreg ? " [shadowed]" : "");
657 if (cc->sreg)
658 cx_sandor(cc->sreg, cc->reg, mask, value);
659 else
660 cx_andor(cc->reg, mask, value);
661 return 0;
662}
663
664static int cx8800_s_aud_ctrl(struct v4l2_ctrl *ctrl)
665{
666 struct cx88_core *core =
667 container_of(ctrl->handler, struct cx88_core, audio_hdl);
668 const struct cx88_ctrl *cc = ctrl->priv;
669 u32 value,mask;
670
671
672 if (core->sd_wm8775) {
673 switch (ctrl->id) {
674 case V4L2_CID_AUDIO_MUTE:
675 wm8775_s_ctrl(core, ctrl->id, ctrl->val);
676 break;
677 case V4L2_CID_AUDIO_VOLUME:
678 wm8775_s_ctrl(core, ctrl->id, (ctrl->val) ?
679 (0x90 + ctrl->val) << 8 : 0);
680 break;
681 case V4L2_CID_AUDIO_BALANCE:
682 wm8775_s_ctrl(core, ctrl->id, ctrl->val << 9);
683 break;
684 default:
685 break;
686 }
687 }
688
689 mask = cc->mask;
690 switch (ctrl->id) {
691 case V4L2_CID_AUDIO_BALANCE:
692 value = (ctrl->val < 0x40) ? (0x7f - ctrl->val) : (ctrl->val - 0x40);
693 break;
694 case V4L2_CID_AUDIO_VOLUME:
695 value = 0x3f - (ctrl->val & 0x3f);
696 break;
697 default:
698 value = ((ctrl->val - cc->off) << cc->shift) & cc->mask;
699 break;
700 }
701 dprintk(1,"set_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n",
702 ctrl->id, ctrl->name, ctrl->val, cc->reg, value,
703 mask, cc->sreg ? " [shadowed]" : "");
704 if (cc->sreg)
705 cx_sandor(cc->sreg, cc->reg, mask, value);
706 else
707 cx_andor(cc->reg, mask, value);
708 return 0;
709}
710
711
712
713
714static int vidioc_g_fmt_vid_cap(struct file *file, void *priv,
715 struct v4l2_format *f)
716{
717 struct cx8800_dev *dev = video_drvdata(file);
718 struct cx88_core *core = dev->core;
719
720 f->fmt.pix.width = core->width;
721 f->fmt.pix.height = core->height;
722 f->fmt.pix.field = core->field;
723 f->fmt.pix.pixelformat = dev->fmt->fourcc;
724 f->fmt.pix.bytesperline =
725 (f->fmt.pix.width * dev->fmt->depth) >> 3;
726 f->fmt.pix.sizeimage =
727 f->fmt.pix.height * f->fmt.pix.bytesperline;
728 f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M;
729 return 0;
730}
731
732static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
733 struct v4l2_format *f)
734{
735 struct cx8800_dev *dev = video_drvdata(file);
736 struct cx88_core *core = dev->core;
737 const struct cx8800_fmt *fmt;
738 enum v4l2_field field;
739 unsigned int maxw, maxh;
740
741 fmt = format_by_fourcc(f->fmt.pix.pixelformat);
742 if (NULL == fmt)
743 return -EINVAL;
744
745 maxw = norm_maxw(core->tvnorm);
746 maxh = norm_maxh(core->tvnorm);
747
748 field = f->fmt.pix.field;
749
750 switch (field) {
751 case V4L2_FIELD_TOP:
752 case V4L2_FIELD_BOTTOM:
753 case V4L2_FIELD_INTERLACED:
754 case V4L2_FIELD_SEQ_BT:
755 case V4L2_FIELD_SEQ_TB:
756 break;
757 default:
758 field = (f->fmt.pix.height > maxh / 2)
759 ? V4L2_FIELD_INTERLACED
760 : V4L2_FIELD_BOTTOM;
761 break;
762 }
763 if (V4L2_FIELD_HAS_T_OR_B(field))
764 maxh /= 2;
765
766 v4l_bound_align_image(&f->fmt.pix.width, 48, maxw, 2,
767 &f->fmt.pix.height, 32, maxh, 0, 0);
768 f->fmt.pix.field = field;
769 f->fmt.pix.bytesperline =
770 (f->fmt.pix.width * fmt->depth) >> 3;
771 f->fmt.pix.sizeimage =
772 f->fmt.pix.height * f->fmt.pix.bytesperline;
773 f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M;
774
775 return 0;
776}
777
778static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
779 struct v4l2_format *f)
780{
781 struct cx8800_dev *dev = video_drvdata(file);
782 struct cx88_core *core = dev->core;
783 int err = vidioc_try_fmt_vid_cap (file,priv,f);
784
785 if (0 != err)
786 return err;
787 if (vb2_is_busy(&dev->vb2_vidq) || vb2_is_busy(&dev->vb2_vbiq))
788 return -EBUSY;
789 if (core->dvbdev && vb2_is_busy(&core->dvbdev->vb2_mpegq))
790 return -EBUSY;
791 dev->fmt = format_by_fourcc(f->fmt.pix.pixelformat);
792 core->width = f->fmt.pix.width;
793 core->height = f->fmt.pix.height;
794 core->field = f->fmt.pix.field;
795 return 0;
796}
797
798void cx88_querycap(struct file *file, struct cx88_core *core,
799 struct v4l2_capability *cap)
800{
801 struct video_device *vdev = video_devdata(file);
802
803 strlcpy(cap->card, core->board.name, sizeof(cap->card));
804 cap->device_caps = V4L2_CAP_READWRITE | V4L2_CAP_STREAMING;
805 if (UNSET != core->board.tuner_type)
806 cap->device_caps |= V4L2_CAP_TUNER;
807 switch (vdev->vfl_type) {
808 case VFL_TYPE_RADIO:
809 cap->device_caps = V4L2_CAP_RADIO | V4L2_CAP_TUNER;
810 break;
811 case VFL_TYPE_GRABBER:
812 cap->device_caps |= V4L2_CAP_VIDEO_CAPTURE;
813 break;
814 case VFL_TYPE_VBI:
815 cap->device_caps |= V4L2_CAP_VBI_CAPTURE;
816 break;
817 }
818 cap->capabilities = cap->device_caps | V4L2_CAP_VIDEO_CAPTURE |
819 V4L2_CAP_VBI_CAPTURE | V4L2_CAP_DEVICE_CAPS;
820 if (core->board.radio.type == CX88_RADIO)
821 cap->capabilities |= V4L2_CAP_RADIO;
822}
823EXPORT_SYMBOL(cx88_querycap);
824
825static int vidioc_querycap(struct file *file, void *priv,
826 struct v4l2_capability *cap)
827{
828 struct cx8800_dev *dev = video_drvdata(file);
829 struct cx88_core *core = dev->core;
830
831 strcpy(cap->driver, "cx8800");
832 sprintf(cap->bus_info, "PCI:%s", pci_name(dev->pci));
833 cx88_querycap(file, core, cap);
834 return 0;
835}
836
837static int vidioc_enum_fmt_vid_cap (struct file *file, void *priv,
838 struct v4l2_fmtdesc *f)
839{
840 if (unlikely(f->index >= ARRAY_SIZE(formats)))
841 return -EINVAL;
842
843 strlcpy(f->description,formats[f->index].name,sizeof(f->description));
844 f->pixelformat = formats[f->index].fourcc;
845
846 return 0;
847}
848
849static int vidioc_g_std(struct file *file, void *priv, v4l2_std_id *tvnorm)
850{
851 struct cx8800_dev *dev = video_drvdata(file);
852 struct cx88_core *core = dev->core;
853
854 *tvnorm = core->tvnorm;
855 return 0;
856}
857
858static int vidioc_s_std(struct file *file, void *priv, v4l2_std_id tvnorms)
859{
860 struct cx8800_dev *dev = video_drvdata(file);
861 struct cx88_core *core = dev->core;
862
863 return cx88_set_tvnorm(core, tvnorms);
864}
865
866
867int cx88_enum_input (struct cx88_core *core,struct v4l2_input *i)
868{
869 static const char * const iname[] = {
870 [ CX88_VMUX_COMPOSITE1 ] = "Composite1",
871 [ CX88_VMUX_COMPOSITE2 ] = "Composite2",
872 [ CX88_VMUX_COMPOSITE3 ] = "Composite3",
873 [ CX88_VMUX_COMPOSITE4 ] = "Composite4",
874 [ CX88_VMUX_SVIDEO ] = "S-Video",
875 [ CX88_VMUX_TELEVISION ] = "Television",
876 [ CX88_VMUX_CABLE ] = "Cable TV",
877 [ CX88_VMUX_DVB ] = "DVB",
878 [ CX88_VMUX_DEBUG ] = "for debug only",
879 };
880 unsigned int n = i->index;
881
882 if (n >= 4)
883 return -EINVAL;
884 if (0 == INPUT(n).type)
885 return -EINVAL;
886 i->type = V4L2_INPUT_TYPE_CAMERA;
887 strcpy(i->name,iname[INPUT(n).type]);
888 if ((CX88_VMUX_TELEVISION == INPUT(n).type) ||
889 (CX88_VMUX_CABLE == INPUT(n).type)) {
890 i->type = V4L2_INPUT_TYPE_TUNER;
891 }
892 i->std = CX88_NORMS;
893 return 0;
894}
895EXPORT_SYMBOL(cx88_enum_input);
896
897static int vidioc_enum_input (struct file *file, void *priv,
898 struct v4l2_input *i)
899{
900 struct cx8800_dev *dev = video_drvdata(file);
901 struct cx88_core *core = dev->core;
902 return cx88_enum_input (core,i);
903}
904
905static int vidioc_g_input (struct file *file, void *priv, unsigned int *i)
906{
907 struct cx8800_dev *dev = video_drvdata(file);
908 struct cx88_core *core = dev->core;
909
910 *i = core->input;
911 return 0;
912}
913
914static int vidioc_s_input (struct file *file, void *priv, unsigned int i)
915{
916 struct cx8800_dev *dev = video_drvdata(file);
917 struct cx88_core *core = dev->core;
918
919 if (i >= 4)
920 return -EINVAL;
921 if (0 == INPUT(i).type)
922 return -EINVAL;
923
924 cx88_newstation(core);
925 cx88_video_mux(core,i);
926 return 0;
927}
928
929static int vidioc_g_tuner (struct file *file, void *priv,
930 struct v4l2_tuner *t)
931{
932 struct cx8800_dev *dev = video_drvdata(file);
933 struct cx88_core *core = dev->core;
934 u32 reg;
935
936 if (unlikely(UNSET == core->board.tuner_type))
937 return -EINVAL;
938 if (0 != t->index)
939 return -EINVAL;
940
941 strcpy(t->name, "Television");
942 t->capability = V4L2_TUNER_CAP_NORM;
943 t->rangehigh = 0xffffffffUL;
944 call_all(core, tuner, g_tuner, t);
945
946 cx88_get_stereo(core ,t);
947 reg = cx_read(MO_DEVICE_STATUS);
948 t->signal = (reg & (1<<5)) ? 0xffff : 0x0000;
949 return 0;
950}
951
952static int vidioc_s_tuner (struct file *file, void *priv,
953 const struct v4l2_tuner *t)
954{
955 struct cx8800_dev *dev = video_drvdata(file);
956 struct cx88_core *core = dev->core;
957
958 if (UNSET == core->board.tuner_type)
959 return -EINVAL;
960 if (0 != t->index)
961 return -EINVAL;
962
963 cx88_set_stereo(core, t->audmode, 1);
964 return 0;
965}
966
967static int vidioc_g_frequency (struct file *file, void *priv,
968 struct v4l2_frequency *f)
969{
970 struct cx8800_dev *dev = video_drvdata(file);
971 struct cx88_core *core = dev->core;
972
973 if (unlikely(UNSET == core->board.tuner_type))
974 return -EINVAL;
975 if (f->tuner)
976 return -EINVAL;
977
978 f->frequency = core->freq;
979
980 call_all(core, tuner, g_frequency, f);
981
982 return 0;
983}
984
985int cx88_set_freq (struct cx88_core *core,
986 const struct v4l2_frequency *f)
987{
988 struct v4l2_frequency new_freq = *f;
989
990 if (unlikely(UNSET == core->board.tuner_type))
991 return -EINVAL;
992 if (unlikely(f->tuner != 0))
993 return -EINVAL;
994
995 cx88_newstation(core);
996 call_all(core, tuner, s_frequency, f);
997 call_all(core, tuner, g_frequency, &new_freq);
998 core->freq = new_freq.frequency;
999
1000
1001 msleep (10);
1002 cx88_set_tvaudio(core);
1003
1004 return 0;
1005}
1006EXPORT_SYMBOL(cx88_set_freq);
1007
1008static int vidioc_s_frequency (struct file *file, void *priv,
1009 const struct v4l2_frequency *f)
1010{
1011 struct cx8800_dev *dev = video_drvdata(file);
1012 struct cx88_core *core = dev->core;
1013
1014 return cx88_set_freq(core, f);
1015}
1016
1017#ifdef CONFIG_VIDEO_ADV_DEBUG
1018static int vidioc_g_register (struct file *file, void *fh,
1019 struct v4l2_dbg_register *reg)
1020{
1021 struct cx8800_dev *dev = video_drvdata(file);
1022 struct cx88_core *core = dev->core;
1023
1024
1025 reg->val = cx_read(reg->reg & 0xfffffc);
1026 reg->size = 4;
1027 return 0;
1028}
1029
1030static int vidioc_s_register (struct file *file, void *fh,
1031 const struct v4l2_dbg_register *reg)
1032{
1033 struct cx8800_dev *dev = video_drvdata(file);
1034 struct cx88_core *core = dev->core;
1035
1036 cx_write(reg->reg & 0xfffffc, reg->val);
1037 return 0;
1038}
1039#endif
1040
1041
1042
1043
1044
1045static int radio_g_tuner (struct file *file, void *priv,
1046 struct v4l2_tuner *t)
1047{
1048 struct cx8800_dev *dev = video_drvdata(file);
1049 struct cx88_core *core = dev->core;
1050
1051 if (unlikely(t->index > 0))
1052 return -EINVAL;
1053
1054 strcpy(t->name, "Radio");
1055
1056 call_all(core, tuner, g_tuner, t);
1057 return 0;
1058}
1059
1060static int radio_s_tuner (struct file *file, void *priv,
1061 const struct v4l2_tuner *t)
1062{
1063 struct cx8800_dev *dev = video_drvdata(file);
1064 struct cx88_core *core = dev->core;
1065
1066 if (0 != t->index)
1067 return -EINVAL;
1068
1069 call_all(core, tuner, s_tuner, t);
1070 return 0;
1071}
1072
1073
1074
1075static const char *cx88_vid_irqs[32] = {
1076 "y_risci1", "u_risci1", "v_risci1", "vbi_risc1",
1077 "y_risci2", "u_risci2", "v_risci2", "vbi_risc2",
1078 "y_oflow", "u_oflow", "v_oflow", "vbi_oflow",
1079 "y_sync", "u_sync", "v_sync", "vbi_sync",
1080 "opc_err", "par_err", "rip_err", "pci_abort",
1081};
1082
1083static void cx8800_vid_irq(struct cx8800_dev *dev)
1084{
1085 struct cx88_core *core = dev->core;
1086 u32 status, mask, count;
1087
1088 status = cx_read(MO_VID_INTSTAT);
1089 mask = cx_read(MO_VID_INTMSK);
1090 if (0 == (status & mask))
1091 return;
1092 cx_write(MO_VID_INTSTAT, status);
1093 if (irq_debug || (status & mask & ~0xff))
1094 cx88_print_irqbits(core->name, "irq vid",
1095 cx88_vid_irqs, ARRAY_SIZE(cx88_vid_irqs),
1096 status, mask);
1097
1098
1099 if (status & (1 << 16)) {
1100 printk(KERN_WARNING "%s/0: video risc op code error\n",core->name);
1101 cx_clear(MO_VID_DMACNTRL, 0x11);
1102 cx_clear(VID_CAPTURE_CONTROL, 0x06);
1103 cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]);
1104 }
1105
1106
1107 if (status & 0x01) {
1108 spin_lock(&dev->slock);
1109 count = cx_read(MO_VIDY_GPCNT);
1110 cx88_wakeup(core, &dev->vidq, count);
1111 spin_unlock(&dev->slock);
1112 }
1113
1114
1115 if (status & 0x08) {
1116 spin_lock(&dev->slock);
1117 count = cx_read(MO_VBI_GPCNT);
1118 cx88_wakeup(core, &dev->vbiq, count);
1119 spin_unlock(&dev->slock);
1120 }
1121}
1122
1123static irqreturn_t cx8800_irq(int irq, void *dev_id)
1124{
1125 struct cx8800_dev *dev = dev_id;
1126 struct cx88_core *core = dev->core;
1127 u32 status;
1128 int loop, handled = 0;
1129
1130 for (loop = 0; loop < 10; loop++) {
1131 status = cx_read(MO_PCI_INTSTAT) &
1132 (core->pci_irqmask | PCI_INT_VIDINT);
1133 if (0 == status)
1134 goto out;
1135 cx_write(MO_PCI_INTSTAT, status);
1136 handled = 1;
1137
1138 if (status & core->pci_irqmask)
1139 cx88_core_irq(core,status);
1140 if (status & PCI_INT_VIDINT)
1141 cx8800_vid_irq(dev);
1142 }
1143 if (10 == loop) {
1144 printk(KERN_WARNING "%s/0: irq loop -- clearing mask\n",
1145 core->name);
1146 cx_write(MO_PCI_INTMSK,0);
1147 }
1148
1149 out:
1150 return IRQ_RETVAL(handled);
1151}
1152
1153
1154
1155
1156static const struct v4l2_file_operations video_fops =
1157{
1158 .owner = THIS_MODULE,
1159 .open = v4l2_fh_open,
1160 .release = vb2_fop_release,
1161 .read = vb2_fop_read,
1162 .poll = vb2_fop_poll,
1163 .mmap = vb2_fop_mmap,
1164 .unlocked_ioctl = video_ioctl2,
1165};
1166
1167static const struct v4l2_ioctl_ops video_ioctl_ops = {
1168 .vidioc_querycap = vidioc_querycap,
1169 .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
1170 .vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap,
1171 .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap,
1172 .vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap,
1173 .vidioc_reqbufs = vb2_ioctl_reqbufs,
1174 .vidioc_querybuf = vb2_ioctl_querybuf,
1175 .vidioc_qbuf = vb2_ioctl_qbuf,
1176 .vidioc_dqbuf = vb2_ioctl_dqbuf,
1177 .vidioc_g_std = vidioc_g_std,
1178 .vidioc_s_std = vidioc_s_std,
1179 .vidioc_enum_input = vidioc_enum_input,
1180 .vidioc_g_input = vidioc_g_input,
1181 .vidioc_s_input = vidioc_s_input,
1182 .vidioc_streamon = vb2_ioctl_streamon,
1183 .vidioc_streamoff = vb2_ioctl_streamoff,
1184 .vidioc_g_tuner = vidioc_g_tuner,
1185 .vidioc_s_tuner = vidioc_s_tuner,
1186 .vidioc_g_frequency = vidioc_g_frequency,
1187 .vidioc_s_frequency = vidioc_s_frequency,
1188 .vidioc_subscribe_event = v4l2_ctrl_subscribe_event,
1189 .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
1190#ifdef CONFIG_VIDEO_ADV_DEBUG
1191 .vidioc_g_register = vidioc_g_register,
1192 .vidioc_s_register = vidioc_s_register,
1193#endif
1194};
1195
1196static const struct video_device cx8800_video_template = {
1197 .name = "cx8800-video",
1198 .fops = &video_fops,
1199 .ioctl_ops = &video_ioctl_ops,
1200 .tvnorms = CX88_NORMS,
1201};
1202
1203static const struct v4l2_ioctl_ops vbi_ioctl_ops = {
1204 .vidioc_querycap = vidioc_querycap,
1205 .vidioc_g_fmt_vbi_cap = cx8800_vbi_fmt,
1206 .vidioc_try_fmt_vbi_cap = cx8800_vbi_fmt,
1207 .vidioc_s_fmt_vbi_cap = cx8800_vbi_fmt,
1208 .vidioc_reqbufs = vb2_ioctl_reqbufs,
1209 .vidioc_querybuf = vb2_ioctl_querybuf,
1210 .vidioc_qbuf = vb2_ioctl_qbuf,
1211 .vidioc_dqbuf = vb2_ioctl_dqbuf,
1212 .vidioc_g_std = vidioc_g_std,
1213 .vidioc_s_std = vidioc_s_std,
1214 .vidioc_enum_input = vidioc_enum_input,
1215 .vidioc_g_input = vidioc_g_input,
1216 .vidioc_s_input = vidioc_s_input,
1217 .vidioc_streamon = vb2_ioctl_streamon,
1218 .vidioc_streamoff = vb2_ioctl_streamoff,
1219 .vidioc_g_tuner = vidioc_g_tuner,
1220 .vidioc_s_tuner = vidioc_s_tuner,
1221 .vidioc_g_frequency = vidioc_g_frequency,
1222 .vidioc_s_frequency = vidioc_s_frequency,
1223#ifdef CONFIG_VIDEO_ADV_DEBUG
1224 .vidioc_g_register = vidioc_g_register,
1225 .vidioc_s_register = vidioc_s_register,
1226#endif
1227};
1228
1229static const struct video_device cx8800_vbi_template = {
1230 .name = "cx8800-vbi",
1231 .fops = &video_fops,
1232 .ioctl_ops = &vbi_ioctl_ops,
1233 .tvnorms = CX88_NORMS,
1234};
1235
1236static const struct v4l2_file_operations radio_fops =
1237{
1238 .owner = THIS_MODULE,
1239 .open = radio_open,
1240 .poll = v4l2_ctrl_poll,
1241 .release = v4l2_fh_release,
1242 .unlocked_ioctl = video_ioctl2,
1243};
1244
1245static const struct v4l2_ioctl_ops radio_ioctl_ops = {
1246 .vidioc_querycap = vidioc_querycap,
1247 .vidioc_g_tuner = radio_g_tuner,
1248 .vidioc_s_tuner = radio_s_tuner,
1249 .vidioc_g_frequency = vidioc_g_frequency,
1250 .vidioc_s_frequency = vidioc_s_frequency,
1251 .vidioc_subscribe_event = v4l2_ctrl_subscribe_event,
1252 .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
1253#ifdef CONFIG_VIDEO_ADV_DEBUG
1254 .vidioc_g_register = vidioc_g_register,
1255 .vidioc_s_register = vidioc_s_register,
1256#endif
1257};
1258
1259static const struct video_device cx8800_radio_template = {
1260 .name = "cx8800-radio",
1261 .fops = &radio_fops,
1262 .ioctl_ops = &radio_ioctl_ops,
1263};
1264
1265static const struct v4l2_ctrl_ops cx8800_ctrl_vid_ops = {
1266 .s_ctrl = cx8800_s_vid_ctrl,
1267};
1268
1269static const struct v4l2_ctrl_ops cx8800_ctrl_aud_ops = {
1270 .s_ctrl = cx8800_s_aud_ctrl,
1271};
1272
1273
1274
1275static void cx8800_unregister_video(struct cx8800_dev *dev)
1276{
1277 video_unregister_device(&dev->radio_dev);
1278 video_unregister_device(&dev->vbi_dev);
1279 video_unregister_device(&dev->video_dev);
1280}
1281
1282static int cx8800_initdev(struct pci_dev *pci_dev,
1283 const struct pci_device_id *pci_id)
1284{
1285 struct cx8800_dev *dev;
1286 struct cx88_core *core;
1287 struct vb2_queue *q;
1288 int err;
1289 int i;
1290
1291 dev = kzalloc(sizeof(*dev),GFP_KERNEL);
1292 if (NULL == dev)
1293 return -ENOMEM;
1294
1295
1296 dev->pci = pci_dev;
1297 if (pci_enable_device(pci_dev)) {
1298 err = -EIO;
1299 goto fail_free;
1300 }
1301 core = cx88_core_get(dev->pci);
1302 if (NULL == core) {
1303 err = -EINVAL;
1304 goto fail_free;
1305 }
1306 dev->core = core;
1307
1308
1309 dev->pci_rev = pci_dev->revision;
1310 pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER, &dev->pci_lat);
1311 printk(KERN_INFO "%s/0: found at %s, rev: %d, irq: %d, "
1312 "latency: %d, mmio: 0x%llx\n", core->name,
1313 pci_name(pci_dev), dev->pci_rev, pci_dev->irq,
1314 dev->pci_lat,(unsigned long long)pci_resource_start(pci_dev,0));
1315
1316 pci_set_master(pci_dev);
1317 err = pci_set_dma_mask(pci_dev,DMA_BIT_MASK(32));
1318 if (err) {
1319 printk("%s/0: Oops: no 32bit PCI DMA ???\n",core->name);
1320 goto fail_core;
1321 }
1322 dev->alloc_ctx = vb2_dma_sg_init_ctx(&pci_dev->dev);
1323 if (IS_ERR(dev->alloc_ctx)) {
1324 err = PTR_ERR(dev->alloc_ctx);
1325 goto fail_core;
1326 }
1327
1328
1329
1330 spin_lock_init(&dev->slock);
1331
1332
1333 INIT_LIST_HEAD(&dev->vidq.active);
1334
1335
1336 INIT_LIST_HEAD(&dev->vbiq.active);
1337
1338
1339 err = request_irq(pci_dev->irq, cx8800_irq,
1340 IRQF_SHARED, core->name, dev);
1341 if (err < 0) {
1342 printk(KERN_ERR "%s/0: can't get IRQ %d\n",
1343 core->name,pci_dev->irq);
1344 goto fail_core;
1345 }
1346 cx_set(MO_PCI_INTMSK, core->pci_irqmask);
1347
1348 for (i = 0; i < CX8800_AUD_CTLS; i++) {
1349 const struct cx88_ctrl *cc = &cx8800_aud_ctls[i];
1350 struct v4l2_ctrl *vc;
1351
1352 vc = v4l2_ctrl_new_std(&core->audio_hdl, &cx8800_ctrl_aud_ops,
1353 cc->id, cc->minimum, cc->maximum, cc->step, cc->default_value);
1354 if (vc == NULL) {
1355 err = core->audio_hdl.error;
1356 goto fail_core;
1357 }
1358 vc->priv = (void *)cc;
1359 }
1360
1361 for (i = 0; i < CX8800_VID_CTLS; i++) {
1362 const struct cx88_ctrl *cc = &cx8800_vid_ctls[i];
1363 struct v4l2_ctrl *vc;
1364
1365 vc = v4l2_ctrl_new_std(&core->video_hdl, &cx8800_ctrl_vid_ops,
1366 cc->id, cc->minimum, cc->maximum, cc->step, cc->default_value);
1367 if (vc == NULL) {
1368 err = core->video_hdl.error;
1369 goto fail_core;
1370 }
1371 vc->priv = (void *)cc;
1372 if (vc->id == V4L2_CID_CHROMA_AGC)
1373 core->chroma_agc = vc;
1374 }
1375 v4l2_ctrl_add_handler(&core->video_hdl, &core->audio_hdl, NULL);
1376
1377
1378
1379 if (core->board.audio_chip == CX88_AUDIO_WM8775) {
1380 struct i2c_board_info wm8775_info = {
1381 .type = "wm8775",
1382 .addr = 0x36 >> 1,
1383 .platform_data = &core->wm8775_data,
1384 };
1385 struct v4l2_subdev *sd;
1386
1387 if (core->boardnr == CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1)
1388 core->wm8775_data.is_nova_s = true;
1389 else
1390 core->wm8775_data.is_nova_s = false;
1391
1392 sd = v4l2_i2c_new_subdev_board(&core->v4l2_dev, &core->i2c_adap,
1393 &wm8775_info, NULL);
1394 if (sd != NULL) {
1395 core->sd_wm8775 = sd;
1396 sd->grp_id = WM8775_GID;
1397 }
1398 }
1399
1400 if (core->board.audio_chip == CX88_AUDIO_TVAUDIO) {
1401
1402
1403 v4l2_i2c_new_subdev(&core->v4l2_dev, &core->i2c_adap,
1404 "tvaudio", 0, I2C_ADDRS(0xb0 >> 1));
1405 }
1406
1407 switch (core->boardnr) {
1408 case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
1409 case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD: {
1410 static const struct i2c_board_info rtc_info = {
1411 I2C_BOARD_INFO("isl1208", 0x6f)
1412 };
1413
1414 request_module("rtc-isl1208");
1415 core->i2c_rtc = i2c_new_device(&core->i2c_adap, &rtc_info);
1416 }
1417
1418 case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
1419 request_module("ir-kbd-i2c");
1420 }
1421
1422
1423 pci_set_drvdata(pci_dev, dev);
1424
1425 dev->fmt = format_by_fourcc(V4L2_PIX_FMT_BGR24);
1426
1427
1428 core->v4ldev = dev;
1429
1430
1431 mutex_lock(&core->lock);
1432 cx88_set_tvnorm(core, core->tvnorm);
1433 v4l2_ctrl_handler_setup(&core->video_hdl);
1434 v4l2_ctrl_handler_setup(&core->audio_hdl);
1435 cx88_video_mux(core, 0);
1436
1437 q = &dev->vb2_vidq;
1438 q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1439 q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ;
1440 q->gfp_flags = GFP_DMA32;
1441 q->min_buffers_needed = 2;
1442 q->drv_priv = dev;
1443 q->buf_struct_size = sizeof(struct cx88_buffer);
1444 q->ops = &cx8800_video_qops;
1445 q->mem_ops = &vb2_dma_sg_memops;
1446 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1447 q->lock = &core->lock;
1448
1449 err = vb2_queue_init(q);
1450 if (err < 0)
1451 goto fail_unreg;
1452
1453 q = &dev->vb2_vbiq;
1454 q->type = V4L2_BUF_TYPE_VBI_CAPTURE;
1455 q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ;
1456 q->gfp_flags = GFP_DMA32;
1457 q->min_buffers_needed = 2;
1458 q->drv_priv = dev;
1459 q->buf_struct_size = sizeof(struct cx88_buffer);
1460 q->ops = &cx8800_vbi_qops;
1461 q->mem_ops = &vb2_dma_sg_memops;
1462 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1463 q->lock = &core->lock;
1464
1465 err = vb2_queue_init(q);
1466 if (err < 0)
1467 goto fail_unreg;
1468
1469
1470 cx88_vdev_init(core, dev->pci, &dev->video_dev,
1471 &cx8800_video_template, "video");
1472 video_set_drvdata(&dev->video_dev, dev);
1473 dev->video_dev.ctrl_handler = &core->video_hdl;
1474 dev->video_dev.queue = &dev->vb2_vidq;
1475 err = video_register_device(&dev->video_dev, VFL_TYPE_GRABBER,
1476 video_nr[core->nr]);
1477 if (err < 0) {
1478 printk(KERN_ERR "%s/0: can't register video device\n",
1479 core->name);
1480 goto fail_unreg;
1481 }
1482 printk(KERN_INFO "%s/0: registered device %s [v4l2]\n",
1483 core->name, video_device_node_name(&dev->video_dev));
1484
1485 cx88_vdev_init(core, dev->pci, &dev->vbi_dev,
1486 &cx8800_vbi_template, "vbi");
1487 video_set_drvdata(&dev->vbi_dev, dev);
1488 dev->vbi_dev.queue = &dev->vb2_vbiq;
1489 err = video_register_device(&dev->vbi_dev, VFL_TYPE_VBI,
1490 vbi_nr[core->nr]);
1491 if (err < 0) {
1492 printk(KERN_ERR "%s/0: can't register vbi device\n",
1493 core->name);
1494 goto fail_unreg;
1495 }
1496 printk(KERN_INFO "%s/0: registered device %s\n",
1497 core->name, video_device_node_name(&dev->vbi_dev));
1498
1499 if (core->board.radio.type == CX88_RADIO) {
1500 cx88_vdev_init(core, dev->pci, &dev->radio_dev,
1501 &cx8800_radio_template, "radio");
1502 video_set_drvdata(&dev->radio_dev, dev);
1503 dev->radio_dev.ctrl_handler = &core->audio_hdl;
1504 err = video_register_device(&dev->radio_dev, VFL_TYPE_RADIO,
1505 radio_nr[core->nr]);
1506 if (err < 0) {
1507 printk(KERN_ERR "%s/0: can't register radio device\n",
1508 core->name);
1509 goto fail_unreg;
1510 }
1511 printk(KERN_INFO "%s/0: registered device %s\n",
1512 core->name, video_device_node_name(&dev->radio_dev));
1513 }
1514
1515
1516 if (core->board.tuner_type != UNSET) {
1517 core->kthread = kthread_run(cx88_audio_thread, core, "cx88 tvaudio");
1518 if (IS_ERR(core->kthread)) {
1519 err = PTR_ERR(core->kthread);
1520 printk(KERN_ERR "%s/0: failed to create cx88 audio thread, err=%d\n",
1521 core->name, err);
1522 }
1523 }
1524 mutex_unlock(&core->lock);
1525
1526 return 0;
1527
1528fail_unreg:
1529 cx8800_unregister_video(dev);
1530 free_irq(pci_dev->irq, dev);
1531 mutex_unlock(&core->lock);
1532fail_core:
1533 vb2_dma_sg_cleanup_ctx(dev->alloc_ctx);
1534 core->v4ldev = NULL;
1535 cx88_core_put(core,dev->pci);
1536fail_free:
1537 kfree(dev);
1538 return err;
1539}
1540
1541static void cx8800_finidev(struct pci_dev *pci_dev)
1542{
1543 struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
1544 struct cx88_core *core = dev->core;
1545
1546
1547 if (core->kthread) {
1548 kthread_stop(core->kthread);
1549 core->kthread = NULL;
1550 }
1551
1552 if (core->ir)
1553 cx88_ir_stop(core);
1554
1555 cx88_shutdown(core);
1556
1557
1558
1559 free_irq(pci_dev->irq, dev);
1560 cx8800_unregister_video(dev);
1561 pci_disable_device(pci_dev);
1562
1563 core->v4ldev = NULL;
1564
1565
1566 cx88_core_put(core,dev->pci);
1567 vb2_dma_sg_cleanup_ctx(dev->alloc_ctx);
1568 kfree(dev);
1569}
1570
1571#ifdef CONFIG_PM
1572static int cx8800_suspend(struct pci_dev *pci_dev, pm_message_t state)
1573{
1574 struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
1575 struct cx88_core *core = dev->core;
1576 unsigned long flags;
1577
1578
1579 spin_lock_irqsave(&dev->slock, flags);
1580 if (!list_empty(&dev->vidq.active)) {
1581 printk("%s/0: suspend video\n", core->name);
1582 stop_video_dma(dev);
1583 }
1584 if (!list_empty(&dev->vbiq.active)) {
1585 printk("%s/0: suspend vbi\n", core->name);
1586 cx8800_stop_vbi_dma(dev);
1587 }
1588 spin_unlock_irqrestore(&dev->slock, flags);
1589
1590 if (core->ir)
1591 cx88_ir_stop(core);
1592
1593 cx88_shutdown(core);
1594
1595 pci_save_state(pci_dev);
1596 if (0 != pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state))) {
1597 pci_disable_device(pci_dev);
1598 dev->state.disabled = 1;
1599 }
1600 return 0;
1601}
1602
1603static int cx8800_resume(struct pci_dev *pci_dev)
1604{
1605 struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
1606 struct cx88_core *core = dev->core;
1607 unsigned long flags;
1608 int err;
1609
1610 if (dev->state.disabled) {
1611 err=pci_enable_device(pci_dev);
1612 if (err) {
1613 printk(KERN_ERR "%s/0: can't enable device\n",
1614 core->name);
1615 return err;
1616 }
1617
1618 dev->state.disabled = 0;
1619 }
1620 err= pci_set_power_state(pci_dev, PCI_D0);
1621 if (err) {
1622 printk(KERN_ERR "%s/0: can't set power state\n", core->name);
1623 pci_disable_device(pci_dev);
1624 dev->state.disabled = 1;
1625
1626 return err;
1627 }
1628 pci_restore_state(pci_dev);
1629
1630
1631 cx88_reset(core);
1632 if (core->ir)
1633 cx88_ir_start(core);
1634
1635 cx_set(MO_PCI_INTMSK, core->pci_irqmask);
1636
1637
1638 spin_lock_irqsave(&dev->slock, flags);
1639 if (!list_empty(&dev->vidq.active)) {
1640 printk("%s/0: resume video\n", core->name);
1641 restart_video_queue(dev,&dev->vidq);
1642 }
1643 if (!list_empty(&dev->vbiq.active)) {
1644 printk("%s/0: resume vbi\n", core->name);
1645 cx8800_restart_vbi_queue(dev,&dev->vbiq);
1646 }
1647 spin_unlock_irqrestore(&dev->slock, flags);
1648
1649 return 0;
1650}
1651#endif
1652
1653
1654
1655static const struct pci_device_id cx8800_pci_tbl[] = {
1656 {
1657 .vendor = 0x14f1,
1658 .device = 0x8800,
1659 .subvendor = PCI_ANY_ID,
1660 .subdevice = PCI_ANY_ID,
1661 },{
1662
1663 }
1664};
1665MODULE_DEVICE_TABLE(pci, cx8800_pci_tbl);
1666
1667static struct pci_driver cx8800_pci_driver = {
1668 .name = "cx8800",
1669 .id_table = cx8800_pci_tbl,
1670 .probe = cx8800_initdev,
1671 .remove = cx8800_finidev,
1672#ifdef CONFIG_PM
1673 .suspend = cx8800_suspend,
1674 .resume = cx8800_resume,
1675#endif
1676};
1677
1678module_pci_driver(cx8800_pci_driver);
1679
